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  1. 23 9月, 2016 1 次提交
  3. 29 1月, 2016 1 次提交
  5. 23 8月, 2013 1 次提交
  7. 04 7月, 2013 1 次提交
  9. 09 4月, 2013 2 次提交
  11. 01 3月, 2013 1 次提交
    • P
      hw: include hw header files with full paths · 83c9f4ca
      由 Paolo Bonzini 提交于 
      Done with this script:

cd hw
for i in `find . -name '*.h' | sed 's/^..//'`; do
  echo '\,^#.*include.*["<]'$i'[">], s,'$i',hw/&,'
done | sed -i -f - `find . -type f`

This is so that paths remain valid as files are moved.

Instead, files in hw/dataplane are referenced with the relative path.
We know they are not going to move to include/, and they are the only
include files that are in subdirectories _and_ move.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      83c9f4ca
  13. 19 12月, 2012 2 次提交
  15. 23 10月, 2012 1 次提交
    • A
      Rename target_phys_addr_t to hwaddr · a8170e5e
      由 Avi Kivity 提交于 
      target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific).  Replace it with a finger-friendly,
standards conformant hwaddr.

Outstanding patchsets can be fixed up with the command

  git rebase -i --exec 'find -name "*.[ch]"
                        | xargs s/target_phys_addr_t/hwaddr/g' origin
Signed-off-by: NAvi Kivity <avi@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      a8170e5e
  17. 14 1月, 2012 1 次提交
  19. 25 11月, 2011 1 次提交
  21. 21 8月, 2011 1 次提交
  23. 24 7月, 2011 1 次提交
  25. 11 12月, 2010 1 次提交
    • A
      Add endianness as io mem parameter · 2507c12a
      由 Alexander Graf 提交于 
      As stated before, devices can be little, big or native endian. The
target endianness is not of their concern, so we need to push things
down a level.

This patch adds a parameter to cpu_register_io_memory that allows a
device to choose its endianness. For now, all devices simply choose
native endian, because that's the same behavior as before.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      2507c12a
  27. 02 10月, 2009 2 次提交
  29. 26 8月, 2009 1 次提交
  31. 17 6月, 2009 1 次提交
  33. 08 5月, 2009 1 次提交
  35. 07 2月, 2009 1 次提交
  37. 08 12月, 2008 1 次提交
    • B
      SH4: Eliminate P4 to A7 mangling (Takashi YOSHII). · 5c16736a
      由 balrog 提交于 
      Main purpose of this is to delete
       *physical = address & 0x1fffffff;
at target-sh4/helper.c:449, using new mmio rule introduced by #5849
This masking is a nice trick to realize P4/A7 duality of SH registers.
But, IMHO, it is logically wrong.

Most of SH4 cpu control registers in P4 area(0xfc000000...0xffffffff) have
one more address called A7 which is usually P4 address with upper 3bits masked.
This is an address only appears in TLB's physical address part.

Current code use trick writing drivers as if they are really in A7
(that's why you see many *_A7 in hw/sh*.c), and using translation P4 to A7.
Signed-off-by: NTakashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5935 c046a42c-6fe2-441c-8c8c-71466251a162
      5c16736a
  39. 02 12月, 2008 1 次提交
  41. 22 11月, 2008 1 次提交
    • A
      SH4: Use qemu_irq in timer emulation. · 96e2fc41
      由 aurel32 提交于 
              * hw/sh.h (tmu012_init): Accept qemu_irq, not intc_source.
        * hw/sh7750.c (sh7750_init): Pass qemu_irq to tmu012_init.
        * hw/sh_intc.c (sh_intc_set_irq): New.
        (sh_intc_init): Allocate irqs.
        * hw/sh_intc.h (struct intc_desc): New field irqs.
        * hw/sh_timer.c (sh_timer_state): Use qemu_irq, not intc_source.
        (sh_timer_update): Use qemu_set_irq, not sh_intc_toggle_source.
        (sh_timer_init, tmu012_init): Adjust.

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5768 c046a42c-6fe2-441c-8c8c-71466251a162
      96e2fc41
  43. 12 12月, 2007 1 次提交
  45. 18 11月, 2007 2 次提交
  47. 30 9月, 2007 1 次提交