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- 15 3月, 2017 1 次提交
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由 Peter Maydell 提交于
Commit 4881658a introduced a call to arm_get_cpu_by_id(), and Coverity noticed that we weren't checking that it didn't return NULL (CID 1371652). Normally this won't happen (because all 4 CPUs are expected to exist), but it's possible the user requested fewer CPUs on the command line. Handle this possibility by silently doing nothing, which is the same behaviour as before commit 4881658a and also how we handle the other CPU operations (since we ignore the INVALID_PARAM returns from arm_set_cpu_on() and friends). There is a slight behavioural difference to the pre-4881658a situation: the "reset this core" bit will remain set rather than not being permitted to be set. The imx6 datasheet is unclear about the behaviour in this odd corner case, so we opt for the simpler code rather than complicated logic to maintain identical behaviour. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1488542374-1256-1-git-send-email-peter.maydell@linaro.org Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
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- 24 2月, 2017 1 次提交
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由 Alex Bennée 提交于
The arm_reset_cpu/set_cpu_on/set_cpu_off() functions do their work asynchronously in the target vCPUs context. As a result we need to ensure the SRC_SCR reset bits correctly report the reset status at the right time. To do this we defer the clearing of the bit with an async job which will run after the work queued by ARM powerctl functions. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
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- 23 9月, 2016 1 次提交
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由 Peter Maydell 提交于
'char const' means the same thing as 'const char', but we use the former in only a handful of places and we use the latter over six thousand times. Switch the imx reg_name() functions to bring them in line with everything else. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 19 5月, 2016 1 次提交
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由 Paolo Bonzini 提交于
Move the inclusion out of hw/hw.h, most files do not need it. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 12 5月, 2016 1 次提交
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由 Jean-Christophe DUBOIS 提交于
This controller is also present in i.MX5X devices but they are not yet emulated by QEMU. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NJean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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