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  1. 09 4月, 2013 2 次提交
  3. 01 3月, 2013 1 次提交
    • P
      hw: include hw header files with full paths · 83c9f4ca
      由 Paolo Bonzini 提交于 
      Done with this script:

cd hw
for i in `find . -name '*.h' | sed 's/^..//'`; do
  echo '\,^#.*include.*["<]'$i'[">], s,'$i',hw/&,'
done | sed -i -f - `find . -type f`

This is so that paths remain valid as files are moved.

Instead, files in hw/dataplane are referenced with the relative path.
We know they are not going to move to include/, and they are the only
include files that are in subdirectories _and_ move.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      83c9f4ca
  5. 16 1月, 2013 1 次提交
  7. 19 12月, 2012 2 次提交
  9. 04 12月, 2012 1 次提交
  11. 23 10月, 2012 1 次提交
    • A
      Rename target_phys_addr_t to hwaddr · a8170e5e
      由 Avi Kivity 提交于 
      target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific).  Replace it with a finger-friendly,
standards conformant hwaddr.

Outstanding patchsets can be fixed up with the command

  git rebase -i --exec 'find -name "*.[ch]"
                        | xargs s/target_phys_addr_t/hwaddr/g' origin
Signed-off-by: NAvi Kivity <avi@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      a8170e5e
  13. 04 11月, 2011 1 次提交
    • K
      dma: Avoid reentrancy in DMA transfer handlers · acae6f1c
      由 Kevin Wolf 提交于 
      With the conversion of the block layer to coroutines, bdrv_read/write
have changed to run a nested event loop that calls qemu_bh_poll.
Consequently a scheduled BH can be called while a DMA transfer handler
runs and this means that DMA_run becomes reentrant.

Devices haven't been designed to cope with that, so instead of running a
nested transfer handler just wait for the next invocation of the BH from the
main loop.

This fixes some problems with the floppy device.
Signed-off-by: NKevin Wolf <kwolf@redhat.com>
      acae6f1c
  15. 06 7月, 2010 1 次提交
  17. 22 5月, 2010 1 次提交
  19. 13 1月, 2010 1 次提交
  21. 05 10月, 2009 1 次提交
  23. 02 10月, 2009 2 次提交
  25. 12 9月, 2009 1 次提交
  27. 30 6月, 2009 1 次提交
  29. 22 5月, 2009 1 次提交
    • J
      Introduce reset notifier order · 8217606e
      由 Jan Kiszka 提交于 
      Add the parameter 'order' to qemu_register_reset and sort callbacks on
registration. On system reset, callbacks with lower order will be
invoked before those with higher order. Update all existing users to the
standard order 0.

Note: At least for x86, the existing users seem to assume that handlers
are called in their registration order. Therefore, the patch preserves
this property. If someone feels bored, (s)he could try to identify this
dependency and express it properly on callback registration.
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      8217606e
  31. 17 3月, 2009 1 次提交
  33. 08 3月, 2009 1 次提交
  35. 23 12月, 2008 1 次提交
  37. 01 11月, 2008 1 次提交
    • A
      Make DMA bottom-half driven (v2) · 492c30af
      由 aliguori 提交于 
      The current DMA routines are driven by a call in main_loop_wait() after every
select.

This patch converts the DMA code to be driven by a constantly rescheduled
bottom half.  The advantage of using a scheduled bottom half is that we can
stop scheduling the bottom half when there no DMA channels are runnable.  This
means we can potentially detect this case and sleep longer in the main loop.

The only two architectures implementing DMA_run() are cris and i386.  For cris,
I converted it to a simple repeating bottom half.  I've only compile tested
this as cris does not seem to work on a 64-bit host.  It should be functionally
identical to the previous implementation so I expect it to work.

For x86, I've made sure to only fire the DMA bottom half if there is a DMA
channel that is runnable.  The effect of this is that unless you're using sb16
or a floppy disk, the DMA bottom half never fires.

You probably should test this malc.  My own benchmarks actually show slight
improvement by it's possible the change in timing could affect your demos.

Since v1, I've changed the code to use a BH instead of a timer.  cris at least
seems to depend on faster than 10ms polling.
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5573 c046a42c-6fe2-441c-8c8c-71466251a162
      492c30af
  39. 06 7月, 2008 1 次提交
  41. 05 7月, 2008 1 次提交
  43. 14 1月, 2008 1 次提交
  45. 17 12月, 2007 1 次提交
  47. 18 11月, 2007 1 次提交
  49. 09 6月, 2007 1 次提交
  51. 22 11月, 2005 1 次提交
  53. 15 11月, 2004 1 次提交
  55. 08 11月, 2004 1 次提交
  57. 22 6月, 2004 1 次提交
  59. 20 6月, 2004 1 次提交
  61. 08 6月, 2004 1 次提交
  63. 13 4月, 2004 1 次提交
  65. 07 4月, 2004 1 次提交
  67. 01 4月, 2004 1 次提交
  69. 15 3月, 2004 1 次提交
  71. 26 2月, 2004 1 次提交
  73. 20 1月, 2004 1 次提交