- 19 3月, 2010 1 次提交
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由 Blue Swirl 提交于
When building with -DNDEBUG, assert(0) will not stop execution so it must not be used for abnormal termination. Use cpu_abort() when in CPU context, abort() otherwise. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 10 2月, 2010 1 次提交
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由 Aurelien Jarno 提交于
When the MMUCR TI bit is set, all the UTLB and ITLB entries should be flushed. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 02 10月, 2009 2 次提交
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由 Anthony Liguori 提交于
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 malc 提交于
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: Nmalc <av1474@comtv.ru>
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- 26 9月, 2009 1 次提交
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由 Juan Quintela 提交于
Signed-off-by: NJuan Quintela <quintela@redhat.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 26 8月, 2009 1 次提交
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由 Blue Swirl 提交于
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 17 6月, 2009 1 次提交
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由 Avi Kivity 提交于
The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 14 5月, 2009 1 次提交
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由 Paul Brook 提交于
Include assert.h from qemu-common.h and remove other direct uses. cpu-all.h still need to include it because of the dyngen-exec.h hacks Signed-off-by: NPaul Brook <paul@codesourcery.com>
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- 07 2月, 2009 1 次提交
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由 aurel32 提交于
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6548 c046a42c-6fe2-441c-8c8c-71466251a162
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- 13 12月, 2008 1 次提交
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
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- 08 12月, 2008 4 次提交
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由 balrog 提交于
Main purpose of this is to delete *physical = address & 0x1fffffff; at target-sh4/helper.c:449, using new mmio rule introduced by #5849 This masking is a nice trick to realize P4/A7 duality of SH registers. But, IMHO, it is logically wrong. Most of SH4 cpu control registers in P4 area(0xfc000000...0xffffffff) have one more address called A7 which is usually P4 address with upper 3bits masked. This is an address only appears in TLB's physical address part. Current code use trick writing drivers as if they are really in A7 (that's why you see many *_A7 in hw/sh*.c), and using translation P4 to A7. Signed-off-by: NTakashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5935 c046a42c-6fe2-441c-8c8c-71466251a162
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由 balrog 提交于
Fixes to be needed for commit #5849 "Change MMIO callbacks..." hw/sh7750.c: - Divide region of CPU control registers to avoid overlapping to peripheral modules. - Delete unused var "icr", which had moved to hw/sh_intc.c. hw/sm501.c: - Merge non page aligned palette registers into the region of control registers. Signed-off-by: NTakashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5934 c046a42c-6fe2-441c-8c8c-71466251a162
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由 balrog 提交于
This patch adds pci support to sh/r2d board. This is the first user of PCIC support I formerly sent. PCIC actually is inside of chip with CPU core on SH7751. But, this code is written as if SH7750 and PCIC are on board. I care little about physical device boundary, but fitting with qemu's design. This patch also adds some BSC (Bus State Controller) registers, because PCI device driver software have to accesses them. Signed-off-by: NTakashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5932 c046a42c-6fe2-441c-8c8c-71466251a162
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由 balrog 提交于
This patch adds IRL(4bit encoded 15 level interrupt input) support to SH using qemu_irq as a multi level (!=on/off) signal. Signed-off-by: NTakashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5925 c046a42c-6fe2-441c-8c8c-71466251a162
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- 02 12月, 2008 1 次提交
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由 pbrook 提交于
Signed-off-by: NPaul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
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- 22 11月, 2008 2 次提交
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由 aurel32 提交于
This patches makes SH serial emulation use qemu_irq in its interface. * hw/sh.h (sh_serial_init): Take qemu_irq, not intc_source. * hw/sh7750.c (sh7750_init): Adjust. * hw/sh_intc.c (sh_intc_set_irq): Don't assert or deassert irq more than once. * hw/sh_serial.c (sh_serial_state): Use qemu_irq, not intc_source. (sh_serial_clear_fifo, sh_serial_ioport_write) (sh_serial_receive_byte): Adjust. (sh_serial_init): Take qemu_irq, not intc_source. (Vladimir Prus) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5769 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
* hw/sh.h (tmu012_init): Accept qemu_irq, not intc_source. * hw/sh7750.c (sh7750_init): Pass qemu_irq to tmu012_init. * hw/sh_intc.c (sh_intc_set_irq): New. (sh_intc_init): Allocate irqs. * hw/sh_intc.h (struct intc_desc): New field irqs. * hw/sh_timer.c (sh_timer_state): Use qemu_irq, not intc_source. (sh_timer_update): Use qemu_set_irq, not sh_intc_toggle_source. (sh_timer_init, tmu012_init): Adjust. (Vladimir Prus) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5768 c046a42c-6fe2-441c-8c8c-71466251a162
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- 03 9月, 2008 1 次提交
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由 aurel32 提交于
Trivial patch adding CPU listing and the ability to do per-subtype CVR/PVR/PRR values. Presently SH7750R and SH7751R definitions are provided, as these are the ones in present use in-tree. The CVR value for SH7751R is intentionally restricted so the kernel boots, though this will want to be switched to the proper CVR value once system emulation has sufficiently stabilized. This also makes it trivial to abstract subtype specific registers like MMU_PTEA and to set up feature bits in line with the kernel probing for things like conditionalizing FPU/DSP context. Signed-off-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5133 c046a42c-6fe2-441c-8c8c-71466251a162
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- 22 8月, 2008 2 次提交
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由 aurel32 提交于
Some bugs on SH4 MMU are fixed. - When a TLB entry is overwritten or invalidated, tlb_flush_page() should be invoked to invalidate old entry. - When a ASID is changed, tlb_flush() should be invoke to invalidate entries which have old ASID. - The check for shared bit in TLB entry causes multiple TLB hit exception. As SH3's MMU, shared bit is ignored. - ASID is used when MMUCR's SV bit or SR's MD bit is zero. No need to check both bits are zero. (Shin-ichiro KAWASAKI) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5068 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
SH4 MMU's memory mapped TLB feature is implemented. SH-Linux seems to write to memory mapped TLB to invalidate a TLB entry, but does not to read it. So only memory write feature is implemented. Work on memory read feature is left. (Shin-ichiro KAWASAKI) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5067 c046a42c-6fe2-441c-8c8c-71466251a162
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- 16 7月, 2008 1 次提交
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由 balrog 提交于
Fix a typo in my previous comming (spotted by Laurent Desnouges). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4877 c046a42c-6fe2-441c-8c8c-71466251a162
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- 10 5月, 2008 2 次提交
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由 aurel32 提交于
(Shin-ichiro KAWASAKI) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4397 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
(Shin-ichiro KAWASAKI) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4396 c046a42c-6fe2-441c-8c8c-71466251a162
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- 12 12月, 2007 1 次提交
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由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3812 c046a42c-6fe2-441c-8c8c-71466251a162
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- 02 12月, 2007 1 次提交
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由 ths 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3762 c046a42c-6fe2-441c-8c8c-71466251a162
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- 18 11月, 2007 1 次提交
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由 pbrook 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
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- 12 11月, 2007 1 次提交
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由 bellard 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3602 c046a42c-6fe2-441c-8c8c-71466251a162
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- 05 10月, 2007 1 次提交
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由 balrog 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3327 c046a42c-6fe2-441c-8c8c-71466251a162
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- 30 9月, 2007 4 次提交
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由 ths 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3272 c046a42c-6fe2-441c-8c8c-71466251a162
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由 ths 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3271 c046a42c-6fe2-441c-8c8c-71466251a162
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由 ths 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3270 c046a42c-6fe2-441c-8c8c-71466251a162
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由 ths 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3269 c046a42c-6fe2-441c-8c8c-71466251a162
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- 17 9月, 2007 1 次提交
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由 ths 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
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- 28 1月, 2007 1 次提交
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由 pbrook 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2361 c046a42c-6fe2-441c-8c8c-71466251a162
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- 26 6月, 2006 1 次提交
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由 bellard 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
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- 28 4月, 2006 1 次提交
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由 bellard 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1862 c046a42c-6fe2-441c-8c8c-71466251a162
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