pci.c 55.7 KB
Newer Older
B
bellard 已提交
1 2 3 4
/*
 * QEMU PCI bus manager
 *
 * Copyright (c) 2004 Fabrice Bellard
5
 *
B
bellard 已提交
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
P
pbrook 已提交
24 25
#include "hw.h"
#include "pci.h"
A
aliguori 已提交
26
#include "monitor.h"
P
pbrook 已提交
27
#include "net.h"
28
#include "sysemu.h"
29
#include "loader.h"
30
#include "qemu-objects.h"
B
bellard 已提交
31 32

//#define DEBUG_PCI
33
#ifdef DEBUG_PCI
34
# define PCI_DPRINTF(format, ...)       printf(format, ## __VA_ARGS__)
35 36 37
#else
# define PCI_DPRINTF(format, ...)       do { } while (0)
#endif
B
bellard 已提交
38

39
struct PCIBus {
P
Paul Brook 已提交
40
    BusState qbus;
41
    int devfn_min;
P
pbrook 已提交
42
    pci_set_irq_fn set_irq;
43
    pci_map_irq_fn map_irq;
G
Gerd Hoffmann 已提交
44
    pci_hotplug_fn hotplug;
45
    void *irq_opaque;
46
    PCIDevice *devices[256];
P
pbrook 已提交
47
    PCIDevice *parent_dev;
B
Blue Swirl 已提交
48
    target_phys_addr_t mem_base;
49 50 51 52

    QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
    QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */

53 54
    /* The bus IRQ state is the logical OR of the connected devices.
       Keep a count of the number of devices with raised IRQs.  */
55
    int nirq;
56 57 58 59 60 61 62 63 64
    int *irq_count;
};

static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent);

static struct BusInfo pci_bus_info = {
    .name       = "PCI",
    .size       = sizeof(PCIBus),
    .print_dev  = pcibus_dev_print,
G
Gerd Hoffmann 已提交
65
    .props      = (Property[]) {
66
        DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1),
67
        DEFINE_PROP_STRING("romfile", PCIDevice, romfile),
68
        DEFINE_PROP_UINT32("rombar",  PCIDevice, rom_bar, 1),
69
        DEFINE_PROP_END_OF_LIST()
G
Gerd Hoffmann 已提交
70
    }
71
};
B
bellard 已提交
72

B
bellard 已提交
73
static void pci_update_mappings(PCIDevice *d);
P
pbrook 已提交
74
static void pci_set_irq(void *opaque, int irq_num, int level);
75
static int pci_add_option_rom(PCIDevice *pdev);
B
bellard 已提交
76

77 78
static uint16_t pci_default_sub_vendor_id = PCI_SUBVENDOR_ID_REDHAT_QUMRANET;
static uint16_t pci_default_sub_device_id = PCI_SUBDEVICE_ID_QEMU;
79 80 81 82 83 84 85

struct PCIHostBus {
    int domain;
    struct PCIBus *bus;
    QLIST_ENTRY(PCIHostBus) next;
};
static QLIST_HEAD(, PCIHostBus) host_buses;
86

J
Juan Quintela 已提交
87 88 89 90 91 92 93
static const VMStateDescription vmstate_pcibus = {
    .name = "PCIBUS",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_INT32_EQUAL(nirq, PCIBus),
94
        VMSTATE_VARRAY_INT32(irq_count, PCIBus, nirq, 0, vmstate_info_int32, int32_t),
J
Juan Quintela 已提交
95
        VMSTATE_END_OF_LIST()
96
    }
J
Juan Quintela 已提交
97
};
98

99
static int pci_bar(PCIDevice *d, int reg)
100
{
101 102 103 104 105 106 107
    uint8_t type;

    if (reg != PCI_ROM_SLOT)
        return PCI_BASE_ADDRESS_0 + reg * 4;

    type = d->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTION;
    return type == PCI_HEADER_TYPE_BRIDGE ? PCI_ROM_ADDRESS1 : PCI_ROM_ADDRESS;
108 109
}

110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134
static inline int pci_irq_state(PCIDevice *d, int irq_num)
{
	return (d->irq_state >> irq_num) & 0x1;
}

static inline void pci_set_irq_state(PCIDevice *d, int irq_num, int level)
{
	d->irq_state &= ~(0x1 << irq_num);
	d->irq_state |= level << irq_num;
}

static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change)
{
    PCIBus *bus;
    for (;;) {
        bus = pci_dev->bus;
        irq_num = bus->map_irq(pci_dev, irq_num);
        if (bus->set_irq)
            break;
        pci_dev = bus->parent_dev;
    }
    bus->irq_count[irq_num] += change;
    bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0);
}

135 136 137 138 139 140 141 142 143 144 145
/* Update interrupt status bit in config space on interrupt
 * state change. */
static void pci_update_irq_status(PCIDevice *dev)
{
    if (dev->irq_state) {
        dev->config[PCI_STATUS] |= PCI_STATUS_INTERRUPT;
    } else {
        dev->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT;
    }
}

146 147
static void pci_device_reset(PCIDevice *dev)
{
148 149
    int r;

150
    dev->irq_state = 0;
151
    pci_update_irq_status(dev);
152 153 154 155 156 157 158 159
    dev->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
                                  PCI_COMMAND_MASTER);
    dev->config[PCI_CACHE_LINE_SIZE] = 0x0;
    dev->config[PCI_INTERRUPT_LINE] = 0x0;
    for (r = 0; r < PCI_NUM_REGIONS; ++r) {
        if (!dev->io_regions[r].size) {
            continue;
        }
160
        pci_set_long(dev->config + pci_bar(dev, r), dev->io_regions[r].type);
161 162
    }
    pci_update_mappings(dev);
163 164
}

G
Gleb Natapov 已提交
165 166
static void pci_bus_reset(void *opaque)
{
167
    PCIBus *bus = opaque;
G
Gleb Natapov 已提交
168 169 170 171 172
    int i;

    for (i = 0; i < bus->nirq; i++) {
        bus->irq_count[i] = 0;
    }
173 174 175 176
    for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) {
        if (bus->devices[i]) {
            pci_device_reset(bus->devices[i]);
        }
G
Gleb Natapov 已提交
177 178 179
    }
}

180 181 182 183 184 185 186 187 188
static void pci_host_bus_register(int domain, PCIBus *bus)
{
    struct PCIHostBus *host;
    host = qemu_mallocz(sizeof(*host));
    host->domain = domain;
    host->bus = bus;
    QLIST_INSERT_HEAD(&host_buses, host, next);
}

189
PCIBus *pci_find_root_bus(int domain)
190 191 192 193 194 195 196 197 198 199 200 201
{
    struct PCIHostBus *host;

    QLIST_FOREACH(host, &host_buses, next) {
        if (host->domain == domain) {
            return host->bus;
        }
    }

    return NULL;
}

202 203
void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
                         const char *name, int devfn_min)
204
{
205
    qbus_create_inplace(&bus->qbus, &pci_bus_info, parent, name);
P
pbrook 已提交
206
    bus->devfn_min = devfn_min;
207 208 209 210 211

    /* host bridge */
    QLIST_INIT(&bus->child);
    pci_host_bus_register(0, bus); /* for now only pci domain 0 is supported */

212
    vmstate_register(-1, &vmstate_pcibus, bus);
213
    qemu_register_reset(pci_bus_reset, bus);
214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235
}

PCIBus *pci_bus_new(DeviceState *parent, const char *name, int devfn_min)
{
    PCIBus *bus;

    bus = qemu_mallocz(sizeof(*bus));
    bus->qbus.qdev_allocated = 1;
    pci_bus_new_inplace(bus, parent, name, devfn_min);
    return bus;
}

void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
                  void *irq_opaque, int nirq)
{
    bus->set_irq = set_irq;
    bus->map_irq = map_irq;
    bus->irq_opaque = irq_opaque;
    bus->nirq = nirq;
    bus->irq_count = qemu_mallocz(nirq * sizeof(bus->irq_count[0]));
}

G
Gerd Hoffmann 已提交
236 237 238 239 240 241
void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug)
{
    bus->qbus.allow_hotplug = 1;
    bus->hotplug = hotplug;
}

B
Blue Swirl 已提交
242 243 244 245 246
void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base)
{
    bus->mem_base = base;
}

247 248 249 250 251 252 253 254
PCIBus *pci_register_bus(DeviceState *parent, const char *name,
                         pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
                         void *irq_opaque, int devfn_min, int nirq)
{
    PCIBus *bus;

    bus = pci_bus_new(parent, name, devfn_min);
    pci_bus_irqs(bus, set_irq, map_irq, irq_opaque, nirq);
255 256
    return bus;
}
B
bellard 已提交
257

258 259
static void pci_register_secondary_bus(PCIBus *parent,
                                       PCIBus *bus,
G
Gerd Hoffmann 已提交
260 261 262
                                       PCIDevice *dev,
                                       pci_map_irq_fn map_irq,
                                       const char *name)
P
pbrook 已提交
263
{
G
Gerd Hoffmann 已提交
264
    qbus_create_inplace(&bus->qbus, &pci_bus_info, &dev->qdev, name);
P
pbrook 已提交
265 266
    bus->map_irq = map_irq;
    bus->parent_dev = dev;
267 268 269 270 271 272 273 274 275

    QLIST_INIT(&bus->child);
    QLIST_INSERT_HEAD(&parent->child, bus, sibling);
}

static void pci_unregister_secondary_bus(PCIBus *bus)
{
    assert(QLIST_EMPTY(&bus->child));
    QLIST_REMOVE(bus, sibling);
P
pbrook 已提交
276 277
}

P
pbrook 已提交
278 279
int pci_bus_num(PCIBus *s)
{
280 281 282
    if (!s->parent_dev)
        return 0;       /* pci host bridge */
    return s->parent_dev->config[PCI_SECONDARY_BUS];
P
pbrook 已提交
283 284
}

J
Juan Quintela 已提交
285
static int get_pci_config_device(QEMUFile *f, void *pv, size_t size)
286
{
J
Juan Quintela 已提交
287
    PCIDevice *s = container_of(pv, PCIDevice, config);
I
Isaku Yamahata 已提交
288
    uint8_t *config;
289 290
    int i;

I
Isaku Yamahata 已提交
291 292 293 294 295 296 297
    assert(size == pci_config_size(s));
    config = qemu_malloc(size);

    qemu_get_buffer(f, config, size);
    for (i = 0; i < size; ++i) {
        if ((config[i] ^ s->config[i]) & s->cmask[i] & ~s->wmask[i]) {
            qemu_free(config);
298
            return -EINVAL;
I
Isaku Yamahata 已提交
299 300 301
        }
    }
    memcpy(s->config, config, size);
302

B
bellard 已提交
303
    pci_update_mappings(s);
304

I
Isaku Yamahata 已提交
305
    qemu_free(config);
306 307 308
    return 0;
}

J
Juan Quintela 已提交
309
/* just put buffer */
310
static void put_pci_config_device(QEMUFile *f, void *pv, size_t size)
J
Juan Quintela 已提交
311
{
312
    const uint8_t **v = pv;
I
Isaku Yamahata 已提交
313
    assert(size == pci_config_size(container_of(pv, PCIDevice, config)));
314
    qemu_put_buffer(f, *v, size);
J
Juan Quintela 已提交
315 316 317 318 319 320 321 322
}

static VMStateInfo vmstate_info_pci_config = {
    .name = "pci config",
    .get  = get_pci_config_device,
    .put  = put_pci_config_device,
};

323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359
static int get_pci_irq_state(QEMUFile *f, void *pv, size_t size)
{
    PCIDevice *s = container_of(pv, PCIDevice, config);
    uint32_t irq_state[PCI_NUM_PINS];
    int i;
    for (i = 0; i < PCI_NUM_PINS; ++i) {
        irq_state[i] = qemu_get_be32(f);
        if (irq_state[i] != 0x1 && irq_state[i] != 0) {
            fprintf(stderr, "irq state %d: must be 0 or 1.\n",
                    irq_state[i]);
            return -EINVAL;
        }
    }

    for (i = 0; i < PCI_NUM_PINS; ++i) {
        pci_set_irq_state(s, i, irq_state[i]);
    }

    return 0;
}

static void put_pci_irq_state(QEMUFile *f, void *pv, size_t size)
{
    int i;
    PCIDevice *s = container_of(pv, PCIDevice, config);

    for (i = 0; i < PCI_NUM_PINS; ++i) {
        qemu_put_be32(f, pci_irq_state(s, i));
    }
}

static VMStateInfo vmstate_info_pci_irq_state = {
    .name = "pci irq state",
    .get  = get_pci_irq_state,
    .put  = put_pci_irq_state,
};

J
Juan Quintela 已提交
360 361 362 363 364 365 366
const VMStateDescription vmstate_pci_device = {
    .name = "PCIDevice",
    .version_id = 2,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_INT32_LE(version_id, PCIDevice),
I
Isaku Yamahata 已提交
367 368 369
        VMSTATE_BUFFER_UNSAFE_INFO(config, PCIDevice, 0,
                                   vmstate_info_pci_config,
                                   PCI_CONFIG_SPACE_SIZE),
370 371 372
        VMSTATE_BUFFER_UNSAFE_INFO(irq_state, PCIDevice, 2,
				   vmstate_info_pci_irq_state,
				   PCI_NUM_PINS * sizeof(int32_t)),
I
Isaku Yamahata 已提交
373 374 375 376 377 378 379 380 381 382 383 384 385 386
        VMSTATE_END_OF_LIST()
    }
};

const VMStateDescription vmstate_pcie_device = {
    .name = "PCIDevice",
    .version_id = 2,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_INT32_LE(version_id, PCIDevice),
        VMSTATE_BUFFER_UNSAFE_INFO(config, PCIDevice, 0,
                                   vmstate_info_pci_config,
                                   PCIE_CONFIG_SPACE_SIZE),
387 388 389
        VMSTATE_BUFFER_UNSAFE_INFO(irq_state, PCIDevice, 2,
				   vmstate_info_pci_irq_state,
				   PCI_NUM_PINS * sizeof(int32_t)),
J
Juan Quintela 已提交
390 391 392 393
        VMSTATE_END_OF_LIST()
    }
};

I
Isaku Yamahata 已提交
394 395 396 397 398
static inline const VMStateDescription *pci_get_vmstate(PCIDevice *s)
{
    return pci_is_express(s) ? &vmstate_pcie_device : &vmstate_pci_device;
}

J
Juan Quintela 已提交
399 400
void pci_device_save(PCIDevice *s, QEMUFile *f)
{
401 402 403 404 405
    /* Clear interrupt status bit: it is implicit
     * in irq_state which we are saving.
     * This makes us compatible with old devices
     * which never set or clear this bit. */
    s->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT;
I
Isaku Yamahata 已提交
406
    vmstate_save_state(f, pci_get_vmstate(s), s);
407 408
    /* Restore the interrupt status bit. */
    pci_update_irq_status(s);
J
Juan Quintela 已提交
409 410 411 412
}

int pci_device_load(PCIDevice *s, QEMUFile *f)
{
413 414 415 416 417
    int ret;
    ret = vmstate_load_state(f, pci_get_vmstate(s), s, s->version_id);
    /* Restore the interrupt status bit. */
    pci_update_irq_status(s);
    return ret;
J
Juan Quintela 已提交
418 419
}

420 421 422 423
static int pci_set_default_subsystem_id(PCIDevice *pci_dev)
{
    uint16_t *id;

424
    id = (void*)(&pci_dev->config[PCI_SUBSYSTEM_VENDOR_ID]);
425 426 427 428 429
    id[0] = cpu_to_le16(pci_default_sub_vendor_id);
    id[1] = cpu_to_le16(pci_default_sub_device_id);
    return 0;
}

430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469
/*
 * Parse [[<domain>:]<bus>:]<slot>, return -1 on error
 */
static int pci_parse_devaddr(const char *addr, int *domp, int *busp, unsigned *slotp)
{
    const char *p;
    char *e;
    unsigned long val;
    unsigned long dom = 0, bus = 0;
    unsigned slot = 0;

    p = addr;
    val = strtoul(p, &e, 16);
    if (e == p)
	return -1;
    if (*e == ':') {
	bus = val;
	p = e + 1;
	val = strtoul(p, &e, 16);
	if (e == p)
	    return -1;
	if (*e == ':') {
	    dom = bus;
	    bus = val;
	    p = e + 1;
	    val = strtoul(p, &e, 16);
	    if (e == p)
		return -1;
	}
    }

    if (dom > 0xffff || bus > 0xff || val > 0x1f)
	return -1;

    slot = val;

    if (*e)
	return -1;

    /* Note: QEMU doesn't implement domains other than 0 */
470
    if (!pci_find_bus(pci_find_root_bus(dom), bus))
471 472 473 474 475 476 477 478
	return -1;

    *domp = dom;
    *busp = bus;
    *slotp = slot;
    return 0;
}

479 480
int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp,
                     unsigned *slotp)
481
{
482 483 484 485 486 487
    /* strip legacy tag */
    if (!strncmp(addr, "pci_addr=", 9)) {
        addr += 9;
    }
    if (pci_parse_devaddr(addr, domp, busp, slotp)) {
        monitor_printf(mon, "Invalid pci address\n");
488
        return -1;
489 490
    }
    return 0;
491 492
}

493
PCIBus *pci_get_bus_devfn(int *devfnp, const char *devaddr)
494 495 496 497 498 499
{
    int dom, bus;
    unsigned slot;

    if (!devaddr) {
        *devfnp = -1;
500
        return pci_find_bus(pci_find_root_bus(0), 0);
501 502 503 504 505 506 507
    }

    if (pci_parse_devaddr(devaddr, &dom, &bus, &slot) < 0) {
        return NULL;
    }

    *devfnp = slot << 3;
508
    return pci_find_bus(pci_find_root_bus(0), bus);
509 510
}

511 512 513 514 515 516 517 518 519 520 521 522
static void pci_init_cmask(PCIDevice *dev)
{
    pci_set_word(dev->cmask + PCI_VENDOR_ID, 0xffff);
    pci_set_word(dev->cmask + PCI_DEVICE_ID, 0xffff);
    dev->cmask[PCI_STATUS] = PCI_STATUS_CAP_LIST;
    dev->cmask[PCI_REVISION_ID] = 0xff;
    dev->cmask[PCI_CLASS_PROG] = 0xff;
    pci_set_word(dev->cmask + PCI_CLASS_DEVICE, 0xffff);
    dev->cmask[PCI_HEADER_TYPE] = 0xff;
    dev->cmask[PCI_CAPABILITY_LIST] = 0xff;
}

523 524
static void pci_init_wmask(PCIDevice *dev)
{
I
Isaku Yamahata 已提交
525 526
    int config_size = pci_config_size(dev);

527 528
    dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff;
    dev->wmask[PCI_INTERRUPT_LINE] = 0xff;
I
Isaku Yamahata 已提交
529
    pci_set_word(dev->wmask + PCI_COMMAND,
530 531
                 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
                 PCI_COMMAND_INTX_DISABLE);
532 533 534

    memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff,
           config_size - PCI_CONFIG_HEADER_SIZE);
535 536
}

537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560
static void pci_init_wmask_bridge(PCIDevice *d)
{
    /* PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS and
       PCI_SEC_LETENCY_TIMER */
    memset(d->wmask + PCI_PRIMARY_BUS, 0xff, 4);

    /* base and limit */
    d->wmask[PCI_IO_BASE] = PCI_IO_RANGE_MASK & 0xff;
    d->wmask[PCI_IO_LIMIT] = PCI_IO_RANGE_MASK & 0xff;
    pci_set_word(d->wmask + PCI_MEMORY_BASE,
                 PCI_MEMORY_RANGE_MASK & 0xffff);
    pci_set_word(d->wmask + PCI_MEMORY_LIMIT,
                 PCI_MEMORY_RANGE_MASK & 0xffff);
    pci_set_word(d->wmask + PCI_PREF_MEMORY_BASE,
                 PCI_PREF_RANGE_MASK & 0xffff);
    pci_set_word(d->wmask + PCI_PREF_MEMORY_LIMIT,
                 PCI_PREF_RANGE_MASK & 0xffff);

    /* PCI_PREF_BASE_UPPER32 and PCI_PREF_LIMIT_UPPER32 */
    memset(d->wmask + PCI_PREF_BASE_UPPER32, 0xff, 8);

    pci_set_word(d->wmask + PCI_BRIDGE_CONTROL, 0xffff);
}

I
Isaku Yamahata 已提交
561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578
static void pci_config_alloc(PCIDevice *pci_dev)
{
    int config_size = pci_config_size(pci_dev);

    pci_dev->config = qemu_mallocz(config_size);
    pci_dev->cmask = qemu_mallocz(config_size);
    pci_dev->wmask = qemu_mallocz(config_size);
    pci_dev->used = qemu_mallocz(config_size);
}

static void pci_config_free(PCIDevice *pci_dev)
{
    qemu_free(pci_dev->config);
    qemu_free(pci_dev->cmask);
    qemu_free(pci_dev->wmask);
    qemu_free(pci_dev->used);
}

B
bellard 已提交
579
/* -1 for devfn means auto assign */
P
Paul Brook 已提交
580 581 582
static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
                                         const char *name, int devfn,
                                         PCIConfigReadFunc *config_read,
583 584
                                         PCIConfigWriteFunc *config_write,
                                         uint8_t header_type)
B
bellard 已提交
585 586
{
    if (devfn < 0) {
587 588
        for(devfn = bus->devfn_min ; devfn < ARRAY_SIZE(bus->devices);
            devfn += 8) {
589
            if (!bus->devices[devfn])
B
bellard 已提交
590 591
                goto found;
        }
592
        error_report("PCI: no devfn available for %s, all in use", name);
593
        return NULL;
B
bellard 已提交
594
    found: ;
595
    } else if (bus->devices[devfn]) {
596 597
        error_report("PCI: devfn %d not available for %s, in use by %s",
                     devfn, name, bus->devices[devfn]->name);
598
        return NULL;
B
bellard 已提交
599
    }
600
    pci_dev->bus = bus;
B
bellard 已提交
601 602
    pci_dev->devfn = devfn;
    pstrcpy(pci_dev->name, sizeof(pci_dev->name), name);
603
    pci_dev->irq_state = 0;
I
Isaku Yamahata 已提交
604
    pci_config_alloc(pci_dev);
605 606 607 608 609

    header_type &= ~PCI_HEADER_TYPE_MULTI_FUNCTION;
    if (header_type == PCI_HEADER_TYPE_NORMAL) {
        pci_set_default_subsystem_id(pci_dev);
    }
610
    pci_init_cmask(pci_dev);
611
    pci_init_wmask(pci_dev);
612 613 614
    if (header_type == PCI_HEADER_TYPE_BRIDGE) {
        pci_init_wmask_bridge(pci_dev);
    }
615 616 617 618 619

    if (!config_read)
        config_read = pci_default_read_config;
    if (!config_write)
        config_write = pci_default_write_config;
B
bellard 已提交
620 621
    pci_dev->config_read = config_read;
    pci_dev->config_write = config_write;
622
    bus->devices[devfn] = pci_dev;
623
    pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, PCI_NUM_PINS);
J
Juan Quintela 已提交
624
    pci_dev->version_id = 2; /* Current pci device vmstate version */
B
bellard 已提交
625 626 627
    return pci_dev;
}

P
Paul Brook 已提交
628 629 630 631 632 633 634 635 636
PCIDevice *pci_register_device(PCIBus *bus, const char *name,
                               int instance_size, int devfn,
                               PCIConfigReadFunc *config_read,
                               PCIConfigWriteFunc *config_write)
{
    PCIDevice *pci_dev;

    pci_dev = qemu_mallocz(instance_size);
    pci_dev = do_pci_register_device(pci_dev, bus, name, devfn,
637 638
                                     config_read, config_write,
                                     PCI_HEADER_TYPE_NORMAL);
639 640 641
    if (pci_dev == NULL) {
        hw_error("PCI: can't register device\n");
    }
P
Paul Brook 已提交
642 643
    return pci_dev;
}
B
Blue Swirl 已提交
644 645 646

static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus,
                                          target_phys_addr_t addr)
647
{
B
Blue Swirl 已提交
648
    return addr + bus->mem_base;
649 650 651 652 653 654 655 656 657
}

static void pci_unregister_io_regions(PCIDevice *pci_dev)
{
    PCIIORegion *r;
    int i;

    for(i = 0; i < PCI_NUM_REGIONS; i++) {
        r = &pci_dev->io_regions[i];
658
        if (!r->size || r->addr == PCI_BAR_UNMAPPED)
659
            continue;
660
        if (r->type == PCI_BASE_ADDRESS_SPACE_IO) {
661
            isa_unassign_ioport(r->addr, r->filtered_size);
662
        } else {
B
Blue Swirl 已提交
663 664 665 666
            cpu_register_physical_memory(pci_to_cpu_addr(pci_dev->bus,
                                                         r->addr),
                                         r->filtered_size,
                                         IO_MEM_UNASSIGNED);
667 668 669 670
        }
    }
}

671
static int pci_unregister_device(DeviceState *dev)
672
{
673
    PCIDevice *pci_dev = DO_UPCAST(PCIDevice, qdev, dev);
674
    PCIDeviceInfo *info = DO_UPCAST(PCIDeviceInfo, qdev, dev->info);
675 676
    int ret = 0;

677 678
    if (info->exit)
        ret = info->exit(pci_dev);
679 680 681 682 683 684 685
    if (ret)
        return ret;

    pci_unregister_io_regions(pci_dev);

    qemu_free_irqs(pci_dev->irq);
    pci_dev->bus->devices[pci_dev->devfn] = NULL;
I
Isaku Yamahata 已提交
686
    pci_config_free(pci_dev);
687 688 689
    return 0;
}

690
void pci_register_bar(PCIDevice *pci_dev, int region_num,
691
                            pcibus_t size, int type,
B
bellard 已提交
692 693 694
                            PCIMapIORegionFunc *map_func)
{
    PCIIORegion *r;
P
pbrook 已提交
695
    uint32_t addr;
696
    pcibus_t wmask;
B
bellard 已提交
697

698
    if ((unsigned int)region_num >= PCI_NUM_REGIONS)
B
bellard 已提交
699
        return;
700 701 702

    if (size & (size-1)) {
        fprintf(stderr, "ERROR: PCI region size must be pow2 "
703
                    "type=0x%x, size=0x%"FMT_PCIBUS"\n", type, size);
704 705 706
        exit(1);
    }

B
bellard 已提交
707
    r = &pci_dev->io_regions[region_num];
708
    r->addr = PCI_BAR_UNMAPPED;
B
bellard 已提交
709
    r->size = size;
710
    r->filtered_size = size;
B
bellard 已提交
711 712
    r->type = type;
    r->map_func = map_func;
713 714

    wmask = ~(size - 1);
715
    addr = pci_bar(pci_dev, region_num);
P
pbrook 已提交
716
    if (region_num == PCI_ROM_SLOT) {
717
        /* ROM enable bit is writeable */
718
        wmask |= PCI_ROM_ADDRESS_ENABLE;
P
pbrook 已提交
719
    }
720
    pci_set_long(pci_dev->config + addr, type);
I
Isaku Yamahata 已提交
721 722 723 724 725 726 727 728
    if (!(r->type & PCI_BASE_ADDRESS_SPACE_IO) &&
        r->type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
        pci_set_quad(pci_dev->wmask + addr, wmask);
        pci_set_quad(pci_dev->cmask + addr, ~0ULL);
    } else {
        pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff);
        pci_set_long(pci_dev->cmask + addr, 0xffffffff);
    }
B
bellard 已提交
729 730
}

731 732 733 734 735 736 737
static uint32_t pci_config_get_io_base(PCIDevice *d,
                                       uint32_t base, uint32_t base_upper16)
{
    uint32_t val;

    val = ((uint32_t)d->config[base] & PCI_IO_RANGE_MASK) << 8;
    if (d->config[base] & PCI_IO_RANGE_TYPE_32) {
738
        val |= (uint32_t)pci_get_word(d->config + base_upper16) << 16;
739 740 741 742
    }
    return val;
}

I
Isaku Yamahata 已提交
743
static pcibus_t pci_config_get_memory_base(PCIDevice *d, uint32_t base)
744
{
I
Isaku Yamahata 已提交
745
    return ((pcibus_t)pci_get_word(d->config + base) & PCI_MEMORY_RANGE_MASK)
746 747 748
        << 16;
}

I
Isaku Yamahata 已提交
749
static pcibus_t pci_config_get_pref_base(PCIDevice *d,
750 751
                                         uint32_t base, uint32_t upper)
{
I
Isaku Yamahata 已提交
752 753 754 755 756 757 758 759
    pcibus_t tmp;
    pcibus_t val;

    tmp = (pcibus_t)pci_get_word(d->config + base);
    val = (tmp & PCI_PREF_RANGE_MASK) << 16;
    if (tmp & PCI_PREF_RANGE_TYPE_64) {
        val |= (pcibus_t)pci_get_long(d->config + upper) << 32;
    }
760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824
    return val;
}

static pcibus_t pci_bridge_get_base(PCIDevice *bridge, uint8_t type)
{
    pcibus_t base;
    if (type & PCI_BASE_ADDRESS_SPACE_IO) {
        base = pci_config_get_io_base(bridge,
                                      PCI_IO_BASE, PCI_IO_BASE_UPPER16);
    } else {
        if (type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
            base = pci_config_get_pref_base(
                bridge, PCI_PREF_MEMORY_BASE, PCI_PREF_BASE_UPPER32);
        } else {
            base = pci_config_get_memory_base(bridge, PCI_MEMORY_BASE);
        }
    }

    return base;
}

static pcibus_t pci_bridge_get_limit(PCIDevice *bridge, uint8_t type)
{
    pcibus_t limit;
    if (type & PCI_BASE_ADDRESS_SPACE_IO) {
        limit = pci_config_get_io_base(bridge,
                                      PCI_IO_LIMIT, PCI_IO_LIMIT_UPPER16);
        limit |= 0xfff;         /* PCI bridge spec 3.2.5.6. */
    } else {
        if (type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
            limit = pci_config_get_pref_base(
                bridge, PCI_PREF_MEMORY_LIMIT, PCI_PREF_LIMIT_UPPER32);
        } else {
            limit = pci_config_get_memory_base(bridge, PCI_MEMORY_LIMIT);
        }
        limit |= 0xfffff;       /* PCI bridge spec 3.2.5.{1, 8}. */
    }
    return limit;
}

static void pci_bridge_filter(PCIDevice *d, pcibus_t *addr, pcibus_t *size,
                              uint8_t type)
{
    pcibus_t base = *addr;
    pcibus_t limit = *addr + *size - 1;
    PCIDevice *br;

    for (br = d->bus->parent_dev; br; br = br->bus->parent_dev) {
        uint16_t cmd = pci_get_word(d->config + PCI_COMMAND);

        if (type & PCI_BASE_ADDRESS_SPACE_IO) {
            if (!(cmd & PCI_COMMAND_IO)) {
                goto no_map;
            }
        } else {
            if (!(cmd & PCI_COMMAND_MEMORY)) {
                goto no_map;
            }
        }

        base = MAX(base, pci_bridge_get_base(br, type));
        limit = MIN(limit, pci_bridge_get_limit(br, type));
    }

    if (base > limit) {
825
        goto no_map;
826
    }
827 828 829 830 831 832
    *addr = base;
    *size = limit - base + 1;
    return;
no_map:
    *addr = PCI_BAR_UNMAPPED;
    *size = 0;
833 834
}

835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899
static pcibus_t pci_bar_address(PCIDevice *d,
				int reg, uint8_t type, pcibus_t size)
{
    pcibus_t new_addr, last_addr;
    int bar = pci_bar(d, reg);
    uint16_t cmd = pci_get_word(d->config + PCI_COMMAND);

    if (type & PCI_BASE_ADDRESS_SPACE_IO) {
        if (!(cmd & PCI_COMMAND_IO)) {
            return PCI_BAR_UNMAPPED;
        }
        new_addr = pci_get_long(d->config + bar) & ~(size - 1);
        last_addr = new_addr + size - 1;
        /* NOTE: we have only 64K ioports on PC */
        if (last_addr <= new_addr || new_addr == 0 || last_addr > UINT16_MAX) {
            return PCI_BAR_UNMAPPED;
        }
        return new_addr;
    }

    if (!(cmd & PCI_COMMAND_MEMORY)) {
        return PCI_BAR_UNMAPPED;
    }
    if (type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
        new_addr = pci_get_quad(d->config + bar);
    } else {
        new_addr = pci_get_long(d->config + bar);
    }
    /* the ROM slot has a specific enable bit */
    if (reg == PCI_ROM_SLOT && !(new_addr & PCI_ROM_ADDRESS_ENABLE)) {
        return PCI_BAR_UNMAPPED;
    }
    new_addr &= ~(size - 1);
    last_addr = new_addr + size - 1;
    /* NOTE: we do not support wrapping */
    /* XXX: as we cannot support really dynamic
       mappings, we handle specific values as invalid
       mappings. */
    if (last_addr <= new_addr || new_addr == 0 ||
        last_addr == PCI_BAR_UNMAPPED) {
        return PCI_BAR_UNMAPPED;
    }

    /* Now pcibus_t is 64bit.
     * Check if 32 bit BAR wraps around explicitly.
     * Without this, PC ide doesn't work well.
     * TODO: remove this work around.
     */
    if  (!(type & PCI_BASE_ADDRESS_MEM_TYPE_64) && last_addr >= UINT32_MAX) {
        return PCI_BAR_UNMAPPED;
    }

    /*
     * OS is allowed to set BAR beyond its addressable
     * bits. For example, 32 bit OS can set 64bit bar
     * to >4G. Check it. TODO: we might need to support
     * it in the future for e.g. PAE.
     */
    if (last_addr >= TARGET_PHYS_ADDR_MAX) {
        return PCI_BAR_UNMAPPED;
    }

    return new_addr;
}

900 901 902
static void pci_update_mappings(PCIDevice *d)
{
    PCIIORegion *r;
903
    int i;
904
    pcibus_t new_addr, filtered_size;
905

906
    for(i = 0; i < PCI_NUM_REGIONS; i++) {
907
        r = &d->io_regions[i];
908 909

        /* this region isn't registered */
910
        if (!r->size)
911 912
            continue;

913
        new_addr = pci_bar_address(d, i, r->type, r->size);
914

915 916 917 918 919 920
        /* bridge filtering */
        filtered_size = r->size;
        if (new_addr != PCI_BAR_UNMAPPED) {
            pci_bridge_filter(d, &new_addr, &filtered_size, r->type);
        }

921
        /* This bar isn't changed */
922
        if (new_addr == r->addr && filtered_size == r->filtered_size)
923 924 925 926 927 928 929 930 931 932 933 934
            continue;

        /* now do the real mapping */
        if (r->addr != PCI_BAR_UNMAPPED) {
            if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
                int class;
                /* NOTE: specific hack for IDE in PC case:
                   only one byte must be mapped. */
                class = pci_get_word(d->config + PCI_CLASS_DEVICE);
                if (class == 0x0101 && r->size == 4) {
                    isa_unassign_ioport(r->addr + 2, 1);
                } else {
935
                    isa_unassign_ioport(r->addr, r->filtered_size);
936
                }
937
            } else {
938
                cpu_register_physical_memory(pci_to_cpu_addr(d->bus, r->addr),
939
                                             r->filtered_size,
940
                                             IO_MEM_UNASSIGNED);
941
                qemu_unregister_coalesced_mmio(r->addr, r->filtered_size);
942 943
            }
        }
944
        r->addr = new_addr;
945
        r->filtered_size = filtered_size;
946
        if (r->addr != PCI_BAR_UNMAPPED) {
947 948 949 950 951 952 953
            /*
             * TODO: currently almost all the map funcions assumes
             * filtered_size == size and addr & ~(size - 1) == addr.
             * However with bridge filtering, they aren't always true.
             * Teach them such cases, such that filtered_size < size and
             * addr & (size - 1) != 0.
             */
B
Blue Swirl 已提交
954 955 956 957 958 959
            if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
                r->map_func(d, i, r->addr, r->filtered_size, r->type);
            } else {
                r->map_func(d, i, pci_to_cpu_addr(d->bus, r->addr),
                            r->filtered_size, r->type);
            }
960
        }
961 962 963
    }
}

964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982
static inline int pci_irq_disabled(PCIDevice *d)
{
    return pci_get_word(d->config + PCI_COMMAND) & PCI_COMMAND_INTX_DISABLE;
}

/* Called after interrupt disabled field update in config space,
 * assert/deassert interrupts if necessary.
 * Gets original interrupt disable bit value (before update). */
static void pci_update_irq_disabled(PCIDevice *d, int was_irq_disabled)
{
    int i, disabled = pci_irq_disabled(d);
    if (disabled == was_irq_disabled)
        return;
    for (i = 0; i < PCI_NUM_PINS; ++i) {
        int state = pci_irq_state(d, i);
        pci_change_irq_level(d, i, disabled ? -state : state);
    }
}

983
uint32_t pci_default_read_config(PCIDevice *d,
984
                                 uint32_t address, int len)
B
bellard 已提交
985
{
986 987
    uint32_t val = 0;
    assert(len == 1 || len == 2 || len == 4);
I
Isaku Yamahata 已提交
988
    len = MIN(len, pci_config_size(d) - address);
989 990
    memcpy(&val, d->config + address, len);
    return le32_to_cpu(val);
991 992
}

993
void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
994
{
995
    int i, was_irq_disabled = pci_irq_disabled(d);
I
Isaku Yamahata 已提交
996
    uint32_t config_size = pci_config_size(d);
997

998 999 1000
    for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) {
        uint8_t wmask = d->wmask[addr + i];
        d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask);
1001
    }
I
Isaku Yamahata 已提交
1002
    if (ranges_overlap(addr, l, PCI_BASE_ADDRESS_0, 24) ||
1003 1004
        ranges_overlap(addr, l, PCI_ROM_ADDRESS, 4) ||
        ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) ||
I
Isaku Yamahata 已提交
1005
        range_covers_byte(addr, l, PCI_COMMAND))
1006
        pci_update_mappings(d);
1007 1008 1009

    if (range_covers_byte(addr, l, PCI_COMMAND))
        pci_update_irq_disabled(d, was_irq_disabled);
B
bellard 已提交
1010 1011
}

P
pbrook 已提交
1012 1013
/***********************************************************/
/* generic PCI irq support */
1014

P
pbrook 已提交
1015
/* 0 <= irq_num <= 3. level must be 0 or 1 */
P
pbrook 已提交
1016
static void pci_set_irq(void *opaque, int irq_num, int level)
B
bellard 已提交
1017
{
1018
    PCIDevice *pci_dev = opaque;
P
pbrook 已提交
1019
    int change;
1020

1021
    change = level - pci_irq_state(pci_dev, irq_num);
P
pbrook 已提交
1022 1023
    if (!change)
        return;
1024

1025
    pci_set_irq_state(pci_dev, irq_num, level);
1026
    pci_update_irq_status(pci_dev);
1027 1028
    if (pci_irq_disabled(pci_dev))
        return;
1029
    pci_change_irq_level(pci_dev, irq_num, change);
B
bellard 已提交
1030 1031
}

P
pbrook 已提交
1032 1033
/***********************************************************/
/* monitor info on PCI */
1034

1035 1036 1037 1038 1039
typedef struct {
    uint16_t class;
    const char *desc;
} pci_class_desc;

1040
static const pci_class_desc pci_class_descriptions[] =
1041
{
P
pbrook 已提交
1042
    { 0x0100, "SCSI controller"},
1043
    { 0x0101, "IDE controller"},
T
ths 已提交
1044 1045 1046 1047 1048 1049
    { 0x0102, "Floppy controller"},
    { 0x0103, "IPI controller"},
    { 0x0104, "RAID controller"},
    { 0x0106, "SATA controller"},
    { 0x0107, "SAS controller"},
    { 0x0180, "Storage controller"},
1050
    { 0x0200, "Ethernet controller"},
T
ths 已提交
1051 1052 1053 1054
    { 0x0201, "Token Ring controller"},
    { 0x0202, "FDDI controller"},
    { 0x0203, "ATM controller"},
    { 0x0280, "Network controller"},
1055
    { 0x0300, "VGA controller"},
T
ths 已提交
1056 1057 1058 1059 1060 1061 1062 1063 1064 1065
    { 0x0301, "XGA controller"},
    { 0x0302, "3D controller"},
    { 0x0380, "Display controller"},
    { 0x0400, "Video controller"},
    { 0x0401, "Audio controller"},
    { 0x0402, "Phone"},
    { 0x0480, "Multimedia controller"},
    { 0x0500, "RAM controller"},
    { 0x0501, "Flash controller"},
    { 0x0580, "Memory controller"},
1066 1067
    { 0x0600, "Host bridge"},
    { 0x0601, "ISA bridge"},
T
ths 已提交
1068 1069
    { 0x0602, "EISA bridge"},
    { 0x0603, "MC bridge"},
1070
    { 0x0604, "PCI bridge"},
T
ths 已提交
1071 1072 1073 1074 1075
    { 0x0605, "PCMCIA bridge"},
    { 0x0606, "NUBUS bridge"},
    { 0x0607, "CARDBUS bridge"},
    { 0x0608, "RACEWAY bridge"},
    { 0x0680, "Bridge"},
1076 1077 1078 1079
    { 0x0c03, "USB controller"},
    { 0, NULL}
};

1080 1081
static void pci_for_each_device_under_bus(PCIBus *bus,
                                          void (*fn)(PCIBus *b, PCIDevice *d))
1082
{
1083 1084
    PCIDevice *d;
    int devfn;
1085

1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113
    for(devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
        d = bus->devices[devfn];
        if (d) {
            fn(bus, d);
        }
    }
}

void pci_for_each_device(PCIBus *bus, int bus_num,
                         void (*fn)(PCIBus *b, PCIDevice *d))
{
    bus = pci_find_bus(bus, bus_num);

    if (bus) {
        pci_for_each_device_under_bus(bus, fn);
    }
}

static void pci_device_print(Monitor *mon, QDict *device)
{
    QDict *qdict;
    QListEntry *entry;
    uint64_t addr, size;

    monitor_printf(mon, "  Bus %2" PRId64 ", ", qdict_get_int(device, "bus"));
    monitor_printf(mon, "device %3" PRId64 ", function %" PRId64 ":\n",
                        qdict_get_int(device, "slot"),
                        qdict_get_int(device, "function"));
A
aliguori 已提交
1114
    monitor_printf(mon, "    ");
1115 1116 1117 1118

    qdict = qdict_get_qdict(device, "class_info");
    if (qdict_haskey(qdict, "desc")) {
        monitor_printf(mon, "%s", qdict_get_str(qdict, "desc"));
1119
    } else {
1120
        monitor_printf(mon, "Class %04" PRId64, qdict_get_int(qdict, "class"));
1121
    }
1122

1123 1124 1125 1126 1127 1128 1129 1130
    qdict = qdict_get_qdict(device, "id");
    monitor_printf(mon, ": PCI device %04" PRIx64 ":%04" PRIx64 "\n",
                        qdict_get_int(qdict, "device"),
                        qdict_get_int(qdict, "vendor"));

    if (qdict_haskey(device, "irq")) {
        monitor_printf(mon, "      IRQ %" PRId64 ".\n",
                            qdict_get_int(device, "irq"));
1131
    }
1132

1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144
    if (qdict_haskey(device, "pci_bridge")) {
        QDict *info;

        qdict = qdict_get_qdict(device, "pci_bridge");

        info = qdict_get_qdict(qdict, "bus");
        monitor_printf(mon, "      BUS %" PRId64 ".\n",
                            qdict_get_int(info, "number"));
        monitor_printf(mon, "      secondary bus %" PRId64 ".\n",
                            qdict_get_int(info, "secondary"));
        monitor_printf(mon, "      subordinate bus %" PRId64 ".\n",
                            qdict_get_int(info, "subordinate"));
1145

1146
        info = qdict_get_qdict(qdict, "io_range");
1147
        monitor_printf(mon, "      IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n",
1148 1149
                       qdict_get_int(info, "base"),
                       qdict_get_int(info, "limit"));
1150

1151
        info = qdict_get_qdict(qdict, "memory_range");
1152 1153
        monitor_printf(mon,
                       "      memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n",
1154 1155
                       qdict_get_int(info, "base"),
                       qdict_get_int(info, "limit"));
1156

1157
        info = qdict_get_qdict(qdict, "prefetchable_range");
1158
        monitor_printf(mon, "      prefetchable memory range "
1159 1160 1161
                       "[0x%08"PRIx64", 0x%08"PRIx64"]\n",
                       qdict_get_int(info, "base"),
        qdict_get_int(info, "limit"));
P
pbrook 已提交
1162
    }
I
Isaku Yamahata 已提交
1163

1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176
    QLIST_FOREACH_ENTRY(qdict_get_qlist(device, "regions"), entry) {
        qdict = qobject_to_qdict(qlist_entry_obj(entry));
        monitor_printf(mon, "      BAR%d: ", (int) qdict_get_int(qdict, "bar"));

        addr = qdict_get_int(qdict, "address");
        size = qdict_get_int(qdict, "size");

        if (!strcmp(qdict_get_str(qdict, "type"), "io")) {
            monitor_printf(mon, "I/O at 0x%04"FMT_PCIBUS
                                " [0x%04"FMT_PCIBUS"].\n",
                                addr, addr + size - 1);
        } else {
            monitor_printf(mon, "%d bit%s memory at 0x%08"FMT_PCIBUS
1177
                               " [0x%08"FMT_PCIBUS"].\n",
1178 1179 1180
                                qdict_get_bool(qdict, "mem_type_64") ? 64 : 32,
                                qdict_get_bool(qdict, "prefetch") ?
                                " prefetchable" : "", addr, addr + size - 1);
P
pbrook 已提交
1181
        }
B
bellard 已提交
1182
    }
1183 1184 1185

    monitor_printf(mon, "      id \"%s\"\n", qdict_get_str(device, "qdev_id"));

1186 1187 1188 1189 1190 1191 1192 1193 1194
    if (qdict_haskey(device, "pci_bridge")) {
        qdict = qdict_get_qdict(device, "pci_bridge");
        if (qdict_haskey(qdict, "devices")) {
            QListEntry *dev;
            QLIST_FOREACH_ENTRY(qdict_get_qlist(qdict, "devices"), dev) {
                pci_device_print(mon, qobject_to_qdict(qlist_entry_obj(dev)));
            }
        }
    }
1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205
}

void do_pci_info_print(Monitor *mon, const QObject *data)
{
    QListEntry *bus, *dev;

    QLIST_FOREACH_ENTRY(qobject_to_qlist(data), bus) {
        QDict *qdict = qobject_to_qdict(qlist_entry_obj(bus));
        QLIST_FOREACH_ENTRY(qdict_get_qlist(qdict, "devices"), dev) {
            pci_device_print(mon, qobject_to_qdict(qlist_entry_obj(dev)));
        }
P
pbrook 已提交
1206
    }
1207 1208
}

1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271
static QObject *pci_get_dev_class(const PCIDevice *dev)
{
    int class;
    const pci_class_desc *desc;

    class = pci_get_word(dev->config + PCI_CLASS_DEVICE);
    desc = pci_class_descriptions;
    while (desc->desc && class != desc->class)
        desc++;

    if (desc->desc) {
        return qobject_from_jsonf("{ 'desc': %s, 'class': %d }",
                                  desc->desc, class);
    } else {
        return qobject_from_jsonf("{ 'class': %d }", class);
    }
}

static QObject *pci_get_dev_id(const PCIDevice *dev)
{
    return qobject_from_jsonf("{ 'device': %d, 'vendor': %d }",
                              pci_get_word(dev->config + PCI_VENDOR_ID),
                              pci_get_word(dev->config + PCI_DEVICE_ID));
}

static QObject *pci_get_regions_list(const PCIDevice *dev)
{
    int i;
    QList *regions_list;

    regions_list = qlist_new();

    for (i = 0; i < PCI_NUM_REGIONS; i++) {
        QObject *obj;
        const PCIIORegion *r = &dev->io_regions[i];

        if (!r->size) {
            continue;
        }

        if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
            obj = qobject_from_jsonf("{ 'bar': %d, 'type': 'io', "
                                     "'address': %" PRId64 ", "
                                     "'size': %" PRId64 " }",
                                     i, r->addr, r->size);
        } else {
            int mem_type_64 = r->type & PCI_BASE_ADDRESS_MEM_TYPE_64;

            obj = qobject_from_jsonf("{ 'bar': %d, 'type': 'memory', "
                                     "'mem_type_64': %i, 'prefetch': %i, "
                                     "'address': %" PRId64 ", "
                                     "'size': %" PRId64 " }",
                                     i, mem_type_64,
                                     r->type & PCI_BASE_ADDRESS_MEM_PREFETCH,
                                     r->addr, r->size);
        }

        qlist_append_obj(regions_list, obj);
    }

    return QOBJECT(regions_list);
}

1272 1273 1274
static QObject *pci_get_devices_list(PCIBus *bus, int bus_num);

static QObject *pci_get_dev_dict(PCIDevice *dev, PCIBus *bus, int bus_num)
1275
{
1276
    uint8_t type;
1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291
    QObject *obj;

    obj = qobject_from_jsonf("{ 'bus': %d, 'slot': %d, 'function': %d,"                                       "'class_info': %p, 'id': %p, 'regions': %p,"
                              " 'qdev_id': %s }",
                              bus_num,
                              PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn),
                              pci_get_dev_class(dev), pci_get_dev_id(dev),
                              pci_get_regions_list(dev),
                              dev->qdev.id ? dev->qdev.id : "");

    if (dev->config[PCI_INTERRUPT_PIN] != 0) {
        QDict *qdict = qobject_to_qdict(obj);
        qdict_put(qdict, "irq", qint_from_int(dev->config[PCI_INTERRUPT_LINE]));
    }

1292 1293
    type = dev->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTION;
    if (type == PCI_HEADER_TYPE_BRIDGE) {
1294 1295 1296 1297 1298 1299 1300 1301
        QDict *qdict;
        QObject *pci_bridge;

        pci_bridge = qobject_from_jsonf("{ 'bus': "
        "{ 'number': %d, 'secondary': %d, 'subordinate': %d }, "
        "'io_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "}, "
        "'memory_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "}, "
        "'prefetchable_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "} }",
B
Blue Swirl 已提交
1302
        dev->config[PCI_PRIMARY_BUS], dev->config[PCI_SECONDARY_BUS],
1303 1304 1305 1306 1307 1308 1309 1310 1311 1312
        dev->config[PCI_SUBORDINATE_BUS],
        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO),
        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO),
        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY),
        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY),
        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY |
                               PCI_BASE_ADDRESS_MEM_PREFETCH),
        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY |
                                PCI_BASE_ADDRESS_MEM_PREFETCH));

B
Blue Swirl 已提交
1313 1314
        if (dev->config[PCI_SECONDARY_BUS] != 0) {
            PCIBus *child_bus = pci_find_bus(bus, dev->config[PCI_SECONDARY_BUS]);
1315

B
Blue Swirl 已提交
1316 1317 1318 1319 1320 1321 1322
            if (child_bus) {
                qdict = qobject_to_qdict(pci_bridge);
                qdict_put_obj(qdict, "devices",
                              pci_get_devices_list(child_bus,
                                                   dev->config[PCI_SECONDARY_BUS]));
            }
        }
1323 1324 1325 1326 1327 1328 1329 1330
        qdict = qobject_to_qdict(obj);
        qdict_put_obj(qdict, "pci_bridge", pci_bridge);
    }

    return obj;
}

static QObject *pci_get_devices_list(PCIBus *bus, int bus_num)
1331
{
P
pbrook 已提交
1332
    int devfn;
1333 1334
    PCIDevice *dev;
    QList *dev_list;
1335

1336 1337 1338 1339 1340
    dev_list = qlist_new();

    for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
        dev = bus->devices[devfn];
        if (dev) {
1341
            qlist_append_obj(dev_list, pci_get_dev_dict(dev, bus, bus_num));
1342
        }
1343
    }
1344 1345

    return QOBJECT(dev_list);
1346 1347
}

1348
static QObject *pci_get_bus_dict(PCIBus *bus, int bus_num)
1349
{
1350
    bus = pci_find_bus(bus, bus_num);
P
pbrook 已提交
1351
    if (bus) {
1352 1353
        return qobject_from_jsonf("{ 'bus': %d, 'devices': %p }",
                                  bus_num, pci_get_devices_list(bus, bus_num));
B
bellard 已提交
1354
    }
1355 1356

    return NULL;
B
bellard 已提交
1357 1358
}

1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393
/**
 * do_pci_info(): PCI buses and devices information
 *
 * The returned QObject is a QList of all buses. Each bus is
 * represented by a QDict, which has a key with a QList of all
 * PCI devices attached to it. Each device is represented by
 * a QDict.
 *
 * The bus QDict contains the following:
 *
 * - "bus": bus number
 * - "devices": a QList of QDicts, each QDict represents a PCI
 *   device
 *
 * The PCI device QDict contains the following:
 *
 * - "bus": identical to the parent's bus number
 * - "slot": slot number
 * - "function": function number
 * - "class_info": a QDict containing:
 *      - "desc": device class description (optional)
 *      - "class": device class number
 * - "id": a QDict containing:
 *      - "device": device ID
 *      - "vendor": vendor ID
 * - "irq": device's IRQ if assigned (optional)
 * - "qdev_id": qdev id string
 * - "pci_bridge": It's a QDict, only present if this device is a
 *   PCI bridge, contains:
 *      - "bus": bus number
 *      - "secondary": secondary bus number
 *      - "subordinate": subordinate bus number
 *      - "io_range": a QDict with memory range information
 *      - "memory_range": a QDict with memory range information
 *      - "prefetchable_range": a QDict with memory range information
1394
 *      - "devices": a QList of PCI devices if there's any attached (optional)
1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420
 * - "regions": a QList of QDicts, each QDict represents a
 *   memory region of this device
 *
 * The memory range QDict contains the following:
 *
 * - "base": base memory address
 * - "limit": limit value
 *
 * The region QDict can be an I/O region or a memory region,
 * an I/O region QDict contains the following:
 *
 * - "type": "io"
 * - "bar": BAR number
 * - "address": memory address
 * - "size": memory size
 *
 * A memory region QDict contains the following:
 *
 * - "type": "memory"
 * - "bar": BAR number
 * - "address": memory address
 * - "size": memory size
 * - "mem_type_64": true or false
 * - "prefetch": true or false
 */
void do_pci_info(Monitor *mon, QObject **ret_data)
B
bellard 已提交
1421
{
1422
    QList *bus_list;
1423
    struct PCIHostBus *host;
1424 1425 1426

    bus_list = qlist_new();

1427
    QLIST_FOREACH(host, &host_buses, next) {
1428 1429 1430 1431
        QObject *obj = pci_get_bus_dict(host->bus, 0);
        if (obj) {
            qlist_append_obj(bus_list, obj);
        }
1432
    }
1433 1434

    *ret_data = QOBJECT(bus_list);
B
bellard 已提交
1435
}
1436

1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448
static const char * const pci_nic_models[] = {
    "ne2k_pci",
    "i82551",
    "i82557b",
    "i82559er",
    "rtl8139",
    "e1000",
    "pcnet",
    "virtio",
    NULL
};

P
Paul Brook 已提交
1449 1450 1451 1452 1453 1454 1455 1456
static const char * const pci_nic_names[] = {
    "ne2k_pci",
    "i82551",
    "i82557b",
    "i82559er",
    "rtl8139",
    "e1000",
    "pcnet",
P
Paul Brook 已提交
1457
    "virtio-net-pci",
1458 1459 1460
    NULL
};

1461
/* Initialize a PCI NIC.  */
1462
/* FIXME callers should check for failure, but don't */
1463 1464
PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model,
                        const char *default_devaddr)
1465
{
1466
    const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr;
1467 1468
    PCIBus *bus;
    int devfn;
1469
    PCIDevice *pci_dev;
P
Paul Brook 已提交
1470
    DeviceState *dev;
1471 1472
    int i;

1473 1474 1475 1476 1477 1478
    i = qemu_find_nic_model(nd, pci_nic_models, default_model);
    if (i < 0)
        return NULL;

    bus = pci_get_bus_devfn(&devfn, devaddr);
    if (!bus) {
1479 1480
        error_report("Invalid PCI device address %s for device %s",
                     devaddr, pci_nic_names[i]);
1481 1482 1483
        return NULL;
    }

1484
    pci_dev = pci_create(bus, devfn, pci_nic_names[i]);
1485
    dev = &pci_dev->qdev;
1486 1487
    if (nd->name)
        dev->id = qemu_strdup(nd->name);
G
Gerd Hoffmann 已提交
1488
    qdev_set_nic_properties(dev, nd);
1489 1490
    if (qdev_init(dev) < 0)
        return NULL;
1491
    return pci_dev;
1492 1493
}

1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507
PCIDevice *pci_nic_init_nofail(NICInfo *nd, const char *default_model,
                               const char *default_devaddr)
{
    PCIDevice *res;

    if (qemu_show_nic_models(nd->model, pci_nic_models))
        exit(0);

    res = pci_nic_init(nd, default_model, default_devaddr);
    if (!res)
        exit(1);
    return res;
}

P
pbrook 已提交
1508 1509
typedef struct {
    PCIDevice dev;
G
Gerd Hoffmann 已提交
1510 1511 1512
    PCIBus bus;
    uint32_t vid;
    uint32_t did;
P
pbrook 已提交
1513 1514
} PCIBridge;

1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531

static void pci_bridge_update_mappings_fn(PCIBus *b, PCIDevice *d)
{
    pci_update_mappings(d);
}

static void pci_bridge_update_mappings(PCIBus *b)
{
    PCIBus *child;

    pci_for_each_device_under_bus(b, pci_bridge_update_mappings_fn);

    QLIST_FOREACH(child, &b->child, sibling) {
        pci_bridge_update_mappings(child);
    }
}

1532
static void pci_bridge_write_config(PCIDevice *d,
P
pbrook 已提交
1533 1534 1535
                             uint32_t address, uint32_t val, int len)
{
    pci_default_write_config(d, address, val, len);
1536 1537 1538 1539 1540 1541 1542 1543 1544

    if (/* io base/limit */
        ranges_overlap(address, len, PCI_IO_BASE, 2) ||

        /* memory base/limit, prefetchable base/limit and
           io base/limit upper 16 */
        ranges_overlap(address, len, PCI_MEMORY_BASE, 20)) {
        pci_bridge_update_mappings(d->bus);
    }
P
pbrook 已提交
1545 1546
}

1547
PCIBus *pci_find_bus(PCIBus *bus, int bus_num)
1548
{
B
Blue Swirl 已提交
1549
    PCIBus *sec, *ret;
1550

1551 1552
    if (!bus)
        return NULL;
1553

1554 1555 1556 1557 1558 1559
    if (pci_bus_num(bus) == bus_num) {
        return bus;
    }

    /* try child bus */
    QLIST_FOREACH(sec, &bus->child, sibling) {
1560
        if (!bus->parent_dev /* pci host bridge */
I
Isaku Yamahata 已提交
1561
            || (pci_bus_num(sec) <= bus_num &&
B
Blue Swirl 已提交
1562 1563 1564 1565 1566
                bus_num <= bus->parent_dev->config[PCI_SUBORDINATE_BUS]) ) {
            ret = pci_find_bus(sec, bus_num);
            if (ret) {
                return ret;
            }
1567 1568 1569 1570
        }
    }

    return NULL;
1571 1572
}

1573
PCIDevice *pci_find_device(PCIBus *bus, int bus_num, int slot, int function)
1574
{
1575
    bus = pci_find_bus(bus, bus_num);
1576 1577 1578 1579 1580 1581 1582

    if (!bus)
        return NULL;

    return bus->devices[PCI_DEVFN(slot, function)];
}

G
Gerd Hoffmann 已提交
1583
static int pci_bridge_initfn(PCIDevice *dev)
P
pbrook 已提交
1584
{
G
Gerd Hoffmann 已提交
1585
    PCIBridge *s = DO_UPCAST(PCIBridge, dev, dev);
B
blueswir1 已提交
1586

G
Gerd Hoffmann 已提交
1587 1588
    pci_config_set_vendor_id(s->dev.config, s->vid);
    pci_config_set_device_id(s->dev.config, s->did);
B
blueswir1 已提交
1589

1590 1591 1592
    pci_set_word(dev->config + PCI_STATUS,
                 PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
    pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_PCI);
1593
    dev->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE;
1594 1595
    pci_set_word(dev->config + PCI_SEC_STATUS,
                 PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
G
Gerd Hoffmann 已提交
1596 1597
    return 0;
}
P
pbrook 已提交
1598

1599 1600 1601 1602 1603 1604 1605 1606
static int pci_bridge_exitfn(PCIDevice *pci_dev)
{
    PCIBridge *s = DO_UPCAST(PCIBridge, dev, pci_dev);
    PCIBus *bus = &s->bus;
    pci_unregister_secondary_bus(bus);
    return 0;
}

G
Gerd Hoffmann 已提交
1607 1608 1609 1610 1611 1612
PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
                        pci_map_irq_fn map_irq, const char *name)
{
    PCIDevice *dev;
    PCIBridge *s;

1613
    dev = pci_create(bus, devfn, "pci-bridge");
G
Gerd Hoffmann 已提交
1614 1615
    qdev_prop_set_uint32(&dev->qdev, "vendorid", vid);
    qdev_prop_set_uint32(&dev->qdev, "deviceid", did);
M
Markus Armbruster 已提交
1616
    qdev_init_nofail(&dev->qdev);
G
Gerd Hoffmann 已提交
1617 1618

    s = DO_UPCAST(PCIBridge, dev, dev);
1619
    pci_register_secondary_bus(bus, &s->bus, &s->dev, map_irq, name);
G
Gerd Hoffmann 已提交
1620
    return &s->bus;
P
pbrook 已提交
1621
}
P
Paul Brook 已提交
1622

1623 1624 1625 1626 1627
PCIDevice *pci_bridge_get_device(PCIBus *bus)
{
    return bus->parent_dev;
}

1628
static int pci_qdev_init(DeviceState *qdev, DeviceInfo *base)
P
Paul Brook 已提交
1629 1630
{
    PCIDevice *pci_dev = (PCIDevice *)qdev;
P
Paul Brook 已提交
1631
    PCIDeviceInfo *info = container_of(base, PCIDeviceInfo, qdev);
P
Paul Brook 已提交
1632
    PCIBus *bus;
G
Gerd Hoffmann 已提交
1633
    int devfn, rc;
P
Paul Brook 已提交
1634

I
Isaku Yamahata 已提交
1635 1636 1637 1638 1639
    /* initialize cap_present for pci_is_express() and pci_config_size() */
    if (info->is_express) {
        pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
    }

P
Paul Brook 已提交
1640
    bus = FROM_QBUS(PCIBus, qdev_get_parent_bus(qdev));
G
Gerd Hoffmann 已提交
1641
    devfn = pci_dev->devfn;
G
Gerd Hoffmann 已提交
1642
    pci_dev = do_pci_register_device(pci_dev, bus, base->name, devfn,
1643 1644
                                     info->config_read, info->config_write,
                                     info->header_type);
1645 1646
    if (pci_dev == NULL)
        return -1;
G
Gerd Hoffmann 已提交
1647 1648 1649
    rc = info->init(pci_dev);
    if (rc != 0)
        return rc;
1650 1651 1652 1653 1654 1655

    /* rom loading */
    if (pci_dev->romfile == NULL && info->romfile != NULL)
        pci_dev->romfile = qemu_strdup(info->romfile);
    pci_add_option_rom(pci_dev);

G
Gerd Hoffmann 已提交
1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666
    if (qdev->hotplugged)
        bus->hotplug(pci_dev, 1);
    return 0;
}

static int pci_unplug_device(DeviceState *qdev)
{
    PCIDevice *dev = DO_UPCAST(PCIDevice, qdev, qdev);

    dev->bus->hotplug(dev, 0);
    return 0;
P
Paul Brook 已提交
1667 1668
}

1669
void pci_qdev_register(PCIDeviceInfo *info)
P
Paul Brook 已提交
1670
{
P
Paul Brook 已提交
1671
    info->qdev.init = pci_qdev_init;
G
Gerd Hoffmann 已提交
1672
    info->qdev.unplug = pci_unplug_device;
1673
    info->qdev.exit = pci_unregister_device;
1674
    info->qdev.bus_info = &pci_bus_info;
1675
    qdev_register(&info->qdev);
P
Paul Brook 已提交
1676 1677
}

1678 1679 1680 1681 1682 1683 1684 1685
void pci_qdev_register_many(PCIDeviceInfo *info)
{
    while (info->qdev.name) {
        pci_qdev_register(info);
        info++;
    }
}

1686
PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name)
P
Paul Brook 已提交
1687 1688 1689
{
    DeviceState *dev;

P
Paul Brook 已提交
1690
    dev = qdev_create(&bus->qbus, name);
1691
    qdev_prop_set_uint32(dev, "addr", devfn);
1692 1693
    return DO_UPCAST(PCIDevice, qdev, dev);
}
P
Paul Brook 已提交
1694

1695 1696
PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name)
{
1697
    PCIDevice *dev = pci_create(bus, devfn, name);
M
Markus Armbruster 已提交
1698
    qdev_init_nofail(&dev->qdev);
1699
    return dev;
P
Paul Brook 已提交
1700
}
1701 1702 1703

static int pci_find_space(PCIDevice *pdev, uint8_t size)
{
I
Isaku Yamahata 已提交
1704
    int config_size = pci_config_size(pdev);
1705 1706
    int offset = PCI_CONFIG_HEADER_SIZE;
    int i;
I
Isaku Yamahata 已提交
1707
    for (i = PCI_CONFIG_HEADER_SIZE; i < config_size; ++i)
1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732
        if (pdev->used[i])
            offset = i + 1;
        else if (i - offset + 1 == size)
            return offset;
    return 0;
}

static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id,
                                        uint8_t *prev_p)
{
    uint8_t next, prev;

    if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST))
        return 0;

    for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]);
         prev = next + PCI_CAP_LIST_NEXT)
        if (pdev->config[next + PCI_CAP_LIST_ID] == cap_id)
            break;

    if (prev_p)
        *prev_p = prev;
    return next;
}

1733 1734 1735 1736 1737 1738
static void pci_map_option_rom(PCIDevice *pdev, int region_num, pcibus_t addr, pcibus_t size, int type)
{
    cpu_register_physical_memory(addr, size, pdev->rom_offset);
}

/* Add an option rom for the device */
1739
static int pci_add_option_rom(PCIDevice *pdev)
1740 1741 1742 1743 1744
{
    int size;
    char *path;
    void *ptr;

1745 1746 1747 1748 1749
    if (!pdev->romfile)
        return 0;
    if (strlen(pdev->romfile) == 0)
        return 0;

1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763
    if (!pdev->rom_bar) {
        /*
         * Load rom via fw_cfg instead of creating a rom bar,
         * for 0.11 compatibility.
         */
        int class = pci_get_word(pdev->config + PCI_CLASS_DEVICE);
        if (class == 0x0300) {
            rom_add_vga(pdev->romfile);
        } else {
            rom_add_option(pdev->romfile);
        }
        return 0;
    }

1764
    path = qemu_find_file(QEMU_FILE_TYPE_BIOS, pdev->romfile);
1765
    if (path == NULL) {
1766
        path = qemu_strdup(pdev->romfile);
1767 1768 1769
    }

    size = get_image_size(path);
1770
    if (size < 0) {
1771 1772
        error_report("%s: failed to find romfile \"%s\"",
                     __FUNCTION__, pdev->romfile);
1773 1774
        return -1;
    }
1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790
    if (size & (size - 1)) {
        size = 1 << qemu_fls(size);
    }

    pdev->rom_offset = qemu_ram_alloc(size);

    ptr = qemu_get_ram_ptr(pdev->rom_offset);
    load_image(path, ptr);
    qemu_free(path);

    pci_register_bar(pdev, PCI_ROM_SLOT, size,
                     0, pci_map_option_rom);

    return 0;
}

1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804
/* Reserve space and add capability to the linked list in pci config space */
int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
{
    uint8_t offset = pci_find_space(pdev, size);
    uint8_t *config = pdev->config + offset;
    if (!offset)
        return -ENOSPC;
    config[PCI_CAP_LIST_ID] = cap_id;
    config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST];
    pdev->config[PCI_CAPABILITY_LIST] = offset;
    pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST;
    memset(pdev->used + offset, 0xFF, size);
    /* Make capability read-only by default */
    memset(pdev->wmask + offset, 0, size);
1805 1806
    /* Check capability by default */
    memset(pdev->cmask + offset, 0xFF, size);
1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818
    return offset;
}

/* Unlink capability from the pci config space. */
void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
{
    uint8_t prev, offset = pci_find_capability_list(pdev, cap_id, &prev);
    if (!offset)
        return;
    pdev->config[prev] = pdev->config[offset + PCI_CAP_LIST_NEXT];
    /* Make capability writeable again */
    memset(pdev->wmask + offset, 0xff, size);
1819 1820
    /* Clear cmask as device-specific registers can't be checked */
    memset(pdev->cmask + offset, 0, size);
1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836
    memset(pdev->used + offset, 0, size);

    if (!pdev->config[PCI_CAPABILITY_LIST])
        pdev->config[PCI_STATUS] &= ~PCI_STATUS_CAP_LIST;
}

/* Reserve space for capability at a known offset (to call after load). */
void pci_reserve_capability(PCIDevice *pdev, uint8_t offset, uint8_t size)
{
    memset(pdev->used + offset, 0xff, size);
}

uint8_t pci_find_capability(PCIDevice *pdev, uint8_t cap_id)
{
    return pci_find_capability_list(pdev, cap_id, NULL);
}
1837 1838 1839 1840 1841 1842 1843 1844 1845

static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent)
{
    PCIDevice *d = (PCIDevice *)dev;
    const pci_class_desc *desc;
    char ctxt[64];
    PCIIORegion *r;
    int i, class;

1846
    class = pci_get_word(d->config + PCI_CLASS_DEVICE);
1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858
    desc = pci_class_descriptions;
    while (desc->desc && class != desc->class)
        desc++;
    if (desc->desc) {
        snprintf(ctxt, sizeof(ctxt), "%s", desc->desc);
    } else {
        snprintf(ctxt, sizeof(ctxt), "Class %04x", class);
    }

    monitor_printf(mon, "%*sclass %s, addr %02x:%02x.%x, "
                   "pci id %04x:%04x (sub %04x:%04x)\n",
                   indent, "", ctxt,
1859 1860
                   d->config[PCI_SECONDARY_BUS],
                   PCI_SLOT(d->devfn), PCI_FUNC(d->devfn),
1861 1862 1863 1864
                   pci_get_word(d->config + PCI_VENDOR_ID),
                   pci_get_word(d->config + PCI_DEVICE_ID),
                   pci_get_word(d->config + PCI_SUBSYSTEM_VENDOR_ID),
                   pci_get_word(d->config + PCI_SUBSYSTEM_ID));
1865 1866 1867 1868
    for (i = 0; i < PCI_NUM_REGIONS; i++) {
        r = &d->io_regions[i];
        if (!r->size)
            continue;
1869 1870 1871
        monitor_printf(mon, "%*sbar %d: %s at 0x%"FMT_PCIBUS
                       " [0x%"FMT_PCIBUS"]\n",
                       indent, "",
1872
                       i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem",
1873 1874 1875
                       r->addr, r->addr + r->size - 1);
    }
}
G
Gerd Hoffmann 已提交
1876 1877 1878 1879 1880

static PCIDeviceInfo bridge_info = {
    .qdev.name    = "pci-bridge",
    .qdev.size    = sizeof(PCIBridge),
    .init         = pci_bridge_initfn,
1881
    .exit         = pci_bridge_exitfn,
G
Gerd Hoffmann 已提交
1882
    .config_write = pci_bridge_write_config,
B
Blue Swirl 已提交
1883
    .header_type  = PCI_HEADER_TYPE_BRIDGE,
G
Gerd Hoffmann 已提交
1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896
    .qdev.props   = (Property[]) {
        DEFINE_PROP_HEX32("vendorid", PCIBridge, vid, 0),
        DEFINE_PROP_HEX32("deviceid", PCIBridge, did, 0),
        DEFINE_PROP_END_OF_LIST(),
    }
};

static void pci_register_devices(void)
{
    pci_qdev_register(&bridge_info);
}

device_init(pci_register_devices)