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  1. 20 3月, 2020 3 次提交
  3. 18 3月, 2020 2 次提交
  5. 15 3月, 2020 2 次提交
  7. 02 3月, 2020 1 次提交
  9. 27 2月, 2020 2 次提交
  11. 15 1月, 2020 3 次提交
  13. 20 12月, 2019 1 次提交
  15. 17 11月, 2019 1 次提交
  17. 14 11月, 2019 1 次提交
  19. 09 10月, 2019 1 次提交
  21. 18 8月, 2019 1 次提交
    • H
      net: phy: remove calls to genphy_config_init · c227ce44
      由 Heiner Kallweit 提交于 
      Supported PHY features are either auto-detected or explicitly set.
In both cases calling genphy_config_init isn't needed. All that
genphy_config_init does is removing features that are set as
supported but can't be auto-detected. Basically it duplicates the
code in genphy_read_abilities. Therefore remove such calls from
all PHY drivers.

v2:
- remove call also from new adin PHY driver
v3:
- pass NULL as config_init function pointer for dp83848
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c227ce44
  23. 25 7月, 2019 1 次提交
  25. 24 4月, 2019 1 次提交
    • K
      net: phy: mscc: add support for VSC8514 PHY. · e4f9ba64
      由 Kavya Sree Kotagiri 提交于 
      The VSC8514 PHY is a 4-ports PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X, can communicate with the MAC via QSGMII.
The MAC interface protocol for each port within QSGMII can
be either 1000BASE-X or SGMII, if the QSGMII MAC that the VSC8514 is
connecting to supports this functionality.
VSC8514 also supports SGMII MAC-side autonegotiation on each individual
port, downshifting, can set the blinking pattern of each of its 4 LEDs,
SyncE, 1000BASE-T Ring Resiliency as well as HP Auto-MDIX detection.

This adds support for 10BASE-T, 100BASE-TX, and 1000BASE-T,
QSGMII link with the MAC, downshifting, HP Auto-MDIX detection
and blinking pattern for its 4 LEDs.

The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.

If the PHYs haven't been reset before booting the Linux kernel and were
configured to use interrupts for e.g. link status updates, it is
required to clear the interrupts mask register of all PHYs before being
able to use interrupts with any PHY. The first PHY of the package that
will be init will take care of clearing all PHYs interrupts mask
registers. Thus, we need to keep track of the init sequence in the
package, if it's already been done or if it's to be done.

Most of the init sequence of a PHY of the package is common to all PHYs
in the package, thus we use the SMI broadcast feature which enables us
to propagate a write in one register of one PHY to all PHYs in the same
package.
Signed-off-by: NKavya Sree Kotagiri <kavyasree.kotagiri@microchip.com>
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Co-developed-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e4f9ba64
  27. 16 4月, 2019 1 次提交
  29. 23 1月, 2019 1 次提交
  31. 20 12月, 2018 1 次提交
  33. 24 11月, 2018 1 次提交
  35. 12 11月, 2018 1 次提交
  37. 18 10月, 2018 2 次提交
  39. 09 10月, 2018 8 次提交
    • Q
      net: phy: mscc: add support for VSC8574 PHY · 00d70d8e
      由 Quentin Schulz 提交于 
      The VSC8574 PHY is a 4-ports PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X and triple-speed copper SFP capable, can communicate with
the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and
can set the blinking pattern of each of its 4 LEDs, supports SyncE as
well as HP Auto-MDIX detection.

This adds support for 10/100/1000BASE-T, SGMII/QSGMII link with the MAC,
WOL, downshifting, HP Auto-MDIX detection and blinking pattern for its 4
LEDs.

The VSC8574 has also an internal Intel 8051 microcontroller whose
firmware needs to be patched when the PHY is reset. If the 8051's
firmware has the expected CRC, its patching can be skipped. The
microcontroller can be accessed from any port of the PHY, though the CRC
function can only be done through the PHY that is the base PHY of the
package (internal address 0) due to a limitation of the firmware.

The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.

If the PHYs haven't been reset before booting the Linux kernel and were
configured to use interrupts for e.g. link status updates, it is
required to clear the interrupts mask register of all PHYs before being
able to use interrupts with any PHY. The first PHY of the package that
will be init will take care of clearing all PHYs interrupts mask
registers. Thus, we need to keep track of the init sequence in the
package, if it's already been done or if it's to be done.

Most of the init sequence of a PHY of the package is common to all PHYs
in the package, thus we use the SMI broadcast feature which enables us
to propagate a write in one register of one PHY to all PHYs in the same
package.
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      00d70d8e
    • Q
      net: phy: mscc: add support for VSC8584 PHY · a5afc167
      由 Quentin Schulz 提交于 
      The VSC8584 PHY is a 4-ports PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X and triple-speed copper SFP capable, can communicate with the
MAC via SGMII, QSGMII or 1000BASE-X, supports downshifting and can set
the blinking pattern of each of its 4 LEDs, supports hardware offloading
of MACsec and supports SyncE as well as HP Auto-MDIX detection.

This adds support for 10/100/1000BASE-T, SGMII/QSGMII link with the MAC,
downshifting, HP Auto-MDIX detection and blinking pattern for its 4
LEDs.

The VSC8584 has also an internal Intel 8051 microcontroller whose
firmware needs to be patched when the PHY is reset. If the 8051's
firmware has the expected CRC, its patching can be skipped. The
microcontroller can be accessed from any port of the PHY, though the CRC
function can only be done through the PHY that is the base PHY of the
package (internal address 0) due to a limitation of the firmware.

The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.

If the PHYs haven't been reset before booting the Linux kernel and were
configured to use interrupts for e.g. link status updates, it is
required to clear the interrupts mask register of all PHYs before being
able to use interrupts with any PHY. The first PHY of the package that
will be init will take care of clearing all PHYs interrupts mask
registers. Thus, we need to keep track of the init sequence in the
package, if it's already been done or if it's to be done.

Most of the init sequence of a PHY of the package is common to all PHYs
in the package, thus we use the SMI broadcast feature which enables us
to propagate a write in one register of one PHY to all PHYs in the same
package.

The revA of the VSC8584 PHY (which is not and will not be publicly
released) should NOT patch the firmware of the microcontroller or it'll
make things worse, the easiest way is just to not support it.
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a5afc167
    • Q
      net: phy: mscc: remove unneeded temporary variable · 629ea0f1
      由 Quentin Schulz 提交于 
      Here, the rc variable is either used only for the condition right after
the assignment or right before being used as the return value of the
function it's being used in.

So let's remove this unneeded temporary variable whenever possible.
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      629ea0f1
    • Q
      net: phy: mscc: shorten `x != 0` condition to `x` · 6f0430c7
      由 Quentin Schulz 提交于 
      `if (x != 0)` is basically a more verbose version of `if (x)` so let's
use the latter so it's consistent throughout the whole driver.
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6f0430c7
    • Q
      net: phy: mscc: remove unneeded parenthesis · b7d373c5
      由 Quentin Schulz 提交于 
      The == operator precedes the || operator, so we can remove the
parenthesis around (a == b) || (c == d).

The condition is rather explicit and short so removing the parenthesis
definitely does not make it harder to read.
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b7d373c5
    • R
      net: phy: mscc: Add EEE init sequence · 96dae01f
      由 Raju Lakkaraju 提交于 
      Microsemi PHYs (VSC 8530/31/40/41) need to update the Energy Efficient
Ethernet initialization sequence.
In order to avoid certain link state errors that could result in link
drops and packet loss, the physical coding sublayer (PCS) must be
updated with settings related to EEE in order to improve performance.
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microchip.com>
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      96dae01f
    • R
      net: phy: mscc: add ethtool statistics counters · f76178dc
      由 Raju Lakkaraju 提交于 
      There are a few counters available in the PHY: receive errors, false
carriers, link disconnects, media CRC errors and valids counters.

So let's expose those in the PHY driver.

Use the priv structure as the next PHY to be supported has a few
additional counters.
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microsemi.com>
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f76178dc
    • Q
      net: phy: mscc: migrate to phy_select/restore_page functions · 6a0bfbbe
      由 Quentin Schulz 提交于 
      The Microsemi PHYs have multiple banks of registers (called pages).
Registers can only be accessed from one page, if we need a register from
another page, we need to switch the page and the registers of all other
pages are not accessible anymore.

Basically, to read register 5 from page 0, 1, 2, etc., you do the same
phy_read(phydev, 5); but you need to set the desired page beforehand.

In order to guarantee that two concurrent functions do not change the
page, we need to do some locking per page. This can be achieved with the
use of phy_select_page and phy_restore_page functions but phy_write/read
calls in-between those two functions shall be replaced by their
lock-free alternative __phy_write/read.

Let's migrate this driver to those functions.
Suggested-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6a0bfbbe
  41. 29 9月, 2018 1 次提交
    • A
      phy: mscc: fix printf format · 31bae7da
      由 Arnd Bergmann 提交于 
      gcc points out that the length of the temporary buffer may not be sufficient for
large numbers of leds:

drivers/net/phy/mscc.c: In function 'vsc85xx_probe':
drivers/net/phy/mscc.c:460:45: error: '-mode' directive writing 5 bytes into a region of size between 0 and 9 [-Werror=format-overflow=]
   ret = sprintf(led_dt_prop, "vsc8531,led-%d-mode", i);
                                             ^~~~~
drivers/net/phy/mscc.c:460:9: note: 'sprintf' output between 19 and 28 bytes into a destination of size 22
   ret = sprintf(led_dt_prop, "vsc8531,led-%d-mode", i);
         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

While we can make a reasonable assumption that the number of LEDs is small,
the cost of making the buffer a little bigger is insignificant as well.

Fixes: 11bfdabb ("net: phy: mscc: factorize code for LEDs mode")
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      31bae7da
  43. 05 9月, 2018 4 次提交