Provide a mechanism that allows running code in IRQ context. It is
most useful for NMI code that needs to interact with the rest of the
system -- like wakeup a task to drain buffers.

Perf currently has such a mechanism, so extract that and provide it as
a generic feature, independent of perf so that others may also
benefit.

The IRQ context callback is generated through self-IPIs where
possible, or on architectures like powerpc the decrementer (the
built-in timer facility) is set to generate an interrupt immediately.

Architectures that don't have anything like this get to do with a
callback from the timer tick. These architectures can call
irq_work_run() at the tail of any IRQ handlers that might enqueue such
work (like the perf IRQ handler) to avoid undue latencies in
processing the work.
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: NKyle McMartin <kyle@mcmartin.ca>
Acked-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
[ various fixes ]
Signed-off-by: NHuang Ying <ying.huang@intel.com>
LKML-Reference: <1287036094.7768.291.camel@yhuang-dev>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
machines. It also updates arch/arm/ Kconfig and Makefile to include for
support ARCH_S5P64X0 with one kernel image.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add sparse IRQ support in ARCH_MMP.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

In order for CPUidle to work on SMP systems, an implementation of
cpu_idle_wait() is needed.

This patch duplicates the x86 implementation of cpu_idle_wait() for
ARM.
Tested-by: NColin Cross <ccross@android.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: NAntonio Ospite <ospite@studenti.unina.it>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Do this by adding flush_icache_all to cache_fns for ARMv6 and 7.
As flush_icache_all may neeed to be called from flush_kern_cache_all,
add it as the first entry in the cache_fns.

Note that now we can remove the ARM_ERRATA_411920 dependency
to !SMP so it can be selected on UP ARMv6 processors, such
as omap2.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NAnand Gadiyar <gadiyar@ti.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

UP systems do not implement all the instructions that SMP systems have,
so in order to boot a SMP kernel on a UP system, we need to rewrite
parts of the kernel.

Do this using an 'alternatives' scheme, where the kernel code and data
is modified prior to initialization to replace the SMP instructions,
thereby rendering the problematical code ineffectual.  We use the linker
to generate a list of 32-bit word locations and their replacement values,
and run through these replacements when we detect a UP system.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

All platforms which currently support SMP also support the ARM SCU
and ARM TWD blocks, so it's pointless to make these config symbols
conditional on the platform symbols which SMP is already conditional
on.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

On the r2p0, r2p1 and r2p2 versions of the Cortex-A9, data corruption
can occur under very rare conditions due to a store buffer optimisation.

This workaround sets a bit in the diagnostic register of the Cortex-A9,
disabling the optimisation and preventing the problem from occurring.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

5cfc8ee0 (ARM: convert arm to arch_gettimeoffset()) marked all of
at91 AND at91x40 as needing ARCH_USES_GETTIMEOFFSET, and hence no high
res timer support / accurate clock_gettime() - But only at91x40 needs it.

Cc: stable@kernel.org
Signed-off-by: NPeter Korsgaard <peter.korsgaard@barco.com>
Acked-by: NJohn Stultz <johnstul@us.ibm.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch introduces support for the tcc platform by creating an
arch/arm/plat-tcc and arch/arm/mach-tcc8k directories and adding
basic include files plus Kconfig and Makefile.
Signed-off-by: N"Hans J. Koch" <hjk@linutronix.de>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

On the r2p0, r2p1 and r2p2 versions of the Cortex-A9, data corruption
can occur if a shared cache line is replaced on one CPU as another CPU
is accessing it.

This workaround sets two bits in the diagnostic register of the Cortex-A9,
reducing the linefill issuing capabilities of the processor and
avoiding the erroneous behaviour.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

On versions of the Cortex-A9 up to and including r2p2, under rare
circumstances, a DMB instruction between 2 write operations may not
ensure the correct visibility ordering of the 2 writes.

This workaround sets a bit in the diagnostic register of the Cortex-A9,
causing the DMB instruction to behave like a DSB, which functions
correctly on the affected cores.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Partially revert e69edc79, which introduced automatic zreladdr
support.  The change in the way the manual definition is defined
seems to be error and conflict prone.  Go back to the original way
we were handling this for the time being, while keeping the automatic
zreladdr facility.

Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

If we're targetting a v6 or v7 core and have at least software perf events
available, then automatically add support for hardware breakpoints.

Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: S. Karthikeyan <informkarthik@gmail.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Dynamic ftrace for ARM has been disabled since 07c4cc1c ("ftrace:
disable dynamic ftrace for all archs that use daemon").  Now that the
code has been updated, re-enable it.
Signed-off-by: NRabin Vincent <rabin@rab.in>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

fixes the warning:
.config:369:warning: symbol value '' invalid for ZRELADDR

and the prompt for ZRELADDR on make
Signed-off-by: NErik Gilling <konkers@android.com>

This patch adds default zreladdr of ARCH_S5PV310.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This fixes:

	scripts/kconfig/mconf arch/arm/Kconfig
	arch/arm/Kconfig:1187: invalid option
	make[1]: *** [menuconfig] Error 1
	make: *** [menuconfig] Error 2

which was introduced by

	1cea7326 ([ARM] tegra: SMP support)

Cc: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com>
Cc: xsecute@googlemail.com
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Colin Cross <ccross@android.com>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

On versions of the Cortex-A9 prior to r2p0, performing TLB invalidations by
ASID match can result in the incorrect ASID being broadcast to other CPUs.
As a consequence of this, the targetted TLB entries are not invalidated
across the system.

This workaround changes the TLB flushing routines to invalidate entries
regardless of the ASID.

Cc: <stable@kernel.org>
Tested-by: NRob Clark <rob@ti.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch moves the dependency of watchdog timer driver from MACH_XXX(board)
to ARCH_XXX(SoC). This will enable all machines using Samsung S3C64XX and S5P
SoCs to use the WDT driver by default.
Signed-off-by: NBanajit Goswami <banajit.g@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Conflicts:

	arch/arm/Kconfig
	arch/arm/mach-s3c64xx/Kconfig
	arch/arm/mach-s5p6442/Kconfig
	arch/arm/mach-s5pc100/Kconfig

Signed-off-by: NColin Cross <ccross@android.com>
Signed-off-by: NErik Gilling <konkers@android.com>

v2: fixes from Russell King:
	- include linux/io.h instead of asm/io.h
	- fix whitespace in Kconfig
	- Use spin_lock_init to initialize lock
	- Return -ENOSYS instead of BUG for unimplemented clock ops
	- Use proper return values in tegra2 clock ops
    additional changes:
	- Rename some clocks to match dev_ids
	- add rate propagation
	- add debugfs entries
	- add support for clock listed in clk_lookup under multiple dev_ids
v3:
	- Replace per-clock locking with global clock lock
	- Autodetect clock state on init
	- Let clock dividers pick next lower possible frequency
	- Add support for clock init tables
	- Minor bug fixes
	- Fix checkpatch issues
Signed-off-by: NColin Cross <ccross@android.com>

v2: Fixes from Mike Rapoport
	- remove unused header files (mach/dma.h and mach/nand.h)
	- remove tegra 1 references from Makefile.boot

v2: fixes from Russell King
	- remove mach/io.h include from mach/iomap.h
	- fix whitespace in Kconfig

v2: from Colin Cross
	- fix invalid immediate in debug-macro.S

v3:
	- allow selection of multiple boards
Signed-off-by: NColin Cross <ccross@android.com>
Signed-off-by: NErik Gilling <konkers@android.com>

This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
on Samsung SoCs and makes I2C bus driver dependency SoC specific instead
of machine specific. This will enalbe all machines using Samsung ARCH_S3C2410,
_S3C64XX, _S5P6440, _S5PC100, and _S5PV210 to select the I2C driver by default
Signed-off-by: NNaveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>

This patch moves the dependency of RTC driver from MACH_XXX(board) to
ARCH_XXX(SoC). This will enable all machines using Samsung S5P6440, S5PC100
and S5PV210 SoCs to use RTC driver by default.
Signed-off-by: NAtul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds the Kconfig and Makefile for the new S5PV310 SoC.
It also updates arch/arm Kconfig, Makefile and arch/arm/mm/Kconfig
to include support for the new S5PV310.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Introduce SHMOBILE_TIMER_HZ for SH-Mobile.

Allow users to select HZ on their system to
minimize potential timer drift. Use 128 Hz as
default to work well with the 32768 Hz RCLK.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add LPC32XX support in arch/arm/Kconfig and arch/arm/Makefile
Signed-off-by: NKevin Wells <wellsk40@gmail.com>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Now that all arches have been converted over to use generic time via
clocksources or arch_gettimeoffset(), we can remove the GENERIC_TIME
config option and simplify the generic code.
Signed-off-by: NJohn Stultz <johnstul@us.ibm.com>
LKML-Reference: <1279068988-21864-4-git-send-email-johnstul@us.ibm.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The TWD local timers are unable to wake up the CPU when it is placed
into a low power mode, eg. C3.  Therefore, we need to adapt things
such that the TWD code can cope with this.

We do this by always providing a broadcast tick function, and marking
the fact that the TWD local timer will stop in low power modes.  This
means that when the CPU is placed into a low power mode, the core
timer code marks this fact, and allows an IPI to be given to the core.
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>

SPARSE_IRQ doesn't need to be a visible option, only those platforms
supporting that will select it.
Signed-off-by: NEric Miao <eric.miao@canonical.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Everything should now be using sparsemem rather than discontigmem, so
remove the code supporting discontigmem from ARM.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

As long as the zImage is placed within the 128MB range from the start of
memory, ZRELADDR (Address where the decompressed kernel will be placed,
usually == PHYS_OFFSET + TEXT_OFFSET) can be determined at run-time by
masking PC with 0xf80000000.

Running through all the Makefile.boot, all those zreladdr-y
addresses == 0x[0-f][08]00_0000 + TEXT_OFFSET can be determined at
run-time.

Option CONFIG_AUTO_ZRELADDR and CONFIG_ZRELADDR are introduced,
CONFIG_ZRELADDR _must_ be explicitly specified if:

- ((zreladdr-y - TEXT_OFFSET) & ~0xf8000000) != 0, which means
  masking PC with 0xf8000000 will result in an incorrect address.
  Currently this is only a problem on u300.

- or the assumption of the zImage being loaded by the bootloader within
  the first 128MB of RAM is incorrect

- or when ZBOOT_ROM is used, where the above assumption is usually wrong.

[ukleinek: changed mask from 0xf0000000 to 0xf8000000 for mx1 and shark
+ some review fixes from the mailing list]
Original-Idea-and-Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NEric Miao <eric.miao@canonical.com>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Allow SH-Mobile ARM users to adjust FORCE_MAX_ZONEORDER.

The Kconfig entry is taken from SH and non-4K page size
stuff has been trimmed away. For now only SH-Mobile ARM is
allowed to change this variable, SA1111 configs are kept at
"9" and the rest at "11".

CONFIG_FORCE_MAX_ZONEORDER lets the user tweak the maximum
amount of physically contiguous memory that can be allocated
by the kernel.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch enables the HAVE_REGS_AND_STACK_ACCESS_API option
for ARM which is required by the kprobe events tracer. Code based
on the PowerPC port.

Cc: Jean Pihet <jpihet@mvista.com>
Tested-by: NJamie Iles <jamie.iles@picochip.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

So to allow NR_IRQS to be dynamic and platforms to specify the number
of IRQs really needed.
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds support for the Cortex-A9 local timers available when
using the CA9X4 daughterboard with the Versatile Express.
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>