Renames clocks in the clock init table to match the datasheet names
Signed-off-by: NColin Cross <ccross@android.com>

- Add drivers to clock lookup table
- Add new pll_m entries
- Support I2C U16 divider
- Fix rate reporting on 32.768kHz clock
- Call propagate rate only if set_rate succeeds
- Add support for audio_sync clock
- Add 24MHz to PLLA frequency list
- Correct i2s1/2/spdifout mux
- Add suspend support
- Fix enable/disable parent clocks in set_parent
- Add max_rate parameter to all clocks
- DVFS support
- Add virtual cpu clock with dvfs
- Support clk_round_rate
- Fix requesting very high periph frequencies
- Add quirks for PLLU:
   PLLU is slightly different from the rest of the PLLs.  The
   lock enable bit is at bit 22 instead of 18 in the MISC
   register, and the post divider field is a single bit with
   reversed values from other PLLs.
- Simplify recalculating clock rates
- Fix UART divider flags
- Remove unused clock ops
Signed-off-by: NColin Cross <ccross@android.com>

The Tegra SOC contains fuses to identify the CPU type and
bin, and a unique id.  The CPU info is required to determine
the correct voltages for each cpu and core frequency.
Signed-off-by: NColin Cross <ccross@android.com>

Includes checkpatch fixes and TEGRA_NR_GPIOS changes from
Mike Rapoport <mike@compulab.co.il>
Signed-off-by: NColin Cross <ccross@android.com>

- the reset values for some pin groups in the tegra pin mux can result in
functional errors due to conflicting with actively-configured pin groups
muxing from the same controller. this change adds a known safe, non-
conflicting mux for every pin group, which can be used on platforms
where the pin group is not routed to any peripheral

- also add each pin group's I/O voltage rail, to enable platform code to
map from the pin groups used by each interface to the regulators used
for dynamic voltage control

- add routines to individually configure the tristate, pin mux and pull-
ups for a pingroup_config array, so that it is possible to program
individual values at run-time without modifying other values.
this allows driver power-management code to reprogram individual
interfaces into lower power states during idle / suspend, or to
reprogram the pin mux to support multiple physical busses per
internal controller (e.g., sharing a single I2C or SPI controller
across multiple pin groups)

- move chip-specific data like pingroups and drive-pingroups
out of the common code and into chip-specific code

- fix debug output for group with no pullups

- add a TEGRA_MUX_SAFE function.  Setting a pingroup to TEGRA_MUX_SAFE
will automatically select a mux setting that is guaranteed not to
conflict with any of the hardware blocks.
Signed-off-by: NGary King <gking@nvidia.com>

mirror IRQ enable and disable operations on the legacy PPI system
interrupt controller, since the legacy controller is responsible
for responding to wakeup interrupts when the CPU is in LP2 idle mode

save the irq controller state on suspend and restore on resume
Signed-off-by: NGary King <gking@nvidia.com>

The "legacy irq controller" duplicates the functionality of the GIC,
but remains powered during the cpu suspend and idle modes that power
down the CPU and the GIC.
Signed-off-by: NColin Cross <ccross@android.com>

Add missing io address map entries from datasheet.
Add the IRAM area to the statically mapped io regions.
Correct the onewire, USB, and statmon addresses
Signed-off-by: NColin Cross <ccross@android.com>

Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.

The various declarations were removed using the following script:

  grep -rl MACHINE_START arch/arm | xargs \
  sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'

[ Initial patch was from Jeremy Kerr, example script from Russell King ]
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>

Since we can get both physical and virtual addresses from the addruart
macro, we can use this to establish the debug mappings.

In the case of CONFIG_DEBUG_ICEDCC, we don't need any mappings, but
may still need to setup r7 correctly.

Incorporating ASM changes from Nicolas Pitre <npitre@fluxnic.net>.
Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com>
Tested-by: NKevin Hilman <khilman@deeprootsystems.com>

Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.
Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Tested-by: NKevin Hilman <khilman@deeprootsystems.com>

We have the same (empty) macro for all IDEDCC flavours, so consolidate
it to one.
Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com>

As mentioned in the comment right at the top, the first four fields
are directly accessed by assembly code in head.S.  Move nr_irqs so the
comment is true again.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Pass the correct GPIO to gpio_free
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NEric Bénard <eric@eukrea.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

without this patch we get :
arch/arm/mach-imx/built-in.o: In function `eukrea_cpuimx27_init':
eukrea_mbimx27-baseboard.c:(.init.text+0x44c): undefined reference to `mxc_ulpi_access_ops'
Signed-off-by: NEric Bénard <eric@eukrea.com>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

this patch fix the following errors :
arch/arm/mach-mx3/mach-pcm037_eet.c:62: error: implicit declaration of function 'MXC_SPI_CS'
arch/arm/mach-mx3/mach-pcm037_eet.c:185: error: implicit declaration of function 'imx35_add_spi_imx0'

from the Kconfig pcm037 is i.MX31 based and not i.MX35 so replace
imx35_add_spi_imx0 by imx31_add_spi_imx0
Signed-off-by: NEric Bénard <eric@eukrea.com>
[ukl: remove unneeded #include <mach/spi.h>]
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This is only a partial revert of "ARM: mx3/mx31ads: fold board
header in its only user"
[commit ccfa7c26)]

As some of the the board defines are also used in the cs89x0
ethernet driver by the i.MX31 ADS.
Signed-off-by: NIan Lartey <ian@opensource.wolfsonmicro.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

add NAND, SDHC
Signed-off-by: NEric Bénard <eric@eukrea.com>

Signed-off-by: NEric Bénard <eric@eukrea.com>

this patch really configure the GPIO in GPIO mode.
Signed-off-by: NEric Bénard <eric@eukrea.com>

Tested on i.MX25 and i.MX35 and i.MX51
Signed-off-by: NEric Bénard <eric@eukrea.com>

the attached patch allows SD to work on i.MX51 with Wolfram's drivers
Tested on i.MX51.

Based on original patch from: Richard Zhu <r65037@freescale.com>
Signed-off-by: NEric Bénard <eric@eukrea.com>

Based on original patch from: Richard Zhu <r65037@freescale.com>
Signed-off-by: NEric Bénard <eric@eukrea.com>

Signed-off-by: NEric Bénard <eric@eukrea.com>

Signed-off-by: NEric Bénard <eric@eukrea.com>

Signed-off-by: NEric Bénard <eric@eukrea.com>

the PHY is UTMI so don't create an ULPI viewpoint.
Signed-off-by: NEric Bénard <eric@eukrea.com>

Without this exiting WFI can result in cache corruption.
Code taken from Freescale's 2.6.27 BSP and tested on i.MX35
Signed-off-by: NEric Bénard <eric@eukrea.com>

this patch fix the following errors :
arch/arm/plat-mxc/devices/platform-imx-dma.c:44:
    error: ‘MX25_SDMA_BASE_ADDR’ undeclared here (not in a function)
arch/arm/plat-mxc/devices/platform-imx-dma.c:44:
    error: ‘MX25_INT_SDMA’ undeclared here (not in a function)
Signed-off-by: NEric Bénard <eric@eukrea.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

* get_rate_arm : when 400MHz clock is selected (cctl & 1<<14),
ARM clock is 400MHz (MPLL * 3 / 4) and not 800MHz
* get_rate_per : peripherals's clock is derived from AHB and not
from IPG (ref manual : figure 5-1)
* can2_clk : use the correct ID

* without this patch, peripherals getting their clock from PER
clocks work fine because of the 2 errors which fix themselves
(ARM clock x 2 and per clock actually based on IPG which is AHB/2)
but flexcan can't work as it gets its clock from IPG and thus
calculates its bitrate using a reference value which is twice
what it really is.
Signed-off-by: NEric Bénard <eric@eukrea.com>

During the reorganisation of the imx-i2c devices
(in 64de5ec1) the 3rd imx-i2c device
for the mx35 got lost. This patch adds the missing device.
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add IRAM(Internal RAM) allocation functions using GENERIC_ALLOCATOR.
The allocation size is 4KB multiples to guarantee alignment. The
idea for these functions is for i.MX platforms to use them
to dynamically allocate IRAM usage.

Applies on 2.6.36-rc7
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Reviewed-by: NAmit Kucheria <amit.kucheria@canonical.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch fixes build error about GPIO address due to
conflict of commit 4d914705 and 19a2c065.

- commit 4d914705: Fix on GPIO base addresses
- commit 19a2c065: Moves initial map for merging S5P64X0
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Update Kconfig text accordingly.
Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Provide a mechanism that allows running code in IRQ context. It is
most useful for NMI code that needs to interact with the rest of the
system -- like wakeup a task to drain buffers.

Perf currently has such a mechanism, so extract that and provide it as
a generic feature, independent of perf so that others may also
benefit.

The IRQ context callback is generated through self-IPIs where
possible, or on architectures like powerpc the decrementer (the
built-in timer facility) is set to generate an interrupt immediately.

Architectures that don't have anything like this get to do with a
callback from the timer tick. These architectures can call
irq_work_run() at the tail of any IRQ handlers that might enqueue such
work (like the perf IRQ handler) to avoid undue latencies in
processing the work.
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: NKyle McMartin <kyle@mcmartin.ca>
Acked-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
[ various fixes ]
Signed-off-by: NHuang Ying <ying.huang@intel.com>
LKML-Reference: <1287036094.7768.291.camel@yhuang-dev>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

This patch adds header <linux/sched.h> into the below files for build with
CONFIG_PREEMPT_NONE.

arch/arm/mach-s5p64x0/cpu.c
Signed-off-by: NSeung-Chull Suh <sc.suh@samsung.com>
[kgene.kim@samsung.com: edited title and message]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The patch removes s3c_gpio_lock/unlock to avoid acquiring the lock
recursively as lock is already acquired by calling function.
Signed-off-by: NAtul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: removed useless variable due to this]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The s5p64x0_sysclass should be used in place of the obselete s5p6440_sysclass.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Fix the touch screen device name from s3c64x0-adc to s3c64xx-adc.
Signed-off-by: NNaveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch updates s5p64x0_defconfig and changes the name from
s5p6440_defconfig so that can support S5P6440 and S5P6450 with
one kernel.

Tested on SMDK6440(S5P6440) and SMDK6450(S5P6450).
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>