This bus driver supports the GENI based i2c hardware controller in the
Qualcomm SOCs. The Qualcomm Generic Interface (GENI) is a programmable
module supporting a wide range of serial interfaces including I2C. The
driver supports FIFO mode and DMA mode of transfer and switches modes
dynamically depending on the size of the transfer.
Signed-off-by: NKarthikeyan Ramasubramanian <kramasub@codeaurora.org>
Signed-off-by: NSagar Dharia <sdharia@codeaurora.org>
Signed-off-by: NGirish Mahadevan <girishm@codeaurora.org>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Reviewed-by: NStephen Boyd <swboyd@chromium.org>
Tested-by: NStephen Boyd <swboyd@chromium.org>
[wsa: squashed the MAINTAINER addition and a RPM fix by Evan Green]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

On Gen3, we can only do RXDMA once per transfer reliably. For that, we
must reset the device, then we can have RXDMA once. This patch
implements this. When there is no reset controller or the reset fails,
RXDMA will be blocked completely. Otherwise, it will be disabled after
the first RXDMA transfer. Based on a commit from the BSP by Hiromitsu
Yamasaki, yet completely refactored to handle multiple read messages
within one transfer.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch adjusts spinlock scope to make it wrap the whole irq
handler using a single lock/unlock which covers both master and
slave handlers.
Signed-off-by: NJae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Reviewed-by: NBrendan Higgins <brendanhiggins@google.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch changes the order of enum aspeed_i2c_master_state and
enum aspeed_i2c_slave_state defines to make their initial value to
ASPEED_I2C_MASTER_INACTIVE and ASPEED_I2C_SLAVE_STOP respectively.
In case of multi-master use, if a slave data comes ahead of the
first master xfer, master_state starts from an invalid state so
this change fixes the issue.
Signed-off-by: NJae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Reviewed-by: NBrendan Higgins <brendanhiggins@google.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

There are some log printing without a newline character. This
patch adds the missing newline characters.
Signed-off-by: NJae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Reviewed-by: NBrendan Higgins <brendanhiggins@google.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The driver supports multiple hardware variants of Exynos I2C controller
which differ in FIFO depth, handling of interrupts and bus recovery in
HSI2C_MASTER_ST_LOSE state.

The difference in variant was a single bit set for Exynos7 variants and
implicit lack of this bit for other variants.

Make each variant explicit which also fixes the GCC warning about
documentation:

    drivers/i2c/busses/i2c-exynos5.c:223: warning: Function parameter or member 'hw' not described in 'exynos_hsi2c_variant'

No change in functionality.
Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

When we initialize the pins, make sure it looks like STOP by dividing
the delay into halves. It shouldn't matter because SDA is expected to be
held low by a device, but for super-safety, let's do it.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Bus recovery should reset the bus with the standard i2c recovery
procedure. Populate the necessary fields so that the standard procedure
can perform the reset.
Signed-off-by: NEddie James <eajames@linux.vnet.ibm.com>
Tested-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Since there are many ports per master, each with it's own adapter and
chardev, we need some locking to prevent transfers from changing the
master state while other transfers are in progress.
Signed-off-by: NEddie James <eajames@linux.vnet.ibm.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Execute I2C transfers from the FSI-attached I2C master. Use polling
instead of interrupts as we have no hardware IRQ over FSI.
Signed-off-by: NEddie James <eajames@linux.vnet.ibm.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add abort procedure for failed transfers. Add engine reset procedure
that is executed during the abort to recover from various fault
conditions.
Signed-off-by: NEddie James <eajames@linux.vnet.ibm.com>
Tested-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add and initialize I2C adapters for each port on the FSI-attached I2C
master. Ports for each master are defined in the devicetree.
Signed-off-by: NEddie James <eajames@linux.vnet.ibm.com>
Tested-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add register definitions for FSI-attached I2C master and functions to
access those registers over FSI. Add an FSI driver so that our I2C bus
is probed up during an FSI scan.
Signed-off-by: NEddie James <eajames@linux.vnet.ibm.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

While refactoring the routine before, it occurred to me that this will
make the code much easier to understand.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

To break out of recovery as early as possible, feed back the bus_free
logic state.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Some IP cores have an internal 'bus free' logic which may be more
advanced than just checking if SDA is high. Add a separate callback to
get this status. Filling it is optional.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

After exiting the while loop, we checked if recovery was successful and
sent a STOP to the clients. Meanwhile however, we send a STOP after
every pulse, so it is not needed after the loop. If we move the check
for a free bus to the end of the while loop, we can shorten and simplify
the logic. It is still ensured that at least one STOP will be sent to
the wire even if SDA was not stuck low.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

For bus recovery, we either need to bail out early if we can read SDA or
we need to send STOP after every pulse. Otherwise recovery might be
misinterpreted as an unwanted write. So, require one of those SDA
handling functions to avoid this problem.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The i2c_lock_adapter name is ambiguous since it is unclear if it
refers to the root adapter or the adapter you name in the argument.
The natural interpretation is the adapter you name in the argument,
but there are historical reasons for that not being the case; it
in fact locks the root adapter. Just remove the function and force
users to spell out the I2C_LOCK_ROOT_ADAPTER name to indicate what
is really going on. Also remove i2c_unlock_adapter, of course.

This patch was generated with

git grep -l 'i2c_\(un\)\?lock_adapter' \
| xargs sed -i 's/i2c_\(un\)\?lock_adapter(\([^)]*\))/'\
'i2c_\1lock_bus(\2, I2C_LOCK_ROOT_ADAPTER)/g'

followed by white-space touch-up.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Acked-by: NJonathan Cameron <jonathan.cameron@huawei.com>
Tested-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Locking the root adapter for __i2c_transfer will deadlock if the
device sits behind a mux-locked I2C mux. Switch to the finer-grained
i2c_lock_bus with the I2C_LOCK_SEGMENT flag. If the device does not
sit behind a mux-locked mux, the two locking variants are equivalent.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

I2C clients may misunderstand recovery pulses if they can't read SDA to
bail out early. In the worst case, as a write operation. To avoid that
and if we can write SDA, try to send STOP to avoid the
misinterpretation.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org

On Tegra30 Cardhu the PCA9546 I2C mux is not ACK'ing I2C commands on
resume from suspend (which is caused by the reset signal for the I2C
mux not being configured correctl). However, this NACK is causing the
Tegra30 to hang on resuming from suspend which is not expected as we
detect NACKs and handle them. The hang observed appears to occur when
resetting the I2C controller to recover from the NACK.

Commit 77821b46 ("i2c: tegra: proper handling of error cases") added
additional error handling for some error cases including NACK, however,
it appears that this change conflicts with an early fix by commit
f70893d0 ("i2c: tegra: Add delay before resetting the controller
after NACK"). After commit 77821b46 was made we now disable 'packet
mode' before the delay from commit f70893d0 happens. Testing shows
that moving the delay to before disabling 'packet mode' fixes the hang
observed on Tegra30. The delay was added to give the I2C controller
chance to send a stop condition and so it makes sense to move this to
before we disable packet mode. Please note that packet mode is always
enabled for Tegra.

Fixes: 77821b46 ("i2c: tegra: proper handling of error cases")
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Acked-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: stable@vger.kernel.org

Intel Ice Lake has the same SMBus host controller than Intel Cannon
Lake. Add the PCI ID to the drivers list of supported devices.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
[jarkko.nikula@linux.intel.com: Add entries to Documentation and Kconfig]
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Make list of supported chipsets a little bit shorter by consolidating
names that belong to the same family.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Signed-off-by: NThadeu Lima de Souza Cascardo <cascardo@canonical.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

In order to support advanced features, the I2C FIFO interface was
changed in the version of the Tegra I2C controller found in Tegra194.
The changes are backwards incompatible, so the driver needs to be
programmed in a slightly different way on new chips.

Add support for MST FIFO programming and add an OF match entry for
Tegra194. At the same time, mark all prior generations of this
controller as not having the MST FIFO interface.
Acked-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add another injector for an incomplete transfer. As mentioned in the
docs, this one is important to check bus recovery algorithms with it.
Otherwise random data may be sent to devices!
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Make the incomplete_transfer routine reusable, so we can add other test
cases with different patterns later. Prepare the docs for that, too.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Trivial added debug print for dev->clk_freq doesn't necessarily tell the
actual bus speed or mode the controller is operating. For instance it
may indicate 1 MHz Fast Mode Plus or 3.4 MHz High Speed but driver ends up
using 400 kHz Fast Mode due missing timing parameters or missing support
from HW.

Add a debug print that prints the bus speed based on the validated speed
that gets programmed into a HW.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

SDA hold time is an important timing parameter and often reason for
arbitration lost errors if not set to a correct value. Add a debug print
for it in order to see what value gets programmed to a HW.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Mixed timing parameter validation, calculation and their debug prints
with HW initialization in i2c_dw_init_master() and i2c_dw_init_slave()
as been bothering me some time.

It makes function a little bit unclear to follow, doesn't show what steps
are needed to do only once during probe and what are needed whenever HW
needs to be reinitialized. Also those debug prints show information that
doesn't change runtime and thus are also needlessly printed multiple times
whenever HW is reinitialized.

Thus let the i2c_dw_init_master() and i2c_dw_init_slave() to do only HW
initialization and move out one time parameter setting and debug prints
to separate functions which are called only during probe.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

SDA hold time configuration is common to both master and slave code. It
is also something that can be done once during probe and do only
register write when HW needs to be reinitialized.

Remove duplication and move SDA hold time configuration to common code.
It will be called from slave probe and for master code from a new
i2c_dw_set_timings_master() to where we will populate more probe time
timing parameter setting.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This is rather readability update than micro-optimization, or if not
optimization at all. We take the input clock rate to a variable and pass
that to SCL timing parameter calculation functions.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

It looks ___constant_swab32 is an internal byte swap detail. Switch to
swap32() and include header file for it explicitly. Now it comes
implicitly via linux/i2c.h include.
Suggested-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Move register access detection out from master and slave HW
initialization code to common code. Motivation for this is to have
register access configured before HW initialization and remove
duplicated code.

This allows to do further separation between probe time initialization
and runtime reinitialization code.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Commit 43df43e6 ("i2c: designware: Don't set SCL timings and speed
mode when in slave mode") made variable comp_param1 needless in
i2c_dw_init_slave(). Remove it now.
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Calling the __i2c_smbus_xfer wrapper in __i2c_mux_smbus_xfer provides
retries and thus makes the parent-locked case consistent with the both
mux-locked (i2c_mux_smbus_xfer) and the I2C transfer cases.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This simplifies the code, and you get retries for free if the adapter
does not support ->master_xfer.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This simplifies the code, and you get retries for free if the adapter
does not support ->master_xfer.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This simplifies the code, and you get retries for free if the adapter
does not support ->master_xfer.
Signed-off-by: NPeter Rosin <peda@axentia.se>
Acked-by: NMichael Shych <michaelsh@mellanox.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>