As each docg3 chip has 2 protection areas (DPS0 and DPS1),
and because theses areas can prevent user access to the chip
data, add for each floor the sysfs entries which insert the
protection key into the right DPS.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Docg3 chips can work in 3 modes : normal MLC mode, fast
mode and reliable mode. Normally, as docg3 is a MLC chip, it
should be configured to work in normal mode.

In both normal mode, each page is distinct. This
means that writing to page 12 of blocks 14,15 writes only to
that page, and reading from page 12 of blocks 14,15 reads
only from that page.

In reliable and fast modes, pages are coupled by pairs, and
are clones one of each other. This means that the available
capacity of the chip is halved. Pages are coupled in each
block, and page of index 2*n contains the same data as page
2*n+1 of the same block.

In fast mode, the reads occur a bit faster, but are a bit
less reliable that in normal mode.

When reading from page 2*n, the chip reads bytes from both
page 2*n and page 2*n+1, makes a logical and for each byte,
and returns the result. As programming a page means
"clearing bits", even if a bit was not cleared on one page
because the flash is worn out, the other page has the bit
cleared, and the result of the "AND" gives a correct result.

When writing to page 2*n, the chip writes data to both page
2*n and page 2*n+1.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add functions to powerdown and powerup from suspend, in
order to save power.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Credit for discovering the BCH algorith parameters, and bit
reversing algorithm is to be give to Mike Dunn and Ivan
Djelic.

The BCH correction code relied upon the BCH library, where
all data and ECC is bit-reversed. The BCH library works
correctly when each input byte is bit-reversed, and
accordingly ECC output is also bit-reversed.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Map the developped write and erase functions into the mtd
structure.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add erase capability to the docg3 driver. The erase block is
made of 2 physical blocks, as both share all 64 pages. That
makes an erase block of at least 64 kBytes.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add write capability to the docg3 driver. The writes are
possible on a single page (512 bytes + 16 bytes), even if
that page is split on 2 physical pages on 2 blocks (each on
one plane).
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add OOB layout description for docg3, so that userspace can
use this information to setup the data for write_oob().
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add support for multiple floors, ie. cascaded docg3
chips. There might be 4 docg3 chips cascaded, sharing the
same address space, and providing up to 4 times the storage
capacity of a unique chip.

Each floor will be seen as an independant mtd device.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Fix the docg3 reads to be able to cope with all possible
data buffer / oob buffer / file mode combinations from
docg3_read_oob().
This especially ensures that raw reads do not use ECC
corrections, and AUTOOOB and PLACEOOB do use ECC
correction.

The approach is to empty docg3_read() and make it a wrapper
to docg3_read_oob(). As docg3_read_oob() handles all the
funny cases (no data buffer but oob buffer, data buffer but
no oob buffer, ...), docg3_read() is just a special use of
docg3_read_oob().
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The protection areas boundaries were on 16bit registers, not
8bit. This is consistent with block numbers, which can
extend up to 4096 on bigger chips (and is 2048 on the
docg3).
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Writeb was incorrectly traced as a 16 bits write, instead of
a 8 bits write. Fix it by tracing the correct width.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Change the NOP debug log verbosity to very verbose to
unburden log analysis.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add support for DiskOnChip G3 chips. The support is quite
limited yet :
 - no flash writes/erases are implemented
 - ECC fixes are not implemented
 - powerdown is not implemented
 - IPL handling is not yet done

On the brighter side, the chip reading does work.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>