As each docg3 chip has 2 protection areas (DPS0 and DPS1),
and because theses areas can prevent user access to the chip
data, add for each floor the sysfs entries which insert the
protection key into the right DPS.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Docg3 chips can work in 3 modes : normal MLC mode, fast
mode and reliable mode. Normally, as docg3 is a MLC chip, it
should be configured to work in normal mode.

In both normal mode, each page is distinct. This
means that writing to page 12 of blocks 14,15 writes only to
that page, and reading from page 12 of blocks 14,15 reads
only from that page.

In reliable and fast modes, pages are coupled by pairs, and
are clones one of each other. This means that the available
capacity of the chip is halved. Pages are coupled in each
block, and page of index 2*n contains the same data as page
2*n+1 of the same block.

In fast mode, the reads occur a bit faster, but are a bit
less reliable that in normal mode.

When reading from page 2*n, the chip reads bytes from both
page 2*n and page 2*n+1, makes a logical and for each byte,
and returns the result. As programming a page means
"clearing bits", even if a bit was not cleared on one page
because the flash is worn out, the other page has the bit
cleared, and the result of the "AND" gives a correct result.

When writing to page 2*n, the chip writes data to both page
2*n and page 2*n+1.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add functions to powerdown and powerup from suspend, in
order to save power.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Credit for discovering the BCH algorith parameters, and bit
reversing algorithm is to be give to Mike Dunn and Ivan
Djelic.

The BCH correction code relied upon the BCH library, where
all data and ECC is bit-reversed. The BCH library works
correctly when each input byte is bit-reversed, and
accordingly ECC output is also bit-reversed.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Map the developped write and erase functions into the mtd
structure.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add erase capability to the docg3 driver. The erase block is
made of 2 physical blocks, as both share all 64 pages. That
makes an erase block of at least 64 kBytes.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add write capability to the docg3 driver. The writes are
possible on a single page (512 bytes + 16 bytes), even if
that page is split on 2 physical pages on 2 blocks (each on
one plane).
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add OOB buffer area to store the OOB data until the actual
page is written, so that it can be completed by hardware ECC
generator.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add the required registers and commands to erase and write
flash pages / blocks.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add OOB layout description for docg3, so that userspace can
use this information to setup the data for write_oob().
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add support for multiple floors, ie. cascaded docg3
chips. There might be 4 docg3 chips cascaded, sharing the
same address space, and providing up to 4 times the storage
capacity of a unique chip.

Each floor will be seen as an independant mtd device.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Fix the docg3 reads to be able to cope with all possible
data buffer / oob buffer / file mode combinations from
docg3_read_oob().
This especially ensures that raw reads do not use ECC
corrections, and AUTOOOB and PLACEOOB do use ECC
correction.

The approach is to empty docg3_read() and make it a wrapper
to docg3_read_oob(). As docg3_read_oob() handles all the
funny cases (no data buffer but oob buffer, data buffer but
no oob buffer, ...), docg3_read() is just a special use of
docg3_read_oob().
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

BCH registers are contiguous, not on every byte. Fix the
register definitions.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The protection areas boundaries were on 16bit registers, not
8bit. This is consistent with block numbers, which can
extend up to 4096 on bigger chips (and is 2048 on the
docg3).
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Writeb was incorrectly traced as a 16 bits write, instead of
a 8 bits write. Fix it by tracing the correct width.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Change the NOP debug log verbosity to very verbose to
unburden log analysis.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: NIvan Djelic <ivan.djelic@parrot.com>
Reviewed-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Making  MTD_NAND_OMAP2 depend on ARCH_OMAP2PLUS instead of
oring with ARCH2/3/4.
Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch allows each CFI device map to use its own endianness. The
globally defined CFI endianness (CONFIG_MTD_CFI_NOSWAP,
CONFIG_MTD_CFI_BE_BYTE_SWAP or CONFIG_MTD_CFI_LE_BYTE_SWAP) becomes the
default value which can be overridden by a driver for a particular device.
Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Some error paths in mtd_blkdevs were fixed in the following commit:

    commit 94735ec4
    mtd: mtd_blkdevs: fix error path in blktrans_open

But on these error paths, the block device's `dev->open' count is
already incremented before we check for errors. This meant that, while
the error path was handled correctly on the first time through
blktrans_open(), the device is erroneously considered already open on
the second time through.

This problem can be seen, for instance, when a UBI volume is
simultaneously mounted as a UBIFS partition and read through its
corresponding gluebi mtdblockX device. This results in blktrans_open()
passing its error checks (with `dev->open > 0') without actually having
a handle on the device. Here's a summarized log of the actions and
results with nandsim:

    # modprobe nandsim
    # modprobe mtdblock
    # modprobe gluebi
    # modprobe ubifs
    # ubiattach /dev/ubi_ctrl -m 0
    ...
    # ubimkvol /dev/ubi0 -N test -s 16MiB
    ...
    # mount -t ubifs ubi0:test /mnt
    # ls /dev/mtdblock*
    /dev/mtdblock0  /dev/mtdblock1
    # cat /dev/mtdblock1 > /dev/null
    cat: can't open '/dev/mtdblock4': Device or resource busy
    # cat /dev/mtdblock1 > /dev/null

    CPU 0 Unable to handle kernel paging request at virtual address
    fffffff0, epc == 8031536c, ra == 8031f280
    Oops[#1]:
    ...
    Call Trace:
    [<8031536c>] ubi_leb_read+0x14/0x164
    [<8031f280>] gluebi_read+0xf0/0x148
    [<802edba8>] mtdblock_readsect+0x64/0x198
    [<802ecfe4>] mtd_blktrans_thread+0x330/0x3f4
    [<8005be98>] kthread+0x88/0x90
    [<8000bc04>] kernel_thread_helper+0x10/0x18

Cc: stable@kernel.org [3.0+]
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Macronix MX30LF1208AA is a 512 Mbit NAND with device code 0xF0.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Macronix is produing SLC NAND MX30LF1208AA, so add their manufacturer
code to the manufacturer lists.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

commit d0a4bb49 introduced a
regression which is annoying but fairly harmless.

When writing to an array that is undergoing recovery (a spare
in being integrated into the array), writing to the array will
set bits in the bitmap, but they will not be cleared when the
write completes.

For bits covering areas that have not been recovered yet this is not a
problem as the recovery will clear the bits.  However bits set in
already-recovered region will stay set and never be cleared.
This doesn't risk data integrity.  The only negatives are:
 - next time there is a crash, more resyncing than necessary will
   be done.
 - the bitmap doesn't look clean, which is confusing.

While an array is recovering we don't want to update the
'events_cleared' setting in the bitmap but we do still want to clear
bits that have very recently been set - providing they were written to
the recovering device.

So split those two needs - which previously both depended on 'success'
and always clear the bit of the write went to all devices.
Signed-off-by: NNeilBrown <neilb@suse.de>

Before performing a recovery we try to remove any spares that
might not be working, then add any that might have become relevant.

Currently we abort on the first spare that cannot be added.
This is a false optimisation.
It is conceivable that - depending on rules in the personality - a
subsequent spare might be accepted.
Also the loop does other things like count the available spares and
reset the 'recovery_offset' value.

If we abort early these might not happen properly.

So remove the early abort.

In particular if you have an array what is undergoing recovery and
which has extra spares, then the recovery may not restart after as
reboot as the could of 'spares' might end up as zero.
Reported-by: NAnssi Hannula <anssi.hannula@iki.fi>
Signed-off-by: NNeilBrown <neilb@suse.de>

While reshaping a degraded array (as when reshaping a RAID0 by first
converting it to a degraded RAID4) we currently get confused about
which devices are in_sync.  In most cases we get it right, but in the
region that is being reshaped we need to treat non-failed devices as
in-sync when we have the data but haven't actually written it out yet.
Reported-by: NAdam Kwolek <adam.kwolek@intel.com>
Signed-off-by: NNeilBrown <neilb@suse.de>

commit d70ed2e4
broke hot-add to a linear array.
After that commit, metadata if not written to devices until they
have been fully integrated into the array as determined by
saved_raid_disk.  That patch arranged to clear that field after
a recovery completed.

However for linear arrays, there is no recovery - the integration is
instantaneous.  So we need to explicitly clear the saved_raid_disk
field.
Signed-off-by: NNeilBrown <neilb@suse.de>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

This commit:

commit 8f5d6215
Author: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Date:   Mon Oct 10 18:06:54 2011 +0200

    usb/isp1760: Let OF bindings depend on general CONFIG_OF instead of PPC_OF .

    To be able to use the driver on other OF-aware architectures, too.
    And add necessary OF related #includes to fix compilation error.
Signed-off-by: NJoachim Foerster <joachim.foerster@missinglinkelectronics.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

enabled the build on all CONFIG_OF architectures, but it cannot do
this.

This driver depends upon CONFIG_OF_IRQ but not all CONFIG_OF platforms
support that infrastructure, in particular Sparc does not so the
build fails.

Please push a patch like the following to Linus so that this code only
gets built where it actually should.

--------------------
usb/isp1760: Add missing CONFIG_OF_IRQ dependency on OF code.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

If the BMC gets reset, it will return 0x80 response errors.

In less than a week
# grep "Error 80 on cmd 22" /var/log/kernel |wc -l
378681

In this case, it is probably a good idea to restore the IPMI settings.
Signed-off-by: NCorey Minyard <cminyard@mvista.com>
Tested-by: NArkadiusz Miśkiewicz <a.miskiewicz@gmail.com>
Reported-by: NArkadiusz Miśkiewicz <a.miskiewicz@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Include linux/io.h to fix below build error:

  CC      drivers/mfd/jz4740-adc.o
drivers/mfd/jz4740-adc.c: In function 'jz4740_adc_irq_demux':
drivers/mfd/jz4740-adc.c:73: error: implicit declaration of function 'readb'
drivers/mfd/jz4740-adc.c: In function 'jz4740_adc_set_enabled':
drivers/mfd/jz4740-adc.c:110: error: implicit declaration of function 'writeb'
drivers/mfd/jz4740-adc.c: In function 'jz4740_adc_set_config':
drivers/mfd/jz4740-adc.c:146: error: implicit declaration of function 'readl'
drivers/mfd/jz4740-adc.c:151: error: implicit declaration of function 'writel'
drivers/mfd/jz4740-adc.c: In function 'jz4740_adc_probe':
drivers/mfd/jz4740-adc.c:249: error: implicit declaration of function 'ioremap_nocache'
drivers/mfd/jz4740-adc.c:249: warning: assignment makes pointer from integer without a cast
drivers/mfd/jz4740-adc.c:289: warning: passing argument 3 of 'mfd_add_devices' discards qualifiers from pointer target type
include/linux/mfd/core.h:93: note: expected 'struct mfd_cell *' but argument is of type 'const struct mfd_cell *'
drivers/mfd/jz4740-adc.c:299: error: implicit declaration of function 'iounmap'
make[2]: *** [drivers/mfd/jz4740-adc.o] Error 1
make[1]: *** [drivers/mfd] Error 2
make: *** [drivers] Error 2
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Acked-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

irq_set_chained_handler sets 'desc->handle_irq'.
However this irq is called by handle_nested_irq from handle_twl4030_pih,
and that uses action->thread_fn.

So the handled set with irq_set_chained_handler is never called.

So change to use request_threaded_irq instead - that sets the correct field.

Tested on GTA04 Phoenux.
Signed-off-by: NNeilBrown <neilb@suse.de>
Tested-by: NFelipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

As the interrupt source is only cleared by the threaded interrupt
service routine, we need to make the base interrupt IRQF_ONESHOT.
Without this, the first interrupt from the TWL4030 cause the CPU to
enter an infinite loop trying to handle to interrupt but never
clearing it.
Signed-off-by: NNeilBrown <neilb@suse.de>
Tested-by: NFelipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

The function is not actually cleaing the bitmask.
Signed-off-by: NMarcus Folkesson <marcus.folkesson@gmail.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Fix below build warning if CONFIG_DEBUG_FS is disabled.

  CC      drivers/mfd/ab8500-core.o
drivers/mfd/ab8500-core.c:623: warning: 'ab8500_debug_resources' defined but not used
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Check inuse variable before trying to access twl_map to prevent
dereferencing of uninitialized variable.
Signed-off-by: NIlya Yanok <yanok@emcraft.com>
Cc: stable@kernel.org
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Include linux/module.h to fix below build error:

  CC      drivers/mfd/ab5500-debugfs.o
drivers/mfd/ab5500-debugfs.c:571: error: 'THIS_MODULE' undeclared here (not in a function)
make[2]: *** [drivers/mfd/ab5500-debugfs.o] Error 1
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

This didn't go in as part of the original MFD patch for WM1811 due to
cross tree issues.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

It does not make sense to write new value only when all the bit_mask
bits are zero.
We need to write new value if the bit mask fields of new value is
not equal to old value.
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

It does not make sense to write new value only when all the bit_mask
bits are zero.
We need to write new value if the bit mask fields of new value is
not equal to old value.
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Current code checks if all the bit_mask bits are all zero is wrong.
We need to write new value if the bit mask fields of new value is
not equal to old value.
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Acked-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>