spectrum_buffers.c 33.7 KB
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// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
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#include <linux/kernel.h>
#include <linux/types.h>
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#include <linux/dcbnl.h>
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#include <linux/if_ether.h>
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#include <linux/list.h>
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#include "spectrum.h"
#include "core.h"
#include "port.h"
#include "reg.h"

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struct mlxsw_sp_sb_pr {
	enum mlxsw_reg_sbpr_mode mode;
	u32 size;
};

struct mlxsw_cp_sb_occ {
	u32 cur;
	u32 max;
};

struct mlxsw_sp_sb_cm {
	u32 min_buff;
	u32 max_buff;
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	u16 pool_index;
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	struct mlxsw_cp_sb_occ occ;
};

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#define MLXSW_SP_SB_INFI -1U

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struct mlxsw_sp_sb_pm {
	u32 min_buff;
	u32 max_buff;
	struct mlxsw_cp_sb_occ occ;
};

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struct mlxsw_sp_sb_mm {
	u32 min_buff;
	u32 max_buff;
	u16 pool_index;
};

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struct mlxsw_sp_sb_pool_des {
	enum mlxsw_reg_sbxx_dir dir;
	u8 pool;
};

/* Order ingress pools before egress pools. */
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static const struct mlxsw_sp_sb_pool_des mlxsw_sp1_sb_pool_dess[] = {
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	{MLXSW_REG_SBXX_DIR_INGRESS, 0},
	{MLXSW_REG_SBXX_DIR_INGRESS, 1},
	{MLXSW_REG_SBXX_DIR_INGRESS, 2},
	{MLXSW_REG_SBXX_DIR_INGRESS, 3},
	{MLXSW_REG_SBXX_DIR_EGRESS, 0},
	{MLXSW_REG_SBXX_DIR_EGRESS, 1},
	{MLXSW_REG_SBXX_DIR_EGRESS, 2},
	{MLXSW_REG_SBXX_DIR_EGRESS, 3},
	{MLXSW_REG_SBXX_DIR_EGRESS, 15},
};

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static const struct mlxsw_sp_sb_pool_des mlxsw_sp2_sb_pool_dess[] = {
	{MLXSW_REG_SBXX_DIR_INGRESS, 0},
	{MLXSW_REG_SBXX_DIR_INGRESS, 1},
	{MLXSW_REG_SBXX_DIR_INGRESS, 2},
	{MLXSW_REG_SBXX_DIR_INGRESS, 3},
	{MLXSW_REG_SBXX_DIR_EGRESS, 0},
	{MLXSW_REG_SBXX_DIR_EGRESS, 1},
	{MLXSW_REG_SBXX_DIR_EGRESS, 2},
	{MLXSW_REG_SBXX_DIR_EGRESS, 3},
};

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#define MLXSW_SP_SB_ING_TC_COUNT 8
#define MLXSW_SP_SB_EG_TC_COUNT 16
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struct mlxsw_sp_sb_port {
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	struct mlxsw_sp_sb_cm ing_cms[MLXSW_SP_SB_ING_TC_COUNT];
	struct mlxsw_sp_sb_cm eg_cms[MLXSW_SP_SB_EG_TC_COUNT];
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	struct mlxsw_sp_sb_pm *pms;
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};

struct mlxsw_sp_sb {
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	struct mlxsw_sp_sb_pr *prs;
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	struct mlxsw_sp_sb_port *ports;
	u32 cell_size;
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	u64 sb_size;
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};

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struct mlxsw_sp_sb_vals {
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	unsigned int pool_count;
	const struct mlxsw_sp_sb_pool_des *pool_dess;
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	const struct mlxsw_sp_sb_pm *pms;
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	const struct mlxsw_sp_sb_pr *prs;
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	const struct mlxsw_sp_sb_mm *mms;
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	const struct mlxsw_sp_sb_cm *cms_ingress;
	const struct mlxsw_sp_sb_cm *cms_egress;
	const struct mlxsw_sp_sb_cm *cms_cpu;
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	unsigned int mms_count;
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	unsigned int cms_ingress_count;
	unsigned int cms_egress_count;
	unsigned int cms_cpu_count;
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};

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u32 mlxsw_sp_cells_bytes(const struct mlxsw_sp *mlxsw_sp, u32 cells)
{
	return mlxsw_sp->sb->cell_size * cells;
}

u32 mlxsw_sp_bytes_cells(const struct mlxsw_sp *mlxsw_sp, u32 bytes)
{
	return DIV_ROUND_UP(bytes, mlxsw_sp->sb->cell_size);
}

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static struct mlxsw_sp_sb_pr *mlxsw_sp_sb_pr_get(struct mlxsw_sp *mlxsw_sp,
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						 u16 pool_index)
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{
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	return &mlxsw_sp->sb->prs[pool_index];
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}

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static bool mlxsw_sp_sb_cm_exists(u8 pg_buff, enum mlxsw_reg_sbxx_dir dir)
{
	if (dir == MLXSW_REG_SBXX_DIR_INGRESS)
		return pg_buff < MLXSW_SP_SB_ING_TC_COUNT;
	else
		return pg_buff < MLXSW_SP_SB_EG_TC_COUNT;
}

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static struct mlxsw_sp_sb_cm *mlxsw_sp_sb_cm_get(struct mlxsw_sp *mlxsw_sp,
						 u8 local_port, u8 pg_buff,
						 enum mlxsw_reg_sbxx_dir dir)
{
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	struct mlxsw_sp_sb_port *sb_port = &mlxsw_sp->sb->ports[local_port];

	WARN_ON(!mlxsw_sp_sb_cm_exists(pg_buff, dir));
	if (dir == MLXSW_REG_SBXX_DIR_INGRESS)
		return &sb_port->ing_cms[pg_buff];
	else
		return &sb_port->eg_cms[pg_buff];
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}

static struct mlxsw_sp_sb_pm *mlxsw_sp_sb_pm_get(struct mlxsw_sp *mlxsw_sp,
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						 u8 local_port, u16 pool_index)
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{
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	return &mlxsw_sp->sb->ports[local_port].pms[pool_index];
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}

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static int mlxsw_sp_sb_pr_write(struct mlxsw_sp *mlxsw_sp, u16 pool_index,
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				enum mlxsw_reg_sbpr_mode mode,
				u32 size, bool infi_size)
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{
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	const struct mlxsw_sp_sb_pool_des *des =
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		&mlxsw_sp->sb_vals->pool_dess[pool_index];
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	char sbpr_pl[MLXSW_REG_SBPR_LEN];
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	struct mlxsw_sp_sb_pr *pr;
	int err;
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	mlxsw_reg_sbpr_pack(sbpr_pl, des->pool, des->dir, mode,
			    size, infi_size);
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	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl);
	if (err)
		return err;

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	if (infi_size)
		size = mlxsw_sp_bytes_cells(mlxsw_sp, mlxsw_sp->sb->sb_size);
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	pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);
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	pr->mode = mode;
	pr->size = size;
	return 0;
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}

static int mlxsw_sp_sb_cm_write(struct mlxsw_sp *mlxsw_sp, u8 local_port,
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				u8 pg_buff, u32 min_buff, u32 max_buff,
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				bool infi_max, u16 pool_index)
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{
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	const struct mlxsw_sp_sb_pool_des *des =
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		&mlxsw_sp->sb_vals->pool_dess[pool_index];
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	char sbcm_pl[MLXSW_REG_SBCM_LEN];
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	struct mlxsw_sp_sb_cm *cm;
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	int err;
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	mlxsw_reg_sbcm_pack(sbcm_pl, local_port, pg_buff, des->dir,
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			    min_buff, max_buff, infi_max, des->pool);
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	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbcm), sbcm_pl);
	if (err)
		return err;
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	if (mlxsw_sp_sb_cm_exists(pg_buff, des->dir)) {
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		if (infi_max)
			max_buff = mlxsw_sp_bytes_cells(mlxsw_sp,
							mlxsw_sp->sb->sb_size);
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		cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, pg_buff,
					des->dir);
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		cm->min_buff = min_buff;
		cm->max_buff = max_buff;
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		cm->pool_index = pool_index;
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	}
	return 0;
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}

static int mlxsw_sp_sb_pm_write(struct mlxsw_sp *mlxsw_sp, u8 local_port,
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				u16 pool_index, u32 min_buff, u32 max_buff)
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{
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	const struct mlxsw_sp_sb_pool_des *des =
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		&mlxsw_sp->sb_vals->pool_dess[pool_index];
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	char sbpm_pl[MLXSW_REG_SBPM_LEN];
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	struct mlxsw_sp_sb_pm *pm;
	int err;
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	mlxsw_reg_sbpm_pack(sbpm_pl, local_port, des->pool, des->dir, false,
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			    min_buff, max_buff);
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	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl);
	if (err)
		return err;

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	pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port, pool_index);
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	pm->min_buff = min_buff;
	pm->max_buff = max_buff;
	return 0;
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}

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static int mlxsw_sp_sb_pm_occ_clear(struct mlxsw_sp *mlxsw_sp, u8 local_port,
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				    u16 pool_index, struct list_head *bulk_list)
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{
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	const struct mlxsw_sp_sb_pool_des *des =
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		&mlxsw_sp->sb_vals->pool_dess[pool_index];
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	char sbpm_pl[MLXSW_REG_SBPM_LEN];

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	mlxsw_reg_sbpm_pack(sbpm_pl, local_port, des->pool, des->dir,
			    true, 0, 0);
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	return mlxsw_reg_trans_query(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl,
				     bulk_list, NULL, 0);
}

static void mlxsw_sp_sb_pm_occ_query_cb(struct mlxsw_core *mlxsw_core,
					char *sbpm_pl, size_t sbpm_pl_len,
					unsigned long cb_priv)
{
	struct mlxsw_sp_sb_pm *pm = (struct mlxsw_sp_sb_pm *) cb_priv;

	mlxsw_reg_sbpm_unpack(sbpm_pl, &pm->occ.cur, &pm->occ.max);
}

static int mlxsw_sp_sb_pm_occ_query(struct mlxsw_sp *mlxsw_sp, u8 local_port,
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				    u16 pool_index, struct list_head *bulk_list)
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{
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	const struct mlxsw_sp_sb_pool_des *des =
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		&mlxsw_sp->sb_vals->pool_dess[pool_index];
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	char sbpm_pl[MLXSW_REG_SBPM_LEN];
	struct mlxsw_sp_sb_pm *pm;

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	pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port, pool_index);
	mlxsw_reg_sbpm_pack(sbpm_pl, local_port, des->pool, des->dir,
			    false, 0, 0);
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	return mlxsw_reg_trans_query(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl,
				     bulk_list,
				     mlxsw_sp_sb_pm_occ_query_cb,
				     (unsigned long) pm);
}

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static const u16 mlxsw_sp_pbs[] = {
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	[0] = 2 * ETH_FRAME_LEN,
	[9] = 2 * MLXSW_PORT_MAX_MTU,
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};

#define MLXSW_SP_PBS_LEN ARRAY_SIZE(mlxsw_sp_pbs)
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#define MLXSW_SP_PB_UNUSED 8
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static int mlxsw_sp_port_pb_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
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	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
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	char pbmc_pl[MLXSW_REG_PBMC_LEN];
	int i;

	mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port,
			    0xffff, 0xffff / 2);
	for (i = 0; i < MLXSW_SP_PBS_LEN; i++) {
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		u16 size = mlxsw_sp_bytes_cells(mlxsw_sp, mlxsw_sp_pbs[i]);

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		if (i == MLXSW_SP_PB_UNUSED)
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			continue;
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		mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, i, size);
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	}
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	mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl,
					 MLXSW_REG_PBMC_PORT_SHARED_BUF_IDX, 0);
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	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
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}

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static int mlxsw_sp_port_pb_prio_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
	char pptb_pl[MLXSW_REG_PPTB_LEN];
	int i;

	mlxsw_reg_pptb_pack(pptb_pl, mlxsw_sp_port->local_port);
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
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		mlxsw_reg_pptb_prio_to_buff_pack(pptb_pl, i, 0);
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	return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb),
			       pptb_pl);
}

static int mlxsw_sp_port_headroom_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
	int err;

	err = mlxsw_sp_port_pb_init(mlxsw_sp_port);
	if (err)
		return err;
	return mlxsw_sp_port_pb_prio_init(mlxsw_sp_port);
}

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static int mlxsw_sp_sb_port_init(struct mlxsw_sp *mlxsw_sp,
				 struct mlxsw_sp_sb_port *sb_port)
{
	struct mlxsw_sp_sb_pm *pms;

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	pms = kcalloc(mlxsw_sp->sb_vals->pool_count, sizeof(*pms),
		      GFP_KERNEL);
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	if (!pms)
		return -ENOMEM;
	sb_port->pms = pms;
	return 0;
}

static void mlxsw_sp_sb_port_fini(struct mlxsw_sp_sb_port *sb_port)
{
	kfree(sb_port->pms);
}

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static int mlxsw_sp_sb_ports_init(struct mlxsw_sp *mlxsw_sp)
{
	unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
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	struct mlxsw_sp_sb_pr *prs;
	int i;
	int err;
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	mlxsw_sp->sb->ports = kcalloc(max_ports,
				      sizeof(struct mlxsw_sp_sb_port),
				      GFP_KERNEL);
	if (!mlxsw_sp->sb->ports)
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		return -ENOMEM;
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	prs = kcalloc(mlxsw_sp->sb_vals->pool_count, sizeof(*prs),
		      GFP_KERNEL);
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	if (!prs) {
		err = -ENOMEM;
		goto err_alloc_prs;
	}
	mlxsw_sp->sb->prs = prs;

	for (i = 0; i < max_ports; i++) {
		err = mlxsw_sp_sb_port_init(mlxsw_sp, &mlxsw_sp->sb->ports[i]);
		if (err)
			goto err_sb_port_init;
	}

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	return 0;
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err_sb_port_init:
	for (i--; i >= 0; i--)
		mlxsw_sp_sb_port_fini(&mlxsw_sp->sb->ports[i]);
	kfree(mlxsw_sp->sb->prs);
err_alloc_prs:
	kfree(mlxsw_sp->sb->ports);
	return err;
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}

static void mlxsw_sp_sb_ports_fini(struct mlxsw_sp *mlxsw_sp)
{
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	int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
	int i;

	for (i = max_ports - 1; i >= 0; i--)
		mlxsw_sp_sb_port_fini(&mlxsw_sp->sb->ports[i]);
	kfree(mlxsw_sp->sb->prs);
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	kfree(mlxsw_sp->sb->ports);
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}

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#define MLXSW_SP_SB_PR(_mode, _size)	\
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	{				\
		.mode = _mode,		\
		.size = _size,		\
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	}

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#define MLXSW_SP1_SB_PR_INGRESS_SIZE	12440000
#define MLXSW_SP1_SB_PR_INGRESS_MNG_SIZE (200 * 1000)
#define MLXSW_SP1_SB_PR_EGRESS_SIZE	13232000

static const struct mlxsw_sp_sb_pr mlxsw_sp1_sb_prs[] = {
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	/* Ingress pools. */
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	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
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		       MLXSW_SP1_SB_PR_INGRESS_SIZE),
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	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
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	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
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		       MLXSW_SP1_SB_PR_INGRESS_MNG_SIZE),
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	/* Egress pools. */
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	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
		       MLXSW_SP1_SB_PR_EGRESS_SIZE),
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	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
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	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
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	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_STATIC, MLXSW_SP_SB_INFI),
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};

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#define MLXSW_SP2_SB_PR_INGRESS_SIZE	40960000
#define MLXSW_SP2_SB_PR_INGRESS_MNG_SIZE (200 * 1000)
#define MLXSW_SP2_SB_PR_EGRESS_SIZE	40960000

static const struct mlxsw_sp_sb_pr mlxsw_sp2_sb_prs[] = {
	/* Ingress pools. */
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
		       MLXSW_SP2_SB_PR_INGRESS_SIZE),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_STATIC, 0),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_STATIC, 0),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
		       MLXSW_SP2_SB_PR_INGRESS_MNG_SIZE),
	/* Egress pools. */
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
		       MLXSW_SP2_SB_PR_EGRESS_SIZE),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_STATIC, 0),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_STATIC, 0),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_STATIC, 0),
};

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static int mlxsw_sp_sb_prs_init(struct mlxsw_sp *mlxsw_sp,
				const struct mlxsw_sp_sb_pr *prs,
				size_t prs_len)
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{
	int i;
	int err;

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	for (i = 0; i < prs_len; i++) {
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		u32 size = prs[i].size;
		u32 size_cells;

		if (size == MLXSW_SP_SB_INFI) {
			err = mlxsw_sp_sb_pr_write(mlxsw_sp, i, prs[i].mode,
						   0, true);
		} else {
			size_cells = mlxsw_sp_bytes_cells(mlxsw_sp, size);
			err = mlxsw_sp_sb_pr_write(mlxsw_sp, i, prs[i].mode,
						   size_cells, false);
		}
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		if (err)
			return err;
	}
	return 0;
}

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#define MLXSW_SP_SB_CM(_min_buff, _max_buff, _pool)	\
	{						\
		.min_buff = _min_buff,			\
		.max_buff = _max_buff,			\
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		.pool_index = _pool,			\
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	}

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static const struct mlxsw_sp_sb_cm mlxsw_sp1_sb_cms_ingress[] = {
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	MLXSW_SP_SB_CM(10000, 8, 0),
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	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
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	MLXSW_SP_SB_CM(0, 0, 0), /* dummy, this PG does not exist */
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	MLXSW_SP_SB_CM(20000, 1, 3),
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};

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static const struct mlxsw_sp_sb_cm mlxsw_sp2_sb_cms_ingress[] = {
	MLXSW_SP_SB_CM(0, 7, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, 0, 0), /* dummy, this PG does not exist */
	MLXSW_SP_SB_CM(20000, 1, 3),
};

static const struct mlxsw_sp_sb_cm mlxsw_sp1_sb_cms_egress[] = {
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	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
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	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),
	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),
	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),
	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),
	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),
	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),
	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),
	MLXSW_SP_SB_CM(0, MLXSW_SP_SB_INFI, 8),
502
	MLXSW_SP_SB_CM(1, 0xff, 4),
503 504
};

505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524
static const struct mlxsw_sp_sb_cm mlxsw_sp2_sb_cms_egress[] = {
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(0, 7, 4),
	MLXSW_SP_SB_CM(1, 0xff, 4),
};

525
#define MLXSW_SP_CPU_PORT_SB_CM MLXSW_SP_SB_CM(0, 0, 4)
526 527

static const struct mlxsw_sp_sb_cm mlxsw_sp_cpu_port_sb_cms[] = {
528
	MLXSW_SP_CPU_PORT_SB_CM,
529 530 531 532 533
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
534
	MLXSW_SP_CPU_PORT_SB_CM,
535
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
560 561
};

562 563 564 565 566 567 568 569
static bool
mlxsw_sp_sb_pool_is_static(struct mlxsw_sp *mlxsw_sp, u16 pool_index)
{
	struct mlxsw_sp_sb_pr *pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);

	return pr->mode == MLXSW_REG_SBPR_MODE_STATIC;
}

570 571 572 573
static int __mlxsw_sp_sb_cms_init(struct mlxsw_sp *mlxsw_sp, u8 local_port,
				  enum mlxsw_reg_sbxx_dir dir,
				  const struct mlxsw_sp_sb_cm *cms,
				  size_t cms_len)
574
{
575
	const struct mlxsw_sp_sb_vals *sb_vals = mlxsw_sp->sb_vals;
576 577 578 579 580
	int i;
	int err;

	for (i = 0; i < cms_len; i++) {
		const struct mlxsw_sp_sb_cm *cm;
581
		u32 min_buff;
582
		u32 max_buff;
583

584 585
		if (i == 8 && dir == MLXSW_REG_SBXX_DIR_INGRESS)
			continue; /* PG number 8 does not exist, skip it */
586
		cm = &cms[i];
587
		if (WARN_ON(sb_vals->pool_dess[cm->pool_index].dir != dir))
588 589
			continue;

590
		min_buff = mlxsw_sp_bytes_cells(mlxsw_sp, cm->min_buff);
591 592
		max_buff = cm->max_buff;
		if (max_buff == MLXSW_SP_SB_INFI) {
593 594 595
			err = mlxsw_sp_sb_cm_write(mlxsw_sp, local_port, i,
						   min_buff, 0,
						   true, cm->pool_index);
596 597 598 599 600
		} else {
			if (mlxsw_sp_sb_pool_is_static(mlxsw_sp,
						       cm->pool_index))
				max_buff = mlxsw_sp_bytes_cells(mlxsw_sp,
								max_buff);
601
			err = mlxsw_sp_sb_cm_write(mlxsw_sp, local_port, i,
602
						   min_buff, max_buff,
603
						   false, cm->pool_index);
604
		}
605 606 607 608 609 610 611 612
		if (err)
			return err;
	}
	return 0;
}

static int mlxsw_sp_port_sb_cms_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
613
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
614 615
	int err;

616
	err = __mlxsw_sp_sb_cms_init(mlxsw_sp,
617 618
				     mlxsw_sp_port->local_port,
				     MLXSW_REG_SBXX_DIR_INGRESS,
619 620
				     mlxsw_sp->sb_vals->cms_ingress,
				     mlxsw_sp->sb_vals->cms_ingress_count);
621 622 623 624 625
	if (err)
		return err;
	return __mlxsw_sp_sb_cms_init(mlxsw_sp_port->mlxsw_sp,
				      mlxsw_sp_port->local_port,
				      MLXSW_REG_SBXX_DIR_EGRESS,
626 627
				      mlxsw_sp->sb_vals->cms_egress,
				      mlxsw_sp->sb_vals->cms_egress_count);
628 629 630 631
}

static int mlxsw_sp_cpu_port_sb_cms_init(struct mlxsw_sp *mlxsw_sp)
{
632
	return __mlxsw_sp_sb_cms_init(mlxsw_sp, 0, MLXSW_REG_SBXX_DIR_EGRESS,
633 634
				      mlxsw_sp->sb_vals->cms_cpu,
				      mlxsw_sp->sb_vals->cms_cpu_count);
635 636
}

637 638 639 640
#define MLXSW_SP_SB_PM(_min_buff, _max_buff)	\
	{					\
		.min_buff = _min_buff,		\
		.max_buff = _max_buff,		\
641 642
	}

643
static const struct mlxsw_sp_sb_pm mlxsw_sp1_sb_pms[] = {
644
	/* Ingress pools. */
645 646 647 648
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX),
649
	/* Egress pools. */
650
	MLXSW_SP_SB_PM(0, 7),
651 652 653
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
654
	MLXSW_SP_SB_PM(10000, 90000),
655 656
};

657 658 659 660 661 662 663 664 665 666 667 668 669
static const struct mlxsw_sp_sb_pm mlxsw_sp2_sb_pms[] = {
	/* Ingress pools. */
	MLXSW_SP_SB_PM(0, 7),
	MLXSW_SP_SB_PM(0, 0),
	MLXSW_SP_SB_PM(0, 0),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX),
	/* Egress pools. */
	MLXSW_SP_SB_PM(0, 7),
	MLXSW_SP_SB_PM(0, 0),
	MLXSW_SP_SB_PM(0, 0),
	MLXSW_SP_SB_PM(0, 0),
};

670
static int mlxsw_sp_port_sb_pms_init(struct mlxsw_sp_port *mlxsw_sp_port)
671
{
672
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
673 674 675
	int i;
	int err;

676 677
	for (i = 0; i < mlxsw_sp->sb_vals->pool_count; i++) {
		const struct mlxsw_sp_sb_pm *pm = &mlxsw_sp->sb_vals->pms[i];
678
		u32 max_buff;
679
		u32 min_buff;
680

681
		min_buff = mlxsw_sp_bytes_cells(mlxsw_sp, pm->min_buff);
682 683 684
		max_buff = pm->max_buff;
		if (mlxsw_sp_sb_pool_is_static(mlxsw_sp, i))
			max_buff = mlxsw_sp_bytes_cells(mlxsw_sp, max_buff);
685
		err = mlxsw_sp_sb_pm_write(mlxsw_sp, mlxsw_sp_port->local_port,
686
					   i, min_buff, max_buff);
687 688 689 690 691 692
		if (err)
			return err;
	}
	return 0;
}

693 694 695 696
#define MLXSW_SP_SB_MM(_min_buff, _max_buff, _pool)	\
	{						\
		.min_buff = _min_buff,			\
		.max_buff = _max_buff,			\
697
		.pool_index = _pool,			\
698 699 700
	}

static const struct mlxsw_sp_sb_mm mlxsw_sp_sb_mms[] = {
701 702 703 704 705 706 707 708 709 710 711 712 713 714 715
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
	MLXSW_SP_SB_MM(0, 6, 4),
716 717 718 719 720 721 722 723
};

static int mlxsw_sp_sb_mms_init(struct mlxsw_sp *mlxsw_sp)
{
	char sbmm_pl[MLXSW_REG_SBMM_LEN];
	int i;
	int err;

724
	for (i = 0; i < mlxsw_sp->sb_vals->mms_count; i++) {
725
		const struct mlxsw_sp_sb_pool_des *des;
726
		const struct mlxsw_sp_sb_mm *mc;
727
		u32 min_buff;
728

729
		mc = &mlxsw_sp->sb_vals->mms[i];
730
		des = &mlxsw_sp->sb_vals->pool_dess[mc->pool_index];
731 732
		/* All pools used by sb_mm's are initialized using dynamic
		 * thresholds, therefore 'max_buff' isn't specified in cells.
733 734 735
		 */
		min_buff = mlxsw_sp_bytes_cells(mlxsw_sp, mc->min_buff);
		mlxsw_reg_sbmm_pack(sbmm_pl, i, min_buff, mc->max_buff,
736
				    des->pool);
737 738 739 740 741 742 743
		err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbmm), sbmm_pl);
		if (err)
			return err;
	}
	return 0;
}

744 745
static void mlxsw_sp_pool_count(struct mlxsw_sp *mlxsw_sp,
				u16 *p_ingress_len, u16 *p_egress_len)
746 747 748
{
	int i;

749 750 751
	for (i = 0; i < mlxsw_sp->sb_vals->pool_count; ++i)
		if (mlxsw_sp->sb_vals->pool_dess[i].dir ==
		    MLXSW_REG_SBXX_DIR_EGRESS)
752 753 754 755 756
			goto out;
	WARN(1, "No egress pools\n");

out:
	*p_ingress_len = i;
757
	*p_egress_len = mlxsw_sp->sb_vals->pool_count - i;
758 759
}

760
const struct mlxsw_sp_sb_vals mlxsw_sp1_sb_vals = {
761 762 763 764
	.pool_count = ARRAY_SIZE(mlxsw_sp1_sb_pool_dess),
	.pool_dess = mlxsw_sp1_sb_pool_dess,
	.pms = mlxsw_sp1_sb_pms,
	.prs = mlxsw_sp1_sb_prs,
765
	.mms = mlxsw_sp_sb_mms,
766 767
	.cms_ingress = mlxsw_sp1_sb_cms_ingress,
	.cms_egress = mlxsw_sp1_sb_cms_egress,
768
	.cms_cpu = mlxsw_sp_cpu_port_sb_cms,
769
	.mms_count = ARRAY_SIZE(mlxsw_sp_sb_mms),
770 771
	.cms_ingress_count = ARRAY_SIZE(mlxsw_sp1_sb_cms_ingress),
	.cms_egress_count = ARRAY_SIZE(mlxsw_sp1_sb_cms_egress),
772
	.cms_cpu_count = ARRAY_SIZE(mlxsw_sp_cpu_port_sb_cms),
773 774 775
};

const struct mlxsw_sp_sb_vals mlxsw_sp2_sb_vals = {
776 777 778 779
	.pool_count = ARRAY_SIZE(mlxsw_sp2_sb_pool_dess),
	.pool_dess = mlxsw_sp2_sb_pool_dess,
	.pms = mlxsw_sp2_sb_pms,
	.prs = mlxsw_sp2_sb_prs,
780
	.mms = mlxsw_sp_sb_mms,
781 782
	.cms_ingress = mlxsw_sp2_sb_cms_ingress,
	.cms_egress = mlxsw_sp2_sb_cms_egress,
783
	.cms_cpu = mlxsw_sp_cpu_port_sb_cms,
784
	.mms_count = ARRAY_SIZE(mlxsw_sp_sb_mms),
785 786
	.cms_ingress_count = ARRAY_SIZE(mlxsw_sp2_sb_cms_ingress),
	.cms_egress_count = ARRAY_SIZE(mlxsw_sp2_sb_cms_egress),
787
	.cms_cpu_count = ARRAY_SIZE(mlxsw_sp_cpu_port_sb_cms),
788 789
};

790 791
int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp)
{
792 793
	u16 ing_pool_count;
	u16 eg_pool_count;
794 795
	int err;

796 797 798
	if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, CELL_SIZE))
		return -EIO;

799 800 801
	if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_BUFFER_SIZE))
		return -EIO;

802 803 804 805
	mlxsw_sp->sb = kzalloc(sizeof(*mlxsw_sp->sb), GFP_KERNEL);
	if (!mlxsw_sp->sb)
		return -ENOMEM;
	mlxsw_sp->sb->cell_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, CELL_SIZE);
806 807
	mlxsw_sp->sb->sb_size = MLXSW_CORE_RES_GET(mlxsw_sp->core,
						   MAX_BUFFER_SIZE);
808
	err = mlxsw_sp_sb_ports_init(mlxsw_sp);
809
	if (err)
810
		goto err_sb_ports_init;
811 812
	err = mlxsw_sp_sb_prs_init(mlxsw_sp, mlxsw_sp->sb_vals->prs,
				   mlxsw_sp->sb_vals->pool_count);
813 814
	if (err)
		goto err_sb_prs_init;
815 816
	err = mlxsw_sp_cpu_port_sb_cms_init(mlxsw_sp);
	if (err)
817
		goto err_sb_cpu_port_sb_cms_init;
818
	err = mlxsw_sp_sb_mms_init(mlxsw_sp);
819
	if (err)
820
		goto err_sb_mms_init;
821
	mlxsw_sp_pool_count(mlxsw_sp, &ing_pool_count, &eg_pool_count);
822 823
	err = devlink_sb_register(priv_to_devlink(mlxsw_sp->core), 0,
				  mlxsw_sp->sb->sb_size,
824 825
				  ing_pool_count,
				  eg_pool_count,
826 827
				  MLXSW_SP_SB_ING_TC_COUNT,
				  MLXSW_SP_SB_EG_TC_COUNT);
828 829 830 831 832 833 834 835 836 837
	if (err)
		goto err_devlink_sb_register;

	return 0;

err_devlink_sb_register:
err_sb_mms_init:
err_sb_cpu_port_sb_cms_init:
err_sb_prs_init:
	mlxsw_sp_sb_ports_fini(mlxsw_sp);
838 839
err_sb_ports_init:
	kfree(mlxsw_sp->sb);
840
	return err;
841
}
842

843 844 845
void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp)
{
	devlink_sb_unregister(priv_to_devlink(mlxsw_sp->core), 0);
846
	mlxsw_sp_sb_ports_fini(mlxsw_sp);
847
	kfree(mlxsw_sp->sb);
848 849 850 851 852 853
}

int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
	int err;

854
	err = mlxsw_sp_port_headroom_init(mlxsw_sp_port);
855 856 857 858 859 860 861 862 863
	if (err)
		return err;
	err = mlxsw_sp_port_sb_cms_init(mlxsw_sp_port);
	if (err)
		return err;
	err = mlxsw_sp_port_sb_pms_init(mlxsw_sp_port);

	return err;
}
864 865 866 867 868 869

int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
			 unsigned int sb_index, u16 pool_index,
			 struct devlink_sb_pool_info *pool_info)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
870
	enum mlxsw_reg_sbxx_dir dir;
871
	struct mlxsw_sp_sb_pr *pr;
872

873
	dir = mlxsw_sp->sb_vals->pool_dess[pool_index].dir;
874
	pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);
875
	pool_info->pool_type = (enum devlink_sb_pool_type) dir;
876
	pool_info->size = mlxsw_sp_cells_bytes(mlxsw_sp, pr->size);
877
	pool_info->threshold_type = (enum devlink_sb_threshold_type) pr->mode;
878
	pool_info->cell_size = mlxsw_sp->sb->cell_size;
879 880 881 882 883 884 885 886
	return 0;
}

int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
			 unsigned int sb_index, u16 pool_index, u32 size,
			 enum devlink_sb_threshold_type threshold_type)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
887
	u32 pool_size = mlxsw_sp_bytes_cells(mlxsw_sp, size);
888
	enum mlxsw_reg_sbpr_mode mode;
889

890 891 892
	if (size > MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE))
		return -EINVAL;

893
	mode = (enum mlxsw_reg_sbpr_mode) threshold_type;
894 895
	return mlxsw_sp_sb_pr_write(mlxsw_sp, pool_index, mode,
				    pool_size, false);
896 897 898 899
}

#define MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET (-2) /* 3->1, 16->14 */

900 901
static u32 mlxsw_sp_sb_threshold_out(struct mlxsw_sp *mlxsw_sp, u16 pool_index,
				     u32 max_buff)
902
{
903
	struct mlxsw_sp_sb_pr *pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);
904 905 906

	if (pr->mode == MLXSW_REG_SBPR_MODE_DYNAMIC)
		return max_buff - MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET;
907
	return mlxsw_sp_cells_bytes(mlxsw_sp, max_buff);
908 909
}

910 911
static int mlxsw_sp_sb_threshold_in(struct mlxsw_sp *mlxsw_sp, u16 pool_index,
				    u32 threshold, u32 *p_max_buff)
912
{
913
	struct mlxsw_sp_sb_pr *pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);
914 915 916 917 918 919 920 921 922 923

	if (pr->mode == MLXSW_REG_SBPR_MODE_DYNAMIC) {
		int val;

		val = threshold + MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET;
		if (val < MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN ||
		    val > MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX)
			return -EINVAL;
		*p_max_buff = val;
	} else {
924
		*p_max_buff = mlxsw_sp_bytes_cells(mlxsw_sp, threshold);
925 926 927 928 929 930 931 932 933 934 935 936 937
	}
	return 0;
}

int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
			      unsigned int sb_index, u16 pool_index,
			      u32 *p_threshold)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	struct mlxsw_sp_sb_pm *pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port,
938
						       pool_index);
939

940
	*p_threshold = mlxsw_sp_sb_threshold_out(mlxsw_sp, pool_index,
941 942 943 944 945 946 947 948 949 950 951 952 953 954 955
						 pm->max_buff);
	return 0;
}

int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
			      unsigned int sb_index, u16 pool_index,
			      u32 threshold)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	u32 max_buff;
	int err;

956
	err = mlxsw_sp_sb_threshold_in(mlxsw_sp, pool_index,
957 958 959 960
				       threshold, &max_buff);
	if (err)
		return err;

961
	return mlxsw_sp_sb_pm_write(mlxsw_sp, local_port, pool_index,
962 963 964 965 966 967 968 969 970 971 972 973 974
				    0, max_buff);
}

int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
				 unsigned int sb_index, u16 tc_index,
				 enum devlink_sb_pool_type pool_type,
				 u16 *p_pool_index, u32 *p_threshold)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	u8 pg_buff = tc_index;
975
	enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
976 977 978
	struct mlxsw_sp_sb_cm *cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port,
						       pg_buff, dir);

979
	*p_threshold = mlxsw_sp_sb_threshold_out(mlxsw_sp, cm->pool_index,
980
						 cm->max_buff);
981
	*p_pool_index = cm->pool_index;
982 983 984 985 986 987 988 989 990 991 992 993 994
	return 0;
}

int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
				 unsigned int sb_index, u16 tc_index,
				 enum devlink_sb_pool_type pool_type,
				 u16 pool_index, u32 threshold)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	u8 pg_buff = tc_index;
995
	enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
996 997 998
	u32 max_buff;
	int err;

999
	if (dir != mlxsw_sp->sb_vals->pool_dess[pool_index].dir)
1000 1001
		return -EINVAL;

1002
	err = mlxsw_sp_sb_threshold_in(mlxsw_sp, pool_index,
1003 1004 1005 1006
				       threshold, &max_buff);
	if (err)
		return err;

1007
	return mlxsw_sp_sb_cm_write(mlxsw_sp, local_port, pg_buff,
1008
				    0, max_buff, false, pool_index);
1009
}
1010 1011

#define MASKED_COUNT_MAX \
1012 1013
	(MLXSW_REG_SBSR_REC_MAX_COUNT / \
	 (MLXSW_SP_SB_ING_TC_COUNT + MLXSW_SP_SB_EG_TC_COUNT))
1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035

struct mlxsw_sp_sb_sr_occ_query_cb_ctx {
	u8 masked_count;
	u8 local_port_1;
};

static void mlxsw_sp_sb_sr_occ_query_cb(struct mlxsw_core *mlxsw_core,
					char *sbsr_pl, size_t sbsr_pl_len,
					unsigned long cb_priv)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	struct mlxsw_sp_sb_sr_occ_query_cb_ctx cb_ctx;
	u8 masked_count;
	u8 local_port;
	int rec_index = 0;
	struct mlxsw_sp_sb_cm *cm;
	int i;

	memcpy(&cb_ctx, &cb_priv, sizeof(cb_ctx));

	masked_count = 0;
	for (local_port = cb_ctx.local_port_1;
1036
	     local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
1037 1038
		if (!mlxsw_sp->ports[local_port])
			continue;
1039
		for (i = 0; i < MLXSW_SP_SB_ING_TC_COUNT; i++) {
1040 1041 1042 1043 1044 1045 1046 1047 1048 1049
			cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, i,
						MLXSW_REG_SBXX_DIR_INGRESS);
			mlxsw_reg_sbsr_rec_unpack(sbsr_pl, rec_index++,
						  &cm->occ.cur, &cm->occ.max);
		}
		if (++masked_count == cb_ctx.masked_count)
			break;
	}
	masked_count = 0;
	for (local_port = cb_ctx.local_port_1;
1050
	     local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
1051 1052
		if (!mlxsw_sp->ports[local_port])
			continue;
1053
		for (i = 0; i < MLXSW_SP_SB_EG_TC_COUNT; i++) {
1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087
			cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, i,
						MLXSW_REG_SBXX_DIR_EGRESS);
			mlxsw_reg_sbsr_rec_unpack(sbsr_pl, rec_index++,
						  &cm->occ.cur, &cm->occ.max);
		}
		if (++masked_count == cb_ctx.masked_count)
			break;
	}
}

int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
			     unsigned int sb_index)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	struct mlxsw_sp_sb_sr_occ_query_cb_ctx cb_ctx;
	unsigned long cb_priv;
	LIST_HEAD(bulk_list);
	char *sbsr_pl;
	u8 masked_count;
	u8 local_port_1;
	u8 local_port = 0;
	int i;
	int err;
	int err2;

	sbsr_pl = kmalloc(MLXSW_REG_SBSR_LEN, GFP_KERNEL);
	if (!sbsr_pl)
		return -ENOMEM;

next_batch:
	local_port++;
	local_port_1 = local_port;
	masked_count = 0;
	mlxsw_reg_sbsr_pack(sbsr_pl, false);
1088
	for (i = 0; i < MLXSW_SP_SB_ING_TC_COUNT; i++)
1089
		mlxsw_reg_sbsr_pg_buff_mask_set(sbsr_pl, i, 1);
1090
	for (i = 0; i < MLXSW_SP_SB_EG_TC_COUNT; i++)
1091
		mlxsw_reg_sbsr_tclass_mask_set(sbsr_pl, i, 1);
1092
	for (; local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
1093 1094 1095 1096
		if (!mlxsw_sp->ports[local_port])
			continue;
		mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl, local_port, 1);
		mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1);
1097
		for (i = 0; i < mlxsw_sp->sb_vals->pool_count; i++) {
1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115
			err = mlxsw_sp_sb_pm_occ_query(mlxsw_sp, local_port, i,
						       &bulk_list);
			if (err)
				goto out;
		}
		if (++masked_count == MASKED_COUNT_MAX)
			goto do_query;
	}

do_query:
	cb_ctx.masked_count = masked_count;
	cb_ctx.local_port_1 = local_port_1;
	memcpy(&cb_priv, &cb_ctx, sizeof(cb_ctx));
	err = mlxsw_reg_trans_query(mlxsw_core, MLXSW_REG(sbsr), sbsr_pl,
				    &bulk_list, mlxsw_sp_sb_sr_occ_query_cb,
				    cb_priv);
	if (err)
		goto out;
1116
	if (local_port < mlxsw_core_max_ports(mlxsw_core))
1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146
		goto next_batch;

out:
	err2 = mlxsw_reg_trans_bulk_wait(&bulk_list);
	if (!err)
		err = err2;
	kfree(sbsr_pl);
	return err;
}

int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
			      unsigned int sb_index)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	LIST_HEAD(bulk_list);
	char *sbsr_pl;
	unsigned int masked_count;
	u8 local_port = 0;
	int i;
	int err;
	int err2;

	sbsr_pl = kmalloc(MLXSW_REG_SBSR_LEN, GFP_KERNEL);
	if (!sbsr_pl)
		return -ENOMEM;

next_batch:
	local_port++;
	masked_count = 0;
	mlxsw_reg_sbsr_pack(sbsr_pl, true);
1147
	for (i = 0; i < MLXSW_SP_SB_ING_TC_COUNT; i++)
1148
		mlxsw_reg_sbsr_pg_buff_mask_set(sbsr_pl, i, 1);
1149
	for (i = 0; i < MLXSW_SP_SB_EG_TC_COUNT; i++)
1150
		mlxsw_reg_sbsr_tclass_mask_set(sbsr_pl, i, 1);
1151
	for (; local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
1152 1153 1154 1155
		if (!mlxsw_sp->ports[local_port])
			continue;
		mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl, local_port, 1);
		mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1);
1156
		for (i = 0; i < mlxsw_sp->sb_vals->pool_count; i++) {
1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170
			err = mlxsw_sp_sb_pm_occ_clear(mlxsw_sp, local_port, i,
						       &bulk_list);
			if (err)
				goto out;
		}
		if (++masked_count == MASKED_COUNT_MAX)
			goto do_query;
	}

do_query:
	err = mlxsw_reg_trans_query(mlxsw_core, MLXSW_REG(sbsr), sbsr_pl,
				    &bulk_list, NULL, 0);
	if (err)
		goto out;
1171
	if (local_port < mlxsw_core_max_ports(mlxsw_core))
1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190
		goto next_batch;

out:
	err2 = mlxsw_reg_trans_bulk_wait(&bulk_list);
	if (!err)
		err = err2;
	kfree(sbsr_pl);
	return err;
}

int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
				  unsigned int sb_index, u16 pool_index,
				  u32 *p_cur, u32 *p_max)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	struct mlxsw_sp_sb_pm *pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port,
1191
						       pool_index);
1192

1193 1194
	*p_cur = mlxsw_sp_cells_bytes(mlxsw_sp, pm->occ.cur);
	*p_max = mlxsw_sp_cells_bytes(mlxsw_sp, pm->occ.max);
1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207
	return 0;
}

int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
				     unsigned int sb_index, u16 tc_index,
				     enum devlink_sb_pool_type pool_type,
				     u32 *p_cur, u32 *p_max)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	u8 pg_buff = tc_index;
1208
	enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
1209 1210 1211
	struct mlxsw_sp_sb_cm *cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port,
						       pg_buff, dir);

1212 1213
	*p_cur = mlxsw_sp_cells_bytes(mlxsw_sp, cm->occ.cur);
	*p_max = mlxsw_sp_cells_bytes(mlxsw_sp, cm->occ.max);
1214 1215
	return 0;
}