spectrum_buffers.c 27.0 KB
Newer Older
1 2
// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3 4 5

#include <linux/kernel.h>
#include <linux/types.h>
6
#include <linux/dcbnl.h>
7
#include <linux/if_ether.h>
8
#include <linux/list.h>
9 10 11 12 13 14

#include "spectrum.h"
#include "core.h"
#include "port.h"
#include "reg.h"

15 16 17 18 19 20 21 22 23 24 25 26 27
struct mlxsw_sp_sb_pr {
	enum mlxsw_reg_sbpr_mode mode;
	u32 size;
};

struct mlxsw_cp_sb_occ {
	u32 cur;
	u32 max;
};

struct mlxsw_sp_sb_cm {
	u32 min_buff;
	u32 max_buff;
28
	u16 pool_index;
29 30 31 32 33 34 35 36 37
	struct mlxsw_cp_sb_occ occ;
};

struct mlxsw_sp_sb_pm {
	u32 min_buff;
	u32 max_buff;
	struct mlxsw_cp_sb_occ occ;
};

38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57
struct mlxsw_sp_sb_pool_des {
	enum mlxsw_reg_sbxx_dir dir;
	u8 pool;
};

/* Order ingress pools before egress pools. */
static const struct mlxsw_sp_sb_pool_des mlxsw_sp_sb_pool_dess[] = {
	{MLXSW_REG_SBXX_DIR_INGRESS, 0},
	{MLXSW_REG_SBXX_DIR_INGRESS, 1},
	{MLXSW_REG_SBXX_DIR_INGRESS, 2},
	{MLXSW_REG_SBXX_DIR_INGRESS, 3},
	{MLXSW_REG_SBXX_DIR_EGRESS, 0},
	{MLXSW_REG_SBXX_DIR_EGRESS, 1},
	{MLXSW_REG_SBXX_DIR_EGRESS, 2},
	{MLXSW_REG_SBXX_DIR_EGRESS, 3},
	{MLXSW_REG_SBXX_DIR_EGRESS, 15},
};

#define MLXSW_SP_SB_POOL_DESS_LEN ARRAY_SIZE(mlxsw_sp_sb_pool_dess)

58 59 60 61
#define MLXSW_SP_SB_TC_COUNT	8

struct mlxsw_sp_sb_port {
	struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
62
	struct mlxsw_sp_sb_pm pms[MLXSW_SP_SB_POOL_DESS_LEN];
63 64 65
};

struct mlxsw_sp_sb {
66
	struct mlxsw_sp_sb_pr prs[MLXSW_SP_SB_POOL_DESS_LEN];
67 68 69 70 71 72 73 74 75 76 77 78 79 80
	struct mlxsw_sp_sb_port *ports;
	u32 cell_size;
};

u32 mlxsw_sp_cells_bytes(const struct mlxsw_sp *mlxsw_sp, u32 cells)
{
	return mlxsw_sp->sb->cell_size * cells;
}

u32 mlxsw_sp_bytes_cells(const struct mlxsw_sp *mlxsw_sp, u32 bytes)
{
	return DIV_ROUND_UP(bytes, mlxsw_sp->sb->cell_size);
}

81
static struct mlxsw_sp_sb_pr *mlxsw_sp_sb_pr_get(struct mlxsw_sp *mlxsw_sp,
82
						 u16 pool_index)
83
{
84
	return &mlxsw_sp->sb->prs[pool_index];
85 86 87 88 89 90
}

static struct mlxsw_sp_sb_cm *mlxsw_sp_sb_cm_get(struct mlxsw_sp *mlxsw_sp,
						 u8 local_port, u8 pg_buff,
						 enum mlxsw_reg_sbxx_dir dir)
{
91
	return &mlxsw_sp->sb->ports[local_port].cms[dir][pg_buff];
92 93 94
}

static struct mlxsw_sp_sb_pm *mlxsw_sp_sb_pm_get(struct mlxsw_sp *mlxsw_sp,
95
						 u8 local_port, u16 pool_index)
96
{
97
	return &mlxsw_sp->sb->ports[local_port].pms[pool_index];
98 99
}

100
static int mlxsw_sp_sb_pr_write(struct mlxsw_sp *mlxsw_sp, u16 pool_index,
101 102
				enum mlxsw_reg_sbpr_mode mode, u32 size)
{
103 104
	const struct mlxsw_sp_sb_pool_des *des =
		&mlxsw_sp_sb_pool_dess[pool_index];
105
	char sbpr_pl[MLXSW_REG_SBPR_LEN];
106 107
	struct mlxsw_sp_sb_pr *pr;
	int err;
108

109
	mlxsw_reg_sbpr_pack(sbpr_pl, des->pool, des->dir, mode, size);
110 111 112 113
	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpr), sbpr_pl);
	if (err)
		return err;

114
	pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);
115 116 117
	pr->mode = mode;
	pr->size = size;
	return 0;
118 119 120
}

static int mlxsw_sp_sb_cm_write(struct mlxsw_sp *mlxsw_sp, u8 local_port,
121 122
				u8 pg_buff, u32 min_buff, u32 max_buff,
				u16 pool_index)
123
{
124 125
	const struct mlxsw_sp_sb_pool_des *des =
		&mlxsw_sp_sb_pool_dess[pool_index];
126
	char sbcm_pl[MLXSW_REG_SBCM_LEN];
127
	int err;
128

129 130
	mlxsw_reg_sbcm_pack(sbcm_pl, local_port, pg_buff, des->dir,
			    min_buff, max_buff, des->pool);
131 132 133 134 135 136
	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbcm), sbcm_pl);
	if (err)
		return err;
	if (pg_buff < MLXSW_SP_SB_TC_COUNT) {
		struct mlxsw_sp_sb_cm *cm;

137 138
		cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, pg_buff,
					des->dir);
139 140
		cm->min_buff = min_buff;
		cm->max_buff = max_buff;
141
		cm->pool_index = pool_index;
142 143
	}
	return 0;
144 145 146
}

static int mlxsw_sp_sb_pm_write(struct mlxsw_sp *mlxsw_sp, u8 local_port,
147
				u16 pool_index, u32 min_buff, u32 max_buff)
148
{
149 150
	const struct mlxsw_sp_sb_pool_des *des =
		&mlxsw_sp_sb_pool_dess[pool_index];
151
	char sbpm_pl[MLXSW_REG_SBPM_LEN];
152 153
	struct mlxsw_sp_sb_pm *pm;
	int err;
154

155
	mlxsw_reg_sbpm_pack(sbpm_pl, local_port, des->pool, des->dir, false,
156
			    min_buff, max_buff);
157 158 159 160
	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl);
	if (err)
		return err;

161
	pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port, pool_index);
162 163 164
	pm->min_buff = min_buff;
	pm->max_buff = max_buff;
	return 0;
165 166
}

167
static int mlxsw_sp_sb_pm_occ_clear(struct mlxsw_sp *mlxsw_sp, u8 local_port,
168
				    u16 pool_index, struct list_head *bulk_list)
169
{
170 171
	const struct mlxsw_sp_sb_pool_des *des =
		&mlxsw_sp_sb_pool_dess[pool_index];
172 173
	char sbpm_pl[MLXSW_REG_SBPM_LEN];

174 175
	mlxsw_reg_sbpm_pack(sbpm_pl, local_port, des->pool, des->dir,
			    true, 0, 0);
176 177 178 179 180 181 182 183 184 185 186 187 188 189
	return mlxsw_reg_trans_query(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl,
				     bulk_list, NULL, 0);
}

static void mlxsw_sp_sb_pm_occ_query_cb(struct mlxsw_core *mlxsw_core,
					char *sbpm_pl, size_t sbpm_pl_len,
					unsigned long cb_priv)
{
	struct mlxsw_sp_sb_pm *pm = (struct mlxsw_sp_sb_pm *) cb_priv;

	mlxsw_reg_sbpm_unpack(sbpm_pl, &pm->occ.cur, &pm->occ.max);
}

static int mlxsw_sp_sb_pm_occ_query(struct mlxsw_sp *mlxsw_sp, u8 local_port,
190
				    u16 pool_index, struct list_head *bulk_list)
191
{
192 193
	const struct mlxsw_sp_sb_pool_des *des =
		&mlxsw_sp_sb_pool_dess[pool_index];
194 195 196
	char sbpm_pl[MLXSW_REG_SBPM_LEN];
	struct mlxsw_sp_sb_pm *pm;

197 198 199
	pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port, pool_index);
	mlxsw_reg_sbpm_pack(sbpm_pl, local_port, des->pool, des->dir,
			    false, 0, 0);
200 201 202 203 204 205
	return mlxsw_reg_trans_query(mlxsw_sp->core, MLXSW_REG(sbpm), sbpm_pl,
				     bulk_list,
				     mlxsw_sp_sb_pm_occ_query_cb,
				     (unsigned long) pm);
}

206
static const u16 mlxsw_sp_pbs[] = {
207 208
	[0] = 2 * ETH_FRAME_LEN,
	[9] = 2 * MLXSW_PORT_MAX_MTU,
209 210 211
};

#define MLXSW_SP_PBS_LEN ARRAY_SIZE(mlxsw_sp_pbs)
212
#define MLXSW_SP_PB_UNUSED 8
213 214 215

static int mlxsw_sp_port_pb_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
216
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
217 218 219 220 221 222
	char pbmc_pl[MLXSW_REG_PBMC_LEN];
	int i;

	mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port,
			    0xffff, 0xffff / 2);
	for (i = 0; i < MLXSW_SP_PBS_LEN; i++) {
223 224
		u16 size = mlxsw_sp_bytes_cells(mlxsw_sp, mlxsw_sp_pbs[i]);

225
		if (i == MLXSW_SP_PB_UNUSED)
226
			continue;
227
		mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, i, size);
228
	}
229 230
	mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl,
					 MLXSW_REG_PBMC_PORT_SHARED_BUF_IDX, 0);
231
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
232 233
}

234 235 236 237 238 239 240
static int mlxsw_sp_port_pb_prio_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
	char pptb_pl[MLXSW_REG_PPTB_LEN];
	int i;

	mlxsw_reg_pptb_pack(pptb_pl, mlxsw_sp_port->local_port);
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
241
		mlxsw_reg_pptb_prio_to_buff_pack(pptb_pl, i, 0);
242 243 244 245 246 247 248 249 250 251 252 253 254 255
	return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb),
			       pptb_pl);
}

static int mlxsw_sp_port_headroom_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
	int err;

	err = mlxsw_sp_port_pb_init(mlxsw_sp_port);
	if (err)
		return err;
	return mlxsw_sp_port_pb_prio_init(mlxsw_sp_port);
}

256 257 258 259
static int mlxsw_sp_sb_ports_init(struct mlxsw_sp *mlxsw_sp)
{
	unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);

260 261 262 263
	mlxsw_sp->sb->ports = kcalloc(max_ports,
				      sizeof(struct mlxsw_sp_sb_port),
				      GFP_KERNEL);
	if (!mlxsw_sp->sb->ports)
264 265 266 267 268 269
		return -ENOMEM;
	return 0;
}

static void mlxsw_sp_sb_ports_fini(struct mlxsw_sp *mlxsw_sp)
{
270
	kfree(mlxsw_sp->sb->ports);
271 272 273
}

#define MLXSW_SP_SB_PR_INGRESS_SIZE	12440000
274
#define MLXSW_SP_SB_PR_INGRESS_MNG_SIZE (200 * 1000)
275
#define MLXSW_SP_SB_PR_EGRESS_SIZE	13232000
276

277
#define MLXSW_SP_SB_PR(_mode, _size)	\
278 279 280
	{				\
		.mode = _mode,		\
		.size = _size,		\
281 282
	}

283 284
static const struct mlxsw_sp_sb_pr mlxsw_sp_sb_prs[] = {
	/* Ingress pools. */
285
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
286
		       MLXSW_SP_SB_PR_INGRESS_SIZE),
287 288
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
289
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC,
290
		       MLXSW_SP_SB_PR_INGRESS_MNG_SIZE),
291
	/* Egress pools. */
292
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, MLXSW_SP_SB_PR_EGRESS_SIZE),
293 294
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
295
	MLXSW_SP_SB_PR(MLXSW_REG_SBPR_MODE_DYNAMIC, 0),
296 297
};

298
#define MLXSW_SP_SB_PRS_LEN ARRAY_SIZE(mlxsw_sp_sb_prs)
299

300 301 302
static int mlxsw_sp_sb_prs_init(struct mlxsw_sp *mlxsw_sp,
				const struct mlxsw_sp_sb_pr *prs,
				size_t prs_len)
303 304 305 306
{
	int i;
	int err;

307
	for (i = 0; i < prs_len; i++) {
308
		u32 size = mlxsw_sp_bytes_cells(mlxsw_sp, prs[i].size);
309

310
		err = mlxsw_sp_sb_pr_write(mlxsw_sp, i, prs[i].mode, size);
311 312 313 314 315 316
		if (err)
			return err;
	}
	return 0;
}

317 318 319 320
#define MLXSW_SP_SB_CM(_min_buff, _max_buff, _pool)	\
	{						\
		.min_buff = _min_buff,			\
		.max_buff = _max_buff,			\
321
		.pool_index = _pool,			\
322 323
	}

324
static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_ingress[] = {
325
	MLXSW_SP_SB_CM(10000, 8, 0),
326 327 328 329 330 331 332
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
	MLXSW_SP_SB_CM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN, 0),
333
	MLXSW_SP_SB_CM(0, 0, 0), /* dummy, this PG does not exist */
334
	MLXSW_SP_SB_CM(20000, 1, 3),
335 336
};

337 338 339
#define MLXSW_SP_SB_CMS_INGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_cms_ingress)

static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_egress[] = {
340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(1500, 9, 4),
	MLXSW_SP_SB_CM(0, 140000, 8),
	MLXSW_SP_SB_CM(0, 140000, 8),
	MLXSW_SP_SB_CM(0, 140000, 8),
	MLXSW_SP_SB_CM(0, 140000, 8),
	MLXSW_SP_SB_CM(0, 140000, 8),
	MLXSW_SP_SB_CM(0, 140000, 8),
	MLXSW_SP_SB_CM(0, 140000, 8),
	MLXSW_SP_SB_CM(0, 140000, 8),
	MLXSW_SP_SB_CM(1, 0xff, 4),
357 358 359 360
};

#define MLXSW_SP_SB_CMS_EGRESS_LEN ARRAY_SIZE(mlxsw_sp_sb_cms_egress)

361
#define MLXSW_SP_CPU_PORT_SB_CM MLXSW_SP_SB_CM(0, 0, 4)
362 363

static const struct mlxsw_sp_sb_cm mlxsw_sp_cpu_port_sb_cms[] = {
364
	MLXSW_SP_CPU_PORT_SB_CM,
365 366 367 368 369
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
370
	MLXSW_SP_CPU_PORT_SB_CM,
371
	MLXSW_SP_SB_CM(MLXSW_PORT_MAX_MTU, 0, 4),
372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
	MLXSW_SP_CPU_PORT_SB_CM,
396 397 398 399 400
};

#define MLXSW_SP_CPU_PORT_SB_MCS_LEN \
	ARRAY_SIZE(mlxsw_sp_cpu_port_sb_cms)

401 402 403 404
static int __mlxsw_sp_sb_cms_init(struct mlxsw_sp *mlxsw_sp, u8 local_port,
				  enum mlxsw_reg_sbxx_dir dir,
				  const struct mlxsw_sp_sb_cm *cms,
				  size_t cms_len)
405 406 407 408 409 410
{
	int i;
	int err;

	for (i = 0; i < cms_len; i++) {
		const struct mlxsw_sp_sb_cm *cm;
411
		u32 min_buff;
412

413 414
		if (i == 8 && dir == MLXSW_REG_SBXX_DIR_INGRESS)
			continue; /* PG number 8 does not exist, skip it */
415
		cm = &cms[i];
416 417 418
		if (WARN_ON(mlxsw_sp_sb_pool_dess[cm->pool_index].dir != dir))
			continue;

419 420 421 422
		/* All pools are initialized using dynamic thresholds,
		 * therefore 'max_buff' isn't specified in cells.
		 */
		min_buff = mlxsw_sp_bytes_cells(mlxsw_sp, cm->min_buff);
423 424 425
		err = mlxsw_sp_sb_cm_write(mlxsw_sp, local_port, i,
					   min_buff, cm->max_buff,
					   cm->pool_index);
426 427 428 429 430 431 432 433
		if (err)
			return err;
	}
	return 0;
}

static int mlxsw_sp_port_sb_cms_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
434 435 436 437 438 439 440 441 442 443 444 445 446 447
	int err;

	err = __mlxsw_sp_sb_cms_init(mlxsw_sp_port->mlxsw_sp,
				     mlxsw_sp_port->local_port,
				     MLXSW_REG_SBXX_DIR_INGRESS,
				     mlxsw_sp_sb_cms_ingress,
				     MLXSW_SP_SB_CMS_INGRESS_LEN);
	if (err)
		return err;
	return __mlxsw_sp_sb_cms_init(mlxsw_sp_port->mlxsw_sp,
				      mlxsw_sp_port->local_port,
				      MLXSW_REG_SBXX_DIR_EGRESS,
				      mlxsw_sp_sb_cms_egress,
				      MLXSW_SP_SB_CMS_EGRESS_LEN);
448 449 450 451
}

static int mlxsw_sp_cpu_port_sb_cms_init(struct mlxsw_sp *mlxsw_sp)
{
452 453 454
	return __mlxsw_sp_sb_cms_init(mlxsw_sp, 0, MLXSW_REG_SBXX_DIR_EGRESS,
				      mlxsw_sp_cpu_port_sb_cms,
				      MLXSW_SP_CPU_PORT_SB_MCS_LEN);
455 456
}

457 458 459 460
#define MLXSW_SP_SB_PM(_min_buff, _max_buff)	\
	{					\
		.min_buff = _min_buff,		\
		.max_buff = _max_buff,		\
461 462
	}

463 464
static const struct mlxsw_sp_sb_pm mlxsw_sp_sb_pms[] = {
	/* Ingress pools. */
465 466 467 468
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX),
469
	/* Egress pools. */
470
	MLXSW_SP_SB_PM(0, 7),
471 472 473
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
	MLXSW_SP_SB_PM(0, MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN),
474 475
};

476
#define MLXSW_SP_SB_PMS_LEN ARRAY_SIZE(mlxsw_sp_sb_pms)
477

478
static int mlxsw_sp_port_sb_pms_init(struct mlxsw_sp_port *mlxsw_sp_port)
479
{
480
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
481 482 483
	int i;
	int err;

484 485
	for (i = 0; i < MLXSW_SP_SB_PMS_LEN; i++) {
		const struct mlxsw_sp_sb_pm *pm = &mlxsw_sp_sb_pms[i];
486

487 488
		err = mlxsw_sp_sb_pm_write(mlxsw_sp, mlxsw_sp_port->local_port,
					   i, pm->min_buff, pm->max_buff);
489 490 491 492 493 494 495 496 497
		if (err)
			return err;
	}
	return 0;
}

struct mlxsw_sp_sb_mm {
	u32 min_buff;
	u32 max_buff;
498
	u16 pool_index;
499 500
};

501 502 503 504
#define MLXSW_SP_SB_MM(_min_buff, _max_buff, _pool)	\
	{						\
		.min_buff = _min_buff,			\
		.max_buff = _max_buff,			\
505
		.pool_index = _pool,			\
506 507 508
	}

static const struct mlxsw_sp_sb_mm mlxsw_sp_sb_mms[] = {
509 510 511 512 513 514 515 516 517 518 519 520 521 522 523
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
	MLXSW_SP_SB_MM(20000, 0xff, 4),
524 525 526 527 528 529 530 531 532 533 534
};

#define MLXSW_SP_SB_MMS_LEN ARRAY_SIZE(mlxsw_sp_sb_mms)

static int mlxsw_sp_sb_mms_init(struct mlxsw_sp *mlxsw_sp)
{
	char sbmm_pl[MLXSW_REG_SBMM_LEN];
	int i;
	int err;

	for (i = 0; i < MLXSW_SP_SB_MMS_LEN; i++) {
535
		const struct mlxsw_sp_sb_pool_des *des;
536
		const struct mlxsw_sp_sb_mm *mc;
537
		u32 min_buff;
538 539

		mc = &mlxsw_sp_sb_mms[i];
540
		des = &mlxsw_sp_sb_pool_dess[mc->pool_index];
541 542 543 544 545
		/* All pools are initialized using dynamic thresholds,
		 * therefore 'max_buff' isn't specified in cells.
		 */
		min_buff = mlxsw_sp_bytes_cells(mlxsw_sp, mc->min_buff);
		mlxsw_reg_sbmm_pack(sbmm_pl, i, min_buff, mc->max_buff,
546
				    des->pool);
547 548 549 550 551 552 553
		err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbmm), sbmm_pl);
		if (err)
			return err;
	}
	return 0;
}

554 555 556 557 558 559 560 561 562 563 564 565 566 567
static void mlxsw_sp_pool_count(u16 *p_ingress_len, u16 *p_egress_len)
{
	int i;

	for (i = 0; i < MLXSW_SP_SB_POOL_DESS_LEN; ++i)
		if (mlxsw_sp_sb_pool_dess[i].dir == MLXSW_REG_SBXX_DIR_EGRESS)
			goto out;
	WARN(1, "No egress pools\n");

out:
	*p_ingress_len = i;
	*p_egress_len = MLXSW_SP_SB_POOL_DESS_LEN - i;
}

568 569
int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp)
{
570 571
	u16 ing_pool_count;
	u16 eg_pool_count;
572
	u64 sb_size;
573 574
	int err;

575 576 577
	if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, CELL_SIZE))
		return -EIO;

578 579 580 581
	if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_BUFFER_SIZE))
		return -EIO;
	sb_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE);

582 583 584 585 586
	mlxsw_sp->sb = kzalloc(sizeof(*mlxsw_sp->sb), GFP_KERNEL);
	if (!mlxsw_sp->sb)
		return -ENOMEM;
	mlxsw_sp->sb->cell_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, CELL_SIZE);

587
	err = mlxsw_sp_sb_ports_init(mlxsw_sp);
588
	if (err)
589
		goto err_sb_ports_init;
590 591
	err = mlxsw_sp_sb_prs_init(mlxsw_sp, mlxsw_sp_sb_prs,
				   MLXSW_SP_SB_PRS_LEN);
592 593
	if (err)
		goto err_sb_prs_init;
594 595
	err = mlxsw_sp_cpu_port_sb_cms_init(mlxsw_sp);
	if (err)
596
		goto err_sb_cpu_port_sb_cms_init;
597
	err = mlxsw_sp_sb_mms_init(mlxsw_sp);
598
	if (err)
599
		goto err_sb_mms_init;
600
	mlxsw_sp_pool_count(&ing_pool_count, &eg_pool_count);
601
	err = devlink_sb_register(priv_to_devlink(mlxsw_sp->core), 0, sb_size,
602 603
				  ing_pool_count,
				  eg_pool_count,
604 605 606 607 608 609 610 611 612 613 614 615
				  MLXSW_SP_SB_TC_COUNT,
				  MLXSW_SP_SB_TC_COUNT);
	if (err)
		goto err_devlink_sb_register;

	return 0;

err_devlink_sb_register:
err_sb_mms_init:
err_sb_cpu_port_sb_cms_init:
err_sb_prs_init:
	mlxsw_sp_sb_ports_fini(mlxsw_sp);
616 617
err_sb_ports_init:
	kfree(mlxsw_sp->sb);
618
	return err;
619
}
620

621 622 623
void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp)
{
	devlink_sb_unregister(priv_to_devlink(mlxsw_sp->core), 0);
624
	mlxsw_sp_sb_ports_fini(mlxsw_sp);
625
	kfree(mlxsw_sp->sb);
626 627 628 629 630 631
}

int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
	int err;

632
	err = mlxsw_sp_port_headroom_init(mlxsw_sp_port);
633 634 635 636 637 638 639 640 641
	if (err)
		return err;
	err = mlxsw_sp_port_sb_cms_init(mlxsw_sp_port);
	if (err)
		return err;
	err = mlxsw_sp_port_sb_pms_init(mlxsw_sp_port);

	return err;
}
642 643 644 645 646

int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
			 unsigned int sb_index, u16 pool_index,
			 struct devlink_sb_pool_info *pool_info)
{
647
	enum mlxsw_reg_sbxx_dir dir = mlxsw_sp_sb_pool_dess[pool_index].dir;
648
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
649
	struct mlxsw_sp_sb_pr *pr;
650

651
	pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);
652
	pool_info->pool_type = (enum devlink_sb_pool_type) dir;
653
	pool_info->size = mlxsw_sp_cells_bytes(mlxsw_sp, pr->size);
654
	pool_info->threshold_type = (enum devlink_sb_threshold_type) pr->mode;
655 656 657 658 659 660 661 662
	return 0;
}

int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
			 unsigned int sb_index, u16 pool_index, u32 size,
			 enum devlink_sb_threshold_type threshold_type)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
663
	u32 pool_size = mlxsw_sp_bytes_cells(mlxsw_sp, size);
664
	enum mlxsw_reg_sbpr_mode mode;
665

666 667 668
	if (size > MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE))
		return -EINVAL;

669
	mode = (enum mlxsw_reg_sbpr_mode) threshold_type;
670
	return mlxsw_sp_sb_pr_write(mlxsw_sp, pool_index, mode, pool_size);
671 672 673 674
}

#define MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET (-2) /* 3->1, 16->14 */

675 676
static u32 mlxsw_sp_sb_threshold_out(struct mlxsw_sp *mlxsw_sp, u16 pool_index,
				     u32 max_buff)
677
{
678
	struct mlxsw_sp_sb_pr *pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);
679 680 681

	if (pr->mode == MLXSW_REG_SBPR_MODE_DYNAMIC)
		return max_buff - MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET;
682
	return mlxsw_sp_cells_bytes(mlxsw_sp, max_buff);
683 684
}

685 686
static int mlxsw_sp_sb_threshold_in(struct mlxsw_sp *mlxsw_sp, u16 pool_index,
				    u32 threshold, u32 *p_max_buff)
687
{
688
	struct mlxsw_sp_sb_pr *pr = mlxsw_sp_sb_pr_get(mlxsw_sp, pool_index);
689 690 691 692 693 694 695 696 697 698

	if (pr->mode == MLXSW_REG_SBPR_MODE_DYNAMIC) {
		int val;

		val = threshold + MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET;
		if (val < MLXSW_REG_SBXX_DYN_MAX_BUFF_MIN ||
		    val > MLXSW_REG_SBXX_DYN_MAX_BUFF_MAX)
			return -EINVAL;
		*p_max_buff = val;
	} else {
699
		*p_max_buff = mlxsw_sp_bytes_cells(mlxsw_sp, threshold);
700 701 702 703 704 705 706 707 708 709 710 711 712
	}
	return 0;
}

int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
			      unsigned int sb_index, u16 pool_index,
			      u32 *p_threshold)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	struct mlxsw_sp_sb_pm *pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port,
713
						       pool_index);
714

715
	*p_threshold = mlxsw_sp_sb_threshold_out(mlxsw_sp, pool_index,
716 717 718 719 720 721 722 723 724 725 726 727 728 729 730
						 pm->max_buff);
	return 0;
}

int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
			      unsigned int sb_index, u16 pool_index,
			      u32 threshold)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	u32 max_buff;
	int err;

731
	err = mlxsw_sp_sb_threshold_in(mlxsw_sp, pool_index,
732 733 734 735
				       threshold, &max_buff);
	if (err)
		return err;

736
	return mlxsw_sp_sb_pm_write(mlxsw_sp, local_port, pool_index,
737 738 739 740 741 742 743 744 745 746 747 748 749
				    0, max_buff);
}

int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
				 unsigned int sb_index, u16 tc_index,
				 enum devlink_sb_pool_type pool_type,
				 u16 *p_pool_index, u32 *p_threshold)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	u8 pg_buff = tc_index;
750
	enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
751 752 753
	struct mlxsw_sp_sb_cm *cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port,
						       pg_buff, dir);

754
	*p_threshold = mlxsw_sp_sb_threshold_out(mlxsw_sp, cm->pool_index,
755
						 cm->max_buff);
756
	*p_pool_index = cm->pool_index;
757 758 759 760 761 762 763 764 765 766 767 768 769
	return 0;
}

int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
				 unsigned int sb_index, u16 tc_index,
				 enum devlink_sb_pool_type pool_type,
				 u16 pool_index, u32 threshold)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	u8 pg_buff = tc_index;
770
	enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
771 772 773
	u32 max_buff;
	int err;

774
	if (dir != mlxsw_sp_sb_pool_dess[pool_index].dir)
775 776
		return -EINVAL;

777
	err = mlxsw_sp_sb_threshold_in(mlxsw_sp, pool_index,
778 779 780 781
				       threshold, &max_buff);
	if (err)
		return err;

782 783
	return mlxsw_sp_sb_cm_write(mlxsw_sp, local_port, pg_buff,
				    0, max_buff, pool_index);
784
}
785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809

#define MASKED_COUNT_MAX \
	(MLXSW_REG_SBSR_REC_MAX_COUNT / (MLXSW_SP_SB_TC_COUNT * 2))

struct mlxsw_sp_sb_sr_occ_query_cb_ctx {
	u8 masked_count;
	u8 local_port_1;
};

static void mlxsw_sp_sb_sr_occ_query_cb(struct mlxsw_core *mlxsw_core,
					char *sbsr_pl, size_t sbsr_pl_len,
					unsigned long cb_priv)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	struct mlxsw_sp_sb_sr_occ_query_cb_ctx cb_ctx;
	u8 masked_count;
	u8 local_port;
	int rec_index = 0;
	struct mlxsw_sp_sb_cm *cm;
	int i;

	memcpy(&cb_ctx, &cb_priv, sizeof(cb_ctx));

	masked_count = 0;
	for (local_port = cb_ctx.local_port_1;
810
	     local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
811 812 813 814 815 816 817 818 819 820 821 822 823
		if (!mlxsw_sp->ports[local_port])
			continue;
		for (i = 0; i < MLXSW_SP_SB_TC_COUNT; i++) {
			cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, i,
						MLXSW_REG_SBXX_DIR_INGRESS);
			mlxsw_reg_sbsr_rec_unpack(sbsr_pl, rec_index++,
						  &cm->occ.cur, &cm->occ.max);
		}
		if (++masked_count == cb_ctx.masked_count)
			break;
	}
	masked_count = 0;
	for (local_port = cb_ctx.local_port_1;
824
	     local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865
		if (!mlxsw_sp->ports[local_port])
			continue;
		for (i = 0; i < MLXSW_SP_SB_TC_COUNT; i++) {
			cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port, i,
						MLXSW_REG_SBXX_DIR_EGRESS);
			mlxsw_reg_sbsr_rec_unpack(sbsr_pl, rec_index++,
						  &cm->occ.cur, &cm->occ.max);
		}
		if (++masked_count == cb_ctx.masked_count)
			break;
	}
}

int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
			     unsigned int sb_index)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	struct mlxsw_sp_sb_sr_occ_query_cb_ctx cb_ctx;
	unsigned long cb_priv;
	LIST_HEAD(bulk_list);
	char *sbsr_pl;
	u8 masked_count;
	u8 local_port_1;
	u8 local_port = 0;
	int i;
	int err;
	int err2;

	sbsr_pl = kmalloc(MLXSW_REG_SBSR_LEN, GFP_KERNEL);
	if (!sbsr_pl)
		return -ENOMEM;

next_batch:
	local_port++;
	local_port_1 = local_port;
	masked_count = 0;
	mlxsw_reg_sbsr_pack(sbsr_pl, false);
	for (i = 0; i < MLXSW_SP_SB_TC_COUNT; i++) {
		mlxsw_reg_sbsr_pg_buff_mask_set(sbsr_pl, i, 1);
		mlxsw_reg_sbsr_tclass_mask_set(sbsr_pl, i, 1);
	}
866
	for (; local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
867 868 869 870
		if (!mlxsw_sp->ports[local_port])
			continue;
		mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl, local_port, 1);
		mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1);
871
		for (i = 0; i < MLXSW_SP_SB_POOL_DESS_LEN; i++) {
872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889
			err = mlxsw_sp_sb_pm_occ_query(mlxsw_sp, local_port, i,
						       &bulk_list);
			if (err)
				goto out;
		}
		if (++masked_count == MASKED_COUNT_MAX)
			goto do_query;
	}

do_query:
	cb_ctx.masked_count = masked_count;
	cb_ctx.local_port_1 = local_port_1;
	memcpy(&cb_priv, &cb_ctx, sizeof(cb_ctx));
	err = mlxsw_reg_trans_query(mlxsw_core, MLXSW_REG(sbsr), sbsr_pl,
				    &bulk_list, mlxsw_sp_sb_sr_occ_query_cb,
				    cb_priv);
	if (err)
		goto out;
890
	if (local_port < mlxsw_core_max_ports(mlxsw_core))
891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924
		goto next_batch;

out:
	err2 = mlxsw_reg_trans_bulk_wait(&bulk_list);
	if (!err)
		err = err2;
	kfree(sbsr_pl);
	return err;
}

int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
			      unsigned int sb_index)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	LIST_HEAD(bulk_list);
	char *sbsr_pl;
	unsigned int masked_count;
	u8 local_port = 0;
	int i;
	int err;
	int err2;

	sbsr_pl = kmalloc(MLXSW_REG_SBSR_LEN, GFP_KERNEL);
	if (!sbsr_pl)
		return -ENOMEM;

next_batch:
	local_port++;
	masked_count = 0;
	mlxsw_reg_sbsr_pack(sbsr_pl, true);
	for (i = 0; i < MLXSW_SP_SB_TC_COUNT; i++) {
		mlxsw_reg_sbsr_pg_buff_mask_set(sbsr_pl, i, 1);
		mlxsw_reg_sbsr_tclass_mask_set(sbsr_pl, i, 1);
	}
925
	for (; local_port < mlxsw_core_max_ports(mlxsw_core); local_port++) {
926 927 928 929
		if (!mlxsw_sp->ports[local_port])
			continue;
		mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl, local_port, 1);
		mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1);
930
		for (i = 0; i < MLXSW_SP_SB_POOL_DESS_LEN; i++) {
931 932 933 934 935 936 937 938 939 940 941 942 943 944
			err = mlxsw_sp_sb_pm_occ_clear(mlxsw_sp, local_port, i,
						       &bulk_list);
			if (err)
				goto out;
		}
		if (++masked_count == MASKED_COUNT_MAX)
			goto do_query;
	}

do_query:
	err = mlxsw_reg_trans_query(mlxsw_core, MLXSW_REG(sbsr), sbsr_pl,
				    &bulk_list, NULL, 0);
	if (err)
		goto out;
945
	if (local_port < mlxsw_core_max_ports(mlxsw_core))
946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964
		goto next_batch;

out:
	err2 = mlxsw_reg_trans_bulk_wait(&bulk_list);
	if (!err)
		err = err2;
	kfree(sbsr_pl);
	return err;
}

int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
				  unsigned int sb_index, u16 pool_index,
				  u32 *p_cur, u32 *p_max)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	struct mlxsw_sp_sb_pm *pm = mlxsw_sp_sb_pm_get(mlxsw_sp, local_port,
965
						       pool_index);
966

967 968
	*p_cur = mlxsw_sp_cells_bytes(mlxsw_sp, pm->occ.cur);
	*p_max = mlxsw_sp_cells_bytes(mlxsw_sp, pm->occ.max);
969 970 971 972 973 974 975 976 977 978 979 980 981
	return 0;
}

int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
				     unsigned int sb_index, u16 tc_index,
				     enum devlink_sb_pool_type pool_type,
				     u32 *p_cur, u32 *p_max)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
			mlxsw_core_port_driver_priv(mlxsw_core_port);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 local_port = mlxsw_sp_port->local_port;
	u8 pg_buff = tc_index;
982
	enum mlxsw_reg_sbxx_dir dir = (enum mlxsw_reg_sbxx_dir) pool_type;
983 984 985
	struct mlxsw_sp_sb_cm *cm = mlxsw_sp_sb_cm_get(mlxsw_sp, local_port,
						       pg_buff, dir);

986 987
	*p_cur = mlxsw_sp_cells_bytes(mlxsw_sp, cm->occ.cur);
	*p_max = mlxsw_sp_cells_bytes(mlxsw_sp, cm->occ.max);
988 989
	return 0;
}