tegra20-seaboard.dts 19.3 KB
Newer Older
G
Grant Likely 已提交
1 2
/dts-v1/;

3
#include "tegra20.dtsi"
G
Grant Likely 已提交
4 5 6 7 8 9

/ {
	model = "NVIDIA Seaboard";
	compatible = "nvidia,seaboard", "nvidia,tegra20";

	memory {
10
		reg = <0x00000000 0x40000000>;
G
Grant Likely 已提交
11 12
	};

13 14 15 16 17 18 19 20
	host1x {
		hdmi {
			status = "okay";

			vdd-supply = <&hdmi_vdd_reg>;
			pll-supply = <&hdmi_pll_reg>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 22
			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
				GPIO_ACTIVE_HIGH>;
23 24 25
		};
	};

26
	pinmux {
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinmux {
			ata {
				nvidia,pins = "ata";
				nvidia,function = "ide";
			};
			atb {
				nvidia,pins = "atb", "gma", "gme";
				nvidia,function = "sdio4";
			};
			atc {
				nvidia,pins = "atc";
				nvidia,function = "nand";
			};
			atd {
				nvidia,pins = "atd", "ate", "gmb", "spia",
					"spib", "spic";
				nvidia,function = "gmi";
			};
			cdev1 {
				nvidia,pins = "cdev1";
				nvidia,function = "plla_out";
			};
			cdev2 {
				nvidia,pins = "cdev2";
				nvidia,function = "pllp_out4";
			};
			crtp {
				nvidia,pins = "crtp", "lm1";
				nvidia,function = "crt";
			};
			csus {
				nvidia,pins = "csus";
				nvidia,function = "vi_sensor_clk";
			};
			dap1 {
				nvidia,pins = "dap1";
				nvidia,function = "dap1";
			};
			dap2 {
				nvidia,pins = "dap2";
				nvidia,function = "dap2";
			};
			dap3 {
				nvidia,pins = "dap3";
				nvidia,function = "dap3";
			};
			dap4 {
				nvidia,pins = "dap4";
				nvidia,function = "dap4";
			};
			dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
				nvidia,function = "vi";
			};
			dtf {
				nvidia,pins = "dtf";
				nvidia,function = "i2c3";
			};
			gmc {
				nvidia,pins = "gmc";
				nvidia,function = "uartd";
			};
			gmd {
				nvidia,pins = "gmd";
				nvidia,function = "sflash";
			};
			gpu {
				nvidia,pins = "gpu";
				nvidia,function = "pwm";
			};
			gpu7 {
				nvidia,pins = "gpu7";
				nvidia,function = "rtck";
			};
			gpv {
				nvidia,pins = "gpv", "slxa", "slxk";
				nvidia,function = "pcie";
			};
			hdint {
				nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
110
					"lsck", "lsda";
111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139
				nvidia,function = "hdmi";
			};
			i2cp {
				nvidia,pins = "i2cp";
				nvidia,function = "i2cp";
			};
			irrx {
				nvidia,pins = "irrx", "irtx";
				nvidia,function = "uartb";
			};
			kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf";
				nvidia,function = "kbc";
			};
			lcsn {
				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
					"lsdi", "lvp0";
				nvidia,function = "rsvd4";
			};
			ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lpp", "lsc0",
					"lspi", "lvp1", "lvs";
				nvidia,function = "displaya";
			};
140 141 142 143
			owc {
				nvidia,pins = "owc", "spdi", "spdo", "uac";
				nvidia,function = "rsvd2";
			};
144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186
			pmc {
				nvidia,pins = "pmc";
				nvidia,function = "pwr_on";
			};
			rm {
				nvidia,pins = "rm";
				nvidia,function = "i2c1";
			};
			sdb {
				nvidia,pins = "sdb", "sdc", "sdd";
				nvidia,function = "sdio3";
			};
			sdio1 {
				nvidia,pins = "sdio1";
				nvidia,function = "sdio1";
			};
			slxc {
				nvidia,pins = "slxc", "slxd";
				nvidia,function = "spdif";
			};
			spid {
				nvidia,pins = "spid", "spie", "spif";
				nvidia,function = "spi1";
			};
			spig {
				nvidia,pins = "spig", "spih";
				nvidia,function = "spi2_alt";
			};
			uaa {
				nvidia,pins = "uaa", "uab", "uda";
				nvidia,function = "ulpi";
			};
			uad {
				nvidia,pins = "uad";
				nvidia,function = "irda";
			};
			uca {
				nvidia,pins = "uca", "ucb";
				nvidia,function = "uartc";
			};
			conf_ata {
				nvidia,pins = "ata", "atb", "atc", "atd",
					"cdev1", "cdev2", "dap1", "dap2",
187
					"dap4", "ddc", "dtf", "gma", "gmc", "gmd",
188 189 190 191 192 193 194 195
					"gme", "gpu", "gpu7", "i2cp", "irrx",
					"irtx", "pta", "rm", "sdc", "sdd",
					"slxd", "slxk", "spdi", "spdo", "uac",
					"uad", "uca", "ucb", "uda";
				nvidia,pull = <0>;
				nvidia,tristate = <0>;
			};
			conf_ate {
196
				nvidia,pins = "ate", "csus", "dap3",
197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265
					"gpv", "owc", "slxc", "spib", "spid",
					"spie";
				nvidia,pull = <0>;
				nvidia,tristate = <1>;
			};
			conf_ck32 {
				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
				nvidia,pull = <0>;
			};
			conf_crtp {
				nvidia,pins = "crtp", "gmb", "slxa", "spia",
					"spig", "spih";
				nvidia,pull = <2>;
				nvidia,tristate = <1>;
			};
			conf_dta {
				nvidia,pins = "dta", "dtb", "dtc", "dtd";
				nvidia,pull = <1>;
				nvidia,tristate = <0>;
			};
			conf_dte {
				nvidia,pins = "dte", "spif";
				nvidia,pull = <1>;
				nvidia,tristate = <1>;
			};
			conf_hdint {
				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
					"lpw1", "lsc1", "lsck", "lsda", "lsdi",
					"lvp0";
				nvidia,tristate = <1>;
			};
			conf_kbca {
				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
					"kbce", "kbcf", "sdio1", "spic", "uaa",
					"uab";
				nvidia,pull = <2>;
				nvidia,tristate = <0>;
			};
			conf_lc {
				nvidia,pins = "lc", "ls";
				nvidia,pull = <2>;
			};
			conf_ld0 {
				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
					"ld5", "ld6", "ld7", "ld8", "ld9",
					"ld10", "ld11", "ld12", "ld13", "ld14",
					"ld15", "ld16", "ld17", "ldi", "lhp0",
					"lhp1", "lhp2", "lhs", "lm0", "lpp",
					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
					"lvs", "pmc", "sdb";
				nvidia,tristate = <0>;
			};
			conf_ld17_0 {
				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
					"ld23_22";
				nvidia,pull = <1>;
			};
			drive_sdio1 {
				nvidia,pins = "drive_sdio1";
				nvidia,high-speed-mode = <0>;
				nvidia,schmitt = <0>;
				nvidia,low-power-mode = <3>;
				nvidia,pull-down-strength = <31>;
				nvidia,pull-up-strength = <31>;
				nvidia,slew-rate-rising = <3>;
				nvidia,slew-rate-falling = <3>;
			};
		};
266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298

		state_i2cmux_ddc: pinmux_i2cmux_ddc {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "i2c2";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};

		state_i2cmux_pta: pinmux_i2cmux_pta {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "i2c2";
			};
		};

		state_i2cmux_idle: pinmux_i2cmux_idle {
			ddc {
				nvidia,pins = "ddc";
				nvidia,function = "rsvd4";
			};
			pta {
				nvidia,pins = "pta";
				nvidia,function = "rsvd4";
			};
		};
299 300
	};

301 302
	i2s@70002800 {
		status = "okay";
303 304 305
	};

	serial@70006300 {
306
		status = "okay";
307 308
	};

309
	i2c@7000c000 {
310
		status = "okay";
311
		clock-frequency = <400000>;
312 313 314 315 316

		wm8903: wm8903@1a {
			compatible = "wlf,wm8903";
			reg = <0x1a>;
			interrupt-parent = <&gpio>;
317
			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
318 319 320 321 322 323

			gpio-controller;
			#gpio-cells = <2>;

			micdet-cfg = <0>;
			micdet-delay = <100>;
324
			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
325
		};
326 327 328 329 330 331

		/* ALS and proximity sensor */
		isl29018@44 {
			compatible = "isil,isl29018";
			reg = <0x44>;
			interrupt-parent = <&gpio>;
332
			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
333
		};
334 335 336 337 338

		gyrometer@68 {
			compatible = "invn,mpu3050";
			reg = <0x68>;
			interrupt-parent = <&gpio>;
339
			interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
340
		};
341 342 343
	};

	i2c@7000c400 {
344
		status = "okay";
345
		clock-frequency = <100000>;
346 347
	};

348 349 350 351 352 353 354 355 356 357 358 359
	i2cmux {
		compatible = "i2c-mux-pinctrl";
		#address-cells = <1>;
		#size-cells = <0>;

		i2c-parent = <&{/i2c@7000c400}>;

		pinctrl-names = "ddc", "pta", "idle";
		pinctrl-0 = <&state_i2cmux_ddc>;
		pinctrl-1 = <&state_i2cmux_pta>;
		pinctrl-2 = <&state_i2cmux_idle>;

360
		hdmi_ddc: i2c@0 {
361 362 363 364 365 366 367 368 369
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
370 371 372 373 374 375 376

			smart-battery@b {
				compatible = "ti,bq20z75", "smart-battery-1.1";
				reg = <0xb>;
				ti,i2c-retry-count = <2>;
				ti,poll-retry-count = <10>;
			};
377 378 379
		};
	};

380
	i2c@7000c500 {
381
		status = "okay";
382 383 384 385
		clock-frequency = <400000>;
	};

	i2c@7000d000 {
386
		status = "okay";
387
		clock-frequency = <400000>;
S
Stephen Warren 已提交
388

389 390 391
		pmic: tps6586x@34 {
			compatible = "ti,tps6586x";
			reg = <0x34>;
392
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
393

394 395
			ti,system-power-controller;

396 397 398 399 400 401 402 403 404 405 406 407 408 409
			#gpio-cells = <2>;
			gpio-controller;

			sys-supply = <&vdd_5v0_reg>;
			vin-sm0-supply = <&sys_reg>;
			vin-sm1-supply = <&sys_reg>;
			vin-sm2-supply = <&sys_reg>;
			vinldo01-supply = <&sm2_reg>;
			vinldo23-supply = <&sm2_reg>;
			vinldo4-supply = <&sm2_reg>;
			vinldo678-supply = <&sm2_reg>;
			vinldo9-supply = <&sm2_reg>;

			regulators {
410
				sys_reg: sys {
411 412 413 414
					regulator-name = "vdd_sys";
					regulator-always-on;
				};

415
				sm0 {
416 417 418 419 420 421
					regulator-name = "vdd_sm0,vdd_core";
					regulator-min-microvolt = <1300000>;
					regulator-max-microvolt = <1300000>;
					regulator-always-on;
				};

422
				sm1 {
423 424 425 426 427 428
					regulator-name = "vdd_sm1,vdd_cpu";
					regulator-min-microvolt = <1125000>;
					regulator-max-microvolt = <1125000>;
					regulator-always-on;
				};

429
				sm2_reg: sm2 {
430 431 432 433 434 435 436 437
					regulator-name = "vdd_sm2,vin_ldo*";
					regulator-min-microvolt = <3700000>;
					regulator-max-microvolt = <3700000>;
					regulator-always-on;
				};

				/* LDO0 is not connected to anything */

438
				ldo1 {
439 440 441 442 443 444
					regulator-name = "vdd_ldo1,avdd_pll*";
					regulator-min-microvolt = <1100000>;
					regulator-max-microvolt = <1100000>;
					regulator-always-on;
				};

445
				ldo2 {
446 447 448 449 450
					regulator-name = "vdd_ldo2,vdd_rtc";
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

451
				ldo3 {
452 453 454 455 456 457
					regulator-name = "vdd_ldo3,avdd_usb*";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};

458
				ldo4 {
459 460 461 462 463 464
					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-always-on;
				};

465
				ldo5 {
466 467 468 469 470 471
					regulator-name = "vdd_ldo5,vcore_mmc";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

472
				ldo6 {
473 474 475 476 477
					regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

478
				hdmi_vdd_reg: ldo7 {
479 480 481 482 483
					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
				};

484
				hdmi_pll_reg: ldo8 {
485 486 487 488 489
					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

490
				ldo9 {
491 492 493 494 495 496
					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
					regulator-min-microvolt = <2850000>;
					regulator-max-microvolt = <2850000>;
					regulator-always-on;
				};

497
				ldo_rtc {
498 499 500 501 502 503 504 505
					regulator-name = "vdd_rtc_out,vdd_cell";
					regulator-min-microvolt = <3300000>;
					regulator-max-microvolt = <3300000>;
					regulator-always-on;
				};
			};
		};

506
		temperature-sensor@4c {
507
			compatible = "onnn,nct1008";
S
Stephen Warren 已提交
508 509
			reg = <0x4c>;
		};
510 511

		magnetometer@c {
512
			compatible = "ak,ak8975";
513 514
			reg = <0xc>;
			interrupt-parent = <&gpio>;
515
			interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
516
		};
517 518
	};

519 520
	pmc {
		nvidia,invert-interrupt;
521 522 523 524 525 526
		nvidia,suspend-mode = <2>;
		nvidia,cpu-pwr-good-time = <5000>;
		nvidia,cpu-pwr-off-time = <5000>;
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <3875>;
		nvidia,sys-clock-req-active-high;
527 528
	};

529
	memory-controller@7000f400 {
530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546
		emc-table@190000 {
			reg = <190000>;
			compatible = "nvidia,tegra20-emc-table";
			clock-frequency = <190000>;
			nvidia,emc-registers = <0x0000000c 0x00000026
				0x00000009 0x00000003 0x00000004 0x00000004
				0x00000002 0x0000000c 0x00000003 0x00000003
				0x00000002 0x00000001 0x00000004 0x00000005
				0x00000004 0x00000009 0x0000000d 0x0000059f
				0x00000000 0x00000003 0x00000003 0x00000003
				0x00000003 0x00000001 0x0000000b 0x000000c8
				0x00000003 0x00000007 0x00000004 0x0000000f
				0x00000002 0x00000000 0x00000000 0x00000002
				0x00000000 0x00000000 0x00000083 0xa06204ae
				0x007dc010 0x00000000 0x00000000 0x00000000
				0x00000000 0x00000000 0x00000000 0x00000000>;
		};
547

548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564
		emc-table@380000 {
			reg = <380000>;
			compatible = "nvidia,tegra20-emc-table";
			clock-frequency = <380000>;
			nvidia,emc-registers = <0x00000017 0x0000004b
				0x00000012 0x00000006 0x00000004 0x00000005
				0x00000003 0x0000000c 0x00000006 0x00000006
				0x00000003 0x00000001 0x00000004 0x00000005
				0x00000004 0x00000009 0x0000000d 0x00000b5f
				0x00000000 0x00000003 0x00000003 0x00000006
				0x00000006 0x00000001 0x00000011 0x000000c8
				0x00000003 0x0000000e 0x00000007 0x0000000f
				0x00000002 0x00000000 0x00000000 0x00000002
				0x00000000 0x00000000 0x00000083 0xe044048b
				0x007d8010 0x00000000 0x00000000 0x00000000
				0x00000000 0x00000000 0x00000000 0x00000000>;
		};
565 566
	};

567
	usb@c5000000 {
568
		status = "okay";
569
		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
570
		dr_mode = "otg";
G
Grant Likely 已提交
571 572
	};

573 574 575 576 577 578
	usb-phy@c5000000 {
		status = "okay";
		vbus-supply = <&vbus_reg>;
		dr_mode = "otg";
	};

579
	usb@c5004000 {
580
		status = "okay";
581 582
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
583 584
	};

585
	usb-phy@c5004000 {
586
		status = "okay";
587 588
		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
			GPIO_ACTIVE_LOW>;
589 590
	};

591 592
	usb@c5008000 {
		status = "okay";
593 594
	};

595 596 597 598
	usb-phy@c5008000 {
		status = "okay";
	};

599 600
	sdhci@c8000000 {
		status = "okay";
601
		power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
602
		bus-width = <4>;
603
		keep-power-in-suspend;
604 605
	};

G
Grant Likely 已提交
606
	sdhci@c8000400 {
607
		status = "okay";
608 609 610
		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
A
Arnd Bergmann 已提交
611
		bus-width = <4>;
G
Grant Likely 已提交
612
	};
613 614

	sdhci@c8000600 {
615
		status = "okay";
A
Arnd Bergmann 已提交
616
		bus-width = <8>;
617
		non-removable;
618
	};
619

620 621 622 623 624 625 626 627 628 629 630 631 632
	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

633 634 635 636 637
	gpio-keys {
		compatible = "gpio-keys";

		power {
			label = "Power";
638
			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
639 640 641 642 643 644
			linux,code = <116>; /* KEY_POWER */
			gpio-key,wakeup;
		};

		lid {
			label = "Lid";
645
			gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
646 647 648 649 650 651
			linux,input-type = <5>; /* EV_SW */
			linux,code = <0>; /* SW_LID */
			debounce-interval = <1>;
			gpio-key,wakeup;
		};
	};
652

653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791
	kbc {
		status = "okay";
		nvidia,debounce-delay-ms = <32>;
		nvidia,repeat-delay-ms = <160>;
		nvidia,ghost-filter;
		nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
		nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
		linux,keymap = <0x00020011	/* KEY_W */
				0x0003001F	/* KEY_S */
				0x0004001E	/* KEY_A */
				0x0005002C	/* KEY_Z */
				0x000701d0	/* KEY_FN */

				0x0107007D	/* KEY_LEFTMETA */
				0x02060064 	/* KEY_RIGHTALT */
				0x02070038	/* KEY_LEFTALT */

				0x03000006	/* KEY_5 */
				0x03010005	/* KEY_4 */
				0x03020013	/* KEY_R */
				0x03030012	/* KEY_E */
				0x03040021	/* KEY_F */
				0x03050020	/* KEY_D */
				0x0306002D	/* KEY_X */

				0x04000008	/* KEY_7 */
				0x04010007	/* KEY_6 */
				0x04020014	/* KEY_T */
				0x04030023	/* KEY_H */
				0x04040022	/* KEY_G */
				0x0405002F	/* KEY_V */
				0x0406002E	/* KEY_C */
				0x04070039	/* KEY_SPACE */

				0x0500000A	/* KEY_9 */
				0x05010009	/* KEY_8 */
				0x05020016	/* KEY_U */
				0x05030015	/* KEY_Y */
				0x05040024	/* KEY_J */
				0x05050031	/* KEY_N */
				0x05060030	/* KEY_B */
				0x0507002B	/* KEY_BACKSLASH */

				0x0600000C	/* KEY_MINUS */
				0x0601000B	/* KEY_0 */
				0x06020018	/* KEY_O */
				0x06030017	/* KEY_I */
				0x06040026	/* KEY_L */
				0x06050025	/* KEY_K */
				0x06060033	/* KEY_COMMA */
				0x06070032	/* KEY_M */

				0x0701000D	/* KEY_EQUAL */
				0x0702001B	/* KEY_RIGHTBRACE */
				0x0703001C	/* KEY_ENTER */
				0x0707008B	/* KEY_MENU */

				0x08040036	/* KEY_RIGHTSHIFT */
				0x0805002A	/* KEY_LEFTSHIFT */

				0x09050061	/* KEY_RIGHTCTRL */
				0x0907001D	/* KEY_LEFTCTRL */

				0x0B00001A	/* KEY_LEFTBRACE */
				0x0B010019	/* KEY_P */
				0x0B020028	/* KEY_APOSTROPHE */
				0x0B030027	/* KEY_SEMICOLON */
				0x0B040035	/* KEY_SLASH */
				0x0B050034	/* KEY_DOT */

				0x0C000044	/* KEY_F10 */
				0x0C010043	/* KEY_F9 */
				0x0C02000E	/* KEY_BACKSPACE */
				0x0C030004	/* KEY_3 */
				0x0C040003	/* KEY_2 */
				0x0C050067	/* KEY_UP */
				0x0C0600D2	/* KEY_PRINT */
				0x0C070077	/* KEY_PAUSE */

				0x0D00006E	/* KEY_INSERT */
				0x0D01006F	/* KEY_DELETE */
				0x0D030068	/* KEY_PAGEUP  */
				0x0D04006D	/* KEY_PAGEDOWN */
				0x0D05006A	/* KEY_RIGHT */
				0x0D06006C	/* KEY_DOWN */
				0x0D070069	/* KEY_LEFT */

				0x0E000057	/* KEY_F11 */
				0x0E010058	/* KEY_F12 */
				0x0E020042	/* KEY_F8 */
				0x0E030010	/* KEY_Q */
				0x0E04003E	/* KEY_F4 */
				0x0E05003D	/* KEY_F3 */
				0x0E060002	/* KEY_1 */
				0x0E070041	/* KEY_F7 */

				0x0F000001	/* KEY_ESC */
				0x0F010029	/* KEY_GRAVE */
				0x0F02003F	/* KEY_F5 */
				0x0F03000F	/* KEY_TAB */
				0x0F04003B	/* KEY_F1 */
				0x0F05003C	/* KEY_F2 */
				0x0F06003A	/* KEY_CAPSLOCK */
				0x0F070040	/* KEY_F6 */

				/* Software Handled Function Keys */
				0x14000047	/* KEY_KP7 */

				0x15000049	/* KEY_KP9 */
				0x15010048	/* KEY_KP8 */
				0x1502004B	/* KEY_KP4 */
				0x1504004F	/* KEY_KP1 */

				0x1601004E	/* KEY_KPSLASH */
				0x1602004D	/* KEY_KP6 */
				0x1603004C	/* KEY_KP5 */
				0x16040051	/* KEY_KP3 */
				0x16050050	/* KEY_KP2 */
				0x16070052	/* KEY_KP0 */

				0x1B010037	/* KEY_KPASTERISK */
				0x1B03004A	/* KEY_KPMINUS */
				0x1B04004E	/* KEY_KPPLUS */
				0x1B050053	/* KEY_KPDOT */

				0x1C050073	/* KEY_VOLUMEUP */

				0x1D030066	/* KEY_HOME */
				0x1D04006B	/* KEY_END */
				0x1D0500E0	/* KEY_BRIGHTNESSDOWN */
				0x1D060072	/* KEY_VOLUMEDOWN */
				0x1D0700E1	/* KEY_BRIGHTNESSUP */

				0x1E000045	/* KEY_NUMLOCK */
				0x1E010046	/* KEY_SCROLLLOCK */
				0x1E020071	/* KEY_MUTE */

				0x1F04008A>;	/* KEY_HELP */
	};
792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811
	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		vdd_5v0_reg: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "vdd_5v0";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			regulator-always-on;
		};

		regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "vdd_1v5";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
812
			gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
813 814 815 816 817 818 819 820
		};

		regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "vdd_1v2";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
821
			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
822 823
			enable-active-high;
		};
824 825 826 827 828 829 830 831 832

		vbus_reg: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "vdd_vbus_wup1";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio 24 0>; /* PD0 */
		};
833 834
	};

835 836 837 838
	sound {
		compatible = "nvidia,tegra-audio-wm8903-seaboard",
			     "nvidia,tegra-audio-wm8903";
		nvidia,model = "NVIDIA Tegra Seaboard";
839

840 841 842 843 844 845 846 847 848
		nvidia,audio-routing =
			"Headphone Jack", "HPOUTR",
			"Headphone Jack", "HPOUTL",
			"Int Spk", "ROP",
			"Int Spk", "RON",
			"Int Spk", "LOP",
			"Int Spk", "LON",
			"Mic Jack", "MICBIAS",
			"IN1R", "Mic Jack";
849

850 851 852
		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,audio-codec = <&wm8903>;

853 854
		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
855

856 857 858
		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
			 <&tegra_car TEGRA20_CLK_CDEV1>;
859
		clock-names = "pll_a", "pll_a_out0", "mclk";
860
	};
G
Grant Likely 已提交
861
};