xhci.c 161.1 KB
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// SPDX-License-Identifier: GPL-2.0
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/*
 * xHCI host controller driver
 *
 * Copyright (C) 2008 Intel Corp.
 *
 * Author: Sarah Sharp
 * Some code borrowed from the Linux EHCI driver.
 */

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#include <linux/pci.h>
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#include <linux/iopoll.h>
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#include <linux/irq.h>
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#include <linux/log2.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/slab.h>
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#include <linux/dmi.h>
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#include <linux/dma-mapping.h>
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#include "xhci.h"
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#include "xhci-trace.h"
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#include "xhci-debugfs.h"
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#include "xhci-dbgcap.h"
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#define DRIVER_AUTHOR "Sarah Sharp"
#define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"

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#define	PORT_WAKE_BITS	(PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)

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/* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
static int link_quirk;
module_param(link_quirk, int, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");

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static unsigned long long quirks;
module_param(quirks, ullong, S_IRUGO);
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MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");

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static bool td_on_ring(struct xhci_td *td, struct xhci_ring *ring)
{
	struct xhci_segment *seg = ring->first_seg;

	if (!td || !td->start_seg)
		return false;
	do {
		if (seg == td->start_seg)
			return true;
		seg = seg->next;
	} while (seg && seg != ring->first_seg);

	return false;
}

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/*
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 * xhci_handshake - spin reading hc until handshake completes or fails
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 * @ptr: address of hc register to be read
 * @mask: bits to look at in result of read
 * @done: value of those bits when handshake succeeds
 * @usec: timeout in microseconds
 *
 * Returns negative errno, or zero on success
 *
 * Success happens when the "mask" bits have the specified value (hardware
 * handshake done).  There are two failure modes:  "usec" have passed (major
 * hardware flakeout), or the register reads as all-ones (hardware removed).
 */
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int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, u64 timeout_us)
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{
	u32	result;
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	int	ret;
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	ret = readl_poll_timeout_atomic(ptr, result,
					(result & mask) == done ||
					result == U32_MAX,
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					1, timeout_us);
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	if (result == U32_MAX)		/* card removed */
		return -ENODEV;

	return ret;
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}

/*
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 * Disable interrupts and begin the xHCI halting process.
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 */
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void xhci_quiesce(struct xhci_hcd *xhci)
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{
	u32 halted;
	u32 cmd;
	u32 mask;

	mask = ~(XHCI_IRQS);
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	halted = readl(&xhci->op_regs->status) & STS_HALT;
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	if (!halted)
		mask &= ~CMD_RUN;

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	cmd = readl(&xhci->op_regs->command);
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	cmd &= mask;
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	writel(cmd, &xhci->op_regs->command);
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}

/*
 * Force HC into halt state.
 *
 * Disable any IRQs and clear the run/stop bit.
 * HC will complete any current and actively pipelined transactions, and
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 * should halt within 16 ms of the run/stop bit being cleared.
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 * Read HC Halted bit in the status register to see when the HC is finished.
 */
int xhci_halt(struct xhci_hcd *xhci)
{
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	int ret;
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	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
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	xhci_quiesce(xhci);
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	ret = xhci_handshake(&xhci->op_regs->status,
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			STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
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	if (ret) {
		xhci_warn(xhci, "Host halt failed, %d\n", ret);
		return ret;
	}
	xhci->xhc_state |= XHCI_STATE_HALTED;
	xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
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	return ret;
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}

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/*
 * Set the run bit and wait for the host to be running.
 */
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int xhci_start(struct xhci_hcd *xhci)
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{
	u32 temp;
	int ret;

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	temp = readl(&xhci->op_regs->command);
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	temp |= (CMD_RUN);
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	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
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			temp);
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	writel(temp, &xhci->op_regs->command);
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	/*
	 * Wait for the HCHalted Status bit to be 0 to indicate the host is
	 * running.
	 */
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	ret = xhci_handshake(&xhci->op_regs->status,
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			STS_HALT, 0, XHCI_MAX_HALT_USEC);
	if (ret == -ETIMEDOUT)
		xhci_err(xhci, "Host took too long to start, "
				"waited %u microseconds.\n",
				XHCI_MAX_HALT_USEC);
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	if (!ret)
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		/* clear state flags. Including dying, halted or removing */
		xhci->xhc_state = 0;
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	return ret;
}

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/*
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 * Reset a halted HC.
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 *
 * This resets pipelines, timers, counters, state machines, etc.
 * Transactions will be terminated immediately, and operational registers
 * will be set to their defaults.
 */
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int xhci_reset(struct xhci_hcd *xhci, u64 timeout_us)
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{
	u32 command;
	u32 state;
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	int ret;
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	state = readl(&xhci->op_regs->status);
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	if (state == ~(u32)0) {
		xhci_warn(xhci, "Host not accessible, reset failed.\n");
		return -ENODEV;
	}

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	if ((state & STS_HALT) == 0) {
		xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
		return 0;
	}
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	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
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	command = readl(&xhci->op_regs->command);
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	command |= CMD_RESET;
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	writel(command, &xhci->op_regs->command);
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	/* Existing Intel xHCI controllers require a delay of 1 mS,
	 * after setting the CMD_RESET bit, and before accessing any
	 * HC registers. This allows the HC to complete the
	 * reset operation and be ready for HC register access.
	 * Without this delay, the subsequent HC register access,
	 * may result in a system hang very rarely.
	 */
	if (xhci->quirks & XHCI_INTEL_HOST)
		udelay(1000);

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	ret = xhci_handshake(&xhci->op_regs->command, CMD_RESET, 0, timeout_us);
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	if (ret)
		return ret;

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	if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL)
		usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller));

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	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			 "Wait for controller to be ready for doorbell rings");
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	/*
	 * xHCI cannot write to any doorbells or operational registers other
	 * than status until the "Controller Not Ready" flag is cleared.
	 */
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	ret = xhci_handshake(&xhci->op_regs->status, STS_CNR, 0, timeout_us);
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	xhci->usb2_rhub.bus_state.port_c_suspend = 0;
	xhci->usb2_rhub.bus_state.suspended_ports = 0;
	xhci->usb2_rhub.bus_state.resuming_ports = 0;
	xhci->usb3_rhub.bus_state.port_c_suspend = 0;
	xhci->usb3_rhub.bus_state.suspended_ports = 0;
	xhci->usb3_rhub.bus_state.resuming_ports = 0;
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	return ret;
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}

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static void xhci_zero_64b_regs(struct xhci_hcd *xhci)
{
	struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
	int err, i;
	u64 val;
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	u32 intrs;
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	/*
	 * Some Renesas controllers get into a weird state if they are
	 * reset while programmed with 64bit addresses (they will preserve
	 * the top half of the address in internal, non visible
	 * registers). You end up with half the address coming from the
	 * kernel, and the other half coming from the firmware. Also,
	 * changing the programming leads to extra accesses even if the
	 * controller is supposed to be halted. The controller ends up with
	 * a fatal fault, and is then ripe for being properly reset.
	 *
	 * Special care is taken to only apply this if the device is behind
	 * an iommu. Doing anything when there is no iommu is definitely
	 * unsafe...
	 */
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	if (!(xhci->quirks & XHCI_ZERO_64B_REGS) || !device_iommu_mapped(dev))
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		return;

	xhci_info(xhci, "Zeroing 64bit base registers, expecting fault\n");

	/* Clear HSEIE so that faults do not get signaled */
	val = readl(&xhci->op_regs->command);
	val &= ~CMD_HSEIE;
	writel(val, &xhci->op_regs->command);

	/* Clear HSE (aka FATAL) */
	val = readl(&xhci->op_regs->status);
	val |= STS_FATAL;
	writel(val, &xhci->op_regs->status);

	/* Now zero the registers, and brace for impact */
	val = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
	if (upper_32_bits(val))
		xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr);
	val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
	if (upper_32_bits(val))
		xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);

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	intrs = min_t(u32, HCS_MAX_INTRS(xhci->hcs_params1),
		      ARRAY_SIZE(xhci->run_regs->ir_set));

	for (i = 0; i < intrs; i++) {
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		struct xhci_intr_reg __iomem *ir;

		ir = &xhci->run_regs->ir_set[i];
		val = xhci_read_64(xhci, &ir->erst_base);
		if (upper_32_bits(val))
			xhci_write_64(xhci, 0, &ir->erst_base);
		val= xhci_read_64(xhci, &ir->erst_dequeue);
		if (upper_32_bits(val))
			xhci_write_64(xhci, 0, &ir->erst_dequeue);
	}

	/* Wait for the fault to appear. It will be cleared on reset */
	err = xhci_handshake(&xhci->op_regs->status,
			     STS_FATAL, STS_FATAL,
			     XHCI_MAX_HALT_USEC);
	if (!err)
		xhci_info(xhci, "Fault detected\n");
}
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#ifdef CONFIG_USB_PCI
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/*
 * Set up MSI
 */
static int xhci_setup_msi(struct xhci_hcd *xhci)
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{
	int ret;
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	/*
	 * TODO:Check with MSI Soc for sysdev
	 */
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	struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);

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	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
	if (ret < 0) {
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		xhci_dbg_trace(xhci, trace_xhci_dbg_init,
				"failed to allocate MSI entry");
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		return ret;
	}

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	ret = request_irq(pdev->irq, xhci_msi_irq,
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				0, "xhci_hcd", xhci_to_hcd(xhci));
	if (ret) {
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		xhci_dbg_trace(xhci, trace_xhci_dbg_init,
				"disable MSI interrupt");
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		pci_free_irq_vectors(pdev);
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	}

	return ret;
}

/*
 * Set up MSI-X
 */
static int xhci_setup_msix(struct xhci_hcd *xhci)
{
	int i, ret = 0;
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	struct usb_hcd *hcd = xhci_to_hcd(xhci);
	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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	/*
	 * calculate number of msi-x vectors supported.
	 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
	 *   with max number of interrupters based on the xhci HCSPARAMS1.
	 * - num_online_cpus: maximum msi-x vectors per CPUs core.
	 *   Add additional 1 vector to ensure always available interrupt.
	 */
	xhci->msix_count = min(num_online_cpus() + 1,
				HCS_MAX_INTRS(xhci->hcs_params1));

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	ret = pci_alloc_irq_vectors(pdev, xhci->msix_count, xhci->msix_count,
			PCI_IRQ_MSIX);
	if (ret < 0) {
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		xhci_dbg_trace(xhci, trace_xhci_dbg_init,
				"Failed to enable MSI-X");
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		return ret;
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	}

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	for (i = 0; i < xhci->msix_count; i++) {
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		ret = request_irq(pci_irq_vector(pdev, i), xhci_msi_irq, 0,
				"xhci_hcd", xhci_to_hcd(xhci));
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		if (ret)
			goto disable_msix;
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	}
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	hcd->msix_enabled = 1;
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	return ret;
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disable_msix:
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	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
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	while (--i >= 0)
		free_irq(pci_irq_vector(pdev, i), xhci_to_hcd(xhci));
	pci_free_irq_vectors(pdev);
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	return ret;
}

/* Free any IRQs and disable MSI-X */
static void xhci_cleanup_msix(struct xhci_hcd *xhci)
{
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	struct usb_hcd *hcd = xhci_to_hcd(xhci);
	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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	if (xhci->quirks & XHCI_PLAT)
		return;

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	/* return if using legacy interrupt */
	if (hcd->irq > 0)
		return;

	if (hcd->msix_enabled) {
		int i;
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		for (i = 0; i < xhci->msix_count; i++)
			free_irq(pci_irq_vector(pdev, i), xhci_to_hcd(xhci));
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	} else {
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		free_irq(pci_irq_vector(pdev, 0), xhci_to_hcd(xhci));
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	}

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	pci_free_irq_vectors(pdev);
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	hcd->msix_enabled = 0;
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}

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static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
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{
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	struct usb_hcd *hcd = xhci_to_hcd(xhci);

	if (hcd->msix_enabled) {
		struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
		int i;
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		for (i = 0; i < xhci->msix_count; i++)
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			synchronize_irq(pci_irq_vector(pdev, i));
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	}
}

static int xhci_try_enable_msi(struct usb_hcd *hcd)
{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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	struct pci_dev  *pdev;
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	int ret;

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	/* The xhci platform device has set up IRQs through usb_add_hcd. */
	if (xhci->quirks & XHCI_PLAT)
		return 0;

	pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
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	/*
	 * Some Fresco Logic host controllers advertise MSI, but fail to
	 * generate interrupts.  Don't even try to enable MSI.
	 */
	if (xhci->quirks & XHCI_BROKEN_MSI)
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		goto legacy_irq;
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	/* unregister the legacy interrupt */
	if (hcd->irq)
		free_irq(hcd->irq, hcd);
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	hcd->irq = 0;
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	ret = xhci_setup_msix(xhci);
	if (ret)
		/* fall back to msi*/
		ret = xhci_setup_msi(xhci);

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	if (!ret) {
		hcd->msi_enabled = 1;
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		return 0;
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	}
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	if (!pdev->irq) {
		xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
		return -EINVAL;
	}

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 legacy_irq:
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	if (!strlen(hcd->irq_descr))
		snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
			 hcd->driver->description, hcd->self.busnum);

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	/* fall back to legacy interrupt*/
	ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
			hcd->irq_descr, hcd);
	if (ret) {
		xhci_err(xhci, "request interrupt %d failed\n",
				pdev->irq);
		return ret;
	}
	hcd->irq = pdev->irq;
	return 0;
}

#else

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static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
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{
	return 0;
}

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static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
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{
}

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static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
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{
}

#endif

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static void compliance_mode_recovery(struct timer_list *t)
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{
	struct xhci_hcd *xhci;
	struct usb_hcd *hcd;
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	struct xhci_hub *rhub;
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	u32 temp;
	int i;

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	xhci = from_timer(xhci, t, comp_mode_recovery_timer);
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	rhub = &xhci->usb3_rhub;
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	for (i = 0; i < rhub->num_ports; i++) {
		temp = readl(rhub->ports[i]->addr);
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		if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
			/*
			 * Compliance Mode Detected. Letting USB Core
			 * handle the Warm Reset
			 */
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			xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
					"Compliance mode detected->port %d",
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					i + 1);
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			xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
					"Attempting compliance mode recovery");
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			hcd = xhci->shared_hcd;

			if (hcd->state == HC_STATE_SUSPENDED)
				usb_hcd_resume_root_hub(hcd);

			usb_hcd_poll_rh_status(hcd);
		}
	}

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	if (xhci->port_status_u0 != ((1 << rhub->num_ports) - 1))
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		mod_timer(&xhci->comp_mode_recovery_timer,
			jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
}

/*
 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
 * that causes ports behind that hardware to enter compliance mode sometimes.
 * The quirk creates a timer that polls every 2 seconds the link state of
 * each host controller's port and recovers it by issuing a Warm reset
 * if Compliance mode is detected, otherwise the port will become "dead" (no
 * device connections or disconnections will be detected anymore). Becasue no
 * status event is generated when entering compliance mode (per xhci spec),
 * this quirk is needed on systems that have the failing hardware installed.
 */
static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
{
	xhci->port_status_u0 = 0;
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	timer_setup(&xhci->comp_mode_recovery_timer, compliance_mode_recovery,
		    0);
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	xhci->comp_mode_recovery_timer.expires = jiffies +
			msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);

	add_timer(&xhci->comp_mode_recovery_timer);
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	xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
			"Compliance mode recovery timer initialized");
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}

/*
 * This function identifies the systems that have installed the SN65LVPE502CP
 * USB3.0 re-driver and that need the Compliance Mode Quirk.
 * Systems:
 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
 */
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static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
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{
	const char *dmi_product_name, *dmi_sys_vendor;

	dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
	dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
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	if (!dmi_product_name || !dmi_sys_vendor)
		return false;
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	if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
		return false;

	if (strstr(dmi_product_name, "Z420") ||
			strstr(dmi_product_name, "Z620") ||
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			strstr(dmi_product_name, "Z820") ||
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			strstr(dmi_product_name, "Z1 Workstation"))
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		return true;

	return false;
}

static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
{
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	return (xhci->port_status_u0 == ((1 << xhci->usb3_rhub.num_ports) - 1));
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}


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/*
 * Initialize memory for HCD and xHC (one-time init).
 *
 * Program the PAGESIZE register, initialize the device context array, create
 * device contexts (?), set up a command ring segment (or two?), create event
 * ring (one for now).
 */
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static int xhci_init(struct usb_hcd *hcd)
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{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	int retval = 0;

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	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
582
	spin_lock_init(&xhci->lock);
583
	if (xhci->hci_version == 0x95 && link_quirk) {
584 585
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"QUIRK: Not clearing Link TRB chain bits.");
586 587
		xhci->quirks |= XHCI_LINK_TRB_QUIRK;
	} else {
588 589
		xhci_dbg_trace(xhci, trace_xhci_dbg_init,
				"xHCI doesn't need link TRB QUIRK");
590
	}
591
	retval = xhci_mem_init(xhci, GFP_KERNEL);
592
	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
593

594
	/* Initializing Compliance Mode Recovery Data If Needed */
595
	if (xhci_compliance_mode_recovery_timer_quirk_check()) {
596 597 598 599
		xhci->quirks |= XHCI_COMP_MODE_QUIRK;
		compliance_mode_recovery_timer_init(xhci);
	}

600 601 602
	return retval;
}

603 604 605
/*-------------------------------------------------------------------------*/


606 607 608 609 610 611 612
static int xhci_run_finished(struct xhci_hcd *xhci)
{
	if (xhci_start(xhci)) {
		xhci_halt(xhci);
		return -ENODEV;
	}
	xhci->shared_hcd->state = HC_STATE_RUNNING;
E
Elric Fu 已提交
613
	xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
614 615 616 617

	if (xhci->quirks & XHCI_NEC_HOST)
		xhci_ring_cmd_db(xhci);

618 619
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"Finished xhci_run for USB3 roothub");
620 621 622
	return 0;
}

623 624 625 626 627 628 629 630 631 632 633 634 635 636 637
/*
 * Start the HC after it was halted.
 *
 * This function is called by the USB core when the HC driver is added.
 * Its opposite is xhci_stop().
 *
 * xhci_init() must be called once before this function can be called.
 * Reset the HC, enable device slot contexts, program DCBAAP, and
 * set command ring pointer and event ring pointer.
 *
 * Setup MSI-X vectors and enable interrupts.
 */
int xhci_run(struct usb_hcd *hcd)
{
	u32 temp;
638
	u64 temp_64;
639
	int ret;
640 641
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);

642 643 644
	/* Start the xHCI host controller running only after the USB 2.0 roothub
	 * is setup.
	 */
645

S
Sarah Sharp 已提交
646
	hcd->uses_new_polling = 1;
647 648
	if (!usb_hcd_is_primary_hcd(hcd))
		return xhci_run_finished(xhci);
S
Sarah Sharp 已提交
649

650
	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
D
Dong Nguyen 已提交
651

652
	ret = xhci_try_enable_msi(hcd);
D
Dong Nguyen 已提交
653
	if (ret)
654
		return ret;
655

656
	temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
657
	temp_64 &= ~ERST_PTR_MASK;
658 659
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"ERST deq = 64'h%0lx", (long unsigned int) temp_64);
660

661 662
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"// Set the interrupt modulation register");
663
	temp = readl(&xhci->ir_set->irq_control);
664
	temp &= ~ER_IRQ_INTERVAL_MASK;
665
	temp |= (xhci->imod_interval / 250) & ER_IRQ_INTERVAL_MASK;
666
	writel(temp, &xhci->ir_set->irq_control);
667 668

	/* Set the HCD state before we enable the irqs */
669
	temp = readl(&xhci->op_regs->command);
670
	temp |= (CMD_EIE);
671 672
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"// Enable interrupts, cmd = 0x%x.", temp);
673
	writel(temp, &xhci->op_regs->command);
674

675
	temp = readl(&xhci->ir_set->irq_pending);
676 677
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
678
			xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
679
	writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
680

681 682
	if (xhci->quirks & XHCI_NEC_HOST) {
		struct xhci_command *command;
683

684
		command = xhci_alloc_command(xhci, false, GFP_KERNEL);
685 686
		if (!command)
			return -ENOMEM;
687

S
Shu Wang 已提交
688
		ret = xhci_queue_vendor_command(xhci, command, 0, 0, 0,
689
				TRB_TYPE(TRB_NEC_GET_FW));
S
Shu Wang 已提交
690 691
		if (ret)
			xhci_free_command(xhci, command);
692
	}
693 694
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"Finished xhci_run for USB2 roothub");
695

696
	xhci_create_dbc_dev(xhci);
697

698 699
	xhci_debugfs_init(xhci);

700 701
	return 0;
}
702
EXPORT_SYMBOL_GPL(xhci_run);
703

704 705 706 707 708 709 710 711 712
/*
 * Stop xHCI driver.
 *
 * This function is called by the USB core when the HC driver is removed.
 * Its opposite is xhci_run().
 *
 * Disable device contexts, disable IRQs, and quiesce the HC.
 * Reset the HC, finish any completed transactions, and cleanup memory.
 */
713
static void xhci_stop(struct usb_hcd *hcd)
714 715 716 717
{
	u32 temp;
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);

718 719
	mutex_lock(&xhci->mutex);

720
	/* Only halt host and free memory after both hcds are removed */
721 722 723 724
	if (!usb_hcd_is_primary_hcd(hcd)) {
		mutex_unlock(&xhci->mutex);
		return;
	}
725

726
	xhci_remove_dbc_dev(xhci);
727

728 729 730 731
	spin_lock_irq(&xhci->lock);
	xhci->xhc_state |= XHCI_STATE_HALTED;
	xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
	xhci_halt(xhci);
732
	xhci_reset(xhci, XHCI_RESET_SHORT_USEC);
733 734
	spin_unlock_irq(&xhci->lock);

735 736
	xhci_cleanup_msix(xhci);

737 738
	/* Deleting Compliance Mode Recovery Timer */
	if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
739
			(!(xhci_all_ports_seen_u0(xhci)))) {
740
		del_timer_sync(&xhci->comp_mode_recovery_timer);
741 742
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"%s: compliance mode recovery timer deleted",
743 744
				__func__);
	}
745

A
Andiry Xu 已提交
746 747 748
	if (xhci->quirks & XHCI_AMD_PLL_FIX)
		usb_amd_dev_put();

749 750
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"// Disabling event ring interrupts");
751
	temp = readl(&xhci->op_regs->status);
752
	writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
753
	temp = readl(&xhci->ir_set->irq_pending);
754
	writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
755

756
	xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
757
	xhci_mem_cleanup(xhci);
758
	xhci_debugfs_exit(xhci);
759 760
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"xhci_stop completed - status = %x",
761
			readl(&xhci->op_regs->status));
762
	mutex_unlock(&xhci->mutex);
763 764 765 766 767 768 769 770
}

/*
 * Shutdown HC (not bus-specific)
 *
 * This is called when the machine is rebooting or halting.  We assume that the
 * machine will be powered off, and the HC's internal state will be reset.
 * Don't bother to free memory.
771 772
 *
 * This will only ever be called with the main usb_hcd (the USB3 roothub).
773
 */
774
void xhci_shutdown(struct usb_hcd *hcd)
775 776 777
{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);

778
	if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
779
		usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev));
780

781 782
	spin_lock_irq(&xhci->lock);
	xhci_halt(xhci);
783 784
	/* Workaround for spurious wakeups at shutdown with HSW */
	if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
785
		xhci_reset(xhci, XHCI_RESET_SHORT_USEC);
D
Dong Nguyen 已提交
786
	spin_unlock_irq(&xhci->lock);
787

788 789
	xhci_cleanup_msix(xhci);

790 791
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"xhci_shutdown completed - status = %x",
792
			readl(&xhci->op_regs->status));
793
}
794
EXPORT_SYMBOL_GPL(xhci_shutdown);
795

796
#ifdef CONFIG_PM
797 798
static void xhci_save_registers(struct xhci_hcd *xhci)
{
799 800
	xhci->s3.command = readl(&xhci->op_regs->command);
	xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
801
	xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
802 803
	xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
	xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
804 805
	xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
	xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
806 807
	xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
	xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
808 809 810 811
}

static void xhci_restore_registers(struct xhci_hcd *xhci)
{
812 813
	writel(xhci->s3.command, &xhci->op_regs->command);
	writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
814
	xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
815 816
	writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
	writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
817 818
	xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
	xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
819 820
	writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
	writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
821 822
}

823 824 825 826 827
static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
{
	u64	val_64;

	/* step 2: initialize command ring buffer */
828
	val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
829 830 831 832 833
	val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
		(xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
				      xhci->cmd_ring->dequeue) &
		 (u64) ~CMD_RING_RSVD_BITS) |
		xhci->cmd_ring->cycle_state;
834 835
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,
			"// Setting command ring address to 0x%llx",
836
			(long unsigned long) val_64);
837
	xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856
}

/*
 * The whole command ring must be cleared to zero when we suspend the host.
 *
 * The host doesn't save the command ring pointer in the suspend well, so we
 * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
 * aligned, because of the reserved bits in the command ring dequeue pointer
 * register.  Therefore, we can't just set the dequeue pointer back in the
 * middle of the ring (TRBs are 16-byte aligned).
 */
static void xhci_clear_command_ring(struct xhci_hcd *xhci)
{
	struct xhci_ring *ring;
	struct xhci_segment *seg;

	ring = xhci->cmd_ring;
	seg = ring->deq_seg;
	do {
857 858 859 860
		memset(seg->trbs, 0,
			sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
		seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
			cpu_to_le32(~TRB_CYCLE);
861 862 863 864 865 866 867 868 869
		seg = seg->next;
	} while (seg != ring->deq_seg);

	/* Reset the software enqueue and dequeue pointers */
	ring->deq_seg = ring->first_seg;
	ring->dequeue = ring->first_seg->trbs;
	ring->enq_seg = ring->deq_seg;
	ring->enqueue = ring->dequeue;

870
	ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886
	/*
	 * Ring is now zeroed, so the HW should look for change of ownership
	 * when the cycle bit is set to 1.
	 */
	ring->cycle_state = 1;

	/*
	 * Reset the hardware dequeue pointer.
	 * Yes, this will need to be re-written after resume, but we're paranoid
	 * and want to make sure the hardware doesn't access bogus memory
	 * because, say, the BIOS or an SMI started the host without changing
	 * the command ring pointers.
	 */
	xhci_set_cmd_ring_deq(xhci);
}

887 888 889 890 891 892 893 894 895 896 897 898
/*
 * Disable port wake bits if do_wakeup is not set.
 *
 * Also clear a possible internal port wake state left hanging for ports that
 * detected termination but never successfully enumerated (trained to 0U).
 * Internal wake causes immediate xHCI wake after suspend. PORT_CSC write done
 * at enumeration clears this wake, force one here as well for unconnected ports
 */

static void xhci_disable_hub_port_wake(struct xhci_hcd *xhci,
				       struct xhci_hub *rhub,
				       bool do_wakeup)
899 900
{
	unsigned long flags;
901
	u32 t1, t2, portsc;
902
	int i;
903 904 905

	spin_lock_irqsave(&xhci->lock, flags);

906 907 908 909 910 911 912 913 914 915 916 917
	for (i = 0; i < rhub->num_ports; i++) {
		portsc = readl(rhub->ports[i]->addr);
		t1 = xhci_port_state_to_neutral(portsc);
		t2 = t1;

		/* clear wake bits if do_wake is not set */
		if (!do_wakeup)
			t2 &= ~PORT_WAKE_BITS;

		/* Don't touch csc bit if connected or connect change is set */
		if (!(portsc & (PORT_CSC | PORT_CONNECT)))
			t2 |= PORT_CSC;
918

919
		if (t1 != t2) {
920 921 922
			writel(t2, rhub->ports[i]->addr);
			xhci_dbg(xhci, "config port %d-%d wake bits, portsc: 0x%x, write: 0x%x\n",
				 rhub->hcd->self.busnum, i + 1, portsc, t2);
923
		}
924 925 926 927
	}
	spin_unlock_irqrestore(&xhci->lock, flags);
}

928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962
static bool xhci_pending_portevent(struct xhci_hcd *xhci)
{
	struct xhci_port	**ports;
	int			port_index;
	u32			status;
	u32			portsc;

	status = readl(&xhci->op_regs->status);
	if (status & STS_EINT)
		return true;
	/*
	 * Checking STS_EINT is not enough as there is a lag between a change
	 * bit being set and the Port Status Change Event that it generated
	 * being written to the Event Ring. See note in xhci 1.1 section 4.19.2.
	 */

	port_index = xhci->usb2_rhub.num_ports;
	ports = xhci->usb2_rhub.ports;
	while (port_index--) {
		portsc = readl(ports[port_index]->addr);
		if (portsc & PORT_CHANGE_MASK ||
		    (portsc & PORT_PLS_MASK) == XDEV_RESUME)
			return true;
	}
	port_index = xhci->usb3_rhub.num_ports;
	ports = xhci->usb3_rhub.ports;
	while (port_index--) {
		portsc = readl(ports[port_index]->addr);
		if (portsc & PORT_CHANGE_MASK ||
		    (portsc & PORT_PLS_MASK) == XDEV_RESUME)
			return true;
	}
	return false;
}

963 964 965 966 967 968
/*
 * Stop HC (not bus-specific)
 *
 * This is called when the machine transition into S3/S4 mode.
 *
 */
969
int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
970 971
{
	int			rc = 0;
972
	unsigned int		delay = XHCI_MAX_HALT_USEC * 2;
973 974
	struct usb_hcd		*hcd = xhci_to_hcd(xhci);
	u32			command;
975
	u32			res;
976

977 978 979
	if (!hcd->state)
		return 0;

980 981 982 983
	if (hcd->state != HC_STATE_SUSPENDED ||
			xhci->shared_hcd->state != HC_STATE_SUSPENDED)
		return -EINVAL;

984
	/* Clear root port wake on bits if wakeup not allowed. */
985 986
	xhci_disable_hub_port_wake(xhci, &xhci->usb3_rhub, do_wakeup);
	xhci_disable_hub_port_wake(xhci, &xhci->usb2_rhub, do_wakeup);
987

988 989 990 991 992
	if (!HCD_HW_ACCESSIBLE(hcd))
		return 0;

	xhci_dbc_suspend(xhci);

993
	/* Don't poll the roothubs on bus suspend. */
994 995
	xhci_dbg(xhci, "%s: stopping usb%d port polling.\n",
		 __func__, hcd->self.busnum);
996 997
	clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
	del_timer_sync(&hcd->rh_timer);
998 999
	clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
	del_timer_sync(&xhci->shared_hcd->rh_timer);
1000

1001 1002 1003
	if (xhci->quirks & XHCI_SUSPEND_DELAY)
		usleep_range(1000, 1500);

1004 1005
	spin_lock_irq(&xhci->lock);
	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1006
	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
1007 1008 1009 1010
	/* step 1: stop endpoint */
	/* skipped assuming that port suspend has done */

	/* step 2: clear Run/Stop bit */
1011
	command = readl(&xhci->op_regs->command);
1012
	command &= ~CMD_RUN;
1013
	writel(command, &xhci->op_regs->command);
1014 1015 1016 1017

	/* Some chips from Fresco Logic need an extraordinary delay */
	delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;

1018
	if (xhci_handshake(&xhci->op_regs->status,
1019
		      STS_HALT, STS_HALT, delay)) {
1020 1021 1022 1023
		xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
		spin_unlock_irq(&xhci->lock);
		return -ETIMEDOUT;
	}
1024
	xhci_clear_command_ring(xhci);
1025 1026 1027 1028 1029

	/* step 3: save registers */
	xhci_save_registers(xhci);

	/* step 4: set CSS flag */
1030
	command = readl(&xhci->op_regs->command);
1031
	command |= CMD_CSS;
1032
	writel(command, &xhci->op_regs->command);
1033
	xhci->broken_suspend = 0;
1034
	if (xhci_handshake(&xhci->op_regs->status,
1035
				STS_SAVE, 0, 20 * 1000)) {
1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054
	/*
	 * AMD SNPS xHC 3.0 occasionally does not clear the
	 * SSS bit of USBSTS and when driver tries to poll
	 * to see if the xHC clears BIT(8) which never happens
	 * and driver assumes that controller is not responding
	 * and times out. To workaround this, its good to check
	 * if SRE and HCE bits are not set (as per xhci
	 * Section 5.4.2) and bypass the timeout.
	 */
		res = readl(&xhci->op_regs->status);
		if ((xhci->quirks & XHCI_SNPS_BROKEN_SUSPEND) &&
		    (((res & STS_SRE) == 0) &&
				((res & STS_HCE) == 0))) {
			xhci->broken_suspend = 1;
		} else {
			xhci_warn(xhci, "WARN: xHC save state timeout\n");
			spin_unlock_irq(&xhci->lock);
			return -ETIMEDOUT;
		}
1055 1056 1057
	}
	spin_unlock_irq(&xhci->lock);

1058 1059 1060 1061 1062 1063 1064
	/*
	 * Deleting Compliance Mode Recovery Timer because the xHCI Host
	 * is about to be suspended.
	 */
	if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
			(!(xhci_all_ports_seen_u0(xhci)))) {
		del_timer_sync(&xhci->comp_mode_recovery_timer);
1065 1066
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"%s: compliance mode recovery timer deleted",
1067
				__func__);
1068 1069
	}

1070 1071
	/* step 5: remove core well power */
	/* synchronize irq when using MSI-X */
1072
	xhci_msix_sync_irqs(xhci);
1073

1074 1075
	return rc;
}
1076
EXPORT_SYMBOL_GPL(xhci_suspend);
1077 1078 1079 1080 1081 1082 1083 1084 1085

/*
 * start xHC (not bus-specific)
 *
 * This is called when the machine transition from S3/S4 mode.
 *
 */
int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
{
1086
	u32			command, temp = 0;
1087
	struct usb_hcd		*hcd = xhci_to_hcd(xhci);
1088
	struct usb_hcd		*secondary_hcd;
1089
	int			retval = 0;
1090
	bool			comp_timer_running = false;
1091
	bool			pending_portevent = false;
1092
	bool			reinit_xhc = false;
1093

1094 1095 1096
	if (!hcd->state)
		return 0;

1097
	/* Wait a bit if either of the roothubs need to settle from the
L
Lucas De Marchi 已提交
1098
	 * transition into bus suspend.
1099
	 */
1100 1101 1102

	if (time_before(jiffies, xhci->usb2_rhub.bus_state.next_statechange) ||
	    time_before(jiffies, xhci->usb3_rhub.bus_state.next_statechange))
1103 1104
		msleep(100);

1105 1106 1107
	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
	set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);

1108 1109
	spin_lock_irq(&xhci->lock);

1110 1111 1112 1113
	if (hibernated || xhci->quirks & XHCI_RESET_ON_RESUME || xhci->broken_suspend)
		reinit_xhc = true;

	if (!reinit_xhc) {
1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125
		/*
		 * Some controllers might lose power during suspend, so wait
		 * for controller not ready bit to clear, just as in xHC init.
		 */
		retval = xhci_handshake(&xhci->op_regs->status,
					STS_CNR, 0, 10 * 1000 * 1000);
		if (retval) {
			xhci_warn(xhci, "Controller not ready at resume %d\n",
				  retval);
			spin_unlock_irq(&xhci->lock);
			return retval;
		}
1126 1127 1128
		/* step 1: restore register */
		xhci_restore_registers(xhci);
		/* step 2: initialize command ring buffer */
1129
		xhci_set_cmd_ring_deq(xhci);
1130 1131
		/* step 3: restore state and start state*/
		/* step 3: set CRS flag */
1132
		command = readl(&xhci->op_regs->command);
1133
		command |= CMD_CRS;
1134
		writel(command, &xhci->op_regs->command);
1135 1136 1137 1138 1139
		/*
		 * Some controllers take up to 55+ ms to complete the controller
		 * restore so setting the timeout to 100ms. Xhci specification
		 * doesn't mention any timeout value.
		 */
1140
		if (xhci_handshake(&xhci->op_regs->status,
1141
			      STS_RESTORE, 0, 100 * 1000)) {
1142
			xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1143 1144 1145 1146 1147
			spin_unlock_irq(&xhci->lock);
			return -ETIMEDOUT;
		}
	}

1148
	temp = readl(&xhci->op_regs->status);
1149

1150 1151 1152 1153 1154
	/* re-initialize the HC on Restore Error, or Host Controller Error */
	if (temp & (STS_SRE | STS_HCE)) {
		reinit_xhc = true;
		xhci_warn(xhci, "xHC error in resume, USBSTS 0x%x, Reinit\n", temp);
	}
1155

1156
	if (reinit_xhc) {
1157 1158 1159
		if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
				!(xhci_all_ports_seen_u0(xhci))) {
			del_timer_sync(&xhci->comp_mode_recovery_timer);
1160 1161
			xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"Compliance Mode Recovery Timer deleted!");
1162 1163
		}

1164 1165 1166
		/* Let the USB core know _both_ roothubs lost power. */
		usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
		usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1167 1168 1169

		xhci_dbg(xhci, "Stop HCD\n");
		xhci_halt(xhci);
1170
		xhci_zero_64b_regs(xhci);
1171
		retval = xhci_reset(xhci, XHCI_RESET_LONG_USEC);
1172
		spin_unlock_irq(&xhci->lock);
1173 1174
		if (retval)
			return retval;
1175
		xhci_cleanup_msix(xhci);
1176 1177

		xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1178
		temp = readl(&xhci->op_regs->status);
1179
		writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
1180
		temp = readl(&xhci->ir_set->irq_pending);
1181
		writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1182 1183 1184

		xhci_dbg(xhci, "cleaning up memory\n");
		xhci_mem_cleanup(xhci);
1185
		xhci_debugfs_exit(xhci);
1186
		xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1187
			    readl(&xhci->op_regs->status));
1188

1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199
		/* USB core calls the PCI reinit and start functions twice:
		 * first with the primary HCD, and then with the secondary HCD.
		 * If we don't do the same, the host will never be started.
		 */
		if (!usb_hcd_is_primary_hcd(hcd))
			secondary_hcd = hcd;
		else
			secondary_hcd = xhci->shared_hcd;

		xhci_dbg(xhci, "Initialize the xhci_hcd\n");
		retval = xhci_init(hcd->primary_hcd);
1200 1201
		if (retval)
			return retval;
1202 1203
		comp_timer_running = true;

1204 1205
		xhci_dbg(xhci, "Start the primary HCD\n");
		retval = xhci_run(hcd->primary_hcd);
1206
		if (!retval) {
1207 1208
			xhci_dbg(xhci, "Start the secondary HCD\n");
			retval = xhci_run(secondary_hcd);
1209
		}
1210
		hcd->state = HC_STATE_SUSPENDED;
1211
		xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1212
		goto done;
1213 1214 1215
	}

	/* step 4: set Run/Stop bit */
1216
	command = readl(&xhci->op_regs->command);
1217
	command |= CMD_RUN;
1218
	writel(command, &xhci->op_regs->command);
1219
	xhci_handshake(&xhci->op_regs->status, STS_HALT,
1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231
		  0, 250 * 1000);

	/* step 5: walk topology and initialize portsc,
	 * portpmsc and portli
	 */
	/* this is done in bus_resume */

	/* step 6: restart each of the previously
	 * Running endpoints by ringing their doorbells
	 */

	spin_unlock_irq(&xhci->lock);
1232

1233 1234
	xhci_dbc_resume(xhci);

1235 1236
 done:
	if (retval == 0) {
1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248
		/*
		 * Resume roothubs only if there are pending events.
		 * USB 3 devices resend U3 LFPS wake after a 100ms delay if
		 * the first wake signalling failed, give it that chance.
		 */
		pending_portevent = xhci_pending_portevent(xhci);
		if (!pending_portevent) {
			msleep(120);
			pending_portevent = xhci_pending_portevent(xhci);
		}

		if (pending_portevent) {
1249
			usb_hcd_resume_root_hub(xhci->shared_hcd);
M
Mathias Nyman 已提交
1250
			usb_hcd_resume_root_hub(hcd);
1251
		}
1252
	}
1253 1254 1255 1256 1257 1258
	/*
	 * If system is subject to the Quirk, Compliance Mode Timer needs to
	 * be re-initialized Always after a system resume. Ports are subject
	 * to suffer the Compliance Mode issue again. It doesn't matter if
	 * ports have entered previously to U0 before system's suspension.
	 */
1259
	if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1260 1261
		compliance_mode_recovery_timer_init(xhci);

1262 1263 1264
	if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL)
		usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller));

1265
	/* Re-enable port polling. */
1266 1267
	xhci_dbg(xhci, "%s: starting usb%d port polling.\n",
		 __func__, hcd->self.busnum);
1268 1269
	set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
	usb_hcd_poll_rh_status(xhci->shared_hcd);
M
Mathias Nyman 已提交
1270 1271
	set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
	usb_hcd_poll_rh_status(hcd);
1272

1273
	return retval;
1274
}
1275
EXPORT_SYMBOL_GPL(xhci_resume);
1276 1277
#endif	/* CONFIG_PM */

1278 1279
/*-------------------------------------------------------------------------*/

1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370
static int xhci_map_temp_buffer(struct usb_hcd *hcd, struct urb *urb)
{
	void *temp;
	int ret = 0;
	unsigned int buf_len;
	enum dma_data_direction dir;

	dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
	buf_len = urb->transfer_buffer_length;

	temp = kzalloc_node(buf_len, GFP_ATOMIC,
			    dev_to_node(hcd->self.sysdev));

	if (usb_urb_dir_out(urb))
		sg_pcopy_to_buffer(urb->sg, urb->num_sgs,
				   temp, buf_len, 0);

	urb->transfer_buffer = temp;
	urb->transfer_dma = dma_map_single(hcd->self.sysdev,
					   urb->transfer_buffer,
					   urb->transfer_buffer_length,
					   dir);

	if (dma_mapping_error(hcd->self.sysdev,
			      urb->transfer_dma)) {
		ret = -EAGAIN;
		kfree(temp);
	} else {
		urb->transfer_flags |= URB_DMA_MAP_SINGLE;
	}

	return ret;
}

static bool xhci_urb_temp_buffer_required(struct usb_hcd *hcd,
					  struct urb *urb)
{
	bool ret = false;
	unsigned int i;
	unsigned int len = 0;
	unsigned int trb_size;
	unsigned int max_pkt;
	struct scatterlist *sg;
	struct scatterlist *tail_sg;

	tail_sg = urb->sg;
	max_pkt = usb_endpoint_maxp(&urb->ep->desc);

	if (!urb->num_sgs)
		return ret;

	if (urb->dev->speed >= USB_SPEED_SUPER)
		trb_size = TRB_CACHE_SIZE_SS;
	else
		trb_size = TRB_CACHE_SIZE_HS;

	if (urb->transfer_buffer_length != 0 &&
	    !(urb->transfer_flags & URB_NO_TRANSFER_DMA_MAP)) {
		for_each_sg(urb->sg, sg, urb->num_sgs, i) {
			len = len + sg->length;
			if (i > trb_size - 2) {
				len = len - tail_sg->length;
				if (len < max_pkt) {
					ret = true;
					break;
				}

				tail_sg = sg_next(tail_sg);
			}
		}
	}
	return ret;
}

static void xhci_unmap_temp_buf(struct usb_hcd *hcd, struct urb *urb)
{
	unsigned int len;
	unsigned int buf_len;
	enum dma_data_direction dir;

	dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;

	buf_len = urb->transfer_buffer_length;

	if (IS_ENABLED(CONFIG_HAS_DMA) &&
	    (urb->transfer_flags & URB_DMA_MAP_SINGLE))
		dma_unmap_single(hcd->self.sysdev,
				 urb->transfer_dma,
				 urb->transfer_buffer_length,
				 dir);

1371
	if (usb_urb_dir_in(urb)) {
1372 1373 1374 1375
		len = sg_pcopy_from_buffer(urb->sg, urb->num_sgs,
					   urb->transfer_buffer,
					   buf_len,
					   0);
1376 1377 1378 1379 1380 1381
		if (len != buf_len) {
			xhci_dbg(hcd_to_xhci(hcd),
				 "Copy from tmp buf to urb sg list failed\n");
			urb->actual_length = len;
		}
	}
1382 1383 1384 1385 1386
	urb->transfer_flags &= ~URB_DMA_MAP_SINGLE;
	kfree(urb->transfer_buffer);
	urb->transfer_buffer = NULL;
}

1387 1388 1389 1390 1391 1392 1393 1394 1395
/*
 * Bypass the DMA mapping if URB is suitable for Immediate Transfer (IDT),
 * we'll copy the actual data into the TRB address register. This is limited to
 * transfers up to 8 bytes on output endpoints of any kind with wMaxPacketSize
 * >= 8 bytes. If suitable for IDT only one Transfer TRB per TD is allowed.
 */
static int xhci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
				gfp_t mem_flags)
{
1396 1397 1398 1399
	struct xhci_hcd *xhci;

	xhci = hcd_to_xhci(hcd);

1400 1401 1402
	if (xhci_urb_suitable_for_idt(urb))
		return 0;

1403 1404 1405 1406
	if (xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) {
		if (xhci_urb_temp_buffer_required(hcd, urb))
			return xhci_map_temp_buffer(hcd, urb);
	}
1407 1408 1409
	return usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
}

1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426
static void xhci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
{
	struct xhci_hcd *xhci;
	bool unmap_temp_buf = false;

	xhci = hcd_to_xhci(hcd);

	if (urb->num_sgs && (urb->transfer_flags & URB_DMA_MAP_SINGLE))
		unmap_temp_buf = true;

	if ((xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) && unmap_temp_buf)
		xhci_unmap_temp_buf(hcd, urb);
	else
		usb_hcd_unmap_urb_for_dma(hcd, urb);
}

/**
1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445
 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
 * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
 * value to right shift 1 for the bitmask.
 *
 * Index  = (epnum * 2) + direction - 1,
 * where direction = 0 for OUT, 1 for IN.
 * For control endpoints, the IN index is used (OUT index is unused), so
 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
 */
unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
{
	unsigned int index;
	if (usb_endpoint_xfer_control(desc))
		index = (unsigned int) (usb_endpoint_num(desc)*2);
	else
		index = (unsigned int) (usb_endpoint_num(desc)*2) +
			(usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
	return index;
}
1446
EXPORT_SYMBOL_GPL(xhci_get_endpoint_index);
1447

1448 1449 1450 1451 1452 1453 1454 1455 1456 1457
/* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
 * address from the XHCI endpoint index.
 */
unsigned int xhci_get_endpoint_address(unsigned int ep_index)
{
	unsigned int number = DIV_ROUND_UP(ep_index, 2);
	unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
	return direction | number;
}

1458 1459 1460 1461
/* Find the flag for this endpoint (for use in the control context).  Use the
 * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
 * bit 1, etc.
 */
1462
static unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1463 1464 1465 1466 1467 1468 1469 1470 1471 1472
{
	return 1 << (xhci_get_endpoint_index(desc) + 1);
}

/* Compute the last valid endpoint context index.  Basically, this is the
 * endpoint index plus one.  For slot contexts with more than valid endpoint,
 * we find the most significant bit set in the added contexts flags.
 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
 */
1473
unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1474 1475 1476 1477
{
	return fls(added_ctxs) - 1;
}

1478 1479 1480
/* Returns 1 if the arguments are OK;
 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
 */
1481
static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1482 1483 1484 1485 1486
		struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
		const char *func) {
	struct xhci_hcd	*xhci;
	struct xhci_virt_device	*virt_dev;

1487
	if (!hcd || (check_ep && !ep) || !udev) {
1488
		pr_debug("xHCI %s called with invalid args\n", func);
1489 1490 1491
		return -EINVAL;
	}
	if (!udev->parent) {
1492
		pr_debug("xHCI %s called for root hub\n", func);
1493 1494
		return 0;
	}
1495

1496
	xhci = hcd_to_xhci(hcd);
1497
	if (check_virt_dev) {
1498
		if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1499 1500
			xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
					func);
1501 1502 1503 1504 1505
			return -EINVAL;
		}

		virt_dev = xhci->devs[udev->slot_id];
		if (virt_dev->udev != udev) {
1506
			xhci_dbg(xhci, "xHCI %s called with udev and "
1507 1508 1509
					  "virt_dev does not match\n", func);
			return -EINVAL;
		}
1510
	}
1511

1512 1513 1514
	if (xhci->xhc_state & XHCI_STATE_HALTED)
		return -ENODEV;

1515 1516 1517
	return 1;
}

1518
static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1519 1520
		struct usb_device *udev, struct xhci_command *command,
		bool ctx_change, bool must_succeed);
1521 1522 1523 1524 1525 1526 1527 1528

/*
 * Full speed devices may have a max packet size greater than 8 bytes, but the
 * USB core doesn't know that until it reads the first 8 bytes of the
 * descriptor.  If the usb_device's max packet size changes after that point,
 * we need to issue an evaluate context command and wait on it.
 */
static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1529
		unsigned int ep_index, struct urb *urb, gfp_t mem_flags)
1530 1531 1532 1533
{
	struct xhci_container_ctx *out_ctx;
	struct xhci_input_control_ctx *ctrl_ctx;
	struct xhci_ep_ctx *ep_ctx;
1534
	struct xhci_command *command;
1535 1536 1537 1538 1539 1540
	int max_packet_size;
	int hw_max_packet_size;
	int ret = 0;

	out_ctx = xhci->devs[slot_id]->out_ctx;
	ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
M
Matt Evans 已提交
1541
	hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1542
	max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1543
	if (hw_max_packet_size != max_packet_size) {
1544 1545 1546 1547
		xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
				"Max Packet Size for ep 0 changed.");
		xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
				"Max packet size in usb_device = %d",
1548
				max_packet_size);
1549 1550
		xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
				"Max packet size in xHCI HW = %d",
1551
				hw_max_packet_size);
1552 1553
		xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
				"Issuing evaluate context command.");
1554

1555 1556 1557 1558
		/* Set up the input context flags for the command */
		/* FIXME: This won't work if a non-default control endpoint
		 * changes max packet sizes.
		 */
1559

1560
		command = xhci_alloc_command(xhci, true, mem_flags);
1561 1562 1563 1564
		if (!command)
			return -ENOMEM;

		command->in_ctx = xhci->devs[slot_id]->in_ctx;
1565
		ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1566 1567 1568
		if (!ctrl_ctx) {
			xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
					__func__);
1569 1570
			ret = -ENOMEM;
			goto command_cleanup;
1571
		}
1572
		/* Set up the modified control endpoint 0 */
1573 1574
		xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
				xhci->devs[slot_id]->out_ctx, ep_index);
1575

1576
		ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1577
		ep_ctx->ep_info &= cpu_to_le32(~EP_STATE_MASK);/* must clear */
M
Matt Evans 已提交
1578 1579
		ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
		ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1580

M
Matt Evans 已提交
1581
		ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1582 1583
		ctrl_ctx->drop_flags = 0;

1584
		ret = xhci_configure_endpoint(xhci, urb->dev, command,
1585
				true, false);
1586 1587 1588 1589

		/* Clean up the input context for later use by bandwidth
		 * functions.
		 */
M
Matt Evans 已提交
1590
		ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1591 1592 1593
command_cleanup:
		kfree(command->completion);
		kfree(command);
1594 1595 1596 1597
	}
	return ret;
}

1598 1599 1600 1601
/*
 * non-error returns are a promise to giveback() the urb later
 * we drop ownership so next owner (or urb unlink) can get it
 */
1602
static int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1603 1604 1605 1606
{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	unsigned long flags;
	int ret = 0;
1607 1608
	unsigned int slot_id, ep_index;
	unsigned int *ep_state;
1609
	struct urb_priv	*urb_priv;
1610
	int num_tds;
1611

1612
	if (!urb)
1613
		return -EINVAL;
1614 1615 1616 1617
	ret = xhci_check_args(hcd, urb->dev, urb->ep,
					true, true, __func__);
	if (ret <= 0)
		return ret ? ret : -EINVAL;
1618 1619 1620

	slot_id = urb->dev->slot_id;
	ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1621
	ep_state = &xhci->devs[slot_id]->eps[ep_index].ep_state;
1622

1623
	if (!HCD_HW_ACCESSIBLE(hcd))
M
Mathias Nyman 已提交
1624
		return -ESHUTDOWN;
1625

1626 1627 1628 1629
	if (xhci->devs[slot_id]->flags & VDEV_PORT_ERROR) {
		xhci_dbg(xhci, "Can't queue urb, port error, link inactive\n");
		return -ENODEV;
	}
1630 1631

	if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1632
		num_tds = urb->number_of_packets;
1633 1634 1635 1636
	else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
	    urb->transfer_buffer_length > 0 &&
	    urb->transfer_flags & URB_ZERO_PACKET &&
	    !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1637
		num_tds = 2;
1638
	else
1639
		num_tds = 1;
1640

1641
	urb_priv = kzalloc(struct_size(urb_priv, td, num_tds), mem_flags);
1642 1643 1644
	if (!urb_priv)
		return -ENOMEM;

1645 1646
	urb_priv->num_tds = num_tds;
	urb_priv->num_tds_done = 0;
1647 1648
	urb->hcpriv = urb_priv;

1649 1650
	trace_xhci_urb_enqueue(urb);

1651 1652 1653 1654 1655 1656
	if (usb_endpoint_xfer_control(&urb->ep->desc)) {
		/* Check to see if the max packet size for the default control
		 * endpoint changed during FS device enumeration
		 */
		if (urb->dev->speed == USB_SPEED_FULL) {
			ret = xhci_check_maxpacket(xhci, slot_id,
1657
					ep_index, urb, mem_flags);
1658
			if (ret < 0) {
1659
				xhci_urb_free_priv(urb_priv);
1660
				urb->hcpriv = NULL;
1661
				return ret;
1662
			}
1663
		}
M
Mathias Nyman 已提交
1664
	}
1665

M
Mathias Nyman 已提交
1666 1667 1668 1669 1670 1671 1672 1673
	spin_lock_irqsave(&xhci->lock, flags);

	if (xhci->xhc_state & XHCI_STATE_DYING) {
		xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
			 urb->ep->desc.bEndpointAddress, urb);
		ret = -ESHUTDOWN;
		goto free_priv;
	}
1674 1675 1676 1677 1678 1679
	if (*ep_state & (EP_GETTING_STREAMS | EP_GETTING_NO_STREAMS)) {
		xhci_warn(xhci, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
			  *ep_state);
		ret = -EINVAL;
		goto free_priv;
	}
1680 1681 1682 1683 1684
	if (*ep_state & EP_SOFT_CLEAR_TOGGLE) {
		xhci_warn(xhci, "Can't enqueue URB while manually clearing toggle\n");
		ret = -EINVAL;
		goto free_priv;
	}
M
Mathias Nyman 已提交
1685 1686 1687 1688

	switch (usb_endpoint_type(&urb->ep->desc)) {

	case USB_ENDPOINT_XFER_CONTROL:
1689
		ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
M
Mathias Nyman 已提交
1690 1691 1692 1693 1694 1695 1696
					 slot_id, ep_index);
		break;
	case USB_ENDPOINT_XFER_BULK:
		ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
					 slot_id, ep_index);
		break;
	case USB_ENDPOINT_XFER_INT:
1697 1698
		ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
				slot_id, ep_index);
M
Mathias Nyman 已提交
1699 1700
		break;
	case USB_ENDPOINT_XFER_ISOC:
A
Andiry Xu 已提交
1701 1702
		ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
				slot_id, ep_index);
1703
	}
M
Mathias Nyman 已提交
1704 1705

	if (ret) {
1706
free_priv:
M
Mathias Nyman 已提交
1707 1708 1709
		xhci_urb_free_priv(urb_priv);
		urb->hcpriv = NULL;
	}
1710
	spin_unlock_irqrestore(&xhci->lock, flags);
1711
	return ret;
1712 1713
}

1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743
/*
 * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
 * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
 * should pick up where it left off in the TD, unless a Set Transfer Ring
 * Dequeue Pointer is issued.
 *
 * The TRBs that make up the buffers for the canceled URB will be "removed" from
 * the ring.  Since the ring is a contiguous structure, they can't be physically
 * removed.  Instead, there are two options:
 *
 *  1) If the HC is in the middle of processing the URB to be canceled, we
 *     simply move the ring's dequeue pointer past those TRBs using the Set
 *     Transfer Ring Dequeue Pointer command.  This will be the common case,
 *     when drivers timeout on the last submitted URB and attempt to cancel.
 *
 *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
 *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
 *     HC will need to invalidate the any TRBs it has cached after the stop
 *     endpoint command, as noted in the xHCI 0.95 errata.
 *
 *  3) The TD may have completed by the time the Stop Endpoint Command
 *     completes, so software needs to handle that case too.
 *
 * This function should protect against the TD enqueueing code ringing the
 * doorbell while this code is waiting for a Stop Endpoint command to complete.
 * It also needs to account for multiple cancellations on happening at the same
 * time for the same endpoint.
 *
 * Note that this function can be called in any context, or so says
 * usb_hcd_unlink_urb()
1744
 */
1745
static int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1746
{
1747
	unsigned long flags;
1748
	int ret, i;
1749
	u32 temp;
1750
	struct xhci_hcd *xhci;
1751
	struct urb_priv	*urb_priv;
1752 1753 1754
	struct xhci_td *td;
	unsigned int ep_index;
	struct xhci_ring *ep_ring;
1755
	struct xhci_virt_ep *ep;
1756
	struct xhci_command *command;
1757
	struct xhci_virt_device *vdev;
1758 1759 1760

	xhci = hcd_to_xhci(hcd);
	spin_lock_irqsave(&xhci->lock, flags);
1761 1762 1763

	trace_xhci_urb_dequeue(urb);

1764 1765
	/* Make sure the URB hasn't completed or been unlinked already */
	ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1766
	if (ret)
1767
		goto done;
1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780

	/* give back URB now if we can't queue it for cancel */
	vdev = xhci->devs[urb->dev->slot_id];
	urb_priv = urb->hcpriv;
	if (!vdev || !urb_priv)
		goto err_giveback;

	ep_index = xhci_get_endpoint_index(&urb->ep->desc);
	ep = &vdev->eps[ep_index];
	ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
	if (!ep || !ep_ring)
		goto err_giveback;

1781
	/* If xHC is dead take it down and return ALL URBs in xhci_hc_died() */
1782
	temp = readl(&xhci->op_regs->status);
1783 1784 1785 1786 1787
	if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) {
		xhci_hc_died(xhci);
		goto done;
	}

1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802
	/*
	 * check ring is not re-allocated since URB was enqueued. If it is, then
	 * make sure none of the ring related pointers in this URB private data
	 * are touched, such as td_list, otherwise we overwrite freed data
	 */
	if (!td_on_ring(&urb_priv->td[0], ep_ring)) {
		xhci_err(xhci, "Canceled URB td not found on endpoint ring");
		for (i = urb_priv->num_tds_done; i < urb_priv->num_tds; i++) {
			td = &urb_priv->td[i];
			if (!list_empty(&td->cancelled_td_list))
				list_del_init(&td->cancelled_td_list);
		}
		goto err_giveback;
	}

1803
	if (xhci->xhc_state & XHCI_STATE_HALTED) {
1804
		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1805
				"HC halted, freeing TD manually.");
1806
		for (i = urb_priv->num_tds_done;
1807
		     i < urb_priv->num_tds;
1808
		     i++) {
1809
			td = &urb_priv->td[i];
1810 1811 1812 1813 1814
			if (!list_empty(&td->td_list))
				list_del_init(&td->td_list);
			if (!list_empty(&td->cancelled_td_list))
				list_del_init(&td->cancelled_td_list);
		}
1815
		goto err_giveback;
1816
	}
1817

1818 1819
	i = urb_priv->num_tds_done;
	if (i < urb_priv->num_tds)
1820 1821 1822
		xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
				"Cancel URB %p, dev %s, ep 0x%x, "
				"starting at offset 0x%llx",
1823 1824 1825
				urb, urb->dev->devpath,
				urb->ep->desc.bEndpointAddress,
				(unsigned long long) xhci_trb_virt_to_dma(
1826 1827
					urb_priv->td[i].start_seg,
					urb_priv->td[i].first_trb));
1828

1829
	for (; i < urb_priv->num_tds; i++) {
1830
		td = &urb_priv->td[i];
1831 1832 1833 1834 1835 1836
		/* TD can already be on cancelled list if ep halted on it */
		if (list_empty(&td->cancelled_td_list)) {
			td->cancel_status = TD_DIRTY;
			list_add_tail(&td->cancelled_td_list,
				      &ep->cancelled_td_list);
		}
1837 1838
	}

1839 1840 1841
	/* Queue a stop endpoint command, but only if this is
	 * the first cancellation to be handled.
	 */
1842
	if (!(ep->ep_state & EP_STOP_CMD_PENDING)) {
1843
		command = xhci_alloc_command(xhci, false, GFP_ATOMIC);
1844 1845 1846 1847
		if (!command) {
			ret = -ENOMEM;
			goto done;
		}
1848
		ep->ep_state |= EP_STOP_CMD_PENDING;
1849 1850 1851
		ep->stop_cmd_timer.expires = jiffies +
			XHCI_STOP_EP_CMD_TIMEOUT * HZ;
		add_timer(&ep->stop_cmd_timer);
1852 1853
		xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
					 ep_index, 0);
1854
		xhci_ring_cmd_db(xhci);
1855 1856 1857 1858
	}
done:
	spin_unlock_irqrestore(&xhci->lock, flags);
	return ret;
1859 1860 1861 1862 1863 1864 1865 1866

err_giveback:
	if (urb_priv)
		xhci_urb_free_priv(urb_priv);
	usb_hcd_unlink_urb_from_ep(hcd, urb);
	spin_unlock_irqrestore(&xhci->lock, flags);
	usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
	return ret;
1867 1868
}

1869 1870 1871 1872 1873 1874 1875 1876
/* Drop an endpoint from a new bandwidth configuration for this device.
 * Only one call to this function is allowed per endpoint before
 * check_bandwidth() or reset_bandwidth() must be called.
 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
 * add the endpoint to the schedule with possibly new parameters denoted by a
 * different endpoint descriptor in usb_host_endpoint.
 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
 * not allowed.
1877 1878 1879 1880
 *
 * The USB core will not allow URBs to be queued to an endpoint that is being
 * disabled, so there's no need for mutual exclusion to protect
 * the xhci->devs[slot_id] structure.
1881
 */
1882 1883
int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
		       struct usb_host_endpoint *ep)
1884 1885
{
	struct xhci_hcd *xhci;
1886 1887
	struct xhci_container_ctx *in_ctx, *out_ctx;
	struct xhci_input_control_ctx *ctrl_ctx;
1888 1889 1890
	unsigned int ep_index;
	struct xhci_ep_ctx *ep_ctx;
	u32 drop_flag;
1891
	u32 new_add_flags, new_drop_flags;
1892 1893
	int ret;

1894
	ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1895 1896 1897
	if (ret <= 0)
		return ret;
	xhci = hcd_to_xhci(hcd);
1898 1899
	if (xhci->xhc_state & XHCI_STATE_DYING)
		return -ENODEV;
1900

1901
	xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1902 1903 1904 1905 1906 1907 1908 1909
	drop_flag = xhci_get_endpoint_flag(&ep->desc);
	if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
		xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
				__func__, drop_flag);
		return 0;
	}

	in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1910
	out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1911
	ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1912 1913 1914 1915 1916 1917
	if (!ctrl_ctx) {
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		return 0;
	}

1918
	ep_index = xhci_get_endpoint_index(&ep->desc);
1919
	ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1920 1921 1922
	/* If the HC already knows the endpoint is disabled,
	 * or the HCD has noted it is disabled, ignore this request
	 */
1923
	if ((GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) ||
M
Matt Evans 已提交
1924 1925
	    le32_to_cpu(ctrl_ctx->drop_flags) &
	    xhci_get_endpoint_flag(&ep->desc)) {
1926 1927 1928 1929
		/* Do not warn when called after a usb_device_reset */
		if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
			xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
				  __func__, ep);
1930 1931 1932
		return 0;
	}

M
Matt Evans 已提交
1933 1934
	ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
	new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1935

M
Matt Evans 已提交
1936 1937
	ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
	new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1938

1939 1940
	xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index);

1941 1942
	xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);

1943
	xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1944 1945 1946
			(unsigned int) ep->desc.bEndpointAddress,
			udev->slot_id,
			(unsigned int) new_drop_flags,
1947
			(unsigned int) new_add_flags);
1948 1949
	return 0;
}
1950
EXPORT_SYMBOL_GPL(xhci_drop_endpoint);
1951 1952 1953 1954 1955 1956 1957 1958 1959

/* Add an endpoint to a new possible bandwidth configuration for this device.
 * Only one call to this function is allowed per endpoint before
 * check_bandwidth() or reset_bandwidth() must be called.
 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
 * add the endpoint to the schedule with possibly new parameters denoted by a
 * different endpoint descriptor in usb_host_endpoint.
 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
 * not allowed.
1960 1961 1962 1963
 *
 * The USB core will not allow URBs to be queued to an endpoint until the
 * configuration or alt setting is installed in the device, so there's no need
 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1964
 */
1965 1966
int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
		      struct usb_host_endpoint *ep)
1967 1968
{
	struct xhci_hcd *xhci;
1969
	struct xhci_container_ctx *in_ctx;
1970
	unsigned int ep_index;
1971
	struct xhci_input_control_ctx *ctrl_ctx;
1972
	struct xhci_ep_ctx *ep_ctx;
1973
	u32 added_ctxs;
1974
	u32 new_add_flags, new_drop_flags;
1975
	struct xhci_virt_device *virt_dev;
1976 1977
	int ret = 0;

1978
	ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1979 1980 1981
	if (ret <= 0) {
		/* So we won't queue a reset ep command for a root hub */
		ep->hcpriv = NULL;
1982
		return ret;
1983
	}
1984
	xhci = hcd_to_xhci(hcd);
1985 1986
	if (xhci->xhc_state & XHCI_STATE_DYING)
		return -ENODEV;
1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998

	added_ctxs = xhci_get_endpoint_flag(&ep->desc);
	if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
		/* FIXME when we have to issue an evaluate endpoint command to
		 * deal with ep0 max packet size changing once we get the
		 * descriptors
		 */
		xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
				__func__, added_ctxs);
		return 0;
	}

1999 2000
	virt_dev = xhci->devs[udev->slot_id];
	in_ctx = virt_dev->in_ctx;
2001
	ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2002 2003 2004 2005 2006
	if (!ctrl_ctx) {
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		return 0;
	}
2007

2008
	ep_index = xhci_get_endpoint_index(&ep->desc);
2009 2010 2011 2012
	/* If this endpoint is already in use, and the upper layers are trying
	 * to add it again without dropping it, reject the addition.
	 */
	if (virt_dev->eps[ep_index].ring &&
2013
			!(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
2014 2015 2016 2017 2018 2019
		xhci_warn(xhci, "Trying to add endpoint 0x%x "
				"without dropping it.\n",
				(unsigned int) ep->desc.bEndpointAddress);
		return -EINVAL;
	}

2020 2021 2022
	/* If the HCD has already noted the endpoint is enabled,
	 * ignore this request.
	 */
2023
	if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
2024 2025
		xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
				__func__, ep);
2026 2027 2028
		return 0;
	}

2029 2030 2031 2032 2033
	/*
	 * Configuration and alternate setting changes must be done in
	 * process context, not interrupt context (or so documenation
	 * for usb_set_interface() and usb_set_configuration() claim).
	 */
2034
	if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
2035 2036 2037 2038 2039
		dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
				__func__, ep->desc.bEndpointAddress);
		return -ENOMEM;
	}

M
Matt Evans 已提交
2040 2041
	ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
	new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
2042 2043 2044 2045 2046 2047 2048

	/* If xhci_endpoint_disable() was called for this endpoint, but the
	 * xHC hasn't been notified yet through the check_bandwidth() call,
	 * this re-adds a new state for the endpoint from the new endpoint
	 * descriptors.  We must drop and re-add this endpoint, so we leave the
	 * drop flags alone.
	 */
M
Matt Evans 已提交
2049
	new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
2050

2051 2052 2053
	/* Store the usb_device pointer for later use */
	ep->hcpriv = udev;

2054 2055 2056
	ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
	trace_xhci_add_endpoint(ep_ctx);

2057
	xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
2058 2059 2060
			(unsigned int) ep->desc.bEndpointAddress,
			udev->slot_id,
			(unsigned int) new_drop_flags,
2061
			(unsigned int) new_add_flags);
2062 2063
	return 0;
}
2064
EXPORT_SYMBOL_GPL(xhci_add_endpoint);
2065

2066
static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
2067
{
2068
	struct xhci_input_control_ctx *ctrl_ctx;
2069
	struct xhci_ep_ctx *ep_ctx;
2070
	struct xhci_slot_ctx *slot_ctx;
2071 2072
	int i;

2073
	ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
2074 2075 2076 2077 2078 2079
	if (!ctrl_ctx) {
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		return;
	}

2080 2081 2082 2083 2084
	/* When a device's add flag and drop flag are zero, any subsequent
	 * configure endpoint command will leave that endpoint's state
	 * untouched.  Make sure we don't leave any old state in the input
	 * endpoint contexts.
	 */
2085 2086 2087
	ctrl_ctx->drop_flags = 0;
	ctrl_ctx->add_flags = 0;
	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
M
Matt Evans 已提交
2088
	slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2089
	/* Endpoint 0 is always valid */
M
Matt Evans 已提交
2090
	slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
2091
	for (i = 1; i < 31; i++) {
2092
		ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
2093 2094
		ep_ctx->ep_info = 0;
		ep_ctx->ep_info2 = 0;
2095
		ep_ctx->deq = 0;
2096 2097 2098 2099
		ep_ctx->tx_info = 0;
	}
}

2100
static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
2101
		struct usb_device *udev, u32 *cmd_status)
2102 2103 2104
{
	int ret;

2105
	switch (*cmd_status) {
2106
	case COMP_COMMAND_ABORTED:
2107
	case COMP_COMMAND_RING_STOPPED:
2108 2109 2110
		xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
		ret = -ETIME;
		break;
2111
	case COMP_RESOURCE_ERROR:
2112 2113
		dev_warn(&udev->dev,
			 "Not enough host controller resources for new device state.\n");
2114 2115 2116
		ret = -ENOMEM;
		/* FIXME: can we allocate more resources for the HC? */
		break;
2117 2118
	case COMP_BANDWIDTH_ERROR:
	case COMP_SECONDARY_BANDWIDTH_ERROR:
2119 2120
		dev_warn(&udev->dev,
			 "Not enough bandwidth for new device state.\n");
2121 2122 2123
		ret = -ENOSPC;
		/* FIXME: can we go back to the old state? */
		break;
2124
	case COMP_TRB_ERROR:
2125 2126 2127 2128 2129 2130
		/* the HCD set up something wrong */
		dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
				"add flag = 1, "
				"and endpoint is not disabled.\n");
		ret = -EINVAL;
		break;
2131
	case COMP_INCOMPATIBLE_DEVICE_ERROR:
2132 2133
		dev_warn(&udev->dev,
			 "ERROR: Incompatible device for endpoint configure command.\n");
A
Alex He 已提交
2134 2135
		ret = -ENODEV;
		break;
2136
	case COMP_SUCCESS:
2137 2138
		xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
				"Successful Endpoint Configure command");
2139 2140 2141
		ret = 0;
		break;
	default:
2142 2143
		xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
				*cmd_status);
2144 2145 2146 2147 2148 2149 2150
		ret = -EINVAL;
		break;
	}
	return ret;
}

static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
2151
		struct usb_device *udev, u32 *cmd_status)
2152 2153 2154
{
	int ret;

2155
	switch (*cmd_status) {
2156
	case COMP_COMMAND_ABORTED:
2157
	case COMP_COMMAND_RING_STOPPED:
2158 2159 2160
		xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
		ret = -ETIME;
		break;
2161
	case COMP_PARAMETER_ERROR:
2162 2163
		dev_warn(&udev->dev,
			 "WARN: xHCI driver setup invalid evaluate context command.\n");
2164 2165
		ret = -EINVAL;
		break;
2166
	case COMP_SLOT_NOT_ENABLED_ERROR:
2167 2168
		dev_warn(&udev->dev,
			"WARN: slot not enabled for evaluate context command.\n");
2169 2170
		ret = -EINVAL;
		break;
2171
	case COMP_CONTEXT_STATE_ERROR:
2172 2173
		dev_warn(&udev->dev,
			"WARN: invalid context state for evaluate context command.\n");
2174 2175
		ret = -EINVAL;
		break;
2176
	case COMP_INCOMPATIBLE_DEVICE_ERROR:
2177 2178
		dev_warn(&udev->dev,
			"ERROR: Incompatible device for evaluate context command.\n");
A
Alex He 已提交
2179 2180
		ret = -ENODEV;
		break;
2181
	case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
2182 2183 2184 2185
		/* Max Exit Latency too large error */
		dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
		ret = -EINVAL;
		break;
2186
	case COMP_SUCCESS:
2187 2188
		xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
				"Successful evaluate context command");
2189 2190 2191
		ret = 0;
		break;
	default:
2192 2193
		xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
			*cmd_status);
2194 2195 2196 2197 2198 2199
		ret = -EINVAL;
		break;
	}
	return ret;
}

2200
static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
2201
		struct xhci_input_control_ctx *ctrl_ctx)
2202 2203 2204 2205 2206 2207 2208 2209
{
	u32 valid_add_flags;
	u32 valid_drop_flags;

	/* Ignore the slot flag (bit 0), and the default control endpoint flag
	 * (bit 1).  The default control endpoint is added during the Address
	 * Device command and is never removed until the slot is disabled.
	 */
2210 2211
	valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
	valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
2212 2213 2214 2215 2216 2217 2218 2219 2220 2221

	/* Use hweight32 to count the number of ones in the add flags, or
	 * number of endpoints added.  Don't count endpoints that are changed
	 * (both added and dropped).
	 */
	return hweight32(valid_add_flags) -
		hweight32(valid_add_flags & valid_drop_flags);
}

static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
2222
		struct xhci_input_control_ctx *ctrl_ctx)
2223 2224 2225 2226
{
	u32 valid_add_flags;
	u32 valid_drop_flags;

2227 2228
	valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
	valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247

	return hweight32(valid_drop_flags) -
		hweight32(valid_add_flags & valid_drop_flags);
}

/*
 * We need to reserve the new number of endpoints before the configure endpoint
 * command completes.  We can't subtract the dropped endpoints from the number
 * of active endpoints until the command completes because we can oversubscribe
 * the host in this case:
 *
 *  - the first configure endpoint command drops more endpoints than it adds
 *  - a second configure endpoint command that adds more endpoints is queued
 *  - the first configure endpoint command fails, so the config is unchanged
 *  - the second command may succeed, even though there isn't enough resources
 *
 * Must be called with xhci->lock held.
 */
static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
2248
		struct xhci_input_control_ctx *ctrl_ctx)
2249 2250 2251
{
	u32 added_eps;

2252
	added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2253
	if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
2254 2255 2256
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"Not enough ep ctxs: "
				"%u active, need to add %u, limit is %u.",
2257 2258 2259 2260 2261
				xhci->num_active_eps, added_eps,
				xhci->limit_active_eps);
		return -ENOMEM;
	}
	xhci->num_active_eps += added_eps;
2262 2263
	xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
			"Adding %u ep ctxs, %u now active.", added_eps,
2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274
			xhci->num_active_eps);
	return 0;
}

/*
 * The configure endpoint was failed by the xHC for some other reason, so we
 * need to revert the resources that failed configuration would have used.
 *
 * Must be called with xhci->lock held.
 */
static void xhci_free_host_resources(struct xhci_hcd *xhci,
2275
		struct xhci_input_control_ctx *ctrl_ctx)
2276 2277 2278
{
	u32 num_failed_eps;

2279
	num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2280
	xhci->num_active_eps -= num_failed_eps;
2281 2282
	xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
			"Removing %u failed ep ctxs, %u now active.",
2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293
			num_failed_eps,
			xhci->num_active_eps);
}

/*
 * Now that the command has completed, clean up the active endpoint count by
 * subtracting out the endpoints that were dropped (but not changed).
 *
 * Must be called with xhci->lock held.
 */
static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2294
		struct xhci_input_control_ctx *ctrl_ctx)
2295 2296 2297
{
	u32 num_dropped_eps;

2298
	num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2299 2300
	xhci->num_active_eps -= num_dropped_eps;
	if (num_dropped_eps)
2301 2302
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"Removing %u dropped ep ctxs, %u now active.",
2303 2304 2305 2306
				num_dropped_eps,
				xhci->num_active_eps);
}

F
Felipe Balbi 已提交
2307
static unsigned int xhci_get_block_size(struct usb_device *udev)
2308 2309 2310 2311 2312 2313 2314 2315
{
	switch (udev->speed) {
	case USB_SPEED_LOW:
	case USB_SPEED_FULL:
		return FS_BLOCK;
	case USB_SPEED_HIGH:
		return HS_BLOCK;
	case USB_SPEED_SUPER:
2316
	case USB_SPEED_SUPER_PLUS:
2317 2318 2319 2320 2321 2322 2323 2324 2325
		return SS_BLOCK;
	case USB_SPEED_UNKNOWN:
	case USB_SPEED_WIRELESS:
	default:
		/* Should never happen */
		return 1;
	}
}

F
Felipe Balbi 已提交
2326 2327
static unsigned int
xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369
{
	if (interval_bw->overhead[LS_OVERHEAD_TYPE])
		return LS_OVERHEAD;
	if (interval_bw->overhead[FS_OVERHEAD_TYPE])
		return FS_OVERHEAD;
	return HS_OVERHEAD;
}

/* If we are changing a LS/FS device under a HS hub,
 * make sure (if we are activating a new TT) that the HS bus has enough
 * bandwidth for this new TT.
 */
static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
		struct xhci_virt_device *virt_dev,
		int old_active_eps)
{
	struct xhci_interval_bw_table *bw_table;
	struct xhci_tt_bw_info *tt_info;

	/* Find the bandwidth table for the root port this TT is attached to. */
	bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
	tt_info = virt_dev->tt_info;
	/* If this TT already had active endpoints, the bandwidth for this TT
	 * has already been added.  Removing all periodic endpoints (and thus
	 * making the TT enactive) will only decrease the bandwidth used.
	 */
	if (old_active_eps)
		return 0;
	if (old_active_eps == 0 && tt_info->active_eps != 0) {
		if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
			return -ENOMEM;
		return 0;
	}
	/* Not sure why we would have no new active endpoints...
	 *
	 * Maybe because of an Evaluate Context change for a hub update or a
	 * control endpoint 0 max packet size change?
	 * FIXME: skip the bandwidth calculation in that case.
	 */
	return 0;
}

S
Sarah Sharp 已提交
2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385
static int xhci_check_ss_bw(struct xhci_hcd *xhci,
		struct xhci_virt_device *virt_dev)
{
	unsigned int bw_reserved;

	bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
	if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
		return -ENOMEM;

	bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
	if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
		return -ENOMEM;

	return 0;
}

2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425
/*
 * This algorithm is a very conservative estimate of the worst-case scheduling
 * scenario for any one interval.  The hardware dynamically schedules the
 * packets, so we can't tell which microframe could be the limiting factor in
 * the bandwidth scheduling.  This only takes into account periodic endpoints.
 *
 * Obviously, we can't solve an NP complete problem to find the minimum worst
 * case scenario.  Instead, we come up with an estimate that is no less than
 * the worst case bandwidth used for any one microframe, but may be an
 * over-estimate.
 *
 * We walk the requirements for each endpoint by interval, starting with the
 * smallest interval, and place packets in the schedule where there is only one
 * possible way to schedule packets for that interval.  In order to simplify
 * this algorithm, we record the largest max packet size for each interval, and
 * assume all packets will be that size.
 *
 * For interval 0, we obviously must schedule all packets for each interval.
 * The bandwidth for interval 0 is just the amount of data to be transmitted
 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
 * the number of packets).
 *
 * For interval 1, we have two possible microframes to schedule those packets
 * in.  For this algorithm, if we can schedule the same number of packets for
 * each possible scheduling opportunity (each microframe), we will do so.  The
 * remaining number of packets will be saved to be transmitted in the gaps in
 * the next interval's scheduling sequence.
 *
 * As we move those remaining packets to be scheduled with interval 2 packets,
 * we have to double the number of remaining packets to transmit.  This is
 * because the intervals are actually powers of 2, and we would be transmitting
 * the previous interval's packets twice in this interval.  We also have to be
 * sure that when we look at the largest max packet size for this interval, we
 * also look at the largest max packet size for the remaining packets and take
 * the greater of the two.
 *
 * The algorithm continues to evenly distribute packets in each scheduling
 * opportunity, and push the remaining packets out, until we get to the last
 * interval.  Then those packets and their associated overhead are just added
 * to the bandwidth used.
2426 2427 2428 2429 2430
 */
static int xhci_check_bw_table(struct xhci_hcd *xhci,
		struct xhci_virt_device *virt_dev,
		int old_active_eps)
{
2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441
	unsigned int bw_reserved;
	unsigned int max_bandwidth;
	unsigned int bw_used;
	unsigned int block_size;
	struct xhci_interval_bw_table *bw_table;
	unsigned int packet_size = 0;
	unsigned int overhead = 0;
	unsigned int packets_transmitted = 0;
	unsigned int packets_remaining = 0;
	unsigned int i;

2442
	if (virt_dev->udev->speed >= USB_SPEED_SUPER)
S
Sarah Sharp 已提交
2443 2444
		return xhci_check_ss_bw(xhci, virt_dev);

2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463
	if (virt_dev->udev->speed == USB_SPEED_HIGH) {
		max_bandwidth = HS_BW_LIMIT;
		/* Convert percent of bus BW reserved to blocks reserved */
		bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
	} else {
		max_bandwidth = FS_BW_LIMIT;
		bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
	}

	bw_table = virt_dev->bw_table;
	/* We need to translate the max packet size and max ESIT payloads into
	 * the units the hardware uses.
	 */
	block_size = xhci_get_block_size(virt_dev->udev);

	/* If we are manipulating a LS/FS device under a HS hub, double check
	 * that the HS bus has enough bandwidth if we are activing a new TT.
	 */
	if (virt_dev->tt_info) {
2464 2465
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"Recalculating BW for rootport %u",
2466 2467 2468 2469 2470 2471
				virt_dev->real_port);
		if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
			xhci_warn(xhci, "Not enough bandwidth on HS bus for "
					"newly activated TT.\n");
			return -ENOMEM;
		}
2472 2473
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"Recalculating BW for TT slot %u port %u",
2474 2475 2476
				virt_dev->tt_info->slot_id,
				virt_dev->tt_info->ttport);
	} else {
2477 2478
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"Recalculating BW for rootport %u",
2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585
				virt_dev->real_port);
	}

	/* Add in how much bandwidth will be used for interval zero, or the
	 * rounded max ESIT payload + number of packets * largest overhead.
	 */
	bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
		bw_table->interval_bw[0].num_packets *
		xhci_get_largest_overhead(&bw_table->interval_bw[0]);

	for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
		unsigned int bw_added;
		unsigned int largest_mps;
		unsigned int interval_overhead;

		/*
		 * How many packets could we transmit in this interval?
		 * If packets didn't fit in the previous interval, we will need
		 * to transmit that many packets twice within this interval.
		 */
		packets_remaining = 2 * packets_remaining +
			bw_table->interval_bw[i].num_packets;

		/* Find the largest max packet size of this or the previous
		 * interval.
		 */
		if (list_empty(&bw_table->interval_bw[i].endpoints))
			largest_mps = 0;
		else {
			struct xhci_virt_ep *virt_ep;
			struct list_head *ep_entry;

			ep_entry = bw_table->interval_bw[i].endpoints.next;
			virt_ep = list_entry(ep_entry,
					struct xhci_virt_ep, bw_endpoint_list);
			/* Convert to blocks, rounding up */
			largest_mps = DIV_ROUND_UP(
					virt_ep->bw_info.max_packet_size,
					block_size);
		}
		if (largest_mps > packet_size)
			packet_size = largest_mps;

		/* Use the larger overhead of this or the previous interval. */
		interval_overhead = xhci_get_largest_overhead(
				&bw_table->interval_bw[i]);
		if (interval_overhead > overhead)
			overhead = interval_overhead;

		/* How many packets can we evenly distribute across
		 * (1 << (i + 1)) possible scheduling opportunities?
		 */
		packets_transmitted = packets_remaining >> (i + 1);

		/* Add in the bandwidth used for those scheduled packets */
		bw_added = packets_transmitted * (overhead + packet_size);

		/* How many packets do we have remaining to transmit? */
		packets_remaining = packets_remaining % (1 << (i + 1));

		/* What largest max packet size should those packets have? */
		/* If we've transmitted all packets, don't carry over the
		 * largest packet size.
		 */
		if (packets_remaining == 0) {
			packet_size = 0;
			overhead = 0;
		} else if (packets_transmitted > 0) {
			/* Otherwise if we do have remaining packets, and we've
			 * scheduled some packets in this interval, take the
			 * largest max packet size from endpoints with this
			 * interval.
			 */
			packet_size = largest_mps;
			overhead = interval_overhead;
		}
		/* Otherwise carry over packet_size and overhead from the last
		 * time we had a remainder.
		 */
		bw_used += bw_added;
		if (bw_used > max_bandwidth) {
			xhci_warn(xhci, "Not enough bandwidth. "
					"Proposed: %u, Max: %u\n",
				bw_used, max_bandwidth);
			return -ENOMEM;
		}
	}
	/*
	 * Ok, we know we have some packets left over after even-handedly
	 * scheduling interval 15.  We don't know which microframes they will
	 * fit into, so we over-schedule and say they will be scheduled every
	 * microframe.
	 */
	if (packets_remaining > 0)
		bw_used += overhead + packet_size;

	if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
		unsigned int port_index = virt_dev->real_port - 1;

		/* OK, we're manipulating a HS device attached to a
		 * root port bandwidth domain.  Include the number of active TTs
		 * in the bandwidth used.
		 */
		bw_used += TT_HS_OVERHEAD *
			xhci->rh_bw[port_index].num_active_tts;
	}

2586 2587 2588
	xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
		"Final bandwidth: %u, Limit: %u, Reserved: %u, "
		"Available: %u " "percent",
2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600
		bw_used, max_bandwidth, bw_reserved,
		(max_bandwidth - bw_used - bw_reserved) * 100 /
		max_bandwidth);

	bw_used += bw_reserved;
	if (bw_used > max_bandwidth) {
		xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
				bw_used, max_bandwidth);
		return -ENOMEM;
	}

	bw_table->bw_used = bw_used;
2601 2602 2603 2604 2605 2606 2607 2608 2609 2610
	return 0;
}

static bool xhci_is_async_ep(unsigned int ep_type)
{
	return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
					ep_type != ISOC_IN_EP &&
					ep_type != INT_IN_EP);
}

S
Sarah Sharp 已提交
2611 2612
static bool xhci_is_sync_in_ep(unsigned int ep_type)
{
2613
	return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
S
Sarah Sharp 已提交
2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629
}

static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
{
	unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);

	if (ep_bw->ep_interval == 0)
		return SS_OVERHEAD_BURST +
			(ep_bw->mult * ep_bw->num_packets *
					(SS_OVERHEAD + mps));
	return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
				(SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
				1 << ep_bw->ep_interval);

}

2630
static void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2631 2632 2633 2634 2635 2636 2637 2638 2639
		struct xhci_bw_info *ep_bw,
		struct xhci_interval_bw_table *bw_table,
		struct usb_device *udev,
		struct xhci_virt_ep *virt_ep,
		struct xhci_tt_bw_info *tt_info)
{
	struct xhci_interval_bw	*interval_bw;
	int normalized_interval;

S
Sarah Sharp 已提交
2640
	if (xhci_is_async_ep(ep_bw->type))
2641 2642
		return;

2643
	if (udev->speed >= USB_SPEED_SUPER) {
S
Sarah Sharp 已提交
2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657
		if (xhci_is_sync_in_ep(ep_bw->type))
			xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
				xhci_get_ss_bw_consumed(ep_bw);
		else
			xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
				xhci_get_ss_bw_consumed(ep_bw);
		return;
	}

	/* SuperSpeed endpoints never get added to intervals in the table, so
	 * this check is only valid for HS/FS/LS devices.
	 */
	if (list_empty(&virt_ep->bw_endpoint_list))
		return;
2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680
	/* For LS/FS devices, we need to translate the interval expressed in
	 * microframes to frames.
	 */
	if (udev->speed == USB_SPEED_HIGH)
		normalized_interval = ep_bw->ep_interval;
	else
		normalized_interval = ep_bw->ep_interval - 3;

	if (normalized_interval == 0)
		bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
	interval_bw = &bw_table->interval_bw[normalized_interval];
	interval_bw->num_packets -= ep_bw->num_packets;
	switch (udev->speed) {
	case USB_SPEED_LOW:
		interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
		break;
	case USB_SPEED_FULL:
		interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
		break;
	case USB_SPEED_HIGH:
		interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
		break;
	case USB_SPEED_SUPER:
2681
	case USB_SPEED_SUPER_PLUS:
2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707
	case USB_SPEED_UNKNOWN:
	case USB_SPEED_WIRELESS:
		/* Should never happen because only LS/FS/HS endpoints will get
		 * added to the endpoint list.
		 */
		return;
	}
	if (tt_info)
		tt_info->active_eps -= 1;
	list_del_init(&virt_ep->bw_endpoint_list);
}

static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
		struct xhci_bw_info *ep_bw,
		struct xhci_interval_bw_table *bw_table,
		struct usb_device *udev,
		struct xhci_virt_ep *virt_ep,
		struct xhci_tt_bw_info *tt_info)
{
	struct xhci_interval_bw	*interval_bw;
	struct xhci_virt_ep *smaller_ep;
	int normalized_interval;

	if (xhci_is_async_ep(ep_bw->type))
		return;

S
Sarah Sharp 已提交
2708 2709 2710 2711 2712 2713 2714 2715 2716 2717
	if (udev->speed == USB_SPEED_SUPER) {
		if (xhci_is_sync_in_ep(ep_bw->type))
			xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
				xhci_get_ss_bw_consumed(ep_bw);
		else
			xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
				xhci_get_ss_bw_consumed(ep_bw);
		return;
	}

2718 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740
	/* For LS/FS devices, we need to translate the interval expressed in
	 * microframes to frames.
	 */
	if (udev->speed == USB_SPEED_HIGH)
		normalized_interval = ep_bw->ep_interval;
	else
		normalized_interval = ep_bw->ep_interval - 3;

	if (normalized_interval == 0)
		bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
	interval_bw = &bw_table->interval_bw[normalized_interval];
	interval_bw->num_packets += ep_bw->num_packets;
	switch (udev->speed) {
	case USB_SPEED_LOW:
		interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
		break;
	case USB_SPEED_FULL:
		interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
		break;
	case USB_SPEED_HIGH:
		interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
		break;
	case USB_SPEED_SUPER:
2741
	case USB_SPEED_SUPER_PLUS:
2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779
	case USB_SPEED_UNKNOWN:
	case USB_SPEED_WIRELESS:
		/* Should never happen because only LS/FS/HS endpoints will get
		 * added to the endpoint list.
		 */
		return;
	}

	if (tt_info)
		tt_info->active_eps += 1;
	/* Insert the endpoint into the list, largest max packet size first. */
	list_for_each_entry(smaller_ep, &interval_bw->endpoints,
			bw_endpoint_list) {
		if (ep_bw->max_packet_size >=
				smaller_ep->bw_info.max_packet_size) {
			/* Add the new ep before the smaller endpoint */
			list_add_tail(&virt_ep->bw_endpoint_list,
					&smaller_ep->bw_endpoint_list);
			return;
		}
	}
	/* Add the new endpoint at the end of the list. */
	list_add_tail(&virt_ep->bw_endpoint_list,
			&interval_bw->endpoints);
}

void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
		struct xhci_virt_device *virt_dev,
		int old_active_eps)
{
	struct xhci_root_port_bw_info *rh_bw_info;
	if (!virt_dev->tt_info)
		return;

	rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
	if (old_active_eps == 0 &&
				virt_dev->tt_info->active_eps != 0) {
		rh_bw_info->num_active_tts += 1;
2780
		rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2781 2782 2783
	} else if (old_active_eps != 0 &&
				virt_dev->tt_info->active_eps == 0) {
		rh_bw_info->num_active_tts -= 1;
2784
		rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799
	}
}

static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
		struct xhci_virt_device *virt_dev,
		struct xhci_container_ctx *in_ctx)
{
	struct xhci_bw_info ep_bw_info[31];
	int i;
	struct xhci_input_control_ctx *ctrl_ctx;
	int old_active_eps = 0;

	if (virt_dev->tt_info)
		old_active_eps = virt_dev->tt_info->active_eps;

2800
	ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2801 2802 2803 2804 2805
	if (!ctrl_ctx) {
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		return -ENOMEM;
	}
2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877

	for (i = 0; i < 31; i++) {
		if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
			continue;

		/* Make a copy of the BW info in case we need to revert this */
		memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
				sizeof(ep_bw_info[i]));
		/* Drop the endpoint from the interval table if the endpoint is
		 * being dropped or changed.
		 */
		if (EP_IS_DROPPED(ctrl_ctx, i))
			xhci_drop_ep_from_interval_table(xhci,
					&virt_dev->eps[i].bw_info,
					virt_dev->bw_table,
					virt_dev->udev,
					&virt_dev->eps[i],
					virt_dev->tt_info);
	}
	/* Overwrite the information stored in the endpoints' bw_info */
	xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
	for (i = 0; i < 31; i++) {
		/* Add any changed or added endpoints to the interval table */
		if (EP_IS_ADDED(ctrl_ctx, i))
			xhci_add_ep_to_interval_table(xhci,
					&virt_dev->eps[i].bw_info,
					virt_dev->bw_table,
					virt_dev->udev,
					&virt_dev->eps[i],
					virt_dev->tt_info);
	}

	if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
		/* Ok, this fits in the bandwidth we have.
		 * Update the number of active TTs.
		 */
		xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
		return 0;
	}

	/* We don't have enough bandwidth for this, revert the stored info. */
	for (i = 0; i < 31; i++) {
		if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
			continue;

		/* Drop the new copies of any added or changed endpoints from
		 * the interval table.
		 */
		if (EP_IS_ADDED(ctrl_ctx, i)) {
			xhci_drop_ep_from_interval_table(xhci,
					&virt_dev->eps[i].bw_info,
					virt_dev->bw_table,
					virt_dev->udev,
					&virt_dev->eps[i],
					virt_dev->tt_info);
		}
		/* Revert the endpoint back to its old information */
		memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
				sizeof(ep_bw_info[i]));
		/* Add any changed or dropped endpoints back into the table */
		if (EP_IS_DROPPED(ctrl_ctx, i))
			xhci_add_ep_to_interval_table(xhci,
					&virt_dev->eps[i].bw_info,
					virt_dev->bw_table,
					virt_dev->udev,
					&virt_dev->eps[i],
					virt_dev->tt_info);
	}
	return -ENOMEM;
}


2878 2879 2880 2881
/* Issue a configure endpoint command or evaluate context command
 * and wait for it to finish.
 */
static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2882 2883 2884
		struct usb_device *udev,
		struct xhci_command *command,
		bool ctx_change, bool must_succeed)
2885 2886 2887
{
	int ret;
	unsigned long flags;
2888
	struct xhci_input_control_ctx *ctrl_ctx;
2889
	struct xhci_virt_device *virt_dev;
2890
	struct xhci_slot_ctx *slot_ctx;
2891 2892 2893

	if (!command)
		return -EINVAL;
2894 2895

	spin_lock_irqsave(&xhci->lock, flags);
2896 2897 2898 2899 2900 2901

	if (xhci->xhc_state & XHCI_STATE_DYING) {
		spin_unlock_irqrestore(&xhci->lock, flags);
		return -ESHUTDOWN;
	}

2902
	virt_dev = xhci->devs[udev->slot_id];
2903

2904
	ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2905
	if (!ctrl_ctx) {
2906
		spin_unlock_irqrestore(&xhci->lock, flags);
2907 2908 2909 2910
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		return -ENOMEM;
	}
2911

2912
	if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2913
			xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2914 2915 2916 2917 2918 2919
		spin_unlock_irqrestore(&xhci->lock, flags);
		xhci_warn(xhci, "Not enough host resources, "
				"active endpoint contexts = %u\n",
				xhci->num_active_eps);
		return -ENOMEM;
	}
2920
	if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2921
	    xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2922
		if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2923
			xhci_free_host_resources(xhci, ctrl_ctx);
2924 2925 2926 2927
		spin_unlock_irqrestore(&xhci->lock, flags);
		xhci_warn(xhci, "Not enough bandwidth\n");
		return -ENOMEM;
	}
2928

2929
	slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
2930 2931

	trace_xhci_configure_endpoint_ctrl_ctx(ctrl_ctx);
2932 2933
	trace_xhci_configure_endpoint(slot_ctx);

2934
	if (!ctx_change)
2935 2936
		ret = xhci_queue_configure_endpoint(xhci, command,
				command->in_ctx->dma,
2937
				udev->slot_id, must_succeed);
2938
	else
2939 2940
		ret = xhci_queue_evaluate_context(xhci, command,
				command->in_ctx->dma,
2941
				udev->slot_id, must_succeed);
2942
	if (ret < 0) {
2943
		if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2944
			xhci_free_host_resources(xhci, ctrl_ctx);
2945
		spin_unlock_irqrestore(&xhci->lock, flags);
2946 2947
		xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
				"FIXME allocate a new ring segment");
2948 2949 2950 2951 2952 2953
		return -ENOMEM;
	}
	xhci_ring_cmd_db(xhci);
	spin_unlock_irqrestore(&xhci->lock, flags);

	/* Wait for the configure endpoint command to complete */
2954
	wait_for_completion(command->completion);
2955 2956

	if (!ctx_change)
2957 2958
		ret = xhci_configure_endpoint_result(xhci, udev,
						     &command->status);
2959
	else
2960 2961
		ret = xhci_evaluate_context_result(xhci, udev,
						   &command->status);
2962 2963 2964 2965 2966 2967 2968

	if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
		spin_lock_irqsave(&xhci->lock, flags);
		/* If the command failed, remove the reserved resources.
		 * Otherwise, clean up the estimate to include dropped eps.
		 */
		if (ret)
2969
			xhci_free_host_resources(xhci, ctrl_ctx);
2970
		else
2971
			xhci_finish_resource_reservation(xhci, ctrl_ctx);
2972 2973 2974
		spin_unlock_irqrestore(&xhci->lock, flags);
	}
	return ret;
2975 2976
}

2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990
static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
	struct xhci_virt_device *vdev, int i)
{
	struct xhci_virt_ep *ep = &vdev->eps[i];

	if (ep->ep_state & EP_HAS_STREAMS) {
		xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
				xhci_get_endpoint_address(i));
		xhci_free_stream_info(xhci, ep->stream_info);
		ep->stream_info = NULL;
		ep->ep_state &= ~EP_HAS_STREAMS;
	}
}

2991 2992 2993 2994 2995 2996 2997 2998 2999 3000
/* Called after one or more calls to xhci_add_endpoint() or
 * xhci_drop_endpoint().  If this call fails, the USB core is expected
 * to call xhci_reset_bandwidth().
 *
 * Since we are in the middle of changing either configuration or
 * installing a new alt setting, the USB core won't allow URBs to be
 * enqueued for any endpoint on the old config or interface.  Nothing
 * else should be touching the xhci->devs[slot_id] structure, so we
 * don't need to take the xhci->lock for manipulating that.
 */
3001
int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
3002 3003 3004 3005 3006
{
	int i;
	int ret = 0;
	struct xhci_hcd *xhci;
	struct xhci_virt_device	*virt_dev;
3007 3008
	struct xhci_input_control_ctx *ctrl_ctx;
	struct xhci_slot_ctx *slot_ctx;
3009
	struct xhci_command *command;
3010

3011
	ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3012 3013 3014
	if (ret <= 0)
		return ret;
	xhci = hcd_to_xhci(hcd);
3015 3016
	if ((xhci->xhc_state & XHCI_STATE_DYING) ||
		(xhci->xhc_state & XHCI_STATE_REMOVING))
3017
		return -ENODEV;
3018

3019
	xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
3020 3021
	virt_dev = xhci->devs[udev->slot_id];

3022
	command = xhci_alloc_command(xhci, true, GFP_KERNEL);
3023 3024 3025 3026 3027
	if (!command)
		return -ENOMEM;

	command->in_ctx = virt_dev->in_ctx;

3028
	/* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
3029
	ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3030 3031 3032
	if (!ctrl_ctx) {
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
3033 3034
		ret = -ENOMEM;
		goto command_cleanup;
3035
	}
M
Matt Evans 已提交
3036 3037 3038
	ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
	ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
	ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
3039 3040 3041

	/* Don't issue the command if there's no endpoints to update. */
	if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
3042 3043 3044 3045
	    ctrl_ctx->drop_flags == 0) {
		ret = 0;
		goto command_cleanup;
	}
3046
	/* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
3047
	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3048 3049 3050 3051 3052 3053 3054 3055 3056 3057
	for (i = 31; i >= 1; i--) {
		__le32 le32 = cpu_to_le32(BIT(i));

		if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
		    || (ctrl_ctx->add_flags & le32) || i == 1) {
			slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
			slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
			break;
		}
	}
3058

3059
	ret = xhci_configure_endpoint(xhci, udev, command,
3060
			false, false);
3061
	if (ret)
3062
		/* Callee should call reset_bandwidth() */
3063
		goto command_cleanup;
3064

3065
	/* Free any rings that were dropped, but not changed. */
3066
	for (i = 1; i < 31; i++) {
3067
		if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
3068
		    !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
M
Mathias Nyman 已提交
3069
			xhci_free_endpoint_ring(xhci, virt_dev, i);
3070 3071
			xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
		}
3072
	}
3073
	xhci_zero_in_ctx(xhci, virt_dev);
3074 3075
	/*
	 * Install any rings for completely new endpoints or changed endpoints,
M
Mathias Nyman 已提交
3076
	 * and free any old rings from changed endpoints.
3077
	 */
3078
	for (i = 1; i < 31; i++) {
3079 3080
		if (!virt_dev->eps[i].new_ring)
			continue;
M
Mathias Nyman 已提交
3081
		/* Only free the old ring if it exists.
3082 3083 3084
		 * It may not if this is the first add of an endpoint.
		 */
		if (virt_dev->eps[i].ring) {
M
Mathias Nyman 已提交
3085
			xhci_free_endpoint_ring(xhci, virt_dev, i);
3086
		}
3087
		xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
3088 3089
		virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
		virt_dev->eps[i].new_ring = NULL;
3090
		xhci_debugfs_create_endpoint(xhci, virt_dev, i);
3091
	}
3092 3093 3094
command_cleanup:
	kfree(command->completion);
	kfree(command);
3095 3096 3097

	return ret;
}
3098
EXPORT_SYMBOL_GPL(xhci_check_bandwidth);
3099

3100
void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
3101 3102 3103 3104 3105
{
	struct xhci_hcd *xhci;
	struct xhci_virt_device	*virt_dev;
	int i, ret;

3106
	ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3107 3108 3109 3110
	if (ret <= 0)
		return;
	xhci = hcd_to_xhci(hcd);

3111
	xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
3112 3113
	virt_dev = xhci->devs[udev->slot_id];
	/* Free any rings allocated for added endpoints */
3114
	for (i = 0; i < 31; i++) {
3115
		if (virt_dev->eps[i].new_ring) {
3116
			xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
3117 3118
			xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
			virt_dev->eps[i].new_ring = NULL;
3119 3120
		}
	}
3121
	xhci_zero_in_ctx(xhci, virt_dev);
3122
}
3123
EXPORT_SYMBOL_GPL(xhci_reset_bandwidth);
3124

3125
static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
3126 3127
		struct xhci_container_ctx *in_ctx,
		struct xhci_container_ctx *out_ctx,
3128
		struct xhci_input_control_ctx *ctrl_ctx,
3129
		u32 add_flags, u32 drop_flags)
3130
{
M
Matt Evans 已提交
3131 3132
	ctrl_ctx->add_flags = cpu_to_le32(add_flags);
	ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
3133
	xhci_slot_copy(xhci, in_ctx, out_ctx);
M
Matt Evans 已提交
3134
	ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3135 3136
}

3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176
static void xhci_endpoint_disable(struct usb_hcd *hcd,
				  struct usb_host_endpoint *host_ep)
{
	struct xhci_hcd		*xhci;
	struct xhci_virt_device	*vdev;
	struct xhci_virt_ep	*ep;
	struct usb_device	*udev;
	unsigned long		flags;
	unsigned int		ep_index;

	xhci = hcd_to_xhci(hcd);
rescan:
	spin_lock_irqsave(&xhci->lock, flags);

	udev = (struct usb_device *)host_ep->hcpriv;
	if (!udev || !udev->slot_id)
		goto done;

	vdev = xhci->devs[udev->slot_id];
	if (!vdev)
		goto done;

	ep_index = xhci_get_endpoint_index(&host_ep->desc);
	ep = &vdev->eps[ep_index];

	/* wait for hub_tt_work to finish clearing hub TT */
	if (ep->ep_state & EP_CLEARING_TT) {
		spin_unlock_irqrestore(&xhci->lock, flags);
		schedule_timeout_uninterruptible(1);
		goto rescan;
	}

	if (ep->ep_state)
		xhci_dbg(xhci, "endpoint disable with ep_state 0x%x\n",
			 ep->ep_state);
done:
	host_ep->hcpriv = NULL;
	spin_unlock_irqrestore(&xhci->lock, flags);
}

3177 3178 3179 3180
/*
 * Called after usb core issues a clear halt control message.
 * The host side of the halt should already be cleared by a reset endpoint
 * command issued when the STALL event was received.
3181
 *
3182 3183 3184 3185 3186
 * The reset endpoint command may only be issued to endpoints in the halted
 * state. For software that wishes to reset the data toggle or sequence number
 * of an endpoint that isn't in the halted state this function will issue a
 * configure endpoint command with the Drop and Add bits set for the target
 * endpoint. Refer to the additional note in xhci spcification section 4.6.8.
3187
 */
3188

3189
static void xhci_endpoint_reset(struct usb_hcd *hcd,
3190
		struct usb_host_endpoint *host_ep)
3191 3192
{
	struct xhci_hcd *xhci;
3193 3194 3195 3196 3197 3198 3199 3200
	struct usb_device *udev;
	struct xhci_virt_device *vdev;
	struct xhci_virt_ep *ep;
	struct xhci_input_control_ctx *ctrl_ctx;
	struct xhci_command *stop_cmd, *cfg_cmd;
	unsigned int ep_index;
	unsigned long flags;
	u32 ep_flag;
3201
	int err;
3202 3203

	xhci = hcd_to_xhci(hcd);
3204 3205 3206 3207
	if (!host_ep->hcpriv)
		return;
	udev = (struct usb_device *) host_ep->hcpriv;
	vdev = xhci->devs[udev->slot_id];
3208 3209 3210 3211 3212 3213 3214 3215

	/*
	 * vdev may be lost due to xHC restore error and re-initialization
	 * during S3/S4 resume. A new vdev will be allocated later by
	 * xhci_discover_or_reset_device()
	 */
	if (!udev->slot_id || !vdev)
		return;
3216 3217 3218 3219
	ep_index = xhci_get_endpoint_index(&host_ep->desc);
	ep = &vdev->eps[ep_index];

	/* Bail out if toggle is already being cleared by a endpoint reset */
3220
	spin_lock_irqsave(&xhci->lock, flags);
3221 3222
	if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) {
		ep->ep_state &= ~EP_HARD_CLEAR_TOGGLE;
3223
		spin_unlock_irqrestore(&xhci->lock, flags);
3224 3225
		return;
	}
3226
	spin_unlock_irqrestore(&xhci->lock, flags);
3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248
	/* Only interrupt and bulk ep's use data toggle, USB2 spec 5.5.4-> */
	if (usb_endpoint_xfer_control(&host_ep->desc) ||
	    usb_endpoint_xfer_isoc(&host_ep->desc))
		return;

	ep_flag = xhci_get_endpoint_flag(&host_ep->desc);

	if (ep_flag == SLOT_FLAG || ep_flag == EP0_FLAG)
		return;

	stop_cmd = xhci_alloc_command(xhci, true, GFP_NOWAIT);
	if (!stop_cmd)
		return;

	cfg_cmd = xhci_alloc_command_with_ctx(xhci, true, GFP_NOWAIT);
	if (!cfg_cmd)
		goto cleanup;

	spin_lock_irqsave(&xhci->lock, flags);

	/* block queuing new trbs and ringing ep doorbell */
	ep->ep_state |= EP_SOFT_CLEAR_TOGGLE;
3249

3250
	/*
3251 3252 3253
	 * Make sure endpoint ring is empty before resetting the toggle/seq.
	 * Driver is required to synchronously cancel all transfer request.
	 * Stop the endpoint to force xHC to update the output context
3254
	 */
3255

3256 3257 3258
	if (!list_empty(&ep->ring->td_list)) {
		dev_err(&udev->dev, "EP not empty, refuse reset\n");
		spin_unlock_irqrestore(&xhci->lock, flags);
3259
		xhci_free_command(xhci, cfg_cmd);
3260 3261
		goto cleanup;
	}
3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272

	err = xhci_queue_stop_endpoint(xhci, stop_cmd, udev->slot_id,
					ep_index, 0);
	if (err < 0) {
		spin_unlock_irqrestore(&xhci->lock, flags);
		xhci_free_command(xhci, cfg_cmd);
		xhci_dbg(xhci, "%s: Failed to queue stop ep command, %d ",
				__func__, err);
		goto cleanup;
	}

3273 3274 3275 3276 3277 3278 3279 3280 3281
	xhci_ring_cmd_db(xhci);
	spin_unlock_irqrestore(&xhci->lock, flags);

	wait_for_completion(stop_cmd->completion);

	spin_lock_irqsave(&xhci->lock, flags);

	/* config ep command clears toggle if add and drop ep flags are set */
	ctrl_ctx = xhci_get_input_control_ctx(cfg_cmd->in_ctx);
3282 3283 3284 3285 3286 3287 3288 3289
	if (!ctrl_ctx) {
		spin_unlock_irqrestore(&xhci->lock, flags);
		xhci_free_command(xhci, cfg_cmd);
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		goto cleanup;
	}

3290 3291 3292 3293
	xhci_setup_input_ctx_for_config_ep(xhci, cfg_cmd->in_ctx, vdev->out_ctx,
					   ctrl_ctx, ep_flag, ep_flag);
	xhci_endpoint_copy(xhci, cfg_cmd->in_ctx, vdev->out_ctx, ep_index);

3294
	err = xhci_queue_configure_endpoint(xhci, cfg_cmd, cfg_cmd->in_ctx->dma,
3295
				      udev->slot_id, false);
3296 3297 3298 3299 3300 3301 3302 3303
	if (err < 0) {
		spin_unlock_irqrestore(&xhci->lock, flags);
		xhci_free_command(xhci, cfg_cmd);
		xhci_dbg(xhci, "%s: Failed to queue config ep command, %d ",
				__func__, err);
		goto cleanup;
	}

3304 3305 3306 3307 3308 3309 3310 3311
	xhci_ring_cmd_db(xhci);
	spin_unlock_irqrestore(&xhci->lock, flags);

	wait_for_completion(cfg_cmd->completion);

	xhci_free_command(xhci, cfg_cmd);
cleanup:
	xhci_free_command(xhci, stop_cmd);
3312
	spin_lock_irqsave(&xhci->lock, flags);
3313 3314
	if (ep->ep_state & EP_SOFT_CLEAR_TOGGLE)
		ep->ep_state &= ~EP_SOFT_CLEAR_TOGGLE;
3315
	spin_unlock_irqrestore(&xhci->lock, flags);
3316 3317
}

3318 3319 3320 3321 3322 3323 3324 3325 3326 3327
static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
		struct usb_device *udev, struct usb_host_endpoint *ep,
		unsigned int slot_id)
{
	int ret;
	unsigned int ep_index;
	unsigned int ep_state;

	if (!ep)
		return -EINVAL;
3328
	ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
3329
	if (ret <= 0)
3330
		return ret ? ret : -EINVAL;
3331
	if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399
		xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
				" descriptor for ep 0x%x does not support streams\n",
				ep->desc.bEndpointAddress);
		return -EINVAL;
	}

	ep_index = xhci_get_endpoint_index(&ep->desc);
	ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
	if (ep_state & EP_HAS_STREAMS ||
			ep_state & EP_GETTING_STREAMS) {
		xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
				"already has streams set up.\n",
				ep->desc.bEndpointAddress);
		xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
				"dynamic stream context array reallocation.\n");
		return -EINVAL;
	}
	if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
		xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
				"endpoint 0x%x; URBs are pending.\n",
				ep->desc.bEndpointAddress);
		return -EINVAL;
	}
	return 0;
}

static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
		unsigned int *num_streams, unsigned int *num_stream_ctxs)
{
	unsigned int max_streams;

	/* The stream context array size must be a power of two */
	*num_stream_ctxs = roundup_pow_of_two(*num_streams);
	/*
	 * Find out how many primary stream array entries the host controller
	 * supports.  Later we may use secondary stream arrays (similar to 2nd
	 * level page entries), but that's an optional feature for xHCI host
	 * controllers. xHCs must support at least 4 stream IDs.
	 */
	max_streams = HCC_MAX_PSA(xhci->hcc_params);
	if (*num_stream_ctxs > max_streams) {
		xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
				max_streams);
		*num_stream_ctxs = max_streams;
		*num_streams = max_streams;
	}
}

/* Returns an error code if one of the endpoint already has streams.
 * This does not change any data structures, it only checks and gathers
 * information.
 */
static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
		struct usb_device *udev,
		struct usb_host_endpoint **eps, unsigned int num_eps,
		unsigned int *num_streams, u32 *changed_ep_bitmask)
{
	unsigned int max_streams;
	unsigned int endpoint_flag;
	int i;
	int ret;

	for (i = 0; i < num_eps; i++) {
		ret = xhci_check_streams_endpoint(xhci, udev,
				eps[i], udev->slot_id);
		if (ret < 0)
			return ret;

3400
		max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435
		if (max_streams < (*num_streams - 1)) {
			xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
					eps[i]->desc.bEndpointAddress,
					max_streams);
			*num_streams = max_streams+1;
		}

		endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
		if (*changed_ep_bitmask & endpoint_flag)
			return -EINVAL;
		*changed_ep_bitmask |= endpoint_flag;
	}
	return 0;
}

static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
		struct usb_device *udev,
		struct usb_host_endpoint **eps, unsigned int num_eps)
{
	u32 changed_ep_bitmask = 0;
	unsigned int slot_id;
	unsigned int ep_index;
	unsigned int ep_state;
	int i;

	slot_id = udev->slot_id;
	if (!xhci->devs[slot_id])
		return 0;

	for (i = 0; i < num_eps; i++) {
		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
		ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
		/* Are streams already being freed for the endpoint? */
		if (ep_state & EP_GETTING_NO_STREAMS) {
			xhci_warn(xhci, "WARN Can't disable streams for "
J
Joe Perches 已提交
3436 3437
					"endpoint 0x%x, "
					"streams are being disabled already\n",
3438 3439 3440 3441 3442 3443 3444
					eps[i]->desc.bEndpointAddress);
			return 0;
		}
		/* Are there actually any streams to free? */
		if (!(ep_state & EP_HAS_STREAMS) &&
				!(ep_state & EP_GETTING_STREAMS)) {
			xhci_warn(xhci, "WARN Can't disable streams for "
J
Joe Perches 已提交
3445 3446
					"endpoint 0x%x, "
					"streams are already disabled!\n",
3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457
					eps[i]->desc.bEndpointAddress);
			xhci_warn(xhci, "WARN xhci_free_streams() called "
					"with non-streams endpoint\n");
			return 0;
		}
		changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
	}
	return changed_ep_bitmask;
}

/*
3458
 * The USB device drivers use this function (through the HCD interface in USB
3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472
 * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
 * coordinate mass storage command queueing across multiple endpoints (basically
 * a stream ID == a task ID).
 *
 * Setting up streams involves allocating the same size stream context array
 * for each endpoint and issuing a configure endpoint command for all endpoints.
 *
 * Don't allow the call to succeed if one endpoint only supports one stream
 * (which means it doesn't support streams at all).
 *
 * Drivers may get less stream IDs than they asked for, if the host controller
 * hardware or endpoints claim they can't support the number of requested
 * stream IDs.
 */
3473
static int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3474 3475 3476 3477 3478 3479 3480
		struct usb_host_endpoint **eps, unsigned int num_eps,
		unsigned int num_streams, gfp_t mem_flags)
{
	int i, ret;
	struct xhci_hcd *xhci;
	struct xhci_virt_device *vdev;
	struct xhci_command *config_cmd;
3481
	struct xhci_input_control_ctx *ctrl_ctx;
3482 3483
	unsigned int ep_index;
	unsigned int num_stream_ctxs;
3484
	unsigned int max_packet;
3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498
	unsigned long flags;
	u32 changed_ep_bitmask = 0;

	if (!eps)
		return -EINVAL;

	/* Add one to the number of streams requested to account for
	 * stream 0 that is reserved for xHCI usage.
	 */
	num_streams += 1;
	xhci = hcd_to_xhci(hcd);
	xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
			num_streams);

H
Hans de Goede 已提交
3499
	/* MaxPSASize value 0 (2 streams) means streams are not supported */
3500 3501
	if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
			HCC_MAX_PSA(xhci->hcc_params) < 4) {
H
Hans de Goede 已提交
3502 3503 3504 3505
		xhci_dbg(xhci, "xHCI controller does not support streams.\n");
		return -ENOSYS;
	}

3506
	config_cmd = xhci_alloc_command_with_ctx(xhci, true, mem_flags);
3507
	if (!config_cmd)
3508
		return -ENOMEM;
3509

3510
	ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3511 3512 3513 3514 3515 3516
	if (!ctrl_ctx) {
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		xhci_free_command(xhci, config_cmd);
		return -ENOMEM;
	}
3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537

	/* Check to make sure all endpoints are not already configured for
	 * streams.  While we're at it, find the maximum number of streams that
	 * all the endpoints will support and check for duplicate endpoints.
	 */
	spin_lock_irqsave(&xhci->lock, flags);
	ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
			num_eps, &num_streams, &changed_ep_bitmask);
	if (ret < 0) {
		xhci_free_command(xhci, config_cmd);
		spin_unlock_irqrestore(&xhci->lock, flags);
		return ret;
	}
	if (num_streams <= 1) {
		xhci_warn(xhci, "WARN: endpoints can't handle "
				"more than one stream.\n");
		xhci_free_command(xhci, config_cmd);
		spin_unlock_irqrestore(&xhci->lock, flags);
		return -EINVAL;
	}
	vdev = xhci->devs[udev->slot_id];
L
Lucas De Marchi 已提交
3538
	/* Mark each endpoint as being in transition, so
3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556
	 * xhci_urb_enqueue() will reject all URBs.
	 */
	for (i = 0; i < num_eps; i++) {
		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
		vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
	}
	spin_unlock_irqrestore(&xhci->lock, flags);

	/* Setup internal data structures and allocate HW data structures for
	 * streams (but don't install the HW structures in the input context
	 * until we're sure all memory allocation succeeded).
	 */
	xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
	xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
			num_stream_ctxs, num_streams);

	for (i = 0; i < num_eps; i++) {
		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3557
		max_packet = usb_endpoint_maxp(&eps[i]->desc);
3558 3559
		vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
				num_stream_ctxs,
3560 3561
				num_streams,
				max_packet, mem_flags);
3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584
		if (!vdev->eps[ep_index].stream_info)
			goto cleanup;
		/* Set maxPstreams in endpoint context and update deq ptr to
		 * point to stream context array. FIXME
		 */
	}

	/* Set up the input context for a configure endpoint command. */
	for (i = 0; i < num_eps; i++) {
		struct xhci_ep_ctx *ep_ctx;

		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
		ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);

		xhci_endpoint_copy(xhci, config_cmd->in_ctx,
				vdev->out_ctx, ep_index);
		xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
				vdev->eps[ep_index].stream_info);
	}
	/* Tell the HW to drop its old copy of the endpoint context info
	 * and add the updated copy from the input context.
	 */
	xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3585 3586
			vdev->out_ctx, ctrl_ctx,
			changed_ep_bitmask, changed_ep_bitmask);
3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609

	/* Issue and wait for the configure endpoint command */
	ret = xhci_configure_endpoint(xhci, udev, config_cmd,
			false, false);

	/* xHC rejected the configure endpoint command for some reason, so we
	 * leave the old ring intact and free our internal streams data
	 * structure.
	 */
	if (ret < 0)
		goto cleanup;

	spin_lock_irqsave(&xhci->lock, flags);
	for (i = 0; i < num_eps; i++) {
		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
		vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
		xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
			 udev->slot_id, ep_index);
		vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
	}
	xhci_free_command(xhci, config_cmd);
	spin_unlock_irqrestore(&xhci->lock, flags);

3610 3611 3612 3613
	for (i = 0; i < num_eps; i++) {
		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
		xhci_debugfs_create_stream_files(xhci, vdev, ep_index);
	}
3614 3615 3616 3617 3618 3619 3620 3621
	/* Subtract 1 for stream 0, which drivers can't use */
	return num_streams - 1;

cleanup:
	/* If it didn't work, free the streams! */
	for (i = 0; i < num_eps; i++) {
		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
		xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3622
		vdev->eps[ep_index].stream_info = NULL;
3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639
		/* FIXME Unset maxPstreams in endpoint context and
		 * update deq ptr to point to normal string ring.
		 */
		vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
		vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
		xhci_endpoint_zero(xhci, vdev, eps[i]);
	}
	xhci_free_command(xhci, config_cmd);
	return -ENOMEM;
}

/* Transition the endpoint from using streams to being a "normal" endpoint
 * without streams.
 *
 * Modify the endpoint context state, submit a configure endpoint command,
 * and free all endpoint rings for streams if that completes successfully.
 */
3640
static int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3641 3642 3643 3644 3645 3646 3647
		struct usb_host_endpoint **eps, unsigned int num_eps,
		gfp_t mem_flags)
{
	int i, ret;
	struct xhci_hcd *xhci;
	struct xhci_virt_device *vdev;
	struct xhci_command *command;
3648
	struct xhci_input_control_ctx *ctrl_ctx;
3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670
	unsigned int ep_index;
	unsigned long flags;
	u32 changed_ep_bitmask;

	xhci = hcd_to_xhci(hcd);
	vdev = xhci->devs[udev->slot_id];

	/* Set up a configure endpoint command to remove the streams rings */
	spin_lock_irqsave(&xhci->lock, flags);
	changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
			udev, eps, num_eps);
	if (changed_ep_bitmask == 0) {
		spin_unlock_irqrestore(&xhci->lock, flags);
		return -EINVAL;
	}

	/* Use the xhci_command structure from the first endpoint.  We may have
	 * allocated too many, but the driver may call xhci_free_streams() for
	 * each endpoint it grouped into one call to xhci_alloc_streams().
	 */
	ep_index = xhci_get_endpoint_index(&eps[0]->desc);
	command = vdev->eps[ep_index].stream_info->free_streams_command;
3671
	ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3672
	if (!ctrl_ctx) {
3673
		spin_unlock_irqrestore(&xhci->lock, flags);
3674 3675 3676 3677 3678
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		return -EINVAL;
	}

3679 3680 3681 3682 3683 3684 3685 3686 3687 3688
	for (i = 0; i < num_eps; i++) {
		struct xhci_ep_ctx *ep_ctx;

		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
		ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
		xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
			EP_GETTING_NO_STREAMS;

		xhci_endpoint_copy(xhci, command->in_ctx,
				vdev->out_ctx, ep_index);
3689
		xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3690 3691 3692
				&vdev->eps[ep_index]);
	}
	xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3693 3694
			vdev->out_ctx, ctrl_ctx,
			changed_ep_bitmask, changed_ep_bitmask);
3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712
	spin_unlock_irqrestore(&xhci->lock, flags);

	/* Issue and wait for the configure endpoint command,
	 * which must succeed.
	 */
	ret = xhci_configure_endpoint(xhci, udev, command,
			false, true);

	/* xHC rejected the configure endpoint command for some reason, so we
	 * leave the streams rings intact.
	 */
	if (ret < 0)
		return ret;

	spin_lock_irqsave(&xhci->lock, flags);
	for (i = 0; i < num_eps; i++) {
		ep_index = xhci_get_endpoint_index(&eps[i]->desc);
		xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3713
		vdev->eps[ep_index].stream_info = NULL;
3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724
		/* FIXME Unset maxPstreams in endpoint context and
		 * update deq ptr to point to normal string ring.
		 */
		vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
		vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
	}
	spin_unlock_irqrestore(&xhci->lock, flags);

	return 0;
}

3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746
/*
 * Deletes endpoint resources for endpoints that were active before a Reset
 * Device command, or a Disable Slot command.  The Reset Device command leaves
 * the control endpoint intact, whereas the Disable Slot command deletes it.
 *
 * Must be called with xhci->lock held.
 */
void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
	struct xhci_virt_device *virt_dev, bool drop_control_ep)
{
	int i;
	unsigned int num_dropped_eps = 0;
	unsigned int drop_flags = 0;

	for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
		if (virt_dev->eps[i].ring) {
			drop_flags |= 1 << i;
			num_dropped_eps++;
		}
	}
	xhci->num_active_eps -= num_dropped_eps;
	if (num_dropped_eps)
3747 3748 3749
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"Dropped %u ep ctxs, flags = 0x%x, "
				"%u now active.",
3750 3751 3752 3753
				num_dropped_eps, drop_flags,
				xhci->num_active_eps);
}

3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764
/*
 * This submits a Reset Device Command, which will set the device state to 0,
 * set the device address to 0, and disable all the endpoints except the default
 * control endpoint.  The USB core should come back and call
 * xhci_address_device(), and then re-set up the configuration.  If this is
 * called because of a usb_reset_and_verify_device(), then the old alternate
 * settings will be re-installed through the normal bandwidth allocation
 * functions.
 *
 * Wait for the Reset Device command to finish.  Remove all structures
 * associated with the endpoints that were disabled.  Clear the input device
M
Mathias Nyman 已提交
3765
 * structure? Reset the control endpoint 0 max packet size?
3766 3767 3768 3769 3770
 *
 * If the virt_dev to be reset does not exist or does not match the udev,
 * it means the device is lost, possibly due to the xHC restore error and
 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
 * re-allocate the device.
3771
 */
3772 3773
static int xhci_discover_or_reset_device(struct usb_hcd *hcd,
		struct usb_device *udev)
3774 3775 3776 3777 3778 3779 3780
{
	int ret, i;
	unsigned long flags;
	struct xhci_hcd *xhci;
	unsigned int slot_id;
	struct xhci_virt_device *virt_dev;
	struct xhci_command *reset_device_cmd;
3781
	struct xhci_slot_ctx *slot_ctx;
3782
	int old_active_eps = 0;
3783

3784
	ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3785 3786 3787 3788 3789
	if (ret <= 0)
		return ret;
	xhci = hcd_to_xhci(hcd);
	slot_id = udev->slot_id;
	virt_dev = xhci->devs[slot_id];
3790 3791 3792 3793 3794 3795 3796 3797 3798 3799
	if (!virt_dev) {
		xhci_dbg(xhci, "The device to be reset with slot ID %u does "
				"not exist. Re-allocate the device\n", slot_id);
		ret = xhci_alloc_dev(hcd, udev);
		if (ret == 1)
			return 0;
		else
			return -EINVAL;
	}

3800 3801 3802
	if (virt_dev->tt_info)
		old_active_eps = virt_dev->tt_info->active_eps;

3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816
	if (virt_dev->udev != udev) {
		/* If the virt_dev and the udev does not match, this virt_dev
		 * may belong to another udev.
		 * Re-allocate the device.
		 */
		xhci_dbg(xhci, "The device to be reset with slot ID %u does "
				"not match the udev. Re-allocate the device\n",
				slot_id);
		ret = xhci_alloc_dev(hcd, udev);
		if (ret == 1)
			return 0;
		else
			return -EINVAL;
	}
3817

3818 3819 3820 3821 3822 3823
	/* If device is not setup, there is no point in resetting it */
	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
	if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
						SLOT_STATE_DISABLED)
		return 0;

3824 3825
	trace_xhci_discover_or_reset_device(slot_ctx);

3826 3827 3828 3829 3830 3831 3832
	xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
	/* Allocate the command structure that holds the struct completion.
	 * Assume we're in process context, since the normal device reset
	 * process has to wait for the device anyway.  Storage devices are
	 * reset as part of error handling, so use GFP_NOIO instead of
	 * GFP_KERNEL.
	 */
3833
	reset_device_cmd = xhci_alloc_command(xhci, true, GFP_NOIO);
3834 3835 3836 3837 3838 3839 3840
	if (!reset_device_cmd) {
		xhci_dbg(xhci, "Couldn't allocate command structure.\n");
		return -ENOMEM;
	}

	/* Attempt to submit the Reset Device command to the command ring */
	spin_lock_irqsave(&xhci->lock, flags);
3841

3842
	ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3843 3844 3845 3846 3847 3848 3849 3850 3851
	if (ret) {
		xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
		spin_unlock_irqrestore(&xhci->lock, flags);
		goto command_cleanup;
	}
	xhci_ring_cmd_db(xhci);
	spin_unlock_irqrestore(&xhci->lock, flags);

	/* Wait for the Reset Device command to finish */
3852
	wait_for_completion(reset_device_cmd->completion);
3853 3854 3855 3856 3857 3858 3859

	/* The Reset Device command can't fail, according to the 0.95/0.96 spec,
	 * unless we tried to reset a slot ID that wasn't enabled,
	 * or the device wasn't in the addressed or configured state.
	 */
	ret = reset_device_cmd->status;
	switch (ret) {
3860
	case COMP_COMMAND_ABORTED:
3861
	case COMP_COMMAND_RING_STOPPED:
3862 3863 3864
		xhci_warn(xhci, "Timeout waiting for reset device command\n");
		ret = -ETIME;
		goto command_cleanup;
3865 3866
	case COMP_SLOT_NOT_ENABLED_ERROR: /* 0.95 completion for bad slot ID */
	case COMP_CONTEXT_STATE_ERROR: /* 0.96 completion code for same thing */
3867
		xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3868 3869
				slot_id,
				xhci_get_slot_state(xhci, virt_dev->out_ctx));
3870
		xhci_dbg(xhci, "Not freeing device rings.\n");
3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885
		/* Don't treat this as an error.  May change my mind later. */
		ret = 0;
		goto command_cleanup;
	case COMP_SUCCESS:
		xhci_dbg(xhci, "Successful reset device command.\n");
		break;
	default:
		if (xhci_is_vendor_info_code(xhci, ret))
			break;
		xhci_warn(xhci, "Unknown completion code %u for "
				"reset device command.\n", ret);
		ret = -EINVAL;
		goto command_cleanup;
	}

3886 3887 3888 3889 3890 3891 3892 3893
	/* Free up host controller endpoint resources */
	if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
		spin_lock_irqsave(&xhci->lock, flags);
		/* Don't delete the default control endpoint resources */
		xhci_free_device_endpoint_resources(xhci, virt_dev, false);
		spin_unlock_irqrestore(&xhci->lock, flags);
	}

M
Mathias Nyman 已提交
3894
	/* Everything but endpoint 0 is disabled, so free the rings. */
3895
	for (i = 1; i < 31; i++) {
3896 3897 3898
		struct xhci_virt_ep *ep = &virt_dev->eps[i];

		if (ep->ep_state & EP_HAS_STREAMS) {
3899 3900
			xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
					xhci_get_endpoint_address(i));
3901 3902 3903 3904 3905 3906
			xhci_free_stream_info(xhci, ep->stream_info);
			ep->stream_info = NULL;
			ep->ep_state &= ~EP_HAS_STREAMS;
		}

		if (ep->ring) {
3907
			xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
M
Mathias Nyman 已提交
3908
			xhci_free_endpoint_ring(xhci, virt_dev, i);
3909
		}
3910 3911 3912 3913 3914 3915 3916
		if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
			xhci_drop_ep_from_interval_table(xhci,
					&virt_dev->eps[i].bw_info,
					virt_dev->bw_table,
					udev,
					&virt_dev->eps[i],
					virt_dev->tt_info);
3917
		xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3918
	}
3919 3920
	/* If necessary, update the number of active TTs on this root port */
	xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3921
	virt_dev->flags = 0;
3922 3923 3924 3925 3926 3927 3928
	ret = 0;

command_cleanup:
	xhci_free_command(xhci, reset_device_cmd);
	return ret;
}

3929 3930 3931 3932 3933
/*
 * At this point, the struct usb_device is about to go away, the device has
 * disconnected, and all traffic has been stopped and the endpoints have been
 * disabled.  Free any HC data structures associated with that device.
 */
3934
static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3935 3936
{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3937
	struct xhci_virt_device *virt_dev;
3938
	struct xhci_slot_ctx *slot_ctx;
3939
	int i, ret;
3940

3941 3942 3943 3944 3945 3946
	/*
	 * We called pm_runtime_get_noresume when the device was attached.
	 * Decrement the counter here to allow controller to runtime suspend
	 * if no devices remain.
	 */
	if (xhci->quirks & XHCI_RESET_ON_RESUME)
3947
		pm_runtime_put_noidle(hcd->self.controller);
3948

3949
	ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3950 3951 3952
	/* If the host is halted due to driver unload, we still need to free the
	 * device.
	 */
3953
	if (ret <= 0 && ret != -ENODEV)
3954
		return;
3955

3956
	virt_dev = xhci->devs[udev->slot_id];
3957 3958
	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
	trace_xhci_free_dev(slot_ctx);
3959 3960

	/* Stop any wayward timer functions (which may grab the lock) */
3961
	for (i = 0; i < 31; i++) {
3962
		virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING;
3963 3964
		del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
	}
3965
	virt_dev->udev = NULL;
3966 3967
	xhci_disable_slot(xhci, udev->slot_id);
	xhci_free_virt_device(xhci, udev->slot_id);
3968 3969
}

3970
int xhci_disable_slot(struct xhci_hcd *xhci, u32 slot_id)
3971
{
3972
	struct xhci_command *command;
3973 3974 3975 3976
	unsigned long flags;
	u32 state;
	int ret = 0;

3977
	command = xhci_alloc_command(xhci, true, GFP_KERNEL);
3978 3979 3980
	if (!command)
		return -ENOMEM;

3981 3982
	xhci_debugfs_remove_slot(xhci, slot_id);

3983
	spin_lock_irqsave(&xhci->lock, flags);
3984
	/* Don't disable the slot if the host controller is dead. */
3985
	state = readl(&xhci->op_regs->status);
3986 3987
	if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
			(xhci->xhc_state & XHCI_STATE_HALTED)) {
3988
		spin_unlock_irqrestore(&xhci->lock, flags);
3989
		kfree(command);
3990
		return -ENODEV;
3991 3992
	}

3993 3994 3995
	ret = xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
				slot_id);
	if (ret) {
3996
		spin_unlock_irqrestore(&xhci->lock, flags);
3997
		kfree(command);
3998
		return ret;
3999
	}
4000
	xhci_ring_cmd_db(xhci);
4001
	spin_unlock_irqrestore(&xhci->lock, flags);
4002 4003 4004 4005 4006 4007 4008 4009 4010

	wait_for_completion(command->completion);

	if (command->status != COMP_SUCCESS)
		xhci_warn(xhci, "Unsuccessful disable slot %u command, status %d\n",
			  slot_id, command->status);

	xhci_free_command(xhci, command);

4011
	return ret;
4012 4013
}

4014 4015 4016 4017 4018 4019 4020 4021 4022
/*
 * Checks if we have enough host controller resources for the default control
 * endpoint.
 *
 * Must be called with xhci->lock held.
 */
static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
{
	if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
4023 4024 4025
		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
				"Not enough ep ctxs: "
				"%u active, need to add 1, limit is %u.",
4026 4027 4028 4029
				xhci->num_active_eps, xhci->limit_active_eps);
		return -ENOMEM;
	}
	xhci->num_active_eps += 1;
4030 4031
	xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
			"Adding 1 ep ctx, %u now active.",
4032 4033 4034 4035 4036
			xhci->num_active_eps);
	return 0;
}


4037 4038 4039 4040 4041 4042 4043
/*
 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
 * timed out, or allocating memory failed.  Returns 1 on success.
 */
int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4044 4045
	struct xhci_virt_device *vdev;
	struct xhci_slot_ctx *slot_ctx;
4046
	unsigned long flags;
4047
	int ret, slot_id;
4048 4049
	struct xhci_command *command;

4050
	command = xhci_alloc_command(xhci, true, GFP_KERNEL);
4051 4052
	if (!command)
		return 0;
4053 4054

	spin_lock_irqsave(&xhci->lock, flags);
4055
	ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
4056 4057 4058
	if (ret) {
		spin_unlock_irqrestore(&xhci->lock, flags);
		xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
4059
		xhci_free_command(xhci, command);
4060 4061
		return 0;
	}
4062
	xhci_ring_cmd_db(xhci);
4063 4064
	spin_unlock_irqrestore(&xhci->lock, flags);

4065
	wait_for_completion(command->completion);
4066
	slot_id = command->slot_id;
4067

4068
	if (!slot_id || command->status != COMP_SUCCESS) {
4069
		xhci_err(xhci, "Error while assigning device slot ID\n");
4070 4071 4072
		xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
				HCS_MAX_SLOTS(
					readl(&xhci->cap_regs->hcs_params1)));
4073
		xhci_free_command(xhci, command);
4074 4075
		return 0;
	}
4076

4077 4078
	xhci_free_command(xhci, command);

4079 4080 4081 4082 4083 4084 4085 4086 4087 4088 4089 4090 4091
	if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
		spin_lock_irqsave(&xhci->lock, flags);
		ret = xhci_reserve_host_control_ep_resources(xhci);
		if (ret) {
			spin_unlock_irqrestore(&xhci->lock, flags);
			xhci_warn(xhci, "Not enough host resources, "
					"active endpoint contexts = %u\n",
					xhci->num_active_eps);
			goto disable_slot;
		}
		spin_unlock_irqrestore(&xhci->lock, flags);
	}
	/* Use GFP_NOIO, since this function can be called from
4092 4093 4094
	 * xhci_discover_or_reset_device(), which may be called as part of
	 * mass storage driver error handling.
	 */
4095
	if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
4096
		xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
4097
		goto disable_slot;
4098
	}
4099 4100 4101 4102
	vdev = xhci->devs[slot_id];
	slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
	trace_xhci_alloc_dev(slot_ctx);

4103
	udev->slot_id = slot_id;
4104

4105 4106
	xhci_debugfs_create_slot(xhci, slot_id);

4107 4108 4109 4110 4111
	/*
	 * If resetting upon resume, we can't put the controller into runtime
	 * suspend if there is a device attached.
	 */
	if (xhci->quirks & XHCI_RESET_ON_RESUME)
4112
		pm_runtime_get_noresume(hcd->self.controller);
4113

4114 4115 4116
	/* Is this a LS or FS device under a HS hub? */
	/* Hub or peripherial? */
	return 1;
4117 4118

disable_slot:
4119 4120
	xhci_disable_slot(xhci, udev->slot_id);
	xhci_free_virt_device(xhci, udev->slot_id);
4121 4122

	return 0;
4123 4124 4125
}

/*
4126 4127
 * Issue an Address Device command and optionally send a corresponding
 * SetAddress request to the device.
4128
 */
4129 4130
static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
			     enum xhci_setup_dev setup)
4131
{
4132
	const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
4133 4134 4135 4136
	unsigned long flags;
	struct xhci_virt_device *virt_dev;
	int ret = 0;
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4137 4138
	struct xhci_slot_ctx *slot_ctx;
	struct xhci_input_control_ctx *ctrl_ctx;
4139
	u64 temp_64;
4140 4141 4142
	struct xhci_command *command = NULL;

	mutex_lock(&xhci->mutex);
4143

4144 4145
	if (xhci->xhc_state) {	/* dying, removing or halted */
		ret = -ESHUTDOWN;
4146
		goto out;
4147
	}
4148

4149
	if (!udev->slot_id) {
4150 4151
		xhci_dbg_trace(xhci, trace_xhci_dbg_address,
				"Bad Slot ID %d", udev->slot_id);
4152 4153
		ret = -EINVAL;
		goto out;
4154 4155 4156 4157
	}

	virt_dev = xhci->devs[udev->slot_id];

4158 4159 4160 4161 4162 4163 4164 4165
	if (WARN_ON(!virt_dev)) {
		/*
		 * In plug/unplug torture test with an NEC controller,
		 * a zero-dereference was observed once due to virt_dev = 0.
		 * Print useful debug rather than crash if it is observed again!
		 */
		xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
			udev->slot_id);
4166 4167
		ret = -EINVAL;
		goto out;
4168
	}
4169 4170
	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
	trace_xhci_setup_device_slot(slot_ctx);
4171

4172 4173 4174 4175
	if (setup == SETUP_CONTEXT_ONLY) {
		if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
		    SLOT_STATE_DEFAULT) {
			xhci_dbg(xhci, "Slot already in default state\n");
4176
			goto out;
4177 4178 4179
		}
	}

4180
	command = xhci_alloc_command(xhci, true, GFP_KERNEL);
4181 4182 4183 4184
	if (!command) {
		ret = -ENOMEM;
		goto out;
	}
4185 4186 4187

	command->in_ctx = virt_dev->in_ctx;

4188
	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
4189
	ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
4190 4191 4192
	if (!ctrl_ctx) {
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
4193 4194
		ret = -EINVAL;
		goto out;
4195
	}
4196 4197 4198 4199 4200 4201
	/*
	 * If this is the first Set Address since device plug-in or
	 * virt_device realloaction after a resume with an xHCI power loss,
	 * then set up the slot context.
	 */
	if (!slot_ctx->dev_info)
4202
		xhci_setup_addressable_virt_dev(xhci, udev);
4203
	/* Otherwise, update the control endpoint ring enqueue pointer. */
4204 4205
	else
		xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
4206 4207 4208
	ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
	ctrl_ctx->drop_flags = 0;

4209
	trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
4210
				le32_to_cpu(slot_ctx->dev_info) >> 27);
4211

4212
	trace_xhci_address_ctrl_ctx(ctrl_ctx);
4213
	spin_lock_irqsave(&xhci->lock, flags);
4214
	trace_xhci_setup_device(virt_dev);
4215
	ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
4216
					udev->slot_id, setup);
4217 4218
	if (ret) {
		spin_unlock_irqrestore(&xhci->lock, flags);
4219 4220
		xhci_dbg_trace(xhci, trace_xhci_dbg_address,
				"FIXME: allocate a command ring segment");
4221
		goto out;
4222
	}
4223
	xhci_ring_cmd_db(xhci);
4224 4225 4226
	spin_unlock_irqrestore(&xhci->lock, flags);

	/* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
4227 4228
	wait_for_completion(command->completion);

4229 4230 4231 4232
	/* FIXME: From section 4.3.4: "Software shall be responsible for timing
	 * the SetAddress() "recovery interval" required by USB and aborting the
	 * command on a timeout.
	 */
4233
	switch (command->status) {
4234
	case COMP_COMMAND_ABORTED:
4235
	case COMP_COMMAND_RING_STOPPED:
4236 4237 4238
		xhci_warn(xhci, "Timeout while waiting for setup device command\n");
		ret = -ETIME;
		break;
4239 4240
	case COMP_CONTEXT_STATE_ERROR:
	case COMP_SLOT_NOT_ENABLED_ERROR:
4241 4242
		xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
			 act, udev->slot_id);
4243 4244
		ret = -EINVAL;
		break;
4245
	case COMP_USB_TRANSACTION_ERROR:
4246
		dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
4247 4248 4249

		mutex_unlock(&xhci->mutex);
		ret = xhci_disable_slot(xhci, udev->slot_id);
4250
		xhci_free_virt_device(xhci, udev->slot_id);
4251 4252 4253 4254 4255
		if (!ret)
			xhci_alloc_dev(hcd, udev);
		kfree(command->completion);
		kfree(command);
		return -EPROTO;
4256
	case COMP_INCOMPATIBLE_DEVICE_ERROR:
4257 4258
		dev_warn(&udev->dev,
			 "ERROR: Incompatible device for setup %s command\n", act);
A
Alex He 已提交
4259 4260
		ret = -ENODEV;
		break;
4261
	case COMP_SUCCESS:
4262
		xhci_dbg_trace(xhci, trace_xhci_dbg_address,
4263
			       "Successful setup %s command", act);
4264 4265
		break;
	default:
4266 4267
		xhci_err(xhci,
			 "ERROR: unexpected setup %s command completion code 0x%x.\n",
4268
			 act, command->status);
4269
		trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
4270 4271 4272
		ret = -EINVAL;
		break;
	}
4273 4274
	if (ret)
		goto out;
4275
	temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
4276 4277 4278 4279 4280 4281 4282 4283 4284 4285
	xhci_dbg_trace(xhci, trace_xhci_dbg_address,
			"Op regs DCBAA ptr = %#016llx", temp_64);
	xhci_dbg_trace(xhci, trace_xhci_dbg_address,
		"Slot ID %d dcbaa entry @%p = %#016llx",
		udev->slot_id,
		&xhci->dcbaa->dev_context_ptrs[udev->slot_id],
		(unsigned long long)
		le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
	xhci_dbg_trace(xhci, trace_xhci_dbg_address,
			"Output Context DMA address = %#08llx",
4286
			(unsigned long long)virt_dev->out_ctx->dma);
4287
	trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
4288
				le32_to_cpu(slot_ctx->dev_info) >> 27);
4289 4290 4291 4292
	/*
	 * USB core uses address 1 for the roothubs, so we add one to the
	 * address given back to us by the HC.
	 */
4293
	trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
4294
				le32_to_cpu(slot_ctx->dev_info) >> 27);
4295
	/* Zero the input context control for later use */
4296 4297
	ctrl_ctx->add_flags = 0;
	ctrl_ctx->drop_flags = 0;
J
Jim Lin 已提交
4298 4299
	slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
	udev->devaddr = (u8)(le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
4300

4301
	xhci_dbg_trace(xhci, trace_xhci_dbg_address,
4302 4303
		       "Internal device address = %d",
		       le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
4304 4305
out:
	mutex_unlock(&xhci->mutex);
4306 4307 4308 4309
	if (command) {
		kfree(command->completion);
		kfree(command);
	}
4310
	return ret;
4311 4312
}

4313
static int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
4314 4315 4316 4317
{
	return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
}

4318
static int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
4319 4320 4321 4322
{
	return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
}

4323 4324 4325 4326 4327 4328 4329 4330
/*
 * Transfer the port index into real index in the HW port status
 * registers. Caculate offset between the port's PORTSC register
 * and port status base. Divide the number of per port register
 * to get the real index. The raw port number bases 1.
 */
int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
{
4331
	struct xhci_hub *rhub;
4332

4333 4334
	rhub = xhci_get_rhub(hcd);
	return rhub->ports[port1 - 1]->hw_portnum + 1;
4335 4336
}

4337 4338 4339 4340
/*
 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
 * slot context.  If that succeeds, store the new MEL in the xhci_virt_device.
 */
4341
static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
4342 4343 4344 4345 4346 4347 4348 4349 4350
			struct usb_device *udev, u16 max_exit_latency)
{
	struct xhci_virt_device *virt_dev;
	struct xhci_command *command;
	struct xhci_input_control_ctx *ctrl_ctx;
	struct xhci_slot_ctx *slot_ctx;
	unsigned long flags;
	int ret;

4351 4352 4353 4354
	command = xhci_alloc_command_with_ctx(xhci, true, GFP_KERNEL);
	if (!command)
		return -ENOMEM;

4355
	spin_lock_irqsave(&xhci->lock, flags);
4356 4357 4358 4359 4360 4361 4362 4363 4364 4365

	virt_dev = xhci->devs[udev->slot_id];

	/*
	 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
	 * xHC was re-initialized. Exit latency will be set later after
	 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
	 */

	if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
4366 4367 4368 4369 4370
		spin_unlock_irqrestore(&xhci->lock, flags);
		return 0;
	}

	/* Attempt to issue an Evaluate Context command to change the MEL. */
4371
	ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
4372 4373
	if (!ctrl_ctx) {
		spin_unlock_irqrestore(&xhci->lock, flags);
4374
		xhci_free_command(xhci, command);
4375 4376 4377 4378 4379
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		return -ENOMEM;
	}

4380 4381 4382 4383 4384 4385 4386
	xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
	spin_unlock_irqrestore(&xhci->lock, flags);

	ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
	slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
	slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
	slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4387
	slot_ctx->dev_state = 0;
4388

4389 4390
	xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
			"Set up evaluate context for LPM MEL change.");
4391 4392 4393 4394 4395 4396 4397 4398 4399 4400

	/* Issue and wait for the evaluate context command. */
	ret = xhci_configure_endpoint(xhci, udev, command,
			true, true);

	if (!ret) {
		spin_lock_irqsave(&xhci->lock, flags);
		virt_dev->current_mel = max_exit_latency;
		spin_unlock_irqrestore(&xhci->lock, flags);
	}
4401 4402 4403

	xhci_free_command(xhci, command);

4404 4405 4406
	return ret;
}

4407
#ifdef CONFIG_PM
A
Andiry Xu 已提交
4408 4409 4410 4411 4412 4413

/* BESL to HIRD Encoding array for USB2 LPM */
static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
	3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};

/* Calculate HIRD/BESL for USB2 PORTPMSC*/
4414 4415
static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
					struct usb_device *udev)
A
Andiry Xu 已提交
4416
{
4417 4418 4419 4420 4421 4422
	int u2del, besl, besl_host;
	int besl_device = 0;
	u32 field;

	u2del = HCS_U2_LATENCY(xhci->hcs_params3);
	field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
A
Andiry Xu 已提交
4423

4424 4425 4426
	if (field & USB_BESL_SUPPORT) {
		for (besl_host = 0; besl_host < 16; besl_host++) {
			if (xhci_besl_encoding[besl_host] >= u2del)
A
Andiry Xu 已提交
4427 4428
				break;
		}
4429 4430 4431 4432 4433
		/* Use baseline BESL value as default */
		if (field & USB_BESL_BASELINE_VALID)
			besl_device = USB_GET_BESL_BASELINE(field);
		else if (field & USB_BESL_DEEP_VALID)
			besl_device = USB_GET_BESL_DEEP(field);
A
Andiry Xu 已提交
4434 4435
	} else {
		if (u2del <= 50)
4436
			besl_host = 0;
A
Andiry Xu 已提交
4437
		else
4438
			besl_host = (u2del - 51) / 75 + 1;
A
Andiry Xu 已提交
4439 4440
	}

4441 4442 4443 4444 4445
	besl = besl_host + besl_device;
	if (besl > 15)
		besl = 15;

	return besl;
A
Andiry Xu 已提交
4446 4447
}

4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458
/* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
{
	u32 field;
	int l1;
	int besld = 0;
	int hirdm = 0;

	field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);

	/* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4459
	l1 = udev->l1_params.timeout / 256;
4460 4461 4462 4463 4464 4465 4466 4467 4468 4469

	/* device has preferred BESLD */
	if (field & USB_BESL_DEEP_VALID) {
		besld = USB_GET_BESL_DEEP(field);
		hirdm = 1;
	}

	return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
}

4470
static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
A
Andiry Xu 已提交
4471 4472 4473
			struct usb_device *udev, int enable)
{
	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
4474
	struct xhci_port **ports;
4475 4476
	__le32 __iomem	*pm_addr, *hlpm_addr;
	u32		pm_val, hlpm_val, field;
A
Andiry Xu 已提交
4477 4478
	unsigned int	port_num;
	unsigned long	flags;
4479 4480
	int		hird, exit_latency;
	int		ret;
A
Andiry Xu 已提交
4481

4482 4483 4484
	if (xhci->quirks & XHCI_HW_LPM_DISABLE)
		return -EPERM;

4485
	if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support ||
A
Andiry Xu 已提交
4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497
			!udev->lpm_capable)
		return -EPERM;

	if (!udev->parent || udev->parent->parent ||
			udev->descriptor.bDeviceClass == USB_CLASS_HUB)
		return -EPERM;

	if (udev->usb2_hw_lpm_capable != 1)
		return -EPERM;

	spin_lock_irqsave(&xhci->lock, flags);

4498
	ports = xhci->usb2_rhub.ports;
A
Andiry Xu 已提交
4499
	port_num = udev->portnum - 1;
4500
	pm_addr = ports[port_num]->addr + PORTPMSC;
4501
	pm_val = readl(pm_addr);
4502
	hlpm_addr = ports[port_num]->addr + PORTHLPMC;
A
Andiry Xu 已提交
4503 4504

	xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4505
			enable ? "enable" : "disable", port_num + 1);
A
Andiry Xu 已提交
4506

4507
	if (enable) {
4508 4509 4510 4511 4512 4513
		/* Host supports BESL timeout instead of HIRD */
		if (udev->usb2_hw_lpm_besl_capable) {
			/* if device doesn't have a preferred BESL value use a
			 * default one which works with mixed HIRD and BESL
			 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
			 */
4514
			field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4515 4516 4517 4518
			if ((field & USB_BESL_SUPPORT) &&
			    (field & USB_BESL_BASELINE_VALID))
				hird = USB_GET_BESL_BASELINE(field);
			else
4519
				hird = udev->l1_params.besl;
4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530

			exit_latency = xhci_besl_encoding[hird];
			spin_unlock_irqrestore(&xhci->lock, flags);

			ret = xhci_change_max_exit_latency(xhci, udev,
							   exit_latency);
			if (ret < 0)
				return ret;
			spin_lock_irqsave(&xhci->lock, flags);

			hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4531
			writel(hlpm_val, hlpm_addr);
4532
			/* flush write */
4533
			readl(hlpm_addr);
4534 4535 4536 4537 4538
		} else {
			hird = xhci_calculate_hird_besl(xhci, udev);
		}

		pm_val &= ~PORT_HIRD_MASK;
4539
		pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4540
		writel(pm_val, pm_addr);
4541
		pm_val = readl(pm_addr);
4542
		pm_val |= PORT_HLE;
4543
		writel(pm_val, pm_addr);
4544
		/* flush write */
4545
		readl(pm_addr);
A
Andiry Xu 已提交
4546
	} else {
4547
		pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4548
		writel(pm_val, pm_addr);
4549
		/* flush write */
4550
		readl(pm_addr);
4551 4552 4553
		if (udev->usb2_hw_lpm_besl_capable) {
			spin_unlock_irqrestore(&xhci->lock, flags);
			xhci_change_max_exit_latency(xhci, udev, 0);
4554 4555 4556
			readl_poll_timeout(ports[port_num]->addr, pm_val,
					   (pm_val & PORT_PLS_MASK) == XDEV_U0,
					   100, 10000);
4557 4558
			return 0;
		}
A
Andiry Xu 已提交
4559 4560 4561 4562 4563 4564
	}

	spin_unlock_irqrestore(&xhci->lock, flags);
	return 0;
}

4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587
/* check if a usb2 port supports a given extened capability protocol
 * only USB2 ports extended protocol capability values are cached.
 * Return 1 if capability is supported
 */
static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
					   unsigned capability)
{
	u32 port_offset, port_count;
	int i;

	for (i = 0; i < xhci->num_ext_caps; i++) {
		if (xhci->ext_caps[i] & capability) {
			/* port offsets starts at 1 */
			port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
			port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
			if (port >= port_offset &&
			    port < port_offset + port_count)
				return 1;
		}
	}
	return 0;
}

4588
static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4589 4590
{
	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
4591
	int		portnum = udev->portnum - 1;
4592

Z
Zeng Tao 已提交
4593
	if (hcd->speed >= HCD_USB3 || !udev->lpm_capable)
4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609
		return 0;

	/* we only support lpm for non-hub device connected to root hub yet */
	if (!udev->parent || udev->parent->parent ||
			udev->descriptor.bDeviceClass == USB_CLASS_HUB)
		return 0;

	if (xhci->hw_lpm_support == 1 &&
			xhci_check_usb2_port_capability(
				xhci, portnum, XHCI_HLC)) {
		udev->usb2_hw_lpm_capable = 1;
		udev->l1_params.timeout = XHCI_L1_TIMEOUT;
		udev->l1_params.besl = XHCI_DEFAULT_BESL;
		if (xhci_check_usb2_port_capability(xhci, portnum,
					XHCI_BLC))
			udev->usb2_hw_lpm_besl_capable = 1;
4610 4611 4612 4613 4614
	}

	return 0;
}

4615 4616
/*---------------------- USB 3.0 Link PM functions ------------------------*/

4617 4618 4619 4620
/* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
static unsigned long long xhci_service_interval_to_ns(
		struct usb_endpoint_descriptor *desc)
{
O
Oliver Neukum 已提交
4621
	return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4622 4623
}

4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648
static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
		enum usb3_link_state state)
{
	unsigned long long sel;
	unsigned long long pel;
	unsigned int max_sel_pel;
	char *state_name;

	switch (state) {
	case USB3_LPM_U1:
		/* Convert SEL and PEL stored in nanoseconds to microseconds */
		sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
		pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
		max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
		state_name = "U1";
		break;
	case USB3_LPM_U2:
		sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
		pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
		max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
		state_name = "U2";
		break;
	default:
		dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
				__func__);
S
Sarah Sharp 已提交
4649
		return USB3_LPM_DISABLED;
4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660
	}

	if (sel <= max_sel_pel && pel <= max_sel_pel)
		return USB3_LPM_DEVICE_INITIATED;

	if (sel > max_sel_pel)
		dev_dbg(&udev->dev, "Device-initiated %s disabled "
				"due to long SEL %llu ms\n",
				state_name, sel);
	else
		dev_dbg(&udev->dev, "Device-initiated %s disabled "
J
Joe Perches 已提交
4661
				"due to long PEL %llu ms\n",
4662 4663 4664 4665
				state_name, pel);
	return USB3_LPM_DISABLED;
}

4666
/* The U1 timeout should be the maximum of the following values:
4667 4668 4669 4670 4671 4672 4673
 *  - For control endpoints, U1 system exit latency (SEL) * 3
 *  - For bulk endpoints, U1 SEL * 5
 *  - For interrupt endpoints:
 *    - Notification EPs, U1 SEL * 3
 *    - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
 *  - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
 */
4674 4675
static unsigned long long xhci_calculate_intel_u1_timeout(
		struct usb_device *udev,
4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696
		struct usb_endpoint_descriptor *desc)
{
	unsigned long long timeout_ns;
	int ep_type;
	int intr_type;

	ep_type = usb_endpoint_type(desc);
	switch (ep_type) {
	case USB_ENDPOINT_XFER_CONTROL:
		timeout_ns = udev->u1_params.sel * 3;
		break;
	case USB_ENDPOINT_XFER_BULK:
		timeout_ns = udev->u1_params.sel * 5;
		break;
	case USB_ENDPOINT_XFER_INT:
		intr_type = usb_endpoint_interrupt_type(desc);
		if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
			timeout_ns = udev->u1_params.sel * 3;
			break;
		}
		/* Otherwise the calculation is the same as isoc eps */
4697
		fallthrough;
4698 4699
	case USB_ENDPOINT_XFER_ISOC:
		timeout_ns = xhci_service_interval_to_ns(desc);
4700
		timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4701 4702 4703 4704 4705 4706 4707
		if (timeout_ns < udev->u1_params.sel * 2)
			timeout_ns = udev->u1_params.sel * 2;
		break;
	default:
		return 0;
	}

4708 4709 4710 4711 4712 4713 4714 4715 4716 4717
	return timeout_ns;
}

/* Returns the hub-encoded U1 timeout value. */
static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
		struct usb_device *udev,
		struct usb_endpoint_descriptor *desc)
{
	unsigned long long timeout_ns;

4718 4719
	/* Prevent U1 if service interval is shorter than U1 exit latency */
	if (usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) {
4720
		if (xhci_service_interval_to_ns(desc) <= udev->u1_params.mel) {
4721 4722 4723 4724 4725
			dev_dbg(&udev->dev, "Disable U1, ESIT shorter than exit latency\n");
			return USB3_LPM_DISABLED;
		}
	}

4726 4727 4728 4729 4730
	if (xhci->quirks & XHCI_INTEL_HOST)
		timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
	else
		timeout_ns = udev->u1_params.sel;

4731 4732 4733
	/* The U1 timeout is encoded in 1us intervals.
	 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
	 */
4734
	if (timeout_ns == USB3_LPM_DISABLED)
4735 4736 4737
		timeout_ns = 1;
	else
		timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748

	/* If the necessary timeout value is bigger than what we can set in the
	 * USB 3.0 hub, we have to disable hub-initiated U1.
	 */
	if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
		return timeout_ns;
	dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
			"due to long timeout %llu ms\n", timeout_ns);
	return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
}

4749
/* The U2 timeout should be the maximum of:
4750 4751 4752 4753 4754
 *  - 10 ms (to avoid the bandwidth impact on the scheduler)
 *  - largest bInterval of any active periodic endpoint (to avoid going
 *    into lower power link states between intervals).
 *  - the U2 Exit Latency of the device
 */
4755 4756
static unsigned long long xhci_calculate_intel_u2_timeout(
		struct usb_device *udev,
4757 4758 4759 4760 4761 4762 4763 4764 4765 4766 4767
		struct usb_endpoint_descriptor *desc)
{
	unsigned long long timeout_ns;
	unsigned long long u2_del_ns;

	timeout_ns = 10 * 1000 * 1000;

	if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
			(xhci_service_interval_to_ns(desc) > timeout_ns))
		timeout_ns = xhci_service_interval_to_ns(desc);

4768
	u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4769 4770 4771
	if (u2_del_ns > timeout_ns)
		timeout_ns = u2_del_ns;

4772 4773 4774 4775 4776 4777 4778 4779 4780 4781
	return timeout_ns;
}

/* Returns the hub-encoded U2 timeout value. */
static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
		struct usb_device *udev,
		struct usb_endpoint_descriptor *desc)
{
	unsigned long long timeout_ns;

4782 4783
	/* Prevent U2 if service interval is shorter than U2 exit latency */
	if (usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) {
4784
		if (xhci_service_interval_to_ns(desc) <= udev->u2_params.mel) {
4785 4786 4787 4788 4789
			dev_dbg(&udev->dev, "Disable U2, ESIT shorter than exit latency\n");
			return USB3_LPM_DISABLED;
		}
	}

4790 4791 4792 4793 4794
	if (xhci->quirks & XHCI_INTEL_HOST)
		timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
	else
		timeout_ns = udev->u2_params.sel;

4795
	/* The U2 timeout is encoded in 256us intervals */
4796
	timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4797 4798 4799 4800 4801 4802 4803 4804 4805 4806
	/* If the necessary timeout value is bigger than what we can set in the
	 * USB 3.0 hub, we have to disable hub-initiated U2.
	 */
	if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
		return timeout_ns;
	dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
			"due to long timeout %llu ms\n", timeout_ns);
	return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
}

4807 4808 4809 4810 4811 4812
static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
		struct usb_device *udev,
		struct usb_endpoint_descriptor *desc,
		enum usb3_link_state state,
		u16 *timeout)
{
4813 4814 4815 4816
	if (state == USB3_LPM_U1)
		return xhci_calculate_u1_timeout(xhci, udev, desc);
	else if (state == USB3_LPM_U2)
		return xhci_calculate_u2_timeout(xhci, udev, desc);
4817

4818 4819 4820 4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831
	return USB3_LPM_DISABLED;
}

static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
		struct usb_device *udev,
		struct usb_endpoint_descriptor *desc,
		enum usb3_link_state state,
		u16 *timeout)
{
	u16 alt_timeout;

	alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
		desc, state, timeout);

4832
	/* If we found we can't enable hub-initiated LPM, and
4833
	 * the U1 or U2 exit latency was too high to allow
4834 4835
	 * device-initiated LPM as well, then we will disable LPM
	 * for this device, so stop searching any further.
4836
	 */
4837
	if (alt_timeout == USB3_LPM_DISABLED) {
4838 4839 4840 4841 4842 4843 4844 4845 4846 4847 4848 4849 4850 4851 4852 4853 4854 4855 4856 4857 4858 4859 4860 4861
		*timeout = alt_timeout;
		return -E2BIG;
	}
	if (alt_timeout > *timeout)
		*timeout = alt_timeout;
	return 0;
}

static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
		struct usb_device *udev,
		struct usb_host_interface *alt,
		enum usb3_link_state state,
		u16 *timeout)
{
	int j;

	for (j = 0; j < alt->desc.bNumEndpoints; j++) {
		if (xhci_update_timeout_for_endpoint(xhci, udev,
					&alt->endpoint[j].desc, state, timeout))
			return -E2BIG;
	}
	return 0;
}

4862 4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881 4882 4883 4884 4885
static int xhci_check_intel_tier_policy(struct usb_device *udev,
		enum usb3_link_state state)
{
	struct usb_device *parent;
	unsigned int num_hubs;

	if (state == USB3_LPM_U2)
		return 0;

	/* Don't enable U1 if the device is on a 2nd tier hub or lower. */
	for (parent = udev->parent, num_hubs = 0; parent->parent;
			parent = parent->parent)
		num_hubs++;

	if (num_hubs < 2)
		return 0;

	dev_dbg(&udev->dev, "Disabling U1 link state for device"
			" below second-tier hub.\n");
	dev_dbg(&udev->dev, "Plug device into first-tier hub "
			"to decrease power consumption.\n");
	return -E2BIG;
}

4886 4887 4888 4889
static int xhci_check_tier_policy(struct xhci_hcd *xhci,
		struct usb_device *udev,
		enum usb3_link_state state)
{
4890 4891
	if (xhci->quirks & XHCI_INTEL_HOST)
		return xhci_check_intel_tier_policy(udev, state);
4892 4893
	else
		return 0;
4894 4895 4896 4897 4898 4899 4900 4901 4902 4903 4904 4905 4906 4907 4908 4909 4910 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933
}

/* Returns the U1 or U2 timeout that should be enabled.
 * If the tier check or timeout setting functions return with a non-zero exit
 * code, that means the timeout value has been finalized and we shouldn't look
 * at any more endpoints.
 */
static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
			struct usb_device *udev, enum usb3_link_state state)
{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	struct usb_host_config *config;
	char *state_name;
	int i;
	u16 timeout = USB3_LPM_DISABLED;

	if (state == USB3_LPM_U1)
		state_name = "U1";
	else if (state == USB3_LPM_U2)
		state_name = "U2";
	else {
		dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
				state);
		return timeout;
	}

	if (xhci_check_tier_policy(xhci, udev, state) < 0)
		return timeout;

	/* Gather some information about the currently installed configuration
	 * and alternate interface settings.
	 */
	if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
			state, &timeout))
		return timeout;

	config = udev->actconfig;
	if (!config)
		return timeout;

4934
	for (i = 0; i < config->desc.bNumInterfaces; i++) {
4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 4946
		struct usb_driver *driver;
		struct usb_interface *intf = config->interface[i];

		if (!intf)
			continue;

		/* Check if any currently bound drivers want hub-initiated LPM
		 * disabled.
		 */
		if (intf->dev.driver) {
			driver = to_usb_driver(intf->dev.driver);
			if (driver && driver->disable_hub_initiated_lpm) {
4947 4948 4949 4950 4951 4952
				dev_dbg(&udev->dev, "Hub-initiated %s disabled at request of driver %s\n",
					state_name, driver->name);
				timeout = xhci_get_timeout_no_hub_lpm(udev,
								      state);
				if (timeout == USB3_LPM_DISABLED)
					return timeout;
4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 4993 4994 4995 4996 4997 4998 4999
			}
		}

		/* Not sure how this could happen... */
		if (!intf->cur_altsetting)
			continue;

		if (xhci_update_timeout_for_interface(xhci, udev,
					intf->cur_altsetting,
					state, &timeout))
			return timeout;
	}
	return timeout;
}

static int calculate_max_exit_latency(struct usb_device *udev,
		enum usb3_link_state state_changed,
		u16 hub_encoded_timeout)
{
	unsigned long long u1_mel_us = 0;
	unsigned long long u2_mel_us = 0;
	unsigned long long mel_us = 0;
	bool disabling_u1;
	bool disabling_u2;
	bool enabling_u1;
	bool enabling_u2;

	disabling_u1 = (state_changed == USB3_LPM_U1 &&
			hub_encoded_timeout == USB3_LPM_DISABLED);
	disabling_u2 = (state_changed == USB3_LPM_U2 &&
			hub_encoded_timeout == USB3_LPM_DISABLED);

	enabling_u1 = (state_changed == USB3_LPM_U1 &&
			hub_encoded_timeout != USB3_LPM_DISABLED);
	enabling_u2 = (state_changed == USB3_LPM_U2 &&
			hub_encoded_timeout != USB3_LPM_DISABLED);

	/* If U1 was already enabled and we're not disabling it,
	 * or we're going to enable U1, account for the U1 max exit latency.
	 */
	if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
			enabling_u1)
		u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
	if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
			enabling_u2)
		u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);

5000 5001
	mel_us = max(u1_mel_us, u2_mel_us);

5002 5003 5004 5005 5006 5007 5008 5009 5010 5011
	/* xHCI host controller max exit latency field is only 16 bits wide. */
	if (mel_us > MAX_EXIT) {
		dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
				"is too big.\n", mel_us);
		return -E2BIG;
	}
	return mel_us;
}

/* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
5012
static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042
			struct usb_device *udev, enum usb3_link_state state)
{
	struct xhci_hcd	*xhci;
	u16 hub_encoded_timeout;
	int mel;
	int ret;

	xhci = hcd_to_xhci(hcd);
	/* The LPM timeout values are pretty host-controller specific, so don't
	 * enable hub-initiated timeouts unless the vendor has provided
	 * information about their timeout algorithm.
	 */
	if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
			!xhci->devs[udev->slot_id])
		return USB3_LPM_DISABLED;

	hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
	mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
	if (mel < 0) {
		/* Max Exit Latency is too big, disable LPM. */
		hub_encoded_timeout = USB3_LPM_DISABLED;
		mel = 0;
	}

	ret = xhci_change_max_exit_latency(xhci, udev, mel);
	if (ret)
		return ret;
	return hub_encoded_timeout;
}

5043
static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054
			struct usb_device *udev, enum usb3_link_state state)
{
	struct xhci_hcd	*xhci;
	u16 mel;

	xhci = hcd_to_xhci(hcd);
	if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
			!xhci->devs[udev->slot_id])
		return 0;

	mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
5055
	return xhci_change_max_exit_latency(xhci, udev, mel);
5056
}
5057
#else /* CONFIG_PM */
A
Andiry Xu 已提交
5058

5059
static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
5060 5061 5062 5063 5064
				struct usb_device *udev, int enable)
{
	return 0;
}

5065
static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
5066 5067 5068 5069
{
	return 0;
}

5070
static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
5071
			struct usb_device *udev, enum usb3_link_state state)
A
Andiry Xu 已提交
5072
{
5073
	return USB3_LPM_DISABLED;
A
Andiry Xu 已提交
5074 5075
}

5076
static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
5077
			struct usb_device *udev, enum usb3_link_state state)
A
Andiry Xu 已提交
5078 5079 5080
{
	return 0;
}
5081
#endif	/* CONFIG_PM */
A
Andiry Xu 已提交
5082

5083
/*-------------------------------------------------------------------------*/
A
Andiry Xu 已提交
5084

S
Sarah Sharp 已提交
5085 5086 5087
/* Once a hub descriptor is fetched for a device, we need to update the xHC's
 * internal data structures for the device.
 */
5088
static int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
S
Sarah Sharp 已提交
5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105 5106 5107 5108
			struct usb_tt *tt, gfp_t mem_flags)
{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	struct xhci_virt_device *vdev;
	struct xhci_command *config_cmd;
	struct xhci_input_control_ctx *ctrl_ctx;
	struct xhci_slot_ctx *slot_ctx;
	unsigned long flags;
	unsigned think_time;
	int ret;

	/* Ignore root hubs */
	if (!hdev->parent)
		return 0;

	vdev = xhci->devs[hdev->slot_id];
	if (!vdev) {
		xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
		return -EINVAL;
	}
5109

5110
	config_cmd = xhci_alloc_command_with_ctx(xhci, true, mem_flags);
5111
	if (!config_cmd)
S
Sarah Sharp 已提交
5112
		return -ENOMEM;
5113

5114
	ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
5115 5116 5117 5118 5119 5120
	if (!ctrl_ctx) {
		xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
				__func__);
		xhci_free_command(xhci, config_cmd);
		return -ENOMEM;
	}
S
Sarah Sharp 已提交
5121 5122

	spin_lock_irqsave(&xhci->lock, flags);
5123 5124 5125 5126 5127 5128 5129 5130
	if (hdev->speed == USB_SPEED_HIGH &&
			xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
		xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
		xhci_free_command(xhci, config_cmd);
		spin_unlock_irqrestore(&xhci->lock, flags);
		return -ENOMEM;
	}

S
Sarah Sharp 已提交
5131
	xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
M
Matt Evans 已提交
5132
	ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
S
Sarah Sharp 已提交
5133
	slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
M
Matt Evans 已提交
5134
	slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
5135 5136 5137 5138 5139
	/*
	 * refer to section 6.2.2: MTT should be 0 for full speed hub,
	 * but it may be already set to 1 when setup an xHCI virtual
	 * device, so clear it anyway.
	 */
S
Sarah Sharp 已提交
5140
	if (tt->multi)
M
Matt Evans 已提交
5141
		slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
5142 5143 5144
	else if (hdev->speed == USB_SPEED_FULL)
		slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);

S
Sarah Sharp 已提交
5145 5146 5147 5148
	if (xhci->hci_version > 0x95) {
		xhci_dbg(xhci, "xHCI version %x needs hub "
				"TT think time and number of ports\n",
				(unsigned int) xhci->hci_version);
M
Matt Evans 已提交
5149
		slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
S
Sarah Sharp 已提交
5150 5151 5152
		/* Set TT think time - convert from ns to FS bit times.
		 * 0 = 8 FS bit times, 1 = 16 FS bit times,
		 * 2 = 24 FS bit times, 3 = 32 FS bit times.
A
Andiry Xu 已提交
5153 5154 5155
		 *
		 * xHCI 1.0: this field shall be 0 if the device is not a
		 * High-spped hub.
S
Sarah Sharp 已提交
5156 5157 5158 5159
		 */
		think_time = tt->think_time;
		if (think_time != 0)
			think_time = (think_time / 666) - 1;
A
Andiry Xu 已提交
5160 5161 5162
		if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
			slot_ctx->tt_info |=
				cpu_to_le32(TT_THINK_TIME(think_time));
S
Sarah Sharp 已提交
5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187 5188
	} else {
		xhci_dbg(xhci, "xHCI version %x doesn't need hub "
				"TT think time or number of ports\n",
				(unsigned int) xhci->hci_version);
	}
	slot_ctx->dev_state = 0;
	spin_unlock_irqrestore(&xhci->lock, flags);

	xhci_dbg(xhci, "Set up %s for hub device.\n",
			(xhci->hci_version > 0x95) ?
			"configure endpoint" : "evaluate context");

	/* Issue and wait for the configure endpoint or
	 * evaluate context command.
	 */
	if (xhci->hci_version > 0x95)
		ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
				false, false);
	else
		ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
				true, false);

	xhci_free_command(xhci, config_cmd);
	return ret;
}

5189
static int xhci_get_frame(struct usb_hcd *hcd)
5190 5191 5192
{
	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	/* EHCI mods by the periodic size.  Why? */
5193
	return readl(&xhci->run_regs->microframe_index) >> 3;
5194 5195
}

5196 5197 5198
int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
{
	struct xhci_hcd		*xhci;
5199 5200 5201 5202 5203
	/*
	 * TODO: Check with DWC3 clients for sysdev according to
	 * quirks
	 */
	struct device		*dev = hcd->self.sysdev;
5204
	unsigned int		minor_rev;
5205 5206
	int			retval;

5207 5208
	/* Accept arbitrarily long scatter-gather lists */
	hcd->self.sg_tablesize = ~0;
M
Ming Lei 已提交
5209

5210 5211 5212
	/* support to build packet from discontinuous buffers */
	hcd->self.no_sg_constraint = 1;

5213 5214
	/* XHCI controllers don't stop the ep queue on short packets :| */
	hcd->self.no_stop_on_short = 1;
5215

5216 5217
	xhci = hcd_to_xhci(hcd);

5218 5219
	if (usb_hcd_is_primary_hcd(hcd)) {
		xhci->main_hcd = hcd;
5220
		xhci->usb2_rhub.hcd = hcd;
5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232
		/* Mark the first roothub as being USB 2.0.
		 * The xHCI driver will register the USB 3.0 roothub.
		 */
		hcd->speed = HCD_USB2;
		hcd->self.root_hub->speed = USB_SPEED_HIGH;
		/*
		 * USB 2.0 roothub under xHCI has an integrated TT,
		 * (rate matching hub) as opposed to having an OHCI/UHCI
		 * companion controller.
		 */
		hcd->has_tt = 1;
	} else {
5233
		/*
5234 5235 5236 5237 5238 5239 5240
		 * Early xHCI 1.1 spec did not mention USB 3.1 capable hosts
		 * should return 0x31 for sbrn, or that the minor revision
		 * is a two digit BCD containig minor and sub-minor numbers.
		 * This was later clarified in xHCI 1.2.
		 *
		 * Some USB 3.1 capable hosts therefore have sbrn 0x30, and
		 * minor revision set to 0x1 instead of 0x10.
5241
		 */
5242 5243 5244 5245
		if (xhci->usb3_rhub.min_rev == 0x1)
			minor_rev = 1;
		else
			minor_rev = xhci->usb3_rhub.min_rev / 0x10;
5246 5247 5248 5249 5250 5251 5252

		switch (minor_rev) {
		case 2:
			hcd->speed = HCD_USB32;
			hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
			hcd->self.root_hub->rx_lanes = 2;
			hcd->self.root_hub->tx_lanes = 2;
T
Thinh Nguyen 已提交
5253
			hcd->self.root_hub->ssp_rate = USB_SSP_GEN_2x2;
5254 5255
			break;
		case 1:
5256
			hcd->speed = HCD_USB31;
5257
			hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
T
Thinh Nguyen 已提交
5258
			hcd->self.root_hub->ssp_rate = USB_SSP_GEN_2x1;
5259
			break;
5260
		}
5261
		xhci_info(xhci, "Host supports USB 3.%x %sSuperSpeed\n",
5262
			  minor_rev,
5263
			  minor_rev ? "Enhanced " : "");
5264

5265
		xhci->usb3_rhub.hcd = hcd;
5266 5267 5268 5269 5270 5271
		/* xHCI private pointer was set in xhci_pci_probe for the second
		 * registered roothub.
		 */
		return 0;
	}

5272
	mutex_init(&xhci->mutex);
5273 5274
	xhci->cap_regs = hcd->regs;
	xhci->op_regs = hcd->regs +
5275
		HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
5276
	xhci->run_regs = hcd->regs +
5277
		(readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
5278
	/* Cache read-only capability registers */
5279 5280 5281 5282
	xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
	xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
	xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
	xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
5283
	xhci->hci_version = HC_VERSION(xhci->hcc_params);
5284
	xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
5285 5286
	if (xhci->hci_version > 0x100)
		xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
5287

5288
	xhci->quirks |= quirks;
T
Takashi Iwai 已提交
5289

5290 5291
	get_quirks(dev, xhci);

5292 5293 5294 5295 5296 5297 5298
	/* In xhci controllers which follow xhci 1.0 spec gives a spurious
	 * success event after a short transfer. This quirk will ignore such
	 * spurious event.
	 */
	if (xhci->hci_version > 0x96)
		xhci->quirks |= XHCI_SPURIOUS_SUCCESS;

5299 5300 5301
	/* Make sure the HC is halted. */
	retval = xhci_halt(xhci);
	if (retval)
5302
		return retval;
5303

5304 5305
	xhci_zero_64b_regs(xhci);

5306 5307
	xhci_dbg(xhci, "Resetting HCD\n");
	/* Reset the internal HC memory state and registers. */
5308
	retval = xhci_reset(xhci, XHCI_RESET_LONG_USEC);
5309
	if (retval)
5310
		return retval;
5311 5312
	xhci_dbg(xhci, "Reset complete\n");

5313 5314 5315 5316 5317 5318 5319 5320 5321 5322
	/*
	 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
	 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
	 * address memory pointers actually. So, this driver clears the AC64
	 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
	 * DMA_BIT_MASK(32)) in this xhci_gen_setup().
	 */
	if (xhci->quirks & XHCI_NO_64BIT_SUPPORT)
		xhci->hcc_params &= ~BIT(0);

5323 5324 5325 5326
	/* Set dma_mask and coherent_dma_mask to 64-bits,
	 * if xHC supports 64-bit addressing */
	if (HCC_64BIT_ADDR(xhci->hcc_params) &&
			!dma_set_mask(dev, DMA_BIT_MASK(64))) {
5327
		xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
5328
		dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
5329 5330 5331 5332 5333 5334 5335 5336 5337 5338
	} else {
		/*
		 * This is to avoid error in cases where a 32-bit USB
		 * controller is used on a 64-bit capable system.
		 */
		retval = dma_set_mask(dev, DMA_BIT_MASK(32));
		if (retval)
			return retval;
		xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n");
		dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
5339 5340 5341 5342 5343 5344
	}

	xhci_dbg(xhci, "Calling HCD init\n");
	/* Initialize HCD and host controller data structures. */
	retval = xhci_init(hcd);
	if (retval)
5345
		return retval;
5346
	xhci_dbg(xhci, "Called HCD init\n");
5347

M
Marc Zyngier 已提交
5348
	xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%016llx\n",
5349 5350
		  xhci->hcc_params, xhci->hci_version, xhci->quirks);

5351 5352
	return 0;
}
5353
EXPORT_SYMBOL_GPL(xhci_gen_setup);
5354

J
Jim Lin 已提交
5355 5356 5357 5358 5359 5360 5361 5362 5363 5364
static void xhci_clear_tt_buffer_complete(struct usb_hcd *hcd,
		struct usb_host_endpoint *ep)
{
	struct xhci_hcd *xhci;
	struct usb_device *udev;
	unsigned int slot_id;
	unsigned int ep_index;
	unsigned long flags;

	xhci = hcd_to_xhci(hcd);
5365 5366

	spin_lock_irqsave(&xhci->lock, flags);
J
Jim Lin 已提交
5367 5368 5369 5370 5371 5372 5373 5374 5375
	udev = (struct usb_device *)ep->hcpriv;
	slot_id = udev->slot_id;
	ep_index = xhci_get_endpoint_index(&ep->desc);

	xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_CLEARING_TT;
	xhci_ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
	spin_unlock_irqrestore(&xhci->lock, flags);
}

5376 5377 5378
static const struct hc_driver xhci_hc_driver = {
	.description =		"xhci-hcd",
	.product_desc =		"xHCI Host Controller",
5379
	.hcd_priv_size =	sizeof(struct xhci_hcd),
5380 5381 5382 5383 5384

	/*
	 * generic hardware linkage
	 */
	.irq =			xhci_irq,
5385 5386
	.flags =		HCD_MEMORY | HCD_DMA | HCD_USB3 | HCD_SHARED |
				HCD_BH,
5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397 5398

	/*
	 * basic lifecycle operations
	 */
	.reset =		NULL, /* set in xhci_init_driver() */
	.start =		xhci_run,
	.stop =			xhci_stop,
	.shutdown =		xhci_shutdown,

	/*
	 * managing i/o requests and associated device resources
	 */
5399
	.map_urb_for_dma =      xhci_map_urb_for_dma,
5400
	.unmap_urb_for_dma =    xhci_unmap_urb_for_dma,
5401 5402 5403 5404 5405 5406 5407 5408
	.urb_enqueue =		xhci_urb_enqueue,
	.urb_dequeue =		xhci_urb_dequeue,
	.alloc_dev =		xhci_alloc_dev,
	.free_dev =		xhci_free_dev,
	.alloc_streams =	xhci_alloc_streams,
	.free_streams =		xhci_free_streams,
	.add_endpoint =		xhci_add_endpoint,
	.drop_endpoint =	xhci_drop_endpoint,
5409
	.endpoint_disable =	xhci_endpoint_disable,
5410 5411 5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429
	.endpoint_reset =	xhci_endpoint_reset,
	.check_bandwidth =	xhci_check_bandwidth,
	.reset_bandwidth =	xhci_reset_bandwidth,
	.address_device =	xhci_address_device,
	.enable_device =	xhci_enable_device,
	.update_hub_device =	xhci_update_hub_device,
	.reset_device =		xhci_discover_or_reset_device,

	/*
	 * scheduling support
	 */
	.get_frame_number =	xhci_get_frame,

	/*
	 * root hub support
	 */
	.hub_control =		xhci_hub_control,
	.hub_status_data =	xhci_hub_status_data,
	.bus_suspend =		xhci_bus_suspend,
	.bus_resume =		xhci_bus_resume,
5430
	.get_resuming_ports =	xhci_get_resuming_ports,
5431 5432 5433 5434 5435 5436 5437 5438 5439

	/*
	 * call back when device connected and addressed
	 */
	.update_device =        xhci_update_device,
	.set_usb2_hw_lpm =	xhci_set_usb2_hardware_lpm,
	.enable_usb3_lpm_timeout =	xhci_enable_usb3_lpm_timeout,
	.disable_usb3_lpm_timeout =	xhci_disable_usb3_lpm_timeout,
	.find_raw_port_number =	xhci_find_raw_port_number,
J
Jim Lin 已提交
5440
	.clear_tt_buffer_complete = xhci_clear_tt_buffer_complete,
5441 5442
};

5443 5444
void xhci_init_driver(struct hc_driver *drv,
		      const struct xhci_driver_overrides *over)
5445
{
5446 5447 5448
	BUG_ON(!over);

	/* Copy the generic table to drv then apply the overrides */
5449
	*drv = xhci_hc_driver;
5450 5451 5452 5453 5454 5455 5456

	if (over) {
		drv->hcd_priv_size += over->extra_priv_size;
		if (over->reset)
			drv->reset = over->reset;
		if (over->start)
			drv->start = over->start;
5457 5458 5459 5460
		if (over->add_endpoint)
			drv->add_endpoint = over->add_endpoint;
		if (over->drop_endpoint)
			drv->drop_endpoint = over->drop_endpoint;
5461 5462 5463 5464
		if (over->check_bandwidth)
			drv->check_bandwidth = over->check_bandwidth;
		if (over->reset_bandwidth)
			drv->reset_bandwidth = over->reset_bandwidth;
5465
	}
5466 5467 5468
}
EXPORT_SYMBOL_GPL(xhci_init_driver);

5469 5470 5471 5472 5473 5474
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_LICENSE("GPL");

static int __init xhci_hcd_init(void)
{
5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487
	/*
	 * Check the compiler generated sizes of structures that must be laid
	 * out in specific ways for hardware access.
	 */
	BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
	BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
	BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
	/* xhci_device_control has eight fields, and also
	 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
	 */
	BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
	BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
	BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5488
	BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
5489 5490 5491
	BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
	/* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
	BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5492 5493 5494 5495

	if (usb_disabled())
		return -ENODEV;

5496
	xhci_debugfs_create_root();
5497
	xhci_dbc_init();
5498

5499 5500
	return 0;
}
5501 5502 5503 5504 5505

/*
 * If an init function is provided, an exit function must also be provided
 * to allow module unload.
 */
5506 5507 5508
static void __exit xhci_hcd_fini(void)
{
	xhci_debugfs_remove_root();
5509
	xhci_dbc_exit();
5510
}
5511

5512
module_init(xhci_hcd_init);
5513
module_exit(xhci_hcd_fini);