r8169.c 171.1 KB
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/*
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 * r8169.c: RealTek 8169/8168/8101 ethernet driver.
 *
 * Copyright (c) 2002 ShuChen <shuchen@realtek.com.tw>
 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
 * Copyright (c) a lot of people too. Please respect their work.
 *
 * See MAINTAINERS file for support contact information.
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 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
#include <linux/ethtool.h>
#include <linux/mii.h>
#include <linux/if_vlan.h>
#include <linux/crc32.h>
#include <linux/in.h>
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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#include <linux/firmware.h>
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#include <linux/pci-aspm.h>
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#include <linux/prefetch.h>
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#include <asm/io.h>
#include <asm/irq.h>

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#define RTL8169_VERSION "2.3LK-NAPI"
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#define MODULENAME "r8169"
#define PFX MODULENAME ": "

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#define FIRMWARE_8168D_1	"rtl_nic/rtl8168d-1.fw"
#define FIRMWARE_8168D_2	"rtl_nic/rtl8168d-2.fw"
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#define FIRMWARE_8168E_1	"rtl_nic/rtl8168e-1.fw"
#define FIRMWARE_8168E_2	"rtl_nic/rtl8168e-2.fw"
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#define FIRMWARE_8168E_3	"rtl_nic/rtl8168e-3.fw"
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#define FIRMWARE_8168F_1	"rtl_nic/rtl8168f-1.fw"
#define FIRMWARE_8168F_2	"rtl_nic/rtl8168f-2.fw"
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#define FIRMWARE_8105E_1	"rtl_nic/rtl8105e-1.fw"
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#define FIRMWARE_8402_1		"rtl_nic/rtl8402-1.fw"
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#define FIRMWARE_8411_1		"rtl_nic/rtl8411-1.fw"
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#define FIRMWARE_8106E_1	"rtl_nic/rtl8106e-1.fw"
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#define FIRMWARE_8106E_2	"rtl_nic/rtl8106e-2.fw"
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#define FIRMWARE_8168G_2	"rtl_nic/rtl8168g-2.fw"
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#define FIRMWARE_8168G_3	"rtl_nic/rtl8168g-3.fw"
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#ifdef RTL8169_DEBUG
#define assert(expr) \
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	if (!(expr)) {					\
		printk( "Assertion failed! %s,%s,%s,line=%d\n",	\
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		#expr,__FILE__,__func__,__LINE__);		\
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	}
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#define dprintk(fmt, args...) \
	do { printk(KERN_DEBUG PFX fmt, ## args); } while (0)
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#else
#define assert(expr) do {} while (0)
#define dprintk(fmt, args...)	do {} while (0)
#endif /* RTL8169_DEBUG */

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#define R8169_MSG_DEFAULT \
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	(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
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#define TX_SLOTS_AVAIL(tp) \
	(tp->dirty_tx + NUM_TX_DESC - tp->cur_tx)

/* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */
#define TX_FRAGS_READY_FOR(tp,nr_frags) \
	(TX_SLOTS_AVAIL(tp) >= (nr_frags + 1))
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/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
   The RTL chips use a 64 element hash table based on the Ethernet CRC. */
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static const int multicast_filter_limit = 32;
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#define MAX_READ_REQUEST_SHIFT	12
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#define TX_DMA_BURST	7	/* Maximum PCI burst, '7' is unlimited */
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#define InterFrameGap	0x03	/* 3 means InterFrameGap = the shortest one */

#define R8169_REGS_SIZE		256
#define R8169_NAPI_WEIGHT	64
#define NUM_TX_DESC	64	/* Number of Tx descriptor registers */
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#define NUM_RX_DESC	256U	/* Number of Rx descriptor registers */
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#define R8169_TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))
#define R8169_RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))

#define RTL8169_TX_TIMEOUT	(6*HZ)
#define RTL8169_PHY_TIMEOUT	(10*HZ)

/* write/read MMIO register */
#define RTL_W8(reg, val8)	writeb ((val8), ioaddr + (reg))
#define RTL_W16(reg, val16)	writew ((val16), ioaddr + (reg))
#define RTL_W32(reg, val32)	writel ((val32), ioaddr + (reg))
#define RTL_R8(reg)		readb (ioaddr + (reg))
#define RTL_R16(reg)		readw (ioaddr + (reg))
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#define RTL_R32(reg)		readl (ioaddr + (reg))
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enum mac_version {
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	RTL_GIGA_MAC_VER_01 = 0,
	RTL_GIGA_MAC_VER_02,
	RTL_GIGA_MAC_VER_03,
	RTL_GIGA_MAC_VER_04,
	RTL_GIGA_MAC_VER_05,
	RTL_GIGA_MAC_VER_06,
	RTL_GIGA_MAC_VER_07,
	RTL_GIGA_MAC_VER_08,
	RTL_GIGA_MAC_VER_09,
	RTL_GIGA_MAC_VER_10,
	RTL_GIGA_MAC_VER_11,
	RTL_GIGA_MAC_VER_12,
	RTL_GIGA_MAC_VER_13,
	RTL_GIGA_MAC_VER_14,
	RTL_GIGA_MAC_VER_15,
	RTL_GIGA_MAC_VER_16,
	RTL_GIGA_MAC_VER_17,
	RTL_GIGA_MAC_VER_18,
	RTL_GIGA_MAC_VER_19,
	RTL_GIGA_MAC_VER_20,
	RTL_GIGA_MAC_VER_21,
	RTL_GIGA_MAC_VER_22,
	RTL_GIGA_MAC_VER_23,
	RTL_GIGA_MAC_VER_24,
	RTL_GIGA_MAC_VER_25,
	RTL_GIGA_MAC_VER_26,
	RTL_GIGA_MAC_VER_27,
	RTL_GIGA_MAC_VER_28,
	RTL_GIGA_MAC_VER_29,
	RTL_GIGA_MAC_VER_30,
	RTL_GIGA_MAC_VER_31,
	RTL_GIGA_MAC_VER_32,
	RTL_GIGA_MAC_VER_33,
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	RTL_GIGA_MAC_VER_34,
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	RTL_GIGA_MAC_VER_35,
	RTL_GIGA_MAC_VER_36,
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	RTL_GIGA_MAC_VER_37,
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	RTL_GIGA_MAC_VER_38,
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	RTL_GIGA_MAC_VER_39,
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	RTL_GIGA_MAC_VER_40,
	RTL_GIGA_MAC_VER_41,
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	RTL_GIGA_MAC_VER_42,
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	RTL_GIGA_MAC_VER_43,
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	RTL_GIGA_MAC_NONE   = 0xff,
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};

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enum rtl_tx_desc_version {
	RTL_TD_0	= 0,
	RTL_TD_1	= 1,
};

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#define JUMBO_1K	ETH_DATA_LEN
#define JUMBO_4K	(4*1024 - ETH_HLEN - 2)
#define JUMBO_6K	(6*1024 - ETH_HLEN - 2)
#define JUMBO_7K	(7*1024 - ETH_HLEN - 2)
#define JUMBO_9K	(9*1024 - ETH_HLEN - 2)

#define _R(NAME,TD,FW,SZ,B) {	\
	.name = NAME,		\
	.txd_version = TD,	\
	.fw_name = FW,		\
	.jumbo_max = SZ,	\
	.jumbo_tx_csum = B	\
}
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static const struct {
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	const char *name;
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	enum rtl_tx_desc_version txd_version;
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	const char *fw_name;
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	u16 jumbo_max;
	bool jumbo_tx_csum;
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} rtl_chip_infos[] = {
	/* PCI devices. */
	[RTL_GIGA_MAC_VER_01] =
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		_R("RTL8169",		RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_02] =
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		_R("RTL8169s",		RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_03] =
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		_R("RTL8110s",		RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_04] =
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		_R("RTL8169sb/8110sb",	RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_05] =
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		_R("RTL8169sc/8110sc",	RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_06] =
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		_R("RTL8169sc/8110sc",	RTL_TD_0, NULL, JUMBO_7K, true),
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	/* PCI-E devices. */
	[RTL_GIGA_MAC_VER_07] =
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		_R("RTL8102e",		RTL_TD_1, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_08] =
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		_R("RTL8102e",		RTL_TD_1, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_09] =
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		_R("RTL8102e",		RTL_TD_1, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_10] =
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		_R("RTL8101e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_11] =
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		_R("RTL8168b/8111b",	RTL_TD_0, NULL, JUMBO_4K, false),
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	[RTL_GIGA_MAC_VER_12] =
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		_R("RTL8168b/8111b",	RTL_TD_0, NULL, JUMBO_4K, false),
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	[RTL_GIGA_MAC_VER_13] =
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		_R("RTL8101e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_14] =
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		_R("RTL8100e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_15] =
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		_R("RTL8100e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_16] =
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		_R("RTL8101e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_17] =
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		_R("RTL8168b/8111b",	RTL_TD_1, NULL, JUMBO_4K, false),
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	[RTL_GIGA_MAC_VER_18] =
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		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_19] =
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		_R("RTL8168c/8111c",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_20] =
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		_R("RTL8168c/8111c",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_21] =
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		_R("RTL8168c/8111c",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_22] =
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		_R("RTL8168c/8111c",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_23] =
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		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_24] =
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		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_25] =
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		_R("RTL8168d/8111d",	RTL_TD_1, FIRMWARE_8168D_1,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_26] =
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		_R("RTL8168d/8111d",	RTL_TD_1, FIRMWARE_8168D_2,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_27] =
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		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL, JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_28] =
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		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL, JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_29] =
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		_R("RTL8105e",		RTL_TD_1, FIRMWARE_8105E_1,
							JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_30] =
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		_R("RTL8105e",		RTL_TD_1, FIRMWARE_8105E_1,
							JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_31] =
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		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL, JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_32] =
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		_R("RTL8168e/8111e",	RTL_TD_1, FIRMWARE_8168E_1,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_33] =
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		_R("RTL8168e/8111e",	RTL_TD_1, FIRMWARE_8168E_2,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_34] =
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		_R("RTL8168evl/8111evl",RTL_TD_1, FIRMWARE_8168E_3,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_35] =
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		_R("RTL8168f/8111f",	RTL_TD_1, FIRMWARE_8168F_1,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_36] =
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		_R("RTL8168f/8111f",	RTL_TD_1, FIRMWARE_8168F_2,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_37] =
		_R("RTL8402",		RTL_TD_1, FIRMWARE_8402_1,
							JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_38] =
		_R("RTL8411",		RTL_TD_1, FIRMWARE_8411_1,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_39] =
		_R("RTL8106e",		RTL_TD_1, FIRMWARE_8106E_1,
							JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_40] =
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		_R("RTL8168g/8111g",	RTL_TD_1, FIRMWARE_8168G_2,
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							JUMBO_9K, false),
	[RTL_GIGA_MAC_VER_41] =
		_R("RTL8168g/8111g",	RTL_TD_1, NULL, JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_42] =
		_R("RTL8168g/8111g",	RTL_TD_1, FIRMWARE_8168G_3,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_43] =
		_R("RTL8106e",		RTL_TD_1, FIRMWARE_8106E_2,
							JUMBO_1K, true),
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};
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#undef _R
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enum cfg_version {
	RTL_CFG_0 = 0x00,
	RTL_CFG_1,
	RTL_CFG_2
};

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static DEFINE_PCI_DEVICE_TABLE(rtl8169_pci_tbl) = {
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8129), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8136), 0, 0, RTL_CFG_2 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8167), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8168), 0, 0, RTL_CFG_1 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8169), 0, 0, RTL_CFG_0 },
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	{ PCI_VENDOR_ID_DLINK,			0x4300,
		PCI_VENDOR_ID_DLINK, 0x4b10,		 0, 0, RTL_CFG_1 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_DLINK,	0x4300), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_DLINK,	0x4302), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_AT,		0xc107), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(0x16ec,			0x0116), 0, 0, RTL_CFG_0 },
	{ PCI_VENDOR_ID_LINKSYS,		0x1032,
		PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
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	{ 0x0001,				0x8168,
		PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 },
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	{0,},
};

MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);

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static int rx_buf_sz = 16383;
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static int use_dac;
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static struct {
	u32 msg_enable;
} debug = { -1 };
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enum rtl_registers {
	MAC0		= 0,	/* Ethernet hardware address. */
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	MAC4		= 4,
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	MAR0		= 8,	/* Multicast filter. */
	CounterAddrLow		= 0x10,
	CounterAddrHigh		= 0x14,
	TxDescStartAddrLow	= 0x20,
	TxDescStartAddrHigh	= 0x24,
	TxHDescStartAddrLow	= 0x28,
	TxHDescStartAddrHigh	= 0x2c,
	FLASH		= 0x30,
	ERSR		= 0x36,
	ChipCmd		= 0x37,
	TxPoll		= 0x38,
	IntrMask	= 0x3c,
	IntrStatus	= 0x3e,
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	TxConfig	= 0x40,
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#define	TXCFG_AUTO_FIFO			(1 << 7)	/* 8111e-vl */
#define	TXCFG_EMPTY			(1 << 11)	/* 8111e-vl */
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	RxConfig	= 0x44,
#define	RX128_INT_EN			(1 << 15)	/* 8111c and later */
#define	RX_MULTI_EN			(1 << 14)	/* 8111c only */
#define	RXCFG_FIFO_SHIFT		13
					/* No threshold before first PCI xfer */
#define	RX_FIFO_THRESH			(7 << RXCFG_FIFO_SHIFT)
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#define	RX_EARLY_OFF			(1 << 11)
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#define	RXCFG_DMA_SHIFT			8
					/* Unlimited maximum PCI burst. */
#define	RX_DMA_BURST			(7 << RXCFG_DMA_SHIFT)
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	RxMissed	= 0x4c,
	Cfg9346		= 0x50,
	Config0		= 0x51,
	Config1		= 0x52,
	Config2		= 0x53,
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#define PME_SIGNAL			(1 << 5)	/* 8168c and later */

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	Config3		= 0x54,
	Config4		= 0x55,
	Config5		= 0x56,
	MultiIntr	= 0x5c,
	PHYAR		= 0x60,
	PHYstatus	= 0x6c,
	RxMaxSize	= 0xda,
	CPlusCmd	= 0xe0,
	IntrMitigate	= 0xe2,
	RxDescAddrLow	= 0xe4,
	RxDescAddrHigh	= 0xe8,
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	EarlyTxThres	= 0xec,	/* 8169. Unit of 32 bytes. */

#define NoEarlyTx	0x3f	/* Max value : no early transmit. */

	MaxTxPacketSize	= 0xec,	/* 8101/8168. Unit of 128 bytes. */

#define TxPacketMax	(8064 >> 7)
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#define EarlySize	0x27
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	FuncEvent	= 0xf0,
	FuncEventMask	= 0xf4,
	FuncPresetState	= 0xf8,
	FuncForceEvent	= 0xfc,
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};

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enum rtl8110_registers {
	TBICSR			= 0x64,
	TBI_ANAR		= 0x68,
	TBI_LPAR		= 0x6a,
};

enum rtl8168_8101_registers {
	CSIDR			= 0x64,
	CSIAR			= 0x68,
#define	CSIAR_FLAG			0x80000000
#define	CSIAR_WRITE_CMD			0x80000000
#define	CSIAR_BYTE_ENABLE		0x0f
#define	CSIAR_BYTE_ENABLE_SHIFT		12
#define	CSIAR_ADDR_MASK			0x0fff
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#define CSIAR_FUNC_CARD			0x00000000
#define CSIAR_FUNC_SDIO			0x00010000
#define CSIAR_FUNC_NIC			0x00020000
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	PMCH			= 0x6f,
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	EPHYAR			= 0x80,
#define	EPHYAR_FLAG			0x80000000
#define	EPHYAR_WRITE_CMD		0x80000000
#define	EPHYAR_REG_MASK			0x1f
#define	EPHYAR_REG_SHIFT		16
#define	EPHYAR_DATA_MASK		0xffff
404
	DLLPR			= 0xd0,
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#define	PFM_EN				(1 << 6)
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	DBG_REG			= 0xd1,
#define	FIX_NAK_1			(1 << 4)
#define	FIX_NAK_2			(1 << 3)
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	TWSI			= 0xd2,
	MCU			= 0xd3,
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#define	NOW_IS_OOB			(1 << 7)
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#define	TX_EMPTY			(1 << 5)
#define	RX_EMPTY			(1 << 4)
#define	RXTX_EMPTY			(TX_EMPTY | RX_EMPTY)
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#define	EN_NDP				(1 << 3)
#define	EN_OOB_RESET			(1 << 2)
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#define	LINK_LIST_RDY			(1 << 1)
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	EFUSEAR			= 0xdc,
#define	EFUSEAR_FLAG			0x80000000
#define	EFUSEAR_WRITE_CMD		0x80000000
#define	EFUSEAR_READ_CMD		0x00000000
#define	EFUSEAR_REG_MASK		0x03ff
#define	EFUSEAR_REG_SHIFT		8
#define	EFUSEAR_DATA_MASK		0xff
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};

427
enum rtl8168_registers {
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	LED_FREQ		= 0x1a,
	EEE_LED			= 0x1b,
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	ERIDR			= 0x70,
	ERIAR			= 0x74,
#define ERIAR_FLAG			0x80000000
#define ERIAR_WRITE_CMD			0x80000000
#define ERIAR_READ_CMD			0x00000000
#define ERIAR_ADDR_BYTE_ALIGN		4
#define ERIAR_TYPE_SHIFT		16
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#define ERIAR_EXGMAC			(0x00 << ERIAR_TYPE_SHIFT)
#define ERIAR_MSIX			(0x01 << ERIAR_TYPE_SHIFT)
#define ERIAR_ASF			(0x02 << ERIAR_TYPE_SHIFT)
#define ERIAR_MASK_SHIFT		12
#define ERIAR_MASK_0001			(0x1 << ERIAR_MASK_SHIFT)
#define ERIAR_MASK_0011			(0x3 << ERIAR_MASK_SHIFT)
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#define ERIAR_MASK_0101			(0x5 << ERIAR_MASK_SHIFT)
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#define ERIAR_MASK_1111			(0xf << ERIAR_MASK_SHIFT)
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	EPHY_RXER_NUM		= 0x7c,
	OCPDR			= 0xb0,	/* OCP GPHY access */
#define OCPDR_WRITE_CMD			0x80000000
#define OCPDR_READ_CMD			0x00000000
#define OCPDR_REG_MASK			0x7f
#define OCPDR_GPHY_REG_SHIFT		16
#define OCPDR_DATA_MASK			0xffff
	OCPAR			= 0xb4,
#define OCPAR_FLAG			0x80000000
#define OCPAR_GPHY_WRITE_CMD		0x8000f060
#define OCPAR_GPHY_READ_CMD		0x0000f060
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	GPHY_OCP		= 0xb8,
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	RDSAR1			= 0xd0,	/* 8168c only. Undocumented on 8168dp */
	MISC			= 0xf0,	/* 8168e only. */
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#define TXPLA_RST			(1 << 29)
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#define DISABLE_LAN_EN			(1 << 23) /* Enable GPIO pin */
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#define PWM_EN				(1 << 22)
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#define RXDV_GATED_EN			(1 << 19)
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#define EARLY_TALLY_EN			(1 << 16)
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};

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enum rtl_register_content {
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	/* InterruptStatusBits */
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	SYSErr		= 0x8000,
	PCSTimeout	= 0x4000,
	SWInt		= 0x0100,
	TxDescUnavail	= 0x0080,
	RxFIFOOver	= 0x0040,
	LinkChg		= 0x0020,
	RxOverflow	= 0x0010,
	TxErr		= 0x0008,
	TxOK		= 0x0004,
	RxErr		= 0x0002,
	RxOK		= 0x0001,
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	/* RxStatusDesc */
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	RxBOVF	= (1 << 24),
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	RxFOVF	= (1 << 23),
	RxRWT	= (1 << 22),
	RxRES	= (1 << 21),
	RxRUNT	= (1 << 20),
	RxCRC	= (1 << 19),
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	/* ChipCmdBits */
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	StopReq		= 0x80,
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	CmdReset	= 0x10,
	CmdRxEnb	= 0x08,
	CmdTxEnb	= 0x04,
	RxBufEmpty	= 0x01,
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	/* TXPoll register p.5 */
	HPQ		= 0x80,		/* Poll cmd on the high prio queue */
	NPQ		= 0x40,		/* Poll cmd on the low prio queue */
	FSWInt		= 0x01,		/* Forced software interrupt */

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	/* Cfg9346Bits */
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	Cfg9346_Lock	= 0x00,
	Cfg9346_Unlock	= 0xc0,
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	/* rx_mode_bits */
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	AcceptErr	= 0x20,
	AcceptRunt	= 0x10,
	AcceptBroadcast	= 0x08,
	AcceptMulticast	= 0x04,
	AcceptMyPhys	= 0x02,
	AcceptAllPhys	= 0x01,
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#define RX_CONFIG_ACCEPT_MASK		0x3f
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	/* TxConfigBits */
	TxInterFrameGapShift = 24,
	TxDMAShift = 8,	/* DMA burst value (0-7) is shift this many bits */

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	/* Config1 register p.24 */
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	LEDS1		= (1 << 7),
	LEDS0		= (1 << 6),
	Speed_down	= (1 << 4),
	MEMMAP		= (1 << 3),
	IOMAP		= (1 << 2),
	VPD		= (1 << 1),
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	PMEnable	= (1 << 0),	/* Power Management Enable */

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	/* Config2 register p. 25 */
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	ClkReqEn	= (1 << 7),	/* Clock Request Enable */
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	MSIEnable	= (1 << 5),	/* 8169 only. Reserved in the 8168. */
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	PCI_Clock_66MHz = 0x01,
	PCI_Clock_33MHz = 0x00,

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	/* Config3 register p.25 */
	MagicPacket	= (1 << 5),	/* Wake up when receives a Magic Packet */
	LinkUp		= (1 << 4),	/* Wake up when the cable connection is re-established */
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	Jumbo_En0	= (1 << 2),	/* 8168 only. Reserved in the 8168b */
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	Beacon_en	= (1 << 0),	/* 8168 only. Reserved in the 8168b */
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	/* Config4 register */
	Jumbo_En1	= (1 << 1),	/* 8168 only. Reserved in the 8168b */

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	/* Config5 register p.27 */
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	BWF		= (1 << 6),	/* Accept Broadcast wakeup frame */
	MWF		= (1 << 5),	/* Accept Multicast wakeup frame */
	UWF		= (1 << 4),	/* Accept Unicast wakeup frame */
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	Spi_en		= (1 << 3),
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	LanWake		= (1 << 1),	/* LanWake enable/disable */
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	PMEStatus	= (1 << 0),	/* PME status can be reset by PCI RST# */
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	ASPM_en		= (1 << 0),	/* ASPM enable */
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	/* TBICSR p.28 */
	TBIReset	= 0x80000000,
	TBILoopback	= 0x40000000,
	TBINwEnable	= 0x20000000,
	TBINwRestart	= 0x10000000,
	TBILinkOk	= 0x02000000,
	TBINwComplete	= 0x01000000,

	/* CPlusCmd p.31 */
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	EnableBist	= (1 << 15),	// 8168 8101
	Mac_dbgo_oe	= (1 << 14),	// 8168 8101
	Normal_mode	= (1 << 13),	// unused
	Force_half_dup	= (1 << 12),	// 8168 8101
	Force_rxflow_en	= (1 << 11),	// 8168 8101
	Force_txflow_en	= (1 << 10),	// 8168 8101
	Cxpl_dbg_sel	= (1 << 9),	// 8168 8101
	ASF		= (1 << 8),	// 8168 8101
	PktCntrDisable	= (1 << 7),	// 8168 8101
	Mac_dbgo_sel	= 0x001c,	// 8168
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	RxVlan		= (1 << 6),
	RxChkSum	= (1 << 5),
	PCIDAC		= (1 << 4),
	PCIMulRW	= (1 << 3),
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	INTT_0		= 0x0000,	// 8168
	INTT_1		= 0x0001,	// 8168
	INTT_2		= 0x0002,	// 8168
	INTT_3		= 0x0003,	// 8168
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	/* rtl8169_PHYstatus */
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	TBI_Enable	= 0x80,
	TxFlowCtrl	= 0x40,
	RxFlowCtrl	= 0x20,
	_1000bpsF	= 0x10,
	_100bps		= 0x08,
	_10bps		= 0x04,
	LinkStatus	= 0x02,
	FullDup		= 0x01,
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	/* _TBICSRBit */
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	TBILinkOK	= 0x02000000,
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	/* DumpCounterCommand */
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	CounterDump	= 0x8,
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};

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enum rtl_desc_bit {
	/* First doubleword. */
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	DescOwn		= (1 << 31), /* Descriptor is owned by NIC */
	RingEnd		= (1 << 30), /* End of descriptor ring */
	FirstFrag	= (1 << 29), /* First segment of a packet */
	LastFrag	= (1 << 28), /* Final segment of a packet */
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};

/* Generic case. */
enum rtl_tx_desc_bit {
	/* First doubleword. */
	TD_LSO		= (1 << 27),		/* Large Send Offload */
#define TD_MSS_MAX			0x07ffu	/* MSS value */
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	/* Second doubleword. */
	TxVlanTag	= (1 << 17),		/* Add VLAN tag */
};

/* 8169, 8168b and 810x except 8102e. */
enum rtl_tx_desc_bit_0 {
	/* First doubleword. */
#define TD0_MSS_SHIFT			16	/* MSS position (11 bits) */
	TD0_TCP_CS	= (1 << 16),		/* Calculate TCP/IP checksum */
	TD0_UDP_CS	= (1 << 17),		/* Calculate UDP/IP checksum */
	TD0_IP_CS	= (1 << 18),		/* Calculate IP checksum */
};

/* 8102e, 8168c and beyond. */
enum rtl_tx_desc_bit_1 {
	/* Second doubleword. */
#define TD1_MSS_SHIFT			18	/* MSS position (11 bits) */
	TD1_IP_CS	= (1 << 29),		/* Calculate IP checksum */
	TD1_TCP_CS	= (1 << 30),		/* Calculate TCP/IP checksum */
	TD1_UDP_CS	= (1 << 31),		/* Calculate UDP/IP checksum */
};
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static const struct rtl_tx_desc_info {
	struct {
		u32 udp;
		u32 tcp;
	} checksum;
	u16 mss_shift;
	u16 opts_offset;
} tx_desc_info [] = {
	[RTL_TD_0] = {
		.checksum = {
			.udp	= TD0_IP_CS | TD0_UDP_CS,
			.tcp	= TD0_IP_CS | TD0_TCP_CS
		},
		.mss_shift	= TD0_MSS_SHIFT,
		.opts_offset	= 0
	},
	[RTL_TD_1] = {
		.checksum = {
			.udp	= TD1_IP_CS | TD1_UDP_CS,
			.tcp	= TD1_IP_CS | TD1_TCP_CS
		},
		.mss_shift	= TD1_MSS_SHIFT,
		.opts_offset	= 1
	}
};

enum rtl_rx_desc_bit {
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	/* Rx private */
	PID1		= (1 << 18), /* Protocol ID bit 1/2 */
	PID0		= (1 << 17), /* Protocol ID bit 2/2 */

#define RxProtoUDP	(PID1)
#define RxProtoTCP	(PID0)
#define RxProtoIP	(PID1 | PID0)
#define RxProtoMask	RxProtoIP

	IPFail		= (1 << 16), /* IP checksum failed */
	UDPFail		= (1 << 15), /* UDP/IP checksum failed */
	TCPFail		= (1 << 14), /* TCP/IP checksum failed */
	RxVlanTag	= (1 << 16), /* VLAN tag available */
};

#define RsvdMask	0x3fffc000

struct TxDesc {
676 677 678
	__le32 opts1;
	__le32 opts2;
	__le64 addr;
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};

struct RxDesc {
682 683 684
	__le32 opts1;
	__le32 opts2;
	__le64 addr;
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};

struct ring_info {
	struct sk_buff	*skb;
	u32		len;
	u8		__pad[sizeof(void *) - sizeof(u32)];
};

693
enum features {
694 695 696
	RTL_FEATURE_WOL		= (1 << 0),
	RTL_FEATURE_MSI		= (1 << 1),
	RTL_FEATURE_GMII	= (1 << 2),
697 698
};

699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714
struct rtl8169_counters {
	__le64	tx_packets;
	__le64	rx_packets;
	__le64	tx_errors;
	__le32	rx_errors;
	__le16	rx_missed;
	__le16	align_errors;
	__le32	tx_one_collision;
	__le32	tx_multi_collision;
	__le64	rx_unicast;
	__le64	rx_broadcast;
	__le32	rx_multicast;
	__le16	tx_aborted;
	__le16	tx_underun;
};

715
enum rtl_flag {
716
	RTL_FLAG_TASK_ENABLED,
717 718 719 720 721 722
	RTL_FLAG_TASK_SLOW_PENDING,
	RTL_FLAG_TASK_RESET_PENDING,
	RTL_FLAG_TASK_PHY_PENDING,
	RTL_FLAG_MAX
};

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struct rtl8169_stats {
	u64			packets;
	u64			bytes;
	struct u64_stats_sync	syncp;
};

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struct rtl8169_private {
	void __iomem *mmio_addr;	/* memory map physical address */
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	struct pci_dev *pci_dev;
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	struct net_device *dev;
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	struct napi_struct napi;
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	u32 msg_enable;
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	u16 txd_version;
	u16 mac_version;
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	u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
	u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
	u32 dirty_tx;
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	struct rtl8169_stats rx_stats;
	struct rtl8169_stats tx_stats;
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	struct TxDesc *TxDescArray;	/* 256-aligned Tx descriptor ring */
	struct RxDesc *RxDescArray;	/* 256-aligned Rx descriptor ring */
	dma_addr_t TxPhyAddr;
	dma_addr_t RxPhyAddr;
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	void *Rx_databuff[NUM_RX_DESC];	/* Rx data buffers */
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	struct ring_info tx_skb[NUM_TX_DESC];	/* Tx data buffers */
	struct timer_list timer;
	u16 cp_cmd;
750 751

	u16 event_slow;
752 753

	struct mdio_ops {
754 755
		void (*write)(struct rtl8169_private *, int, int);
		int (*read)(struct rtl8169_private *, int);
756 757
	} mdio_ops;

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	struct pll_power_ops {
		void (*down)(struct rtl8169_private *);
		void (*up)(struct rtl8169_private *);
	} pll_power_ops;

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	struct jumbo_ops {
		void (*enable)(struct rtl8169_private *);
		void (*disable)(struct rtl8169_private *);
	} jumbo_ops;

768
	struct csi_ops {
769 770
		void (*write)(struct rtl8169_private *, int, int);
		u32 (*read)(struct rtl8169_private *, int);
771 772
	} csi_ops;

773
	int (*set_speed)(struct net_device *, u8 aneg, u16 sp, u8 dpx, u32 adv);
774
	int (*get_settings)(struct net_device *, struct ethtool_cmd *);
775
	void (*phy_reset_enable)(struct rtl8169_private *tp);
776
	void (*hw_start)(struct net_device *);
777
	unsigned int (*phy_reset_pending)(struct rtl8169_private *tp);
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	unsigned int (*link_ok)(void __iomem *);
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	int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd);
780 781

	struct {
782 783
		DECLARE_BITMAP(flags, RTL_FLAG_MAX);
		struct mutex mutex;
784 785 786
		struct work_struct work;
	} wk;

787
	unsigned features;
788 789

	struct mii_if_info mii;
790
	struct rtl8169_counters counters;
791
	u32 saved_wolopts;
792
	u32 opts1_mask;
793

794 795
	struct rtl_fw {
		const struct firmware *fw;
796 797 798 799 800 801 802 803 804

#define RTL_VER_SIZE		32

		char version[RTL_VER_SIZE];

		struct rtl_fw_phy_action {
			__le32 *code;
			size_t size;
		} phy_action;
805
	} *rtl_fw;
806
#define RTL_FIRMWARE_UNKNOWN	ERR_PTR(-EAGAIN)
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	u32 ocp_base;
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};

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MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
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MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
module_param(use_dac, int, 0);
814
MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
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module_param_named(debug, debug.msg_enable, int, 0);
MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
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MODULE_LICENSE("GPL");
MODULE_VERSION(RTL8169_VERSION);
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MODULE_FIRMWARE(FIRMWARE_8168D_1);
MODULE_FIRMWARE(FIRMWARE_8168D_2);
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MODULE_FIRMWARE(FIRMWARE_8168E_1);
MODULE_FIRMWARE(FIRMWARE_8168E_2);
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MODULE_FIRMWARE(FIRMWARE_8168E_3);
824
MODULE_FIRMWARE(FIRMWARE_8105E_1);
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MODULE_FIRMWARE(FIRMWARE_8168F_1);
MODULE_FIRMWARE(FIRMWARE_8168F_2);
827
MODULE_FIRMWARE(FIRMWARE_8402_1);
828
MODULE_FIRMWARE(FIRMWARE_8411_1);
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MODULE_FIRMWARE(FIRMWARE_8106E_1);
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MODULE_FIRMWARE(FIRMWARE_8106E_2);
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MODULE_FIRMWARE(FIRMWARE_8168G_2);
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MODULE_FIRMWARE(FIRMWARE_8168G_3);
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static void rtl_lock_work(struct rtl8169_private *tp)
{
	mutex_lock(&tp->wk.mutex);
}

static void rtl_unlock_work(struct rtl8169_private *tp)
{
	mutex_unlock(&tp->wk.mutex);
}

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static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
{
846 847
	pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
					   PCI_EXP_DEVCTL_READRQ, force);
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}

850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870
struct rtl_cond {
	bool (*check)(struct rtl8169_private *);
	const char *msg;
};

static void rtl_udelay(unsigned int d)
{
	udelay(d);
}

static bool rtl_loop_wait(struct rtl8169_private *tp, const struct rtl_cond *c,
			  void (*delay)(unsigned int), unsigned int d, int n,
			  bool high)
{
	int i;

	for (i = 0; i < n; i++) {
		delay(d);
		if (c->check(tp) == high)
			return true;
	}
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	netif_err(tp, drv, tp->dev, "%s == %d (loop: %d, delay: %d).\n",
		  c->msg, !high, n, d);
873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920
	return false;
}

static bool rtl_udelay_loop_wait_high(struct rtl8169_private *tp,
				      const struct rtl_cond *c,
				      unsigned int d, int n)
{
	return rtl_loop_wait(tp, c, rtl_udelay, d, n, true);
}

static bool rtl_udelay_loop_wait_low(struct rtl8169_private *tp,
				     const struct rtl_cond *c,
				     unsigned int d, int n)
{
	return rtl_loop_wait(tp, c, rtl_udelay, d, n, false);
}

static bool rtl_msleep_loop_wait_high(struct rtl8169_private *tp,
				      const struct rtl_cond *c,
				      unsigned int d, int n)
{
	return rtl_loop_wait(tp, c, msleep, d, n, true);
}

static bool rtl_msleep_loop_wait_low(struct rtl8169_private *tp,
				     const struct rtl_cond *c,
				     unsigned int d, int n)
{
	return rtl_loop_wait(tp, c, msleep, d, n, false);
}

#define DECLARE_RTL_COND(name)				\
static bool name ## _check(struct rtl8169_private *);	\
							\
static const struct rtl_cond name = {			\
	.check	= name ## _check,			\
	.msg	= #name					\
};							\
							\
static bool name ## _check(struct rtl8169_private *tp)

DECLARE_RTL_COND(rtl_ocpar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(OCPAR) & OCPAR_FLAG;
}

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static u32 ocp_read(struct rtl8169_private *tp, u8 mask, u16 reg)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W32(OCPAR, ((u32)mask & 0x0f) << 12 | (reg & 0x0fff));
926 927 928

	return rtl_udelay_loop_wait_high(tp, &rtl_ocpar_cond, 100, 20) ?
		RTL_R32(OCPDR) : ~0;
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}

static void ocp_write(struct rtl8169_private *tp, u8 mask, u16 reg, u32 data)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W32(OCPDR, data);
	RTL_W32(OCPAR, OCPAR_FLAG | ((u32)mask & 0x0f) << 12 | (reg & 0x0fff));
937 938 939 940 941 942 943 944 945

	rtl_udelay_loop_wait_low(tp, &rtl_ocpar_cond, 100, 20);
}

DECLARE_RTL_COND(rtl_eriar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(ERIAR) & ERIAR_FLAG;
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}

948
static void rtl8168_oob_notify(struct rtl8169_private *tp, u8 cmd)
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{
950
	void __iomem *ioaddr = tp->mmio_addr;
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	RTL_W8(ERIDR, cmd);
	RTL_W32(ERIAR, 0x800010e8);
	msleep(2);
955 956 957

	if (!rtl_udelay_loop_wait_low(tp, &rtl_eriar_cond, 100, 5))
		return;
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959
	ocp_write(tp, 0x1, 0x30, 0x00000001);
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}

#define OOB_CMD_RESET		0x00
#define OOB_CMD_DRIVER_START	0x05
#define OOB_CMD_DRIVER_STOP	0x06

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static u16 rtl8168_get_ocp_reg(struct rtl8169_private *tp)
{
	return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10;
}

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DECLARE_RTL_COND(rtl_ocp_read_cond)
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{
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	u16 reg;
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	reg = rtl8168_get_ocp_reg(tp);
976

977
	return ocp_read(tp, 0x0f, reg) & 0x00000800;
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}

980
static void rtl8168_driver_start(struct rtl8169_private *tp)
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{
982
	rtl8168_oob_notify(tp, OOB_CMD_DRIVER_START);
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984 985
	rtl_msleep_loop_wait_high(tp, &rtl_ocp_read_cond, 10, 10);
}
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987 988 989
static void rtl8168_driver_stop(struct rtl8169_private *tp)
{
	rtl8168_oob_notify(tp, OOB_CMD_DRIVER_STOP);
990

991
	rtl_msleep_loop_wait_low(tp, &rtl_ocp_read_cond, 10, 10);
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}

994 995
static int r8168dp_check_dash(struct rtl8169_private *tp)
{
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	u16 reg = rtl8168_get_ocp_reg(tp);
997

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	return (ocp_read(tp, 0x0f, reg) & 0x00008000) ? 1 : 0;
999
}
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static bool rtl_ocp_reg_failure(struct rtl8169_private *tp, u32 reg)
{
	if (reg & 0xffff0001) {
		netif_err(tp, drv, tp->dev, "Invalid ocp reg %x!\n", reg);
		return true;
	}
	return false;
}

DECLARE_RTL_COND(rtl_ocp_gphy_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(GPHY_OCP) & OCPAR_FLAG;
}

static void r8168_phy_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data)
{
	void __iomem *ioaddr = tp->mmio_addr;

	if (rtl_ocp_reg_failure(tp, reg))
		return;

	RTL_W32(GPHY_OCP, OCPAR_FLAG | (reg << 15) | data);

	rtl_udelay_loop_wait_low(tp, &rtl_ocp_gphy_cond, 25, 10);
}

static u16 r8168_phy_ocp_read(struct rtl8169_private *tp, u32 reg)
{
	void __iomem *ioaddr = tp->mmio_addr;

	if (rtl_ocp_reg_failure(tp, reg))
		return 0;

	RTL_W32(GPHY_OCP, reg << 15);

	return rtl_udelay_loop_wait_high(tp, &rtl_ocp_gphy_cond, 25, 10) ?
		(RTL_R32(GPHY_OCP) & 0xffff) : ~0;
}

static void r8168_mac_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data)
{
	void __iomem *ioaddr = tp->mmio_addr;

	if (rtl_ocp_reg_failure(tp, reg))
		return;

	RTL_W32(OCPDR, OCPAR_FLAG | (reg << 15) | data);
}

static u16 r8168_mac_ocp_read(struct rtl8169_private *tp, u32 reg)
{
	void __iomem *ioaddr = tp->mmio_addr;

	if (rtl_ocp_reg_failure(tp, reg))
		return 0;

	RTL_W32(OCPDR, reg << 15);

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	return RTL_R32(OCPDR);
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}

#define OCP_STD_PHY_BASE	0xa400

static void r8168g_mdio_write(struct rtl8169_private *tp, int reg, int value)
{
	if (reg == 0x1f) {
		tp->ocp_base = value ? value << 4 : OCP_STD_PHY_BASE;
		return;
	}

	if (tp->ocp_base != OCP_STD_PHY_BASE)
		reg -= 0x10;

	r8168_phy_ocp_write(tp, tp->ocp_base + reg * 2, value);
}

static int r8168g_mdio_read(struct rtl8169_private *tp, int reg)
{
	if (tp->ocp_base != OCP_STD_PHY_BASE)
		reg -= 0x10;

	return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2);
}

1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101
static void mac_mcu_write(struct rtl8169_private *tp, int reg, int value)
{
	if (reg == 0x1f) {
		tp->ocp_base = value << 4;
		return;
	}

	r8168_mac_ocp_write(tp, tp->ocp_base + reg, value);
}

static int mac_mcu_read(struct rtl8169_private *tp, int reg)
{
	return r8168_mac_ocp_read(tp, tp->ocp_base + reg);
}

1102 1103 1104 1105 1106 1107 1108
DECLARE_RTL_COND(rtl_phyar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(PHYAR) & 0x80000000;
}

1109
static void r8169_mdio_write(struct rtl8169_private *tp, int reg, int value)
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{
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	void __iomem *ioaddr = tp->mmio_addr;
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1113
	RTL_W32(PHYAR, 0x80000000 | (reg & 0x1f) << 16 | (value & 0xffff));
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1115
	rtl_udelay_loop_wait_low(tp, &rtl_phyar_cond, 25, 20);
1116
	/*
1117 1118
	 * According to hardware specs a 20us delay is required after write
	 * complete indication, but before sending next command.
1119
	 */
1120
	udelay(20);
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}

1123
static int r8169_mdio_read(struct rtl8169_private *tp, int reg)
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{
1125
	void __iomem *ioaddr = tp->mmio_addr;
1126
	int value;
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1128
	RTL_W32(PHYAR, 0x0 | (reg & 0x1f) << 16);
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1130 1131 1132
	value = rtl_udelay_loop_wait_high(tp, &rtl_phyar_cond, 25, 20) ?
		RTL_R32(PHYAR) & 0xffff : ~0;

1133 1134 1135 1136 1137 1138
	/*
	 * According to hardware specs a 20us delay is required after read
	 * complete indication, but before sending next command.
	 */
	udelay(20);

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	return value;
}

1142
static void r8168dp_1_mdio_access(struct rtl8169_private *tp, int reg, u32 data)
1143
{
1144
	void __iomem *ioaddr = tp->mmio_addr;
1145

1146
	RTL_W32(OCPDR, data | ((reg & OCPDR_REG_MASK) << OCPDR_GPHY_REG_SHIFT));
1147 1148 1149
	RTL_W32(OCPAR, OCPAR_GPHY_WRITE_CMD);
	RTL_W32(EPHY_RXER_NUM, 0);

1150
	rtl_udelay_loop_wait_low(tp, &rtl_ocpar_cond, 1000, 100);
1151 1152
}

1153
static void r8168dp_1_mdio_write(struct rtl8169_private *tp, int reg, int value)
1154
{
1155 1156
	r8168dp_1_mdio_access(tp, reg,
			      OCPDR_WRITE_CMD | (value & OCPDR_DATA_MASK));
1157 1158
}

1159
static int r8168dp_1_mdio_read(struct rtl8169_private *tp, int reg)
1160
{
1161
	void __iomem *ioaddr = tp->mmio_addr;
1162

1163
	r8168dp_1_mdio_access(tp, reg, OCPDR_READ_CMD);
1164 1165 1166 1167 1168

	mdelay(1);
	RTL_W32(OCPAR, OCPAR_GPHY_READ_CMD);
	RTL_W32(EPHY_RXER_NUM, 0);

1169 1170
	return rtl_udelay_loop_wait_high(tp, &rtl_ocpar_cond, 1000, 100) ?
		RTL_R32(OCPDR) & OCPDR_DATA_MASK : ~0;
1171 1172
}

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#define R8168DP_1_MDIO_ACCESS_BIT	0x00020000

static void r8168dp_2_mdio_start(void __iomem *ioaddr)
{
	RTL_W32(0xd0, RTL_R32(0xd0) & ~R8168DP_1_MDIO_ACCESS_BIT);
}

static void r8168dp_2_mdio_stop(void __iomem *ioaddr)
{
	RTL_W32(0xd0, RTL_R32(0xd0) | R8168DP_1_MDIO_ACCESS_BIT);
}

1185
static void r8168dp_2_mdio_write(struct rtl8169_private *tp, int reg, int value)
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{
1187 1188
	void __iomem *ioaddr = tp->mmio_addr;

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	r8168dp_2_mdio_start(ioaddr);

1191
	r8169_mdio_write(tp, reg, value);
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	r8168dp_2_mdio_stop(ioaddr);
}

1196
static int r8168dp_2_mdio_read(struct rtl8169_private *tp, int reg)
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{
1198
	void __iomem *ioaddr = tp->mmio_addr;
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	int value;

	r8168dp_2_mdio_start(ioaddr);

1203
	value = r8169_mdio_read(tp, reg);
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	r8168dp_2_mdio_stop(ioaddr);

	return value;
}

1210
static void rtl_writephy(struct rtl8169_private *tp, int location, u32 val)
1211
{
1212
	tp->mdio_ops.write(tp, location, val);
1213 1214
}

1215 1216
static int rtl_readphy(struct rtl8169_private *tp, int location)
{
1217
	return tp->mdio_ops.read(tp, location);
1218 1219 1220 1221 1222 1223 1224 1225
}

static void rtl_patchphy(struct rtl8169_private *tp, int reg_addr, int value)
{
	rtl_writephy(tp, reg_addr, rtl_readphy(tp, reg_addr) | value);
}

static void rtl_w1w0_phy(struct rtl8169_private *tp, int reg_addr, int p, int m)
1226 1227 1228
{
	int val;

1229 1230
	val = rtl_readphy(tp, reg_addr);
	rtl_writephy(tp, reg_addr, (val | p) & ~m);
1231 1232
}

1233 1234 1235 1236 1237
static void rtl_mdio_write(struct net_device *dev, int phy_id, int location,
			   int val)
{
	struct rtl8169_private *tp = netdev_priv(dev);

1238
	rtl_writephy(tp, location, val);
1239 1240 1241 1242 1243 1244
}

static int rtl_mdio_read(struct net_device *dev, int phy_id, int location)
{
	struct rtl8169_private *tp = netdev_priv(dev);

1245
	return rtl_readphy(tp, location);
1246 1247
}

1248 1249 1250 1251 1252 1253 1254
DECLARE_RTL_COND(rtl_ephyar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(EPHYAR) & EPHYAR_FLAG;
}

1255
static void rtl_ephy_write(struct rtl8169_private *tp, int reg_addr, int value)
1256
{
1257
	void __iomem *ioaddr = tp->mmio_addr;
1258 1259 1260 1261

	RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) |
		(reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);

1262 1263 1264
	rtl_udelay_loop_wait_low(tp, &rtl_ephyar_cond, 10, 100);

	udelay(10);
1265 1266
}

1267
static u16 rtl_ephy_read(struct rtl8169_private *tp, int reg_addr)
1268
{
1269
	void __iomem *ioaddr = tp->mmio_addr;
1270 1271 1272

	RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);

1273 1274
	return rtl_udelay_loop_wait_high(tp, &rtl_ephyar_cond, 10, 100) ?
		RTL_R32(EPHYAR) & EPHYAR_DATA_MASK : ~0;
1275 1276
}

1277 1278
static void rtl_eri_write(struct rtl8169_private *tp, int addr, u32 mask,
			  u32 val, int type)
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{
1280
	void __iomem *ioaddr = tp->mmio_addr;
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	BUG_ON((addr & 3) || (mask == 0));
	RTL_W32(ERIDR, val);
	RTL_W32(ERIAR, ERIAR_WRITE_CMD | type | mask | addr);

1286
	rtl_udelay_loop_wait_low(tp, &rtl_eriar_cond, 100, 100);
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}

1289
static u32 rtl_eri_read(struct rtl8169_private *tp, int addr, int type)
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{
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	void __iomem *ioaddr = tp->mmio_addr;
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	RTL_W32(ERIAR, ERIAR_READ_CMD | type | ERIAR_MASK_1111 | addr);

1295 1296
	return rtl_udelay_loop_wait_high(tp, &rtl_eriar_cond, 100, 100) ?
		RTL_R32(ERIDR) : ~0;
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}

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static void rtl_w1w0_eri(struct rtl8169_private *tp, int addr, u32 mask, u32 p,
			 u32 m, int type)
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{
	u32 val;

1304 1305
	val = rtl_eri_read(tp, addr, type);
	rtl_eri_write(tp, addr, mask, (val & ~m) | p, type);
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}

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struct exgmac_reg {
	u16 addr;
	u16 mask;
	u32 val;
};

1314
static void rtl_write_exgmac_batch(struct rtl8169_private *tp,
1315 1316 1317
				   const struct exgmac_reg *r, int len)
{
	while (len-- > 0) {
1318
		rtl_eri_write(tp, r->addr, r->mask, r->val, ERIAR_EXGMAC);
1319 1320 1321 1322
		r++;
	}
}

1323 1324 1325 1326 1327 1328 1329
DECLARE_RTL_COND(rtl_efusear_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(EFUSEAR) & EFUSEAR_FLAG;
}

1330
static u8 rtl8168d_efuse_read(struct rtl8169_private *tp, int reg_addr)
1331
{
1332
	void __iomem *ioaddr = tp->mmio_addr;
1333 1334 1335

	RTL_W32(EFUSEAR, (reg_addr & EFUSEAR_REG_MASK) << EFUSEAR_REG_SHIFT);

1336 1337
	return rtl_udelay_loop_wait_high(tp, &rtl_efusear_cond, 100, 300) ?
		RTL_R32(EFUSEAR) & EFUSEAR_DATA_MASK : ~0;
1338 1339
}

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static u16 rtl_get_events(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R16(IntrStatus);
}

static void rtl_ack_events(struct rtl8169_private *tp, u16 bits)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W16(IntrStatus, bits);
	mmiowb();
}

static void rtl_irq_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W16(IntrMask, 0);
	mmiowb();
}

1363 1364 1365 1366 1367 1368 1369
static void rtl_irq_enable(struct rtl8169_private *tp, u16 bits)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W16(IntrMask, bits);
}

1370 1371 1372 1373 1374 1375 1376 1377 1378
#define RTL_EVENT_NAPI_RX	(RxOK | RxErr)
#define RTL_EVENT_NAPI_TX	(TxOK | TxErr)
#define RTL_EVENT_NAPI		(RTL_EVENT_NAPI_RX | RTL_EVENT_NAPI_TX)

static void rtl_irq_enable_all(struct rtl8169_private *tp)
{
	rtl_irq_enable(tp, RTL_EVENT_NAPI | tp->event_slow);
}

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static void rtl8169_irq_mask_and_ack(struct rtl8169_private *tp)
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{
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	void __iomem *ioaddr = tp->mmio_addr;
L
Linus Torvalds 已提交
1382

F
Francois Romieu 已提交
1383
	rtl_irq_disable(tp);
1384
	rtl_ack_events(tp, RTL_EVENT_NAPI | tp->event_slow);
F
françois romieu 已提交
1385
	RTL_R8(ChipCmd);
L
Linus Torvalds 已提交
1386 1387
}

1388
static unsigned int rtl8169_tbi_reset_pending(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1389
{
1390 1391
	void __iomem *ioaddr = tp->mmio_addr;

L
Linus Torvalds 已提交
1392 1393 1394
	return RTL_R32(TBICSR) & TBIReset;
}

1395
static unsigned int rtl8169_xmii_reset_pending(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1396
{
1397
	return rtl_readphy(tp, MII_BMCR) & BMCR_RESET;
L
Linus Torvalds 已提交
1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409
}

static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
{
	return RTL_R32(TBICSR) & TBILinkOk;
}

static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
{
	return RTL_R8(PHYstatus) & LinkStatus;
}

1410
static void rtl8169_tbi_reset_enable(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1411
{
1412 1413
	void __iomem *ioaddr = tp->mmio_addr;

L
Linus Torvalds 已提交
1414 1415 1416
	RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
}

1417
static void rtl8169_xmii_reset_enable(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1418 1419 1420
{
	unsigned int val;

1421 1422
	val = rtl_readphy(tp, MII_BMCR) | BMCR_RESET;
	rtl_writephy(tp, MII_BMCR, val & 0xffff);
L
Linus Torvalds 已提交
1423 1424
}

H
Hayes Wang 已提交
1425 1426 1427 1428 1429 1430 1431 1432
static void rtl_link_chg_patch(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	struct net_device *dev = tp->dev;

	if (!netif_running(dev))
		return;

1433 1434
	if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_38) {
H
Hayes Wang 已提交
1435
		if (RTL_R8(PHYstatus) & _1000bpsF) {
1436 1437 1438 1439
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x00000011,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
				      ERIAR_EXGMAC);
H
Hayes Wang 已提交
1440
		} else if (RTL_R8(PHYstatus) & _100bps) {
1441 1442 1443 1444
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
				      ERIAR_EXGMAC);
H
Hayes Wang 已提交
1445
		} else {
1446 1447 1448 1449
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x0000003f,
				      ERIAR_EXGMAC);
H
Hayes Wang 已提交
1450 1451
		}
		/* Reset packet filter */
1452
		rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01,
H
Hayes Wang 已提交
1453
			     ERIAR_EXGMAC);
1454
		rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00,
H
Hayes Wang 已提交
1455
			     ERIAR_EXGMAC);
1456 1457 1458
	} else if (tp->mac_version == RTL_GIGA_MAC_VER_35 ||
		   tp->mac_version == RTL_GIGA_MAC_VER_36) {
		if (RTL_R8(PHYstatus) & _1000bpsF) {
1459 1460 1461 1462
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x00000011,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
				      ERIAR_EXGMAC);
1463
		} else {
1464 1465 1466 1467
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x0000003f,
				      ERIAR_EXGMAC);
1468
		}
1469 1470
	} else if (tp->mac_version == RTL_GIGA_MAC_VER_37) {
		if (RTL_R8(PHYstatus) & _10bps) {
1471 1472 1473 1474
			rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x4d02,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_0011, 0x0060,
				      ERIAR_EXGMAC);
1475
		} else {
1476 1477
			rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000,
				      ERIAR_EXGMAC);
1478
		}
H
Hayes Wang 已提交
1479 1480 1481
	}
}

1482
static void __rtl8169_check_link_status(struct net_device *dev,
F
Francois Romieu 已提交
1483 1484
					struct rtl8169_private *tp,
					void __iomem *ioaddr, bool pm)
L
Linus Torvalds 已提交
1485 1486
{
	if (tp->link_ok(ioaddr)) {
H
Hayes Wang 已提交
1487
		rtl_link_chg_patch(tp);
1488
		/* This is to cancel a scheduled suspend if there's one. */
1489 1490
		if (pm)
			pm_request_resume(&tp->pci_dev->dev);
L
Linus Torvalds 已提交
1491
		netif_carrier_on(dev);
1492 1493
		if (net_ratelimit())
			netif_info(tp, ifup, dev, "link up\n");
1494
	} else {
L
Linus Torvalds 已提交
1495
		netif_carrier_off(dev);
1496
		netif_info(tp, ifdown, dev, "link down\n");
1497
		if (pm)
1498
			pm_schedule_suspend(&tp->pci_dev->dev, 5000);
1499
	}
L
Linus Torvalds 已提交
1500 1501
}

1502 1503 1504 1505 1506 1507 1508
static void rtl8169_check_link_status(struct net_device *dev,
				      struct rtl8169_private *tp,
				      void __iomem *ioaddr)
{
	__rtl8169_check_link_status(dev, tp, ioaddr, false);
}

1509 1510 1511
#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)

static u32 __rtl8169_get_wol(struct rtl8169_private *tp)
F
Francois Romieu 已提交
1512 1513 1514
{
	void __iomem *ioaddr = tp->mmio_addr;
	u8 options;
1515
	u32 wolopts = 0;
F
Francois Romieu 已提交
1516 1517 1518

	options = RTL_R8(Config1);
	if (!(options & PMEnable))
1519
		return 0;
F
Francois Romieu 已提交
1520 1521 1522

	options = RTL_R8(Config3);
	if (options & LinkUp)
1523
		wolopts |= WAKE_PHY;
F
Francois Romieu 已提交
1524
	if (options & MagicPacket)
1525
		wolopts |= WAKE_MAGIC;
F
Francois Romieu 已提交
1526 1527 1528

	options = RTL_R8(Config5);
	if (options & UWF)
1529
		wolopts |= WAKE_UCAST;
F
Francois Romieu 已提交
1530
	if (options & BWF)
1531
		wolopts |= WAKE_BCAST;
F
Francois Romieu 已提交
1532
	if (options & MWF)
1533
		wolopts |= WAKE_MCAST;
F
Francois Romieu 已提交
1534

1535
	return wolopts;
F
Francois Romieu 已提交
1536 1537
}

1538
static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
F
Francois Romieu 已提交
1539 1540
{
	struct rtl8169_private *tp = netdev_priv(dev);
1541

1542
	rtl_lock_work(tp);
1543 1544 1545 1546

	wol->supported = WAKE_ANY;
	wol->wolopts = __rtl8169_get_wol(tp);

1547
	rtl_unlock_work(tp);
1548 1549 1550 1551
}

static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
{
F
Francois Romieu 已提交
1552
	void __iomem *ioaddr = tp->mmio_addr;
F
Francois Romieu 已提交
1553
	unsigned int i;
1554
	static const struct {
F
Francois Romieu 已提交
1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565
		u32 opt;
		u16 reg;
		u8  mask;
	} cfg[] = {
		{ WAKE_PHY,   Config3, LinkUp },
		{ WAKE_MAGIC, Config3, MagicPacket },
		{ WAKE_UCAST, Config5, UWF },
		{ WAKE_BCAST, Config5, BWF },
		{ WAKE_MCAST, Config5, MWF },
		{ WAKE_ANY,   Config5, LanWake }
	};
1566
	u8 options;
F
Francois Romieu 已提交
1567 1568 1569 1570

	RTL_W8(Cfg9346, Cfg9346_Unlock);

	for (i = 0; i < ARRAY_SIZE(cfg); i++) {
1571
		options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
1572
		if (wolopts & cfg[i].opt)
F
Francois Romieu 已提交
1573 1574 1575 1576
			options |= cfg[i].mask;
		RTL_W8(cfg[i].reg, options);
	}

1577 1578 1579 1580 1581 1582 1583 1584
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_17:
		options = RTL_R8(Config1) & ~PMEnable;
		if (wolopts)
			options |= PMEnable;
		RTL_W8(Config1, options);
		break;
	default:
1585 1586 1587 1588
		options = RTL_R8(Config2) & ~PME_SIGNAL;
		if (wolopts)
			options |= PME_SIGNAL;
		RTL_W8(Config2, options);
1589 1590 1591
		break;
	}

F
Francois Romieu 已提交
1592
	RTL_W8(Cfg9346, Cfg9346_Lock);
1593 1594 1595 1596 1597 1598
}

static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
{
	struct rtl8169_private *tp = netdev_priv(dev);

1599
	rtl_lock_work(tp);
F
Francois Romieu 已提交
1600

1601 1602 1603 1604
	if (wol->wolopts)
		tp->features |= RTL_FEATURE_WOL;
	else
		tp->features &= ~RTL_FEATURE_WOL;
1605
	__rtl8169_set_wol(tp, wol->wolopts);
1606 1607

	rtl_unlock_work(tp);
F
Francois Romieu 已提交
1608

1609 1610
	device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts);

F
Francois Romieu 已提交
1611 1612 1613
	return 0;
}

1614 1615
static const char *rtl_lookup_firmware_name(struct rtl8169_private *tp)
{
1616
	return rtl_chip_infos[tp->mac_version].fw_name;
1617 1618
}

L
Linus Torvalds 已提交
1619 1620 1621 1622
static void rtl8169_get_drvinfo(struct net_device *dev,
				struct ethtool_drvinfo *info)
{
	struct rtl8169_private *tp = netdev_priv(dev);
1623
	struct rtl_fw *rtl_fw = tp->rtl_fw;
L
Linus Torvalds 已提交
1624

1625 1626 1627
	strlcpy(info->driver, MODULENAME, sizeof(info->driver));
	strlcpy(info->version, RTL8169_VERSION, sizeof(info->version));
	strlcpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info));
1628
	BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version));
1629 1630 1631
	if (!IS_ERR_OR_NULL(rtl_fw))
		strlcpy(info->fw_version, rtl_fw->version,
			sizeof(info->fw_version));
L
Linus Torvalds 已提交
1632 1633 1634 1635 1636 1637 1638 1639
}

static int rtl8169_get_regs_len(struct net_device *dev)
{
	return R8169_REGS_SIZE;
}

static int rtl8169_set_speed_tbi(struct net_device *dev,
1640
				 u8 autoneg, u16 speed, u8 duplex, u32 ignored)
L
Linus Torvalds 已提交
1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	int ret = 0;
	u32 reg;

	reg = RTL_R32(TBICSR);
	if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
	    (duplex == DUPLEX_FULL)) {
		RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
	} else if (autoneg == AUTONEG_ENABLE)
		RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
	else {
1654 1655
		netif_warn(tp, link, dev,
			   "incorrect speed setting refused in TBI mode\n");
L
Linus Torvalds 已提交
1656 1657 1658 1659 1660 1661 1662
		ret = -EOPNOTSUPP;
	}

	return ret;
}

static int rtl8169_set_speed_xmii(struct net_device *dev,
1663
				  u8 autoneg, u16 speed, u8 duplex, u32 adv)
L
Linus Torvalds 已提交
1664 1665
{
	struct rtl8169_private *tp = netdev_priv(dev);
1666
	int giga_ctrl, bmcr;
1667
	int rc = -EINVAL;
L
Linus Torvalds 已提交
1668

1669
	rtl_writephy(tp, 0x1f, 0x0000);
L
Linus Torvalds 已提交
1670 1671

	if (autoneg == AUTONEG_ENABLE) {
1672 1673
		int auto_nego;

1674
		auto_nego = rtl_readphy(tp, MII_ADVERTISE);
1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686
		auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
				ADVERTISE_100HALF | ADVERTISE_100FULL);

		if (adv & ADVERTISED_10baseT_Half)
			auto_nego |= ADVERTISE_10HALF;
		if (adv & ADVERTISED_10baseT_Full)
			auto_nego |= ADVERTISE_10FULL;
		if (adv & ADVERTISED_100baseT_Half)
			auto_nego |= ADVERTISE_100HALF;
		if (adv & ADVERTISED_100baseT_Full)
			auto_nego |= ADVERTISE_100FULL;

1687
		auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
L
Linus Torvalds 已提交
1688

1689
		giga_ctrl = rtl_readphy(tp, MII_CTRL1000);
1690
		giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
1691

1692
		/* The 8100e/8101e/8102e do Fast Ethernet only. */
1693
		if (tp->mii.supports_gmii) {
1694 1695 1696 1697 1698 1699
			if (adv & ADVERTISED_1000baseT_Half)
				giga_ctrl |= ADVERTISE_1000HALF;
			if (adv & ADVERTISED_1000baseT_Full)
				giga_ctrl |= ADVERTISE_1000FULL;
		} else if (adv & (ADVERTISED_1000baseT_Half |
				  ADVERTISED_1000baseT_Full)) {
1700 1701
			netif_info(tp, link, dev,
				   "PHY does not support 1000Mbps\n");
1702
			goto out;
1703
		}
L
Linus Torvalds 已提交
1704

1705 1706
		bmcr = BMCR_ANENABLE | BMCR_ANRESTART;

1707 1708
		rtl_writephy(tp, MII_ADVERTISE, auto_nego);
		rtl_writephy(tp, MII_CTRL1000, giga_ctrl);
1709 1710 1711 1712 1713 1714 1715 1716
	} else {
		giga_ctrl = 0;

		if (speed == SPEED_10)
			bmcr = 0;
		else if (speed == SPEED_100)
			bmcr = BMCR_SPEED100;
		else
1717
			goto out;
1718 1719 1720

		if (duplex == DUPLEX_FULL)
			bmcr |= BMCR_FULLDPLX;
R
Roger So 已提交
1721 1722
	}

1723
	rtl_writephy(tp, MII_BMCR, bmcr);
1724

F
Francois Romieu 已提交
1725 1726
	if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03) {
1727
		if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) {
1728 1729
			rtl_writephy(tp, 0x17, 0x2138);
			rtl_writephy(tp, 0x0e, 0x0260);
1730
		} else {
1731 1732
			rtl_writephy(tp, 0x17, 0x2108);
			rtl_writephy(tp, 0x0e, 0x0000);
1733 1734 1735
		}
	}

1736 1737 1738
	rc = 0;
out:
	return rc;
L
Linus Torvalds 已提交
1739 1740 1741
}

static int rtl8169_set_speed(struct net_device *dev,
1742
			     u8 autoneg, u16 speed, u8 duplex, u32 advertising)
L
Linus Torvalds 已提交
1743 1744 1745 1746
{
	struct rtl8169_private *tp = netdev_priv(dev);
	int ret;

1747
	ret = tp->set_speed(dev, autoneg, speed, duplex, advertising);
1748 1749
	if (ret < 0)
		goto out;
L
Linus Torvalds 已提交
1750

1751 1752
	if (netif_running(dev) && (autoneg == AUTONEG_ENABLE) &&
	    (advertising & ADVERTISED_1000baseT_Full)) {
L
Linus Torvalds 已提交
1753
		mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
1754 1755
	}
out:
L
Linus Torvalds 已提交
1756 1757 1758 1759 1760 1761 1762 1763
	return ret;
}

static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	int ret;

1764 1765
	del_timer_sync(&tp->timer);

1766
	rtl_lock_work(tp);
F
Francois Romieu 已提交
1767
	ret = rtl8169_set_speed(dev, cmd->autoneg, ethtool_cmd_speed(cmd),
1768
				cmd->duplex, cmd->advertising);
1769
	rtl_unlock_work(tp);
1770

L
Linus Torvalds 已提交
1771 1772 1773
	return ret;
}

1774 1775
static netdev_features_t rtl8169_fix_features(struct net_device *dev,
	netdev_features_t features)
L
Linus Torvalds 已提交
1776
{
F
Francois Romieu 已提交
1777 1778
	struct rtl8169_private *tp = netdev_priv(dev);

F
Francois Romieu 已提交
1779
	if (dev->mtu > TD_MSS_MAX)
1780
		features &= ~NETIF_F_ALL_TSO;
L
Linus Torvalds 已提交
1781

F
Francois Romieu 已提交
1782 1783 1784 1785
	if (dev->mtu > JUMBO_1K &&
	    !rtl_chip_infos[tp->mac_version].jumbo_tx_csum)
		features &= ~NETIF_F_IP_CSUM;

1786
	return features;
L
Linus Torvalds 已提交
1787 1788
}

1789 1790
static void __rtl8169_set_features(struct net_device *dev,
				   netdev_features_t features)
L
Linus Torvalds 已提交
1791 1792
{
	struct rtl8169_private *tp = netdev_priv(dev);
B
Ben Greear 已提交
1793
	netdev_features_t changed = features ^ dev->features;
1794
	void __iomem *ioaddr = tp->mmio_addr;
L
Linus Torvalds 已提交
1795

B
Ben Greear 已提交
1796 1797
	if (!(changed & (NETIF_F_RXALL | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX)))
		return;
L
Linus Torvalds 已提交
1798

B
Ben Greear 已提交
1799 1800 1801 1802 1803
	if (changed & (NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX)) {
		if (features & NETIF_F_RXCSUM)
			tp->cp_cmd |= RxChkSum;
		else
			tp->cp_cmd &= ~RxChkSum;
1804

B
Ben Greear 已提交
1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818
		if (dev->features & NETIF_F_HW_VLAN_RX)
			tp->cp_cmd |= RxVlan;
		else
			tp->cp_cmd &= ~RxVlan;

		RTL_W16(CPlusCmd, tp->cp_cmd);
		RTL_R16(CPlusCmd);
	}
	if (changed & NETIF_F_RXALL) {
		int tmp = (RTL_R32(RxConfig) & ~(AcceptErr | AcceptRunt));
		if (features & NETIF_F_RXALL)
			tmp |= (AcceptErr | AcceptRunt);
		RTL_W32(RxConfig, tmp);
	}
1819
}
L
Linus Torvalds 已提交
1820

1821 1822 1823 1824 1825 1826 1827 1828
static int rtl8169_set_features(struct net_device *dev,
				netdev_features_t features)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl_lock_work(tp);
	__rtl8169_set_features(dev, features);
	rtl_unlock_work(tp);
L
Linus Torvalds 已提交
1829 1830 1831 1832

	return 0;
}

1833

1834
static inline u32 rtl8169_tx_vlan_tag(struct sk_buff *skb)
L
Linus Torvalds 已提交
1835
{
1836
	return (vlan_tx_tag_present(skb)) ?
L
Linus Torvalds 已提交
1837 1838 1839
		TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
}

1840
static void rtl8169_rx_vlan_tag(struct RxDesc *desc, struct sk_buff *skb)
L
Linus Torvalds 已提交
1841 1842 1843
{
	u32 opts2 = le32_to_cpu(desc->opts2);

1844 1845
	if (opts2 & RxVlanTag)
		__vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff));
L
Linus Torvalds 已提交
1846 1847
}

1848
static int rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
L
Linus Torvalds 已提交
1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	u32 status;

	cmd->supported =
		SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
	cmd->port = PORT_FIBRE;
	cmd->transceiver = XCVR_INTERNAL;

	status = RTL_R32(TBICSR);
	cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
	cmd->autoneg = !!(status & TBINwEnable);

1863
	ethtool_cmd_speed_set(cmd, SPEED_1000);
L
Linus Torvalds 已提交
1864
	cmd->duplex = DUPLEX_FULL; /* Always set */
1865 1866

	return 0;
L
Linus Torvalds 已提交
1867 1868
}

1869
static int rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
L
Linus Torvalds 已提交
1870 1871
{
	struct rtl8169_private *tp = netdev_priv(dev);
1872 1873

	return mii_ethtool_gset(&tp->mii, cmd);
L
Linus Torvalds 已提交
1874 1875 1876 1877 1878
}

static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
1879
	int rc;
L
Linus Torvalds 已提交
1880

1881
	rtl_lock_work(tp);
1882
	rc = tp->get_settings(dev, cmd);
1883
	rtl_unlock_work(tp);
L
Linus Torvalds 已提交
1884

1885
	return rc;
L
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1886 1887 1888 1889 1890
}

static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
			     void *p)
{
1891
	struct rtl8169_private *tp = netdev_priv(dev);
L
Linus Torvalds 已提交
1892

1893 1894
	if (regs->len > R8169_REGS_SIZE)
		regs->len = R8169_REGS_SIZE;
L
Linus Torvalds 已提交
1895

1896
	rtl_lock_work(tp);
1897
	memcpy_fromio(p, tp->mmio_addr, regs->len);
1898
	rtl_unlock_work(tp);
L
Linus Torvalds 已提交
1899 1900
}

1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914
static u32 rtl8169_get_msglevel(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	return tp->msg_enable;
}

static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	tp->msg_enable = value;
}

1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930
static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
	"tx_packets",
	"rx_packets",
	"tx_errors",
	"rx_errors",
	"rx_missed",
	"align_errors",
	"tx_single_collisions",
	"tx_multi_collisions",
	"unicast",
	"broadcast",
	"multicast",
	"tx_aborted",
	"tx_underrun",
};

1931
static int rtl8169_get_sset_count(struct net_device *dev, int sset)
1932
{
1933 1934 1935 1936 1937 1938
	switch (sset) {
	case ETH_SS_STATS:
		return ARRAY_SIZE(rtl8169_gstrings);
	default:
		return -EOPNOTSUPP;
	}
1939 1940
}

1941 1942 1943 1944 1945 1946 1947
DECLARE_RTL_COND(rtl_counters_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(CounterAddrLow) & CounterDump;
}

1948
static void rtl8169_update_counters(struct net_device *dev)
1949 1950 1951
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
F
Francois Romieu 已提交
1952
	struct device *d = &tp->pci_dev->dev;
1953 1954 1955 1956
	struct rtl8169_counters *counters;
	dma_addr_t paddr;
	u32 cmd;

1957 1958 1959 1960 1961 1962
	/*
	 * Some chips are unable to dump tally counters when the receiver
	 * is disabled.
	 */
	if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0)
		return;
1963

1964
	counters = dma_alloc_coherent(d, sizeof(*counters), &paddr, GFP_KERNEL);
1965 1966 1967 1968
	if (!counters)
		return;

	RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1969
	cmd = (u64)paddr & DMA_BIT_MASK(32);
1970 1971 1972
	RTL_W32(CounterAddrLow, cmd);
	RTL_W32(CounterAddrLow, cmd | CounterDump);

1973 1974
	if (rtl_udelay_loop_wait_low(tp, &rtl_counters_cond, 10, 1000))
		memcpy(&tp->counters, counters, sizeof(*counters));
1975 1976 1977 1978

	RTL_W32(CounterAddrLow, 0);
	RTL_W32(CounterAddrHigh, 0);

1979
	dma_free_coherent(d, sizeof(*counters), counters, paddr);
1980 1981
}

1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005
static void rtl8169_get_ethtool_stats(struct net_device *dev,
				      struct ethtool_stats *stats, u64 *data)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	ASSERT_RTNL();

	rtl8169_update_counters(dev);

	data[0] = le64_to_cpu(tp->counters.tx_packets);
	data[1] = le64_to_cpu(tp->counters.rx_packets);
	data[2] = le64_to_cpu(tp->counters.tx_errors);
	data[3] = le32_to_cpu(tp->counters.rx_errors);
	data[4] = le16_to_cpu(tp->counters.rx_missed);
	data[5] = le16_to_cpu(tp->counters.align_errors);
	data[6] = le32_to_cpu(tp->counters.tx_one_collision);
	data[7] = le32_to_cpu(tp->counters.tx_multi_collision);
	data[8] = le64_to_cpu(tp->counters.rx_unicast);
	data[9] = le64_to_cpu(tp->counters.rx_broadcast);
	data[10] = le32_to_cpu(tp->counters.rx_multicast);
	data[11] = le16_to_cpu(tp->counters.tx_aborted);
	data[12] = le16_to_cpu(tp->counters.tx_underun);
}

2006 2007 2008 2009 2010 2011 2012 2013 2014
static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
{
	switch(stringset) {
	case ETH_SS_STATS:
		memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
		break;
	}
}

2015
static const struct ethtool_ops rtl8169_ethtool_ops = {
L
Linus Torvalds 已提交
2016 2017 2018 2019 2020
	.get_drvinfo		= rtl8169_get_drvinfo,
	.get_regs_len		= rtl8169_get_regs_len,
	.get_link		= ethtool_op_get_link,
	.get_settings		= rtl8169_get_settings,
	.set_settings		= rtl8169_set_settings,
2021 2022
	.get_msglevel		= rtl8169_get_msglevel,
	.set_msglevel		= rtl8169_set_msglevel,
L
Linus Torvalds 已提交
2023
	.get_regs		= rtl8169_get_regs,
F
Francois Romieu 已提交
2024 2025
	.get_wol		= rtl8169_get_wol,
	.set_wol		= rtl8169_set_wol,
2026
	.get_strings		= rtl8169_get_strings,
2027
	.get_sset_count		= rtl8169_get_sset_count,
2028
	.get_ethtool_stats	= rtl8169_get_ethtool_stats,
2029
	.get_ts_info		= ethtool_op_get_ts_info,
L
Linus Torvalds 已提交
2030 2031
};

F
Francois Romieu 已提交
2032
static void rtl8169_get_mac_version(struct rtl8169_private *tp,
2033
				    struct net_device *dev, u8 default_version)
L
Linus Torvalds 已提交
2034
{
2035
	void __iomem *ioaddr = tp->mmio_addr;
2036 2037 2038 2039 2040 2041
	/*
	 * The driver currently handles the 8168Bf and the 8168Be identically
	 * but they can be identified more specifically through the test below
	 * if needed:
	 *
	 * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
F
Francois Romieu 已提交
2042 2043 2044 2045
	 *
	 * Same thing for the 8101Eb and the 8101Ec:
	 *
	 * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec
2046
	 */
2047
	static const struct rtl_mac_info {
L
Linus Torvalds 已提交
2048
		u32 mask;
F
Francois Romieu 已提交
2049
		u32 val;
L
Linus Torvalds 已提交
2050 2051
		int mac_version;
	} mac_info[] = {
H
Hayes Wang 已提交
2052
		/* 8168G family. */
H
hayeswang 已提交
2053
		{ 0x7cf00000, 0x50900000,	RTL_GIGA_MAC_VER_42 },
H
Hayes Wang 已提交
2054 2055 2056
		{ 0x7cf00000, 0x4c100000,	RTL_GIGA_MAC_VER_41 },
		{ 0x7cf00000, 0x4c000000,	RTL_GIGA_MAC_VER_40 },

2057
		/* 8168F family. */
2058
		{ 0x7c800000, 0x48800000,	RTL_GIGA_MAC_VER_38 },
2059 2060 2061
		{ 0x7cf00000, 0x48100000,	RTL_GIGA_MAC_VER_36 },
		{ 0x7cf00000, 0x48000000,	RTL_GIGA_MAC_VER_35 },

H
hayeswang 已提交
2062
		/* 8168E family. */
H
Hayes Wang 已提交
2063
		{ 0x7c800000, 0x2c800000,	RTL_GIGA_MAC_VER_34 },
H
hayeswang 已提交
2064 2065 2066 2067
		{ 0x7cf00000, 0x2c200000,	RTL_GIGA_MAC_VER_33 },
		{ 0x7cf00000, 0x2c100000,	RTL_GIGA_MAC_VER_32 },
		{ 0x7c800000, 0x2c000000,	RTL_GIGA_MAC_VER_33 },

F
Francois Romieu 已提交
2068
		/* 8168D family. */
2069 2070 2071
		{ 0x7cf00000, 0x28300000,	RTL_GIGA_MAC_VER_26 },
		{ 0x7cf00000, 0x28100000,	RTL_GIGA_MAC_VER_25 },
		{ 0x7c800000, 0x28000000,	RTL_GIGA_MAC_VER_26 },
F
Francois Romieu 已提交
2072

F
françois romieu 已提交
2073 2074 2075
		/* 8168DP family. */
		{ 0x7cf00000, 0x28800000,	RTL_GIGA_MAC_VER_27 },
		{ 0x7cf00000, 0x28a00000,	RTL_GIGA_MAC_VER_28 },
2076
		{ 0x7cf00000, 0x28b00000,	RTL_GIGA_MAC_VER_31 },
F
françois romieu 已提交
2077

2078
		/* 8168C family. */
2079
		{ 0x7cf00000, 0x3cb00000,	RTL_GIGA_MAC_VER_24 },
F
Francois Romieu 已提交
2080
		{ 0x7cf00000, 0x3c900000,	RTL_GIGA_MAC_VER_23 },
2081
		{ 0x7cf00000, 0x3c800000,	RTL_GIGA_MAC_VER_18 },
2082
		{ 0x7c800000, 0x3c800000,	RTL_GIGA_MAC_VER_24 },
F
Francois Romieu 已提交
2083 2084
		{ 0x7cf00000, 0x3c000000,	RTL_GIGA_MAC_VER_19 },
		{ 0x7cf00000, 0x3c200000,	RTL_GIGA_MAC_VER_20 },
F
Francois Romieu 已提交
2085
		{ 0x7cf00000, 0x3c300000,	RTL_GIGA_MAC_VER_21 },
2086
		{ 0x7cf00000, 0x3c400000,	RTL_GIGA_MAC_VER_22 },
2087
		{ 0x7c800000, 0x3c000000,	RTL_GIGA_MAC_VER_22 },
F
Francois Romieu 已提交
2088 2089 2090 2091 2092 2093 2094 2095

		/* 8168B family. */
		{ 0x7cf00000, 0x38000000,	RTL_GIGA_MAC_VER_12 },
		{ 0x7cf00000, 0x38500000,	RTL_GIGA_MAC_VER_17 },
		{ 0x7c800000, 0x38000000,	RTL_GIGA_MAC_VER_17 },
		{ 0x7c800000, 0x30000000,	RTL_GIGA_MAC_VER_11 },

		/* 8101 family. */
H
Hayes Wang 已提交
2096 2097
		{ 0x7cf00000, 0x44900000,	RTL_GIGA_MAC_VER_39 },
		{ 0x7c800000, 0x44800000,	RTL_GIGA_MAC_VER_39 },
2098
		{ 0x7c800000, 0x44000000,	RTL_GIGA_MAC_VER_37 },
2099
		{ 0x7cf00000, 0x40b00000,	RTL_GIGA_MAC_VER_30 },
2100 2101 2102
		{ 0x7cf00000, 0x40a00000,	RTL_GIGA_MAC_VER_30 },
		{ 0x7cf00000, 0x40900000,	RTL_GIGA_MAC_VER_29 },
		{ 0x7c800000, 0x40800000,	RTL_GIGA_MAC_VER_30 },
2103 2104 2105 2106 2107 2108
		{ 0x7cf00000, 0x34a00000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7cf00000, 0x24a00000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7cf00000, 0x34900000,	RTL_GIGA_MAC_VER_08 },
		{ 0x7cf00000, 0x24900000,	RTL_GIGA_MAC_VER_08 },
		{ 0x7cf00000, 0x34800000,	RTL_GIGA_MAC_VER_07 },
		{ 0x7cf00000, 0x24800000,	RTL_GIGA_MAC_VER_07 },
F
Francois Romieu 已提交
2109
		{ 0x7cf00000, 0x34000000,	RTL_GIGA_MAC_VER_13 },
2110
		{ 0x7cf00000, 0x34300000,	RTL_GIGA_MAC_VER_10 },
F
Francois Romieu 已提交
2111
		{ 0x7cf00000, 0x34200000,	RTL_GIGA_MAC_VER_16 },
2112 2113
		{ 0x7c800000, 0x34800000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7c800000, 0x24800000,	RTL_GIGA_MAC_VER_09 },
F
Francois Romieu 已提交
2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126
		{ 0x7c800000, 0x34000000,	RTL_GIGA_MAC_VER_16 },
		/* FIXME: where did these entries come from ? -- FR */
		{ 0xfc800000, 0x38800000,	RTL_GIGA_MAC_VER_15 },
		{ 0xfc800000, 0x30800000,	RTL_GIGA_MAC_VER_14 },

		/* 8110 family. */
		{ 0xfc800000, 0x98000000,	RTL_GIGA_MAC_VER_06 },
		{ 0xfc800000, 0x18000000,	RTL_GIGA_MAC_VER_05 },
		{ 0xfc800000, 0x10000000,	RTL_GIGA_MAC_VER_04 },
		{ 0xfc800000, 0x04000000,	RTL_GIGA_MAC_VER_03 },
		{ 0xfc800000, 0x00800000,	RTL_GIGA_MAC_VER_02 },
		{ 0xfc800000, 0x00000000,	RTL_GIGA_MAC_VER_01 },

2127 2128
		/* Catch-all */
		{ 0x00000000, 0x00000000,	RTL_GIGA_MAC_NONE   }
2129 2130
	};
	const struct rtl_mac_info *p = mac_info;
L
Linus Torvalds 已提交
2131 2132
	u32 reg;

F
Francois Romieu 已提交
2133 2134
	reg = RTL_R32(TxConfig);
	while ((reg & p->mask) != p->val)
L
Linus Torvalds 已提交
2135 2136
		p++;
	tp->mac_version = p->mac_version;
2137 2138 2139 2140 2141

	if (tp->mac_version == RTL_GIGA_MAC_NONE) {
		netif_notice(tp, probe, dev,
			     "unknown MAC, using family default\n");
		tp->mac_version = default_version;
H
hayeswang 已提交
2142 2143 2144 2145
	} else if (tp->mac_version == RTL_GIGA_MAC_VER_42) {
		tp->mac_version = tp->mii.supports_gmii ?
				  RTL_GIGA_MAC_VER_42 :
				  RTL_GIGA_MAC_VER_43;
2146
	}
L
Linus Torvalds 已提交
2147 2148 2149 2150
}

static void rtl8169_print_mac_version(struct rtl8169_private *tp)
{
2151
	dprintk("mac_version = 0x%02x\n", tp->mac_version);
L
Linus Torvalds 已提交
2152 2153
}

F
Francois Romieu 已提交
2154 2155 2156 2157 2158
struct phy_reg {
	u16 reg;
	u16 val;
};

2159 2160
static void rtl_writephy_batch(struct rtl8169_private *tp,
			       const struct phy_reg *regs, int len)
F
Francois Romieu 已提交
2161 2162
{
	while (len-- > 0) {
2163
		rtl_writephy(tp, regs->reg, regs->val);
F
Francois Romieu 已提交
2164 2165 2166 2167
		regs++;
	}
}

2168 2169 2170 2171
#define PHY_READ		0x00000000
#define PHY_DATA_OR		0x10000000
#define PHY_DATA_AND		0x20000000
#define PHY_BJMPN		0x30000000
2172
#define PHY_MDIO_CHG		0x40000000
2173 2174 2175 2176 2177 2178 2179 2180 2181
#define PHY_CLEAR_READCOUNT	0x70000000
#define PHY_WRITE		0x80000000
#define PHY_READCOUNT_EQ_SKIP	0x90000000
#define PHY_COMP_EQ_SKIPN	0xa0000000
#define PHY_COMP_NEQ_SKIPN	0xb0000000
#define PHY_WRITE_PREVIOUS	0xc0000000
#define PHY_SKIPN		0xd0000000
#define PHY_DELAY_MS		0xe0000000

H
Hayes Wang 已提交
2182 2183 2184 2185 2186 2187 2188 2189
struct fw_info {
	u32	magic;
	char	version[RTL_VER_SIZE];
	__le32	fw_start;
	__le32	fw_len;
	u8	chksum;
} __packed;

2190 2191 2192
#define FW_OPCODE_SIZE	sizeof(typeof(*((struct rtl_fw_phy_action *)0)->code))

static bool rtl_fw_format_ok(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
2193
{
2194
	const struct firmware *fw = rtl_fw->fw;
H
Hayes Wang 已提交
2195
	struct fw_info *fw_info = (struct fw_info *)fw->data;
2196 2197 2198 2199 2200 2201
	struct rtl_fw_phy_action *pa = &rtl_fw->phy_action;
	char *version = rtl_fw->version;
	bool rc = false;

	if (fw->size < FW_OPCODE_SIZE)
		goto out;
H
Hayes Wang 已提交
2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227

	if (!fw_info->magic) {
		size_t i, size, start;
		u8 checksum = 0;

		if (fw->size < sizeof(*fw_info))
			goto out;

		for (i = 0; i < fw->size; i++)
			checksum += fw->data[i];
		if (checksum != 0)
			goto out;

		start = le32_to_cpu(fw_info->fw_start);
		if (start > fw->size)
			goto out;

		size = le32_to_cpu(fw_info->fw_len);
		if (size > (fw->size - start) / FW_OPCODE_SIZE)
			goto out;

		memcpy(version, fw_info->version, RTL_VER_SIZE);

		pa->code = (__le32 *)(fw->data + start);
		pa->size = size;
	} else {
2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242
		if (fw->size % FW_OPCODE_SIZE)
			goto out;

		strlcpy(version, rtl_lookup_firmware_name(tp), RTL_VER_SIZE);

		pa->code = (__le32 *)fw->data;
		pa->size = fw->size / FW_OPCODE_SIZE;
	}
	version[RTL_VER_SIZE - 1] = 0;

	rc = true;
out:
	return rc;
}

2243 2244
static bool rtl_fw_data_ok(struct rtl8169_private *tp, struct net_device *dev,
			   struct rtl_fw_phy_action *pa)
2245
{
2246
	bool rc = false;
2247
	size_t index;
2248

2249 2250
	for (index = 0; index < pa->size; index++) {
		u32 action = le32_to_cpu(pa->code[index]);
2251
		u32 regno = (action & 0x0fff0000) >> 16;
2252

2253 2254 2255 2256
		switch(action & 0xf0000000) {
		case PHY_READ:
		case PHY_DATA_OR:
		case PHY_DATA_AND:
2257
		case PHY_MDIO_CHG:
2258 2259 2260 2261 2262 2263 2264 2265
		case PHY_CLEAR_READCOUNT:
		case PHY_WRITE:
		case PHY_WRITE_PREVIOUS:
		case PHY_DELAY_MS:
			break;

		case PHY_BJMPN:
			if (regno > index) {
2266
				netif_err(tp, ifup, tp->dev,
F
Francois Romieu 已提交
2267
					  "Out of range of firmware\n");
2268
				goto out;
2269 2270 2271
			}
			break;
		case PHY_READCOUNT_EQ_SKIP:
2272
			if (index + 2 >= pa->size) {
2273
				netif_err(tp, ifup, tp->dev,
F
Francois Romieu 已提交
2274
					  "Out of range of firmware\n");
2275
				goto out;
2276 2277 2278 2279 2280
			}
			break;
		case PHY_COMP_EQ_SKIPN:
		case PHY_COMP_NEQ_SKIPN:
		case PHY_SKIPN:
2281
			if (index + 1 + regno >= pa->size) {
2282
				netif_err(tp, ifup, tp->dev,
F
Francois Romieu 已提交
2283
					  "Out of range of firmware\n");
2284
				goto out;
2285
			}
2286 2287
			break;

2288
		default:
2289
			netif_err(tp, ifup, tp->dev,
2290
				  "Invalid action 0x%08x\n", action);
2291
			goto out;
2292 2293
		}
	}
2294 2295 2296 2297
	rc = true;
out:
	return rc;
}
2298

2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317
static int rtl_check_firmware(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
{
	struct net_device *dev = tp->dev;
	int rc = -EINVAL;

	if (!rtl_fw_format_ok(tp, rtl_fw)) {
		netif_err(tp, ifup, dev, "invalid firwmare\n");
		goto out;
	}

	if (rtl_fw_data_ok(tp, dev, &rtl_fw->phy_action))
		rc = 0;
out:
	return rc;
}

static void rtl_phy_write_fw(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
{
	struct rtl_fw_phy_action *pa = &rtl_fw->phy_action;
2318
	struct mdio_ops org, *ops = &tp->mdio_ops;
2319 2320 2321 2322
	u32 predata, count;
	size_t index;

	predata = count = 0;
2323 2324
	org.write = ops->write;
	org.read = ops->read;
2325

2326 2327
	for (index = 0; index < pa->size; ) {
		u32 action = le32_to_cpu(pa->code[index]);
2328
		u32 data = action & 0x0000ffff;
2329 2330 2331 2332
		u32 regno = (action & 0x0fff0000) >> 16;

		if (!action)
			break;
2333 2334

		switch(action & 0xf0000000) {
2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350
		case PHY_READ:
			predata = rtl_readphy(tp, regno);
			count++;
			index++;
			break;
		case PHY_DATA_OR:
			predata |= data;
			index++;
			break;
		case PHY_DATA_AND:
			predata &= data;
			index++;
			break;
		case PHY_BJMPN:
			index -= regno;
			break;
2351 2352 2353 2354 2355 2356 2357 2358 2359
		case PHY_MDIO_CHG:
			if (data == 0) {
				ops->write = org.write;
				ops->read = org.read;
			} else if (data == 1) {
				ops->write = mac_mcu_write;
				ops->read = mac_mcu_read;
			}

2360 2361 2362 2363 2364 2365
			index++;
			break;
		case PHY_CLEAR_READCOUNT:
			count = 0;
			index++;
			break;
2366
		case PHY_WRITE:
2367 2368 2369 2370
			rtl_writephy(tp, regno, data);
			index++;
			break;
		case PHY_READCOUNT_EQ_SKIP:
F
Francois Romieu 已提交
2371
			index += (count == data) ? 2 : 1;
2372
			break;
2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394
		case PHY_COMP_EQ_SKIPN:
			if (predata == data)
				index += regno;
			index++;
			break;
		case PHY_COMP_NEQ_SKIPN:
			if (predata != data)
				index += regno;
			index++;
			break;
		case PHY_WRITE_PREVIOUS:
			rtl_writephy(tp, regno, predata);
			index++;
			break;
		case PHY_SKIPN:
			index += regno + 1;
			break;
		case PHY_DELAY_MS:
			mdelay(data);
			index++;
			break;

2395 2396 2397 2398
		default:
			BUG();
		}
	}
2399 2400 2401

	ops->write = org.write;
	ops->read = org.read;
2402 2403
}

2404 2405
static void rtl_release_firmware(struct rtl8169_private *tp)
{
2406 2407 2408 2409 2410
	if (!IS_ERR_OR_NULL(tp->rtl_fw)) {
		release_firmware(tp->rtl_fw->fw);
		kfree(tp->rtl_fw);
	}
	tp->rtl_fw = RTL_FIRMWARE_UNKNOWN;
2411 2412
}

2413
static void rtl_apply_firmware(struct rtl8169_private *tp)
2414
{
2415
	struct rtl_fw *rtl_fw = tp->rtl_fw;
2416 2417

	/* TODO: release firmware once rtl_phy_write_fw signals failures. */
2418
	if (!IS_ERR_OR_NULL(rtl_fw))
2419
		rtl_phy_write_fw(tp, rtl_fw);
2420 2421 2422 2423 2424 2425 2426 2427
}

static void rtl_apply_firmware_cond(struct rtl8169_private *tp, u8 reg, u16 val)
{
	if (rtl_readphy(tp, reg) != val)
		netif_warn(tp, hw, tp->dev, "chipset not ready for firmware\n");
	else
		rtl_apply_firmware(tp);
2428 2429
}

2430
static void rtl8169s_hw_phy_config(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
2431
{
2432
	static const struct phy_reg phy_reg_init[] = {
F
françois romieu 已提交
2433 2434 2435 2436 2437
		{ 0x1f, 0x0001 },
		{ 0x06, 0x006e },
		{ 0x08, 0x0708 },
		{ 0x15, 0x4000 },
		{ 0x18, 0x65c7 },
L
Linus Torvalds 已提交
2438

F
françois romieu 已提交
2439 2440 2441 2442 2443 2444 2445
		{ 0x1f, 0x0001 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x0000 },
L
Linus Torvalds 已提交
2446

F
françois romieu 已提交
2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492
		{ 0x03, 0xff41 },
		{ 0x02, 0xdf60 },
		{ 0x01, 0x0140 },
		{ 0x00, 0x0077 },
		{ 0x04, 0x7800 },
		{ 0x04, 0x7000 },

		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf0f9 },
		{ 0x04, 0x9800 },
		{ 0x04, 0x9000 },

		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xa000 },

		{ 0x03, 0xff41 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x0140 },
		{ 0x00, 0x00bb },
		{ 0x04, 0xb800 },
		{ 0x04, 0xb000 },

		{ 0x03, 0xdf41 },
		{ 0x02, 0xdc60 },
		{ 0x01, 0x6340 },
		{ 0x00, 0x007d },
		{ 0x04, 0xd800 },
		{ 0x04, 0xd000 },

		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x100a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0xf000 },

		{ 0x1f, 0x0000 },
		{ 0x0b, 0x0000 },
		{ 0x00, 0x9200 }
	};
L
Linus Torvalds 已提交
2493

2494
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
L
Linus Torvalds 已提交
2495 2496
}

2497
static void rtl8169sb_hw_phy_config(struct rtl8169_private *tp)
2498
{
2499
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2500 2501 2502 2503 2504
		{ 0x1f, 0x0002 },
		{ 0x01, 0x90d0 },
		{ 0x1f, 0x0000 }
	};

2505
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2506 2507
}

2508
static void rtl8169scd_hw_phy_config_quirk(struct rtl8169_private *tp)
2509 2510 2511
{
	struct pci_dev *pdev = tp->pci_dev;

2512 2513
	if ((pdev->subsystem_vendor != PCI_VENDOR_ID_GIGABYTE) ||
	    (pdev->subsystem_device != 0xe000))
2514 2515
		return;

2516 2517 2518
	rtl_writephy(tp, 0x1f, 0x0001);
	rtl_writephy(tp, 0x10, 0xf01b);
	rtl_writephy(tp, 0x1f, 0x0000);
2519 2520
}

2521
static void rtl8169scd_hw_phy_config(struct rtl8169_private *tp)
2522
{
2523
	static const struct phy_reg phy_reg_init[] = {
2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562
		{ 0x1f, 0x0001 },
		{ 0x04, 0x0000 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x9000 },
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0xa000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x10, 0xf41b },
		{ 0x14, 0xfb54 },
		{ 0x18, 0xf5c7 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
		{ 0x1f, 0x0000 }
	};

2563
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2564

2565
	rtl8169scd_hw_phy_config_quirk(tp);
2566 2567
}

2568
static void rtl8169sce_hw_phy_config(struct rtl8169_private *tp)
2569
{
2570
	static const struct phy_reg phy_reg_init[] = {
2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617
		{ 0x1f, 0x0001 },
		{ 0x04, 0x0000 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x9000 },
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0xa000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x0b, 0x8480 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x18, 0x67c7 },
		{ 0x04, 0x2000 },
		{ 0x03, 0x002f },
		{ 0x02, 0x4360 },
		{ 0x01, 0x0109 },
		{ 0x00, 0x3022 },
		{ 0x04, 0x2800 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
		{ 0x1f, 0x0000 }
	};

2618
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2619 2620
}

2621
static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp)
2622
{
2623
	static const struct phy_reg phy_reg_init[] = {
2624 2625 2626 2627
		{ 0x10, 0xf41b },
		{ 0x1f, 0x0000 }
	};

2628 2629
	rtl_writephy(tp, 0x1f, 0x0001);
	rtl_patchphy(tp, 0x16, 1 << 0);
2630

2631
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2632 2633
}

2634
static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp)
2635
{
2636
	static const struct phy_reg phy_reg_init[] = {
2637 2638 2639 2640 2641
		{ 0x1f, 0x0001 },
		{ 0x10, 0xf41b },
		{ 0x1f, 0x0000 }
	};

2642
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2643 2644
}

2645
static void rtl8168cp_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2646
{
2647
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2648 2649 2650 2651 2652 2653 2654
		{ 0x1f, 0x0000 },
		{ 0x1d, 0x0f00 },
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x1ec8 },
		{ 0x1f, 0x0000 }
	};

2655
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2656 2657
}

2658
static void rtl8168cp_2_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2659
{
2660
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2661 2662 2663 2664 2665
		{ 0x1f, 0x0001 },
		{ 0x1d, 0x3d98 },
		{ 0x1f, 0x0000 }
	};

2666 2667 2668
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
F
Francois Romieu 已提交
2669

2670
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2671 2672
}

2673
static void rtl8168c_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2674
{
2675
	static const struct phy_reg phy_reg_init[] = {
2676 2677
		{ 0x1f, 0x0001 },
		{ 0x12, 0x2300 },
F
Francois Romieu 已提交
2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688
		{ 0x1f, 0x0002 },
		{ 0x00, 0x88d4 },
		{ 0x01, 0x82b1 },
		{ 0x03, 0x7002 },
		{ 0x08, 0x9e30 },
		{ 0x09, 0x01f0 },
		{ 0x0a, 0x5500 },
		{ 0x0c, 0x00c8 },
		{ 0x1f, 0x0003 },
		{ 0x12, 0xc096 },
		{ 0x16, 0x000a },
2689 2690 2691 2692
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0000 },
		{ 0x09, 0x2000 },
		{ 0x09, 0x0000 }
F
Francois Romieu 已提交
2693 2694
	};

2695
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2696

2697 2698 2699
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
F
Francois Romieu 已提交
2700 2701
}

2702
static void rtl8168c_2_hw_phy_config(struct rtl8169_private *tp)
2703
{
2704
	static const struct phy_reg phy_reg_init[] = {
2705
		{ 0x1f, 0x0001 },
2706
		{ 0x12, 0x2300 },
2707 2708 2709 2710 2711 2712 2713
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0x9000 },
		{ 0x1d, 0x3d98 },
2714 2715
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x7eb8 },
2716 2717 2718
		{ 0x06, 0x0761 },
		{ 0x1f, 0x0003 },
		{ 0x16, 0x0f0a },
2719 2720 2721
		{ 0x1f, 0x0000 }
	};

2722
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2723

2724 2725 2726 2727
	rtl_patchphy(tp, 0x16, 1 << 0);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
2728 2729
}

2730
static void rtl8168c_3_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2731
{
2732
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743
		{ 0x1f, 0x0001 },
		{ 0x12, 0x2300 },
		{ 0x1d, 0x3d98 },
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x7eb8 },
		{ 0x06, 0x5461 },
		{ 0x1f, 0x0003 },
		{ 0x16, 0x0f0a },
		{ 0x1f, 0x0000 }
	};

2744
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2745

2746 2747 2748 2749
	rtl_patchphy(tp, 0x16, 1 << 0);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
F
Francois Romieu 已提交
2750 2751
}

2752
static void rtl8168c_4_hw_phy_config(struct rtl8169_private *tp)
2753
{
2754
	rtl8168c_3_hw_phy_config(tp);
2755 2756
}

2757
static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2758
{
2759
	static const struct phy_reg phy_reg_init_0[] = {
2760
		/* Channel Estimation */
F
Francois Romieu 已提交
2761
		{ 0x1f, 0x0001 },
2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772
		{ 0x06, 0x4064 },
		{ 0x07, 0x2863 },
		{ 0x08, 0x059c },
		{ 0x09, 0x26b4 },
		{ 0x0a, 0x6a19 },
		{ 0x0b, 0xdcc8 },
		{ 0x10, 0xf06d },
		{ 0x14, 0x7f68 },
		{ 0x18, 0x7fd9 },
		{ 0x1c, 0xf0ff },
		{ 0x1d, 0x3d9c },
F
Francois Romieu 已提交
2773
		{ 0x1f, 0x0003 },
2774 2775 2776
		{ 0x12, 0xf49f },
		{ 0x13, 0x070b },
		{ 0x1a, 0x05ad },
2777 2778 2779 2780
		{ 0x14, 0x94c0 },

		/*
		 * Tx Error Issue
F
Francois Romieu 已提交
2781
		 * Enhance line driver power
2782
		 */
F
Francois Romieu 已提交
2783
		{ 0x1f, 0x0002 },
2784 2785 2786
		{ 0x06, 0x5561 },
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8332 },
2787 2788 2789 2790 2791 2792 2793 2794
		{ 0x06, 0x5561 },

		/*
		 * Can not link to 1Gbps with bad cable
		 * Decrease SNR threshold form 21.07dB to 19.04dB
		 */
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
2795

F
Francois Romieu 已提交
2796
		{ 0x1f, 0x0000 },
2797
		{ 0x0d, 0xf880 }
2798 2799
	};

2800
	rtl_writephy_batch(tp, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
2801

2802 2803 2804 2805
	/*
	 * Rx Error Issue
	 * Fine Tune Switching regulator parameter
	 */
2806 2807 2808
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x0b, 0x0010, 0x00ef);
	rtl_w1w0_phy(tp, 0x0c, 0xa200, 0x5d00);
2809

2810
	if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) {
2811
		static const struct phy_reg phy_reg_init[] = {
2812 2813 2814 2815 2816 2817 2818 2819 2820
			{ 0x1f, 0x0002 },
			{ 0x05, 0x669a },
			{ 0x1f, 0x0005 },
			{ 0x05, 0x8330 },
			{ 0x06, 0x669a },
			{ 0x1f, 0x0002 }
		};
		int val;

2821
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2822

2823
		val = rtl_readphy(tp, 0x0d);
2824 2825

		if ((val & 0x00ff) != 0x006c) {
2826
			static const u32 set[] = {
2827 2828 2829 2830 2831
				0x0065, 0x0066, 0x0067, 0x0068,
				0x0069, 0x006a, 0x006b, 0x006c
			};
			int i;

2832
			rtl_writephy(tp, 0x1f, 0x0002);
2833 2834 2835

			val &= 0xff00;
			for (i = 0; i < ARRAY_SIZE(set); i++)
2836
				rtl_writephy(tp, 0x0d, val | set[i]);
2837 2838
		}
	} else {
2839
		static const struct phy_reg phy_reg_init[] = {
2840 2841 2842 2843 2844 2845 2846
			{ 0x1f, 0x0002 },
			{ 0x05, 0x6662 },
			{ 0x1f, 0x0005 },
			{ 0x05, 0x8330 },
			{ 0x06, 0x6662 }
		};

2847
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2848 2849
	}

2850
	/* RSET couple improve */
2851 2852 2853
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_patchphy(tp, 0x0d, 0x0300);
	rtl_patchphy(tp, 0x0f, 0x0010);
2854

2855
	/* Fine tune PLL performance */
2856 2857 2858
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x02, 0x0100, 0x0600);
	rtl_w1w0_phy(tp, 0x03, 0x0000, 0xe000);
2859

2860 2861
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x001b);
2862 2863

	rtl_apply_firmware_cond(tp, MII_EXPANSION, 0xbf00);
2864

2865
	rtl_writephy(tp, 0x1f, 0x0000);
2866 2867
}

2868
static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp)
2869
{
2870
	static const struct phy_reg phy_reg_init_0[] = {
2871
		/* Channel Estimation */
2872 2873 2874 2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889
		{ 0x1f, 0x0001 },
		{ 0x06, 0x4064 },
		{ 0x07, 0x2863 },
		{ 0x08, 0x059c },
		{ 0x09, 0x26b4 },
		{ 0x0a, 0x6a19 },
		{ 0x0b, 0xdcc8 },
		{ 0x10, 0xf06d },
		{ 0x14, 0x7f68 },
		{ 0x18, 0x7fd9 },
		{ 0x1c, 0xf0ff },
		{ 0x1d, 0x3d9c },
		{ 0x1f, 0x0003 },
		{ 0x12, 0xf49f },
		{ 0x13, 0x070b },
		{ 0x1a, 0x05ad },
		{ 0x14, 0x94c0 },

2890 2891
		/*
		 * Tx Error Issue
F
Francois Romieu 已提交
2892
		 * Enhance line driver power
2893
		 */
2894 2895 2896 2897
		{ 0x1f, 0x0002 },
		{ 0x06, 0x5561 },
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8332 },
2898 2899 2900 2901 2902 2903 2904 2905
		{ 0x06, 0x5561 },

		/*
		 * Can not link to 1Gbps with bad cable
		 * Decrease SNR threshold form 21.07dB to 19.04dB
		 */
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
2906 2907

		{ 0x1f, 0x0000 },
2908
		{ 0x0d, 0xf880 }
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2909 2910
	};

2911
	rtl_writephy_batch(tp, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
F
Francois Romieu 已提交
2912

2913
	if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) {
2914
		static const struct phy_reg phy_reg_init[] = {
2915 2916
			{ 0x1f, 0x0002 },
			{ 0x05, 0x669a },
F
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2917
			{ 0x1f, 0x0005 },
2918 2919 2920 2921 2922 2923 2924
			{ 0x05, 0x8330 },
			{ 0x06, 0x669a },

			{ 0x1f, 0x0002 }
		};
		int val;

2925
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2926

2927
		val = rtl_readphy(tp, 0x0d);
2928
		if ((val & 0x00ff) != 0x006c) {
J
Joe Perches 已提交
2929
			static const u32 set[] = {
2930 2931 2932 2933 2934
				0x0065, 0x0066, 0x0067, 0x0068,
				0x0069, 0x006a, 0x006b, 0x006c
			};
			int i;

2935
			rtl_writephy(tp, 0x1f, 0x0002);
2936 2937 2938

			val &= 0xff00;
			for (i = 0; i < ARRAY_SIZE(set); i++)
2939
				rtl_writephy(tp, 0x0d, val | set[i]);
2940 2941
		}
	} else {
2942
		static const struct phy_reg phy_reg_init[] = {
2943 2944
			{ 0x1f, 0x0002 },
			{ 0x05, 0x2642 },
F
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2945
			{ 0x1f, 0x0005 },
2946 2947
			{ 0x05, 0x8330 },
			{ 0x06, 0x2642 }
F
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2948 2949
		};

2950
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2951 2952
	}

2953
	/* Fine tune PLL performance */
2954 2955 2956
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x02, 0x0100, 0x0600);
	rtl_w1w0_phy(tp, 0x03, 0x0000, 0xe000);
2957

2958
	/* Switching regulator Slew rate */
2959 2960
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_patchphy(tp, 0x0f, 0x0017);
2961

2962 2963
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x001b);
2964 2965

	rtl_apply_firmware_cond(tp, MII_EXPANSION, 0xb300);
2966

2967
	rtl_writephy(tp, 0x1f, 0x0000);
2968 2969
}

2970
static void rtl8168d_3_hw_phy_config(struct rtl8169_private *tp)
2971
{
2972
	static const struct phy_reg phy_reg_init[] = {
2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027
		{ 0x1f, 0x0002 },
		{ 0x10, 0x0008 },
		{ 0x0d, 0x006c },

		{ 0x1f, 0x0000 },
		{ 0x0d, 0xf880 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },

		{ 0x1f, 0x0001 },
		{ 0x0b, 0xa4d8 },
		{ 0x09, 0x281c },
		{ 0x07, 0x2883 },
		{ 0x0a, 0x6b35 },
		{ 0x1d, 0x3da4 },
		{ 0x1c, 0xeffd },
		{ 0x14, 0x7f52 },
		{ 0x18, 0x7fc6 },
		{ 0x08, 0x0601 },
		{ 0x06, 0x4063 },
		{ 0x10, 0xf074 },
		{ 0x1f, 0x0003 },
		{ 0x13, 0x0789 },
		{ 0x12, 0xf4bd },
		{ 0x1a, 0x04fd },
		{ 0x14, 0x84b0 },
		{ 0x1f, 0x0000 },
		{ 0x00, 0x9200 },

		{ 0x1f, 0x0005 },
		{ 0x01, 0x0340 },
		{ 0x1f, 0x0001 },
		{ 0x04, 0x4000 },
		{ 0x03, 0x1d21 },
		{ 0x02, 0x0c32 },
		{ 0x01, 0x0200 },
		{ 0x00, 0x5554 },
		{ 0x04, 0x4800 },
		{ 0x04, 0x4000 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0xf000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x0023 },
		{ 0x16, 0x0000 },
		{ 0x1f, 0x0000 }
	};

3028
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
3029 3030
}

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françois romieu 已提交
3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046
static void rtl8168d_4_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x002d },
		{ 0x18, 0x0040 },
		{ 0x1f, 0x0000 }
	};

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
	rtl_patchphy(tp, 0x0d, 1 << 5);
}

H
Hayes Wang 已提交
3047
static void rtl8168e_1_hw_phy_config(struct rtl8169_private *tp)
H
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3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076
{
	static const struct phy_reg phy_reg_init[] = {
		/* Enable Delay cap */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b80 },
		{ 0x06, 0xc896 },
		{ 0x1f, 0x0000 },

		/* Channel estimation fine tune */
		{ 0x1f, 0x0001 },
		{ 0x0b, 0x6c20 },
		{ 0x07, 0x2872 },
		{ 0x1c, 0xefff },
		{ 0x1f, 0x0003 },
		{ 0x14, 0x6420 },
		{ 0x1f, 0x0000 },

		/* Update PFM & 10M TX idle timer */
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x002f },
		{ 0x15, 0x1919 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x00ac },
		{ 0x18, 0x0006 },
		{ 0x1f, 0x0000 }
	};

F
Francois Romieu 已提交
3077 3078
	rtl_apply_firmware(tp);

H
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3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

	/* DCO enable for 10M IDLE Power */
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0023);
	rtl_w1w0_phy(tp, 0x17, 0x0006, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* For impedance matching */
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x08, 0x8000, 0x7f00);
F
Francois Romieu 已提交
3090
	rtl_writephy(tp, 0x1f, 0x0000);
H
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3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119

	/* PHY auto speed down */
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x002d);
	rtl_w1w0_phy(tp, 0x18, 0x0050, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b86);
	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0020);
	rtl_w1w0_phy(tp, 0x15, 0x0000, 0x1100);
	rtl_writephy(tp, 0x1f, 0x0006);
	rtl_writephy(tp, 0x00, 0x5a00);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0007);
	rtl_writephy(tp, 0x0e, 0x003c);
	rtl_writephy(tp, 0x0d, 0x4007);
	rtl_writephy(tp, 0x0e, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0000);
}

3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136
static void rtl_rar_exgmac_set(struct rtl8169_private *tp, u8 *addr)
{
	const u16 w[] = {
		addr[0] | (addr[1] << 8),
		addr[2] | (addr[3] << 8),
		addr[4] | (addr[5] << 8)
	};
	const struct exgmac_reg e[] = {
		{ .addr = 0xe0, ERIAR_MASK_1111, .val = w[0] | (w[1] << 16) },
		{ .addr = 0xe4, ERIAR_MASK_1111, .val = w[2] },
		{ .addr = 0xf0, ERIAR_MASK_1111, .val = w[0] << 16 },
		{ .addr = 0xf4, ERIAR_MASK_1111, .val = w[1] | (w[2] << 16) }
	};

	rtl_write_exgmac_batch(tp, e, ARRAY_SIZE(e));
}

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3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197
static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		/* Enable Delay cap */
		{ 0x1f, 0x0004 },
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x00ac },
		{ 0x18, 0x0006 },
		{ 0x1f, 0x0002 },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0000 },

		/* Channel estimation fine tune */
		{ 0x1f, 0x0003 },
		{ 0x09, 0xa20f },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0000 },

		/* Green Setting */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b5b },
		{ 0x06, 0x9222 },
		{ 0x05, 0x8b6d },
		{ 0x06, 0x8000 },
		{ 0x05, 0x8b76 },
		{ 0x06, 0x8000 },
		{ 0x1f, 0x0000 }
	};

	rtl_apply_firmware(tp);

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

	/* For 4-corner performance improve */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b80);
	rtl_w1w0_phy(tp, 0x17, 0x0006, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* PHY auto speed down */
	rtl_writephy(tp, 0x1f, 0x0004);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x002d);
	rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

	/* improve 10M EEE waveform */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b86);
	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* Improve 2-pair detection performance */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* EEE setting */
3198
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_1111, 0x0000, 0x0003, ERIAR_EXGMAC);
H
Hayes Wang 已提交
3199 3200 3201 3202 3203 3204
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
	rtl_writephy(tp, 0x1f, 0x0004);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0020);
3205
	rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0100);
H
Hayes Wang 已提交
3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0007);
	rtl_writephy(tp, 0x0e, 0x003c);
	rtl_writephy(tp, 0x0d, 0x4007);
	rtl_writephy(tp, 0x0e, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0000);

	/* Green feature */
	rtl_writephy(tp, 0x1f, 0x0003);
	rtl_w1w0_phy(tp, 0x19, 0x0000, 0x0001);
	rtl_w1w0_phy(tp, 0x10, 0x0000, 0x0400);
	rtl_writephy(tp, 0x1f, 0x0000);
H
hayeswang 已提交
3219

3220 3221
	/* Broken BIOS workaround: feed GigaMAC registers with MAC address. */
	rtl_rar_exgmac_set(tp, tp->dev->dev_addr);
H
Hayes Wang 已提交
3222 3223
}

3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245
static void rtl8168f_hw_phy_config(struct rtl8169_private *tp)
{
	/* For 4-corner performance improve */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b80);
	rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* PHY auto speed down */
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x002d);
	rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

	/* Improve 10M EEE waveform */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b86);
	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
}

3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286
static void rtl8168f_1_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		/* Channel estimation fine tune */
		{ 0x1f, 0x0003 },
		{ 0x09, 0xa20f },
		{ 0x1f, 0x0000 },

		/* Modify green table for giga & fnet */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b55 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b5e },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b67 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b70 },
		{ 0x06, 0x0000 },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x0078 },
		{ 0x17, 0x0000 },
		{ 0x19, 0x00fb },
		{ 0x1f, 0x0000 },

		/* Modify green table for 10M */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b79 },
		{ 0x06, 0xaa00 },
		{ 0x1f, 0x0000 },

		/* Disable hiimpedance detection (RTCT) */
		{ 0x1f, 0x0003 },
		{ 0x01, 0x328a },
		{ 0x1f, 0x0000 }
	};

	rtl_apply_firmware(tp);

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

3287
	rtl8168f_hw_phy_config(tp);
3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299

	/* Improve 2-pair detection performance */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
}

static void rtl8168f_2_hw_phy_config(struct rtl8169_private *tp)
{
	rtl_apply_firmware(tp);

3300
	rtl8168f_hw_phy_config(tp);
3301 3302
}

3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377
static void rtl8411_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		/* Channel estimation fine tune */
		{ 0x1f, 0x0003 },
		{ 0x09, 0xa20f },
		{ 0x1f, 0x0000 },

		/* Modify green table for giga & fnet */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b55 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b5e },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b67 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b70 },
		{ 0x06, 0x0000 },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x0078 },
		{ 0x17, 0x0000 },
		{ 0x19, 0x00aa },
		{ 0x1f, 0x0000 },

		/* Modify green table for 10M */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b79 },
		{ 0x06, 0xaa00 },
		{ 0x1f, 0x0000 },

		/* Disable hiimpedance detection (RTCT) */
		{ 0x1f, 0x0003 },
		{ 0x01, 0x328a },
		{ 0x1f, 0x0000 }
	};


	rtl_apply_firmware(tp);

	rtl8168f_hw_phy_config(tp);

	/* Improve 2-pair detection performance */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

	/* Modify green table for giga */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b54);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
	rtl_writephy(tp, 0x05, 0x8b5d);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
	rtl_writephy(tp, 0x05, 0x8a7c);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
	rtl_writephy(tp, 0x05, 0x8a7f);
	rtl_w1w0_phy(tp, 0x06, 0x0100, 0x0000);
	rtl_writephy(tp, 0x05, 0x8a82);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
	rtl_writephy(tp, 0x05, 0x8a85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
	rtl_writephy(tp, 0x05, 0x8a88);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* uc same-seed solution */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x8000, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* eee setting */
3378
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x00, 0x03, ERIAR_EXGMAC);
3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
	rtl_writephy(tp, 0x1f, 0x0004);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0020);
	rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0100);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0007);
	rtl_writephy(tp, 0x0e, 0x003c);
	rtl_writephy(tp, 0x0d, 0x4007);
	rtl_writephy(tp, 0x0e, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0000);

	/* Green feature */
	rtl_writephy(tp, 0x1f, 0x0003);
	rtl_w1w0_phy(tp, 0x19, 0x0000, 0x0001);
	rtl_w1w0_phy(tp, 0x10, 0x0000, 0x0400);
	rtl_writephy(tp, 0x1f, 0x0000);
}

H
Hayes Wang 已提交
3400 3401 3402 3403
static void rtl8168g_1_hw_phy_config(struct rtl8169_private *tp)
{
	rtl_apply_firmware(tp);

3404 3405 3406 3407 3408 3409 3410 3411
	rtl_writephy(tp, 0x1f, 0x0a46);
	if (rtl_readphy(tp, 0x10) & 0x0100) {
		rtl_writephy(tp, 0x1f, 0x0bcc);
		rtl_w1w0_phy(tp, 0x12, 0x0000, 0x8000);
	} else {
		rtl_writephy(tp, 0x1f, 0x0bcc);
		rtl_w1w0_phy(tp, 0x12, 0x8000, 0x0000);
	}
H
Hayes Wang 已提交
3412

3413 3414 3415 3416 3417
	rtl_writephy(tp, 0x1f, 0x0a46);
	if (rtl_readphy(tp, 0x13) & 0x0100) {
		rtl_writephy(tp, 0x1f, 0x0c41);
		rtl_w1w0_phy(tp, 0x15, 0x0002, 0x0000);
	} else {
3418 3419
		rtl_writephy(tp, 0x1f, 0x0c41);
		rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0002);
3420
	}
H
Hayes Wang 已提交
3421

3422 3423 3424
	/* Enable PHY auto speed down */
	rtl_writephy(tp, 0x1f, 0x0a44);
	rtl_w1w0_phy(tp, 0x11, 0x000c, 0x0000);
H
Hayes Wang 已提交
3425

3426 3427 3428 3429 3430 3431 3432 3433 3434
	rtl_writephy(tp, 0x1f, 0x0bcc);
	rtl_w1w0_phy(tp, 0x14, 0x0100, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0a44);
	rtl_w1w0_phy(tp, 0x11, 0x00c0, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0a43);
	rtl_writephy(tp, 0x13, 0x8084);
	rtl_w1w0_phy(tp, 0x14, 0x0000, 0x6000);
	rtl_w1w0_phy(tp, 0x10, 0x1003, 0x0000);

3435 3436 3437
	/* EEE auto-fallback function */
	rtl_writephy(tp, 0x1f, 0x0a4b);
	rtl_w1w0_phy(tp, 0x11, 0x0004, 0x0000);
H
Hayes Wang 已提交
3438

3439 3440 3441 3442 3443 3444 3445 3446
	/* Enable UC LPF tune function */
	rtl_writephy(tp, 0x1f, 0x0a43);
	rtl_writephy(tp, 0x13, 0x8012);
	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

	rtl_writephy(tp, 0x1f, 0x0c42);
	rtl_w1w0_phy(tp, 0x11, 0x4000, 0x2000);

3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457
	/* Improve SWR Efficiency */
	rtl_writephy(tp, 0x1f, 0x0bcd);
	rtl_writephy(tp, 0x14, 0x5065);
	rtl_writephy(tp, 0x14, 0xd065);
	rtl_writephy(tp, 0x1f, 0x0bc8);
	rtl_writephy(tp, 0x11, 0x5655);
	rtl_writephy(tp, 0x1f, 0x0bcd);
	rtl_writephy(tp, 0x14, 0x1065);
	rtl_writephy(tp, 0x14, 0x9065);
	rtl_writephy(tp, 0x14, 0x1065);

3458
	rtl_writephy(tp, 0x1f, 0x0000);
H
Hayes Wang 已提交
3459 3460
}

H
hayeswang 已提交
3461 3462 3463 3464 3465
static void rtl8168g_2_hw_phy_config(struct rtl8169_private *tp)
{
	rtl_apply_firmware(tp);
}

3466
static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
3467
{
3468
	static const struct phy_reg phy_reg_init[] = {
3469 3470 3471 3472 3473 3474
		{ 0x1f, 0x0003 },
		{ 0x08, 0x441d },
		{ 0x01, 0x9100 },
		{ 0x1f, 0x0000 }
	};

3475 3476 3477 3478
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_patchphy(tp, 0x11, 1 << 12);
	rtl_patchphy(tp, 0x19, 1 << 13);
	rtl_patchphy(tp, 0x10, 1 << 15);
3479

3480
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
3481 3482
}

3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499
static void rtl8105e_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		{ 0x1f, 0x0005 },
		{ 0x1a, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0004 },
		{ 0x1c, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x15, 0x7701 },
		{ 0x1f, 0x0000 }
	};

	/* Disable ALDPS before ram code */
3500 3501 3502
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x18, 0x0310);
	msleep(100);
3503

3504
	rtl_apply_firmware(tp);
3505 3506 3507 3508

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}

3509 3510 3511
static void rtl8402_hw_phy_config(struct rtl8169_private *tp)
{
	/* Disable ALDPS before setting firmware */
3512 3513 3514
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x18, 0x0310);
	msleep(20);
3515 3516 3517 3518

	rtl_apply_firmware(tp);

	/* EEE setting */
3519
	rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
3520 3521 3522 3523 3524 3525
	rtl_writephy(tp, 0x1f, 0x0004);
	rtl_writephy(tp, 0x10, 0x401f);
	rtl_writephy(tp, 0x19, 0x7030);
	rtl_writephy(tp, 0x1f, 0x0000);
}

H
Hayes Wang 已提交
3526 3527 3528 3529 3530 3531 3532 3533 3534 3535
static void rtl8106e_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		{ 0x1f, 0x0004 },
		{ 0x10, 0xc07f },
		{ 0x19, 0x7030 },
		{ 0x1f, 0x0000 }
	};

	/* Disable ALDPS before ram code */
3536 3537 3538
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x18, 0x0310);
	msleep(100);
H
Hayes Wang 已提交
3539 3540 3541

	rtl_apply_firmware(tp);

3542
	rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
H
Hayes Wang 已提交
3543 3544
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

3545
	rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
H
Hayes Wang 已提交
3546 3547
}

3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558
static void rtl_hw_phy_config(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_print_mac_version(tp);

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01:
		break;
	case RTL_GIGA_MAC_VER_02:
	case RTL_GIGA_MAC_VER_03:
3559
		rtl8169s_hw_phy_config(tp);
3560 3561
		break;
	case RTL_GIGA_MAC_VER_04:
3562
		rtl8169sb_hw_phy_config(tp);
3563
		break;
3564
	case RTL_GIGA_MAC_VER_05:
3565
		rtl8169scd_hw_phy_config(tp);
3566
		break;
3567
	case RTL_GIGA_MAC_VER_06:
3568
		rtl8169sce_hw_phy_config(tp);
3569
		break;
3570 3571 3572
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
3573
		rtl8102e_hw_phy_config(tp);
3574
		break;
3575
	case RTL_GIGA_MAC_VER_11:
3576
		rtl8168bb_hw_phy_config(tp);
3577 3578
		break;
	case RTL_GIGA_MAC_VER_12:
3579
		rtl8168bef_hw_phy_config(tp);
3580 3581
		break;
	case RTL_GIGA_MAC_VER_17:
3582
		rtl8168bef_hw_phy_config(tp);
3583
		break;
F
Francois Romieu 已提交
3584
	case RTL_GIGA_MAC_VER_18:
3585
		rtl8168cp_1_hw_phy_config(tp);
F
Francois Romieu 已提交
3586 3587
		break;
	case RTL_GIGA_MAC_VER_19:
3588
		rtl8168c_1_hw_phy_config(tp);
F
Francois Romieu 已提交
3589
		break;
3590
	case RTL_GIGA_MAC_VER_20:
3591
		rtl8168c_2_hw_phy_config(tp);
3592
		break;
F
Francois Romieu 已提交
3593
	case RTL_GIGA_MAC_VER_21:
3594
		rtl8168c_3_hw_phy_config(tp);
F
Francois Romieu 已提交
3595
		break;
3596
	case RTL_GIGA_MAC_VER_22:
3597
		rtl8168c_4_hw_phy_config(tp);
3598
		break;
F
Francois Romieu 已提交
3599
	case RTL_GIGA_MAC_VER_23:
3600
	case RTL_GIGA_MAC_VER_24:
3601
		rtl8168cp_2_hw_phy_config(tp);
F
Francois Romieu 已提交
3602
		break;
F
Francois Romieu 已提交
3603
	case RTL_GIGA_MAC_VER_25:
3604
		rtl8168d_1_hw_phy_config(tp);
3605 3606
		break;
	case RTL_GIGA_MAC_VER_26:
3607
		rtl8168d_2_hw_phy_config(tp);
3608 3609
		break;
	case RTL_GIGA_MAC_VER_27:
3610
		rtl8168d_3_hw_phy_config(tp);
F
Francois Romieu 已提交
3611
		break;
F
françois romieu 已提交
3612 3613 3614
	case RTL_GIGA_MAC_VER_28:
		rtl8168d_4_hw_phy_config(tp);
		break;
3615 3616 3617 3618
	case RTL_GIGA_MAC_VER_29:
	case RTL_GIGA_MAC_VER_30:
		rtl8105e_hw_phy_config(tp);
		break;
F
Francois Romieu 已提交
3619 3620 3621
	case RTL_GIGA_MAC_VER_31:
		/* None. */
		break;
H
hayeswang 已提交
3622 3623
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
H
Hayes Wang 已提交
3624 3625 3626 3627
		rtl8168e_1_hw_phy_config(tp);
		break;
	case RTL_GIGA_MAC_VER_34:
		rtl8168e_2_hw_phy_config(tp);
H
hayeswang 已提交
3628
		break;
3629 3630 3631 3632 3633 3634
	case RTL_GIGA_MAC_VER_35:
		rtl8168f_1_hw_phy_config(tp);
		break;
	case RTL_GIGA_MAC_VER_36:
		rtl8168f_2_hw_phy_config(tp);
		break;
F
Francois Romieu 已提交
3635

3636 3637 3638 3639
	case RTL_GIGA_MAC_VER_37:
		rtl8402_hw_phy_config(tp);
		break;

3640 3641 3642 3643
	case RTL_GIGA_MAC_VER_38:
		rtl8411_hw_phy_config(tp);
		break;

H
Hayes Wang 已提交
3644 3645 3646 3647
	case RTL_GIGA_MAC_VER_39:
		rtl8106e_hw_phy_config(tp);
		break;

H
Hayes Wang 已提交
3648 3649 3650
	case RTL_GIGA_MAC_VER_40:
		rtl8168g_1_hw_phy_config(tp);
		break;
H
hayeswang 已提交
3651
	case RTL_GIGA_MAC_VER_42:
H
hayeswang 已提交
3652
	case RTL_GIGA_MAC_VER_43:
H
hayeswang 已提交
3653 3654
		rtl8168g_2_hw_phy_config(tp);
		break;
H
Hayes Wang 已提交
3655 3656

	case RTL_GIGA_MAC_VER_41:
3657 3658 3659 3660 3661
	default:
		break;
	}
}

3662
static void rtl_phy_work(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
3663 3664 3665 3666 3667
{
	struct timer_list *timer = &tp->timer;
	void __iomem *ioaddr = tp->mmio_addr;
	unsigned long timeout = RTL8169_PHY_TIMEOUT;

3668
	assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
L
Linus Torvalds 已提交
3669

3670
	if (tp->phy_reset_pending(tp)) {
3671
		/*
L
Linus Torvalds 已提交
3672 3673 3674 3675 3676 3677 3678 3679
		 * A busy loop could burn quite a few cycles on nowadays CPU.
		 * Let's delay the execution of the timer for a few ticks.
		 */
		timeout = HZ/10;
		goto out_mod_timer;
	}

	if (tp->link_ok(ioaddr))
3680
		return;
L
Linus Torvalds 已提交
3681

3682
	netif_warn(tp, link, tp->dev, "PHY reset until link up\n");
L
Linus Torvalds 已提交
3683

3684
	tp->phy_reset_enable(tp);
L
Linus Torvalds 已提交
3685 3686 3687

out_mod_timer:
	mod_timer(timer, jiffies + timeout);
3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700
}

static void rtl_schedule_task(struct rtl8169_private *tp, enum rtl_flag flag)
{
	if (!test_and_set_bit(flag, tp->wk.flags))
		schedule_work(&tp->wk.work);
}

static void rtl8169_phy_timer(unsigned long __opaque)
{
	struct net_device *dev = (struct net_device *)__opaque;
	struct rtl8169_private *tp = netdev_priv(dev);

3701
	rtl_schedule_task(tp, RTL_FLAG_TASK_PHY_PENDING);
L
Linus Torvalds 已提交
3702 3703 3704 3705 3706 3707 3708
}

static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
				  void __iomem *ioaddr)
{
	iounmap(ioaddr);
	pci_release_regions(pdev);
3709
	pci_clear_mwi(pdev);
L
Linus Torvalds 已提交
3710 3711 3712 3713
	pci_disable_device(pdev);
	free_netdev(dev);
}

3714 3715 3716 3717 3718
DECLARE_RTL_COND(rtl_phy_reset_cond)
{
	return tp->phy_reset_pending(tp);
}

3719 3720 3721
static void rtl8169_phy_reset(struct net_device *dev,
			      struct rtl8169_private *tp)
{
3722
	tp->phy_reset_enable(tp);
3723
	rtl_msleep_loop_wait_low(tp, &rtl_phy_reset_cond, 1, 100);
3724 3725
}

3726 3727 3728 3729 3730 3731 3732 3733
static bool rtl_tbi_enabled(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return (tp->mac_version == RTL_GIGA_MAC_VER_01) &&
	    (RTL_R8(PHYstatus) & TBI_Enable);
}

3734 3735 3736 3737
static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

3738
	rtl_hw_phy_config(dev);
3739

3740 3741 3742 3743
	if (tp->mac_version <= RTL_GIGA_MAC_VER_06) {
		dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
		RTL_W8(0x82, 0x01);
	}
3744

3745 3746 3747 3748
	pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);

	if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
		pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
3749

3750
	if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
3751 3752 3753
		dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
		RTL_W8(0x82, 0x01);
		dprintk("Set PHY Reg 0x0bh = 0x00h\n");
3754
		rtl_writephy(tp, 0x0b, 0x0000); //w 0x0b 15 0 0
3755 3756
	}

3757 3758
	rtl8169_phy_reset(dev, tp);

3759
	rtl8169_set_speed(dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL,
F
Francois Romieu 已提交
3760 3761 3762 3763 3764
			  ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
			  ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
			  (tp->mii.supports_gmii ?
			   ADVERTISED_1000baseT_Half |
			   ADVERTISED_1000baseT_Full : 0));
3765

3766
	if (rtl_tbi_enabled(tp))
3767
		netif_info(tp, link, dev, "TBI auto-negotiating\n");
3768 3769
}

3770 3771 3772 3773
static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
{
	void __iomem *ioaddr = tp->mmio_addr;

3774
	rtl_lock_work(tp);
3775 3776

	RTL_W8(Cfg9346, Cfg9346_Unlock);
3777

3778
	RTL_W32(MAC4, addr[4] | addr[5] << 8);
3779 3780
	RTL_R32(MAC4);

3781
	RTL_W32(MAC0, addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
3782 3783
	RTL_R32(MAC0);

3784 3785
	if (tp->mac_version == RTL_GIGA_MAC_VER_34)
		rtl_rar_exgmac_set(tp, addr);
3786

3787 3788
	RTL_W8(Cfg9346, Cfg9346_Lock);

3789
	rtl_unlock_work(tp);
3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806
}

static int rtl_set_mac_address(struct net_device *dev, void *p)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct sockaddr *addr = p;

	if (!is_valid_ether_addr(addr->sa_data))
		return -EADDRNOTAVAIL;

	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);

	rtl_rar_set(tp, dev->dev_addr);

	return 0;
}

3807 3808 3809 3810 3811
static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct mii_ioctl_data *data = if_mii(ifr);

F
Francois Romieu 已提交
3812 3813
	return netif_running(dev) ? tp->do_ioctl(tp, data, cmd) : -ENODEV;
}
3814

F
Francois Romieu 已提交
3815 3816
static int rtl_xmii_ioctl(struct rtl8169_private *tp,
			  struct mii_ioctl_data *data, int cmd)
F
Francois Romieu 已提交
3817
{
3818 3819 3820 3821 3822 3823
	switch (cmd) {
	case SIOCGMIIPHY:
		data->phy_id = 32; /* Internal PHY */
		return 0;

	case SIOCGMIIREG:
3824
		data->val_out = rtl_readphy(tp, data->reg_num & 0x1f);
3825 3826 3827
		return 0;

	case SIOCSMIIREG:
3828
		rtl_writephy(tp, data->reg_num & 0x1f, data->val_in);
3829 3830 3831 3832 3833
		return 0;
	}
	return -EOPNOTSUPP;
}

F
Francois Romieu 已提交
3834 3835 3836 3837 3838
static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd)
{
	return -EOPNOTSUPP;
}

F
Francois Romieu 已提交
3839 3840 3841 3842 3843 3844 3845 3846
static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp)
{
	if (tp->features & RTL_FEATURE_MSI) {
		pci_disable_msi(pdev);
		tp->features &= ~RTL_FEATURE_MSI;
	}
}

B
Bill Pemberton 已提交
3847
static void rtl_init_mdio_ops(struct rtl8169_private *tp)
3848 3849 3850 3851 3852 3853 3854 3855
{
	struct mdio_ops *ops = &tp->mdio_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_27:
		ops->write	= r8168dp_1_mdio_write;
		ops->read	= r8168dp_1_mdio_read;
		break;
F
françois romieu 已提交
3856
	case RTL_GIGA_MAC_VER_28:
3857
	case RTL_GIGA_MAC_VER_31:
F
françois romieu 已提交
3858 3859 3860
		ops->write	= r8168dp_2_mdio_write;
		ops->read	= r8168dp_2_mdio_read;
		break;
H
Hayes Wang 已提交
3861 3862
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
H
hayeswang 已提交
3863
	case RTL_GIGA_MAC_VER_42:
H
hayeswang 已提交
3864
	case RTL_GIGA_MAC_VER_43:
H
Hayes Wang 已提交
3865 3866 3867
		ops->write	= r8168g_mdio_write;
		ops->read	= r8168g_mdio_read;
		break;
3868 3869 3870 3871 3872 3873 3874
	default:
		ops->write	= r8169_mdio_write;
		ops->read	= r8169_mdio_read;
		break;
	}
}

H
hayeswang 已提交
3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 3895 3896 3897 3898
static void rtl_speed_down(struct rtl8169_private *tp)
{
	u32 adv;
	int lpa;

	rtl_writephy(tp, 0x1f, 0x0000);
	lpa = rtl_readphy(tp, MII_LPA);

	if (lpa & (LPA_10HALF | LPA_10FULL))
		adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
	else if (lpa & (LPA_100HALF | LPA_100FULL))
		adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
		      ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
	else
		adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
		      ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
		      (tp->mii.supports_gmii ?
		       ADVERTISED_1000baseT_Half |
		       ADVERTISED_1000baseT_Full : 0);

	rtl8169_set_speed(tp->dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL,
			  adv);
}

3899 3900 3901 3902 3903
static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	switch (tp->mac_version) {
3904 3905
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
3906 3907 3908 3909 3910
	case RTL_GIGA_MAC_VER_29:
	case RTL_GIGA_MAC_VER_30:
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
	case RTL_GIGA_MAC_VER_34:
3911
	case RTL_GIGA_MAC_VER_37:
3912
	case RTL_GIGA_MAC_VER_38:
H
Hayes Wang 已提交
3913
	case RTL_GIGA_MAC_VER_39:
H
Hayes Wang 已提交
3914 3915
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
H
hayeswang 已提交
3916
	case RTL_GIGA_MAC_VER_42:
H
hayeswang 已提交
3917
	case RTL_GIGA_MAC_VER_43:
3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930
		RTL_W32(RxConfig, RTL_R32(RxConfig) |
			AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
		break;
	default:
		break;
	}
}

static bool rtl_wol_pll_power_down(struct rtl8169_private *tp)
{
	if (!(__rtl8169_get_wol(tp) & WAKE_ANY))
		return false;

H
hayeswang 已提交
3931
	rtl_speed_down(tp);
3932 3933 3934 3935 3936
	rtl_wol_suspend_quirk(tp);

	return true;
}

F
françois romieu 已提交
3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950
static void r810x_phy_power_down(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
}

static void r810x_phy_power_up(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
}

static void r810x_pll_power_down(struct rtl8169_private *tp)
{
H
Hayes Wang 已提交
3951 3952
	void __iomem *ioaddr = tp->mmio_addr;

3953
	if (rtl_wol_pll_power_down(tp))
F
françois romieu 已提交
3954 3955 3956
		return;

	r810x_phy_power_down(tp);
H
Hayes Wang 已提交
3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_13:
	case RTL_GIGA_MAC_VER_16:
		break;
	default:
		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
		break;
	}
F
françois romieu 已提交
3970 3971 3972 3973
}

static void r810x_pll_power_up(struct rtl8169_private *tp)
{
H
Hayes Wang 已提交
3974 3975
	void __iomem *ioaddr = tp->mmio_addr;

F
françois romieu 已提交
3976
	r810x_phy_power_up(tp);
H
Hayes Wang 已提交
3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_13:
	case RTL_GIGA_MAC_VER_16:
		break;
	default:
		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
		break;
	}
F
françois romieu 已提交
3990 3991 3992 3993 3994
}

static void r8168_phy_power_up(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
H
hayeswang 已提交
3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
	case RTL_GIGA_MAC_VER_31:
		rtl_writephy(tp, 0x0e, 0x0000);
		break;
	default:
		break;
	}
F
françois romieu 已提交
4016 4017 4018 4019 4020 4021
	rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
}

static void r8168_phy_power_down(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
H
hayeswang 已提交
4022 4023 4024
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
4025 4026
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
H
hayeswang 已提交
4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049
		rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
		break;

	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
	case RTL_GIGA_MAC_VER_31:
		rtl_writephy(tp, 0x0e, 0x0200);
	default:
		rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
		break;
	}
F
françois romieu 已提交
4050 4051 4052 4053 4054 4055
}

static void r8168_pll_power_down(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

F
Francois Romieu 已提交
4056 4057 4058
	if ((tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_31) &&
4059
	    r8168dp_check_dash(tp)) {
F
françois romieu 已提交
4060
		return;
4061
	}
F
françois romieu 已提交
4062

F
Francois Romieu 已提交
4063 4064
	if ((tp->mac_version == RTL_GIGA_MAC_VER_23 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_24) &&
F
françois romieu 已提交
4065 4066 4067 4068
	    (RTL_R16(CPlusCmd) & ASF)) {
		return;
	}

H
hayeswang 已提交
4069 4070
	if (tp->mac_version == RTL_GIGA_MAC_VER_32 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_33)
4071
		rtl_ephy_write(tp, 0x19, 0xff64);
H
hayeswang 已提交
4072

4073
	if (rtl_wol_pll_power_down(tp))
F
françois romieu 已提交
4074 4075 4076 4077 4078 4079 4080
		return;

	r8168_phy_power_down(tp);

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
4081 4082
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
4083
	case RTL_GIGA_MAC_VER_31:
H
hayeswang 已提交
4084 4085
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
F
françois romieu 已提交
4086 4087
		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
		break;
4088 4089 4090 4091 4092
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
		rtl_w1w0_eri(tp, 0x1a8, ERIAR_MASK_1111, 0x00000000,
			     0xfc000000, ERIAR_EXGMAC);
		break;
F
françois romieu 已提交
4093 4094 4095 4096 4097 4098 4099 4100 4101 4102
	}
}

static void r8168_pll_power_up(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
4103 4104
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
4105
	case RTL_GIGA_MAC_VER_31:
H
hayeswang 已提交
4106 4107
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
F
françois romieu 已提交
4108 4109
		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
		break;
4110 4111 4112 4113 4114
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
		rtl_w1w0_eri(tp, 0x1a8, ERIAR_MASK_1111, 0xfc000000,
			     0x00000000, ERIAR_EXGMAC);
		break;
F
françois romieu 已提交
4115 4116 4117 4118 4119
	}

	r8168_phy_power_up(tp);
}

F
Francois Romieu 已提交
4120 4121
static void rtl_generic_op(struct rtl8169_private *tp,
			   void (*op)(struct rtl8169_private *))
F
françois romieu 已提交
4122 4123 4124 4125 4126 4127 4128
{
	if (op)
		op(tp);
}

static void rtl_pll_power_down(struct rtl8169_private *tp)
{
F
Francois Romieu 已提交
4129
	rtl_generic_op(tp, tp->pll_power_ops.down);
F
françois romieu 已提交
4130 4131 4132 4133
}

static void rtl_pll_power_up(struct rtl8169_private *tp)
{
F
Francois Romieu 已提交
4134
	rtl_generic_op(tp, tp->pll_power_ops.up);
F
françois romieu 已提交
4135 4136
}

B
Bill Pemberton 已提交
4137
static void rtl_init_pll_power_ops(struct rtl8169_private *tp)
F
françois romieu 已提交
4138 4139 4140 4141 4142 4143 4144 4145 4146
{
	struct pll_power_ops *ops = &tp->pll_power_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_16:
4147 4148
	case RTL_GIGA_MAC_VER_29:
	case RTL_GIGA_MAC_VER_30:
4149
	case RTL_GIGA_MAC_VER_37:
H
Hayes Wang 已提交
4150
	case RTL_GIGA_MAC_VER_39:
H
hayeswang 已提交
4151
	case RTL_GIGA_MAC_VER_43:
F
françois romieu 已提交
4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168
		ops->down	= r810x_pll_power_down;
		ops->up		= r810x_pll_power_up;
		break;

	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
F
françois romieu 已提交
4169
	case RTL_GIGA_MAC_VER_28:
4170
	case RTL_GIGA_MAC_VER_31:
H
hayeswang 已提交
4171 4172
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
H
Hayes Wang 已提交
4173
	case RTL_GIGA_MAC_VER_34:
4174 4175
	case RTL_GIGA_MAC_VER_35:
	case RTL_GIGA_MAC_VER_36:
4176
	case RTL_GIGA_MAC_VER_38:
H
Hayes Wang 已提交
4177 4178
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
H
hayeswang 已提交
4179
	case RTL_GIGA_MAC_VER_42:
F
françois romieu 已提交
4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190
		ops->down	= r8168_pll_power_down;
		ops->up		= r8168_pll_power_up;
		break;

	default:
		ops->down	= NULL;
		ops->up		= NULL;
		break;
	}
}

4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218
static void rtl_init_rxcfg(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01:
	case RTL_GIGA_MAC_VER_02:
	case RTL_GIGA_MAC_VER_03:
	case RTL_GIGA_MAC_VER_04:
	case RTL_GIGA_MAC_VER_05:
	case RTL_GIGA_MAC_VER_06:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_13:
	case RTL_GIGA_MAC_VER_14:
	case RTL_GIGA_MAC_VER_15:
	case RTL_GIGA_MAC_VER_16:
	case RTL_GIGA_MAC_VER_17:
		RTL_W32(RxConfig, RX_FIFO_THRESH | RX_DMA_BURST);
		break;
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
4219
	case RTL_GIGA_MAC_VER_34:
4220 4221
		RTL_W32(RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST);
		break;
4222 4223
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
H
hayeswang 已提交
4224
	case RTL_GIGA_MAC_VER_42:
H
hayeswang 已提交
4225
	case RTL_GIGA_MAC_VER_43:
4226 4227
		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST | RX_EARLY_OFF);
		break;
4228 4229 4230 4231 4232 4233
	default:
		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST);
		break;
	}
}

4234 4235
static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
{
4236
	tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
4237 4238
}

F
Francois Romieu 已提交
4239 4240
static void rtl_hw_jumbo_enable(struct rtl8169_private *tp)
{
4241 4242 4243
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Cfg9346, Cfg9346_Unlock);
F
Francois Romieu 已提交
4244
	rtl_generic_op(tp, tp->jumbo_ops.enable);
4245
	RTL_W8(Cfg9346, Cfg9346_Lock);
F
Francois Romieu 已提交
4246 4247 4248 4249
}

static void rtl_hw_jumbo_disable(struct rtl8169_private *tp)
{
4250 4251 4252
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Cfg9346, Cfg9346_Unlock);
F
Francois Romieu 已提交
4253
	rtl_generic_op(tp, tp->jumbo_ops.disable);
4254
	RTL_W8(Cfg9346, Cfg9346_Lock);
F
Francois Romieu 已提交
4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295
}

static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
	RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
	rtl_tx_performance_tweak(tp->pci_dev, 0x2 << MAX_READ_REQUEST_SHIFT);
}

static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
	RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
	rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);
}

static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
}

static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
}

static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(MaxTxPacketSize, 0x3f);
	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
	RTL_W8(Config4, RTL_R8(Config4) | 0x01);
4296
	rtl_tx_performance_tweak(tp->pci_dev, 0x2 << MAX_READ_REQUEST_SHIFT);
F
Francois Romieu 已提交
4297 4298 4299 4300 4301 4302 4303 4304 4305
}

static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(MaxTxPacketSize, 0x0c);
	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
	RTL_W8(Config4, RTL_R8(Config4) & ~0x01);
4306
	rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);
F
Francois Romieu 已提交
4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338
}

static void r8168b_0_hw_jumbo_enable(struct rtl8169_private *tp)
{
	rtl_tx_performance_tweak(tp->pci_dev,
		(0x2 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
}

static void r8168b_0_hw_jumbo_disable(struct rtl8169_private *tp)
{
	rtl_tx_performance_tweak(tp->pci_dev,
		(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
}

static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	r8168b_0_hw_jumbo_enable(tp);

	RTL_W8(Config4, RTL_R8(Config4) | (1 << 0));
}

static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	r8168b_0_hw_jumbo_disable(tp);

	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
}

B
Bill Pemberton 已提交
4339
static void rtl_init_jumbo_ops(struct rtl8169_private *tp)
F
Francois Romieu 已提交
4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381
{
	struct jumbo_ops *ops = &tp->jumbo_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
		ops->disable	= r8168b_0_hw_jumbo_disable;
		ops->enable	= r8168b_0_hw_jumbo_enable;
		break;
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
		ops->disable	= r8168b_1_hw_jumbo_disable;
		ops->enable	= r8168b_1_hw_jumbo_enable;
		break;
	case RTL_GIGA_MAC_VER_18: /* Wild guess. Needs info from Realtek. */
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21: /* Wild guess. Needs info from Realtek. */
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
		ops->disable	= r8168c_hw_jumbo_disable;
		ops->enable	= r8168c_hw_jumbo_enable;
		break;
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
		ops->disable	= r8168dp_hw_jumbo_disable;
		ops->enable	= r8168dp_hw_jumbo_enable;
		break;
	case RTL_GIGA_MAC_VER_31: /* Wild guess. Needs info from Realtek. */
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
	case RTL_GIGA_MAC_VER_34:
		ops->disable	= r8168e_hw_jumbo_disable;
		ops->enable	= r8168e_hw_jumbo_enable;
		break;

	/*
	 * No action needed for jumbo frames with 8169.
	 * No jumbo for 810x at all.
	 */
H
Hayes Wang 已提交
4382 4383
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
H
hayeswang 已提交
4384
	case RTL_GIGA_MAC_VER_42:
H
hayeswang 已提交
4385
	case RTL_GIGA_MAC_VER_43:
F
Francois Romieu 已提交
4386 4387 4388 4389 4390 4391 4392
	default:
		ops->disable	= NULL;
		ops->enable	= NULL;
		break;
	}
}

4393 4394 4395 4396 4397 4398 4399
DECLARE_RTL_COND(rtl_chipcmd_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R8(ChipCmd) & CmdReset;
}

4400 4401 4402 4403 4404 4405
static void rtl_hw_reset(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(ChipCmd, CmdReset);

4406
	rtl_udelay_loop_wait_low(tp, &rtl_chipcmd_cond, 100, 100);
4407 4408
}

4409
static void rtl_request_uncached_firmware(struct rtl8169_private *tp)
4410
{
4411 4412 4413
	struct rtl_fw *rtl_fw;
	const char *name;
	int rc = -ENOMEM;
4414

4415 4416 4417
	name = rtl_lookup_firmware_name(tp);
	if (!name)
		goto out_no_firmware;
4418

4419 4420 4421
	rtl_fw = kzalloc(sizeof(*rtl_fw), GFP_KERNEL);
	if (!rtl_fw)
		goto err_warn;
4422

4423 4424 4425 4426
	rc = request_firmware(&rtl_fw->fw, name, &tp->pci_dev->dev);
	if (rc < 0)
		goto err_free;

4427 4428 4429 4430
	rc = rtl_check_firmware(tp, rtl_fw);
	if (rc < 0)
		goto err_release_firmware;

4431 4432 4433 4434
	tp->rtl_fw = rtl_fw;
out:
	return;

4435 4436
err_release_firmware:
	release_firmware(rtl_fw->fw);
4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450
err_free:
	kfree(rtl_fw);
err_warn:
	netif_warn(tp, ifup, tp->dev, "unable to load firmware patch %s (%d)\n",
		   name, rc);
out_no_firmware:
	tp->rtl_fw = NULL;
	goto out;
}

static void rtl_request_firmware(struct rtl8169_private *tp)
{
	if (IS_ERR(tp->rtl_fw))
		rtl_request_uncached_firmware(tp);
4451 4452
}

4453 4454 4455 4456
static void rtl_rx_close(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

4457
	RTL_W32(RxConfig, RTL_R32(RxConfig) & ~RX_CONFIG_ACCEPT_MASK);
4458 4459
}

4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473
DECLARE_RTL_COND(rtl_npq_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R8(TxPoll) & NPQ;
}

DECLARE_RTL_COND(rtl_txcfg_empty_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(TxConfig) & TXCFG_EMPTY;
}

F
françois romieu 已提交
4474
static void rtl8169_hw_reset(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
4475
{
F
françois romieu 已提交
4476 4477
	void __iomem *ioaddr = tp->mmio_addr;

L
Linus Torvalds 已提交
4478
	/* Disable interrupts */
F
françois romieu 已提交
4479
	rtl8169_irq_mask_and_ack(tp);
L
Linus Torvalds 已提交
4480

4481 4482
	rtl_rx_close(tp);

4483
	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
4484 4485
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
4486
		rtl_udelay_loop_wait_low(tp, &rtl_npq_cond, 20, 42*42);
4487 4488
	} else if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
	           tp->mac_version == RTL_GIGA_MAC_VER_35 ||
4489
	           tp->mac_version == RTL_GIGA_MAC_VER_36 ||
4490
	           tp->mac_version == RTL_GIGA_MAC_VER_37 ||
H
Hayes Wang 已提交
4491 4492
	           tp->mac_version == RTL_GIGA_MAC_VER_40 ||
	           tp->mac_version == RTL_GIGA_MAC_VER_41 ||
H
hayeswang 已提交
4493
	           tp->mac_version == RTL_GIGA_MAC_VER_42 ||
H
hayeswang 已提交
4494
	           tp->mac_version == RTL_GIGA_MAC_VER_43 ||
4495
	           tp->mac_version == RTL_GIGA_MAC_VER_38) {
4496
		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
4497
		rtl_udelay_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
4498 4499 4500
	} else {
		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
		udelay(100);
F
françois romieu 已提交
4501 4502
	}

4503
	rtl_hw_reset(tp);
L
Linus Torvalds 已提交
4504 4505
}

4506
static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)
4507 4508 4509 4510 4511 4512 4513 4514
{
	void __iomem *ioaddr = tp->mmio_addr;

	/* Set DMA burst size and Interframe Gap Time */
	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
		(InterFrameGap << TxInterFrameGapShift));
}

4515
static void rtl_hw_start(struct net_device *dev)
L
Linus Torvalds 已提交
4516 4517 4518
{
	struct rtl8169_private *tp = netdev_priv(dev);

4519 4520
	tp->hw_start(dev);

4521
	rtl_irq_enable_all(tp);
4522 4523
}

4524 4525 4526 4527 4528 4529 4530 4531 4532
static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp,
					 void __iomem *ioaddr)
{
	/*
	 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
	 * register to be written before TxDescAddrLow to work.
	 * Switching from MMIO to I/O access fixes the issue as well.
	 */
	RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32);
4533
	RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32));
4534
	RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32);
4535
	RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32));
4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546
}

static u16 rtl_rw_cpluscmd(void __iomem *ioaddr)
{
	u16 cmd;

	cmd = RTL_R16(CPlusCmd);
	RTL_W16(CPlusCmd, cmd);
	return cmd;
}

4547
static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz)
4548 4549
{
	/* Low hurts. Let's disable the filtering. */
4550
	RTL_W16(RxMaxSize, rx_buf_sz + 1);
4551 4552
}

4553 4554
static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version)
{
4555
	static const struct rtl_cfg2_info {
4556 4557 4558 4559 4560 4561 4562 4563
		u32 mac_version;
		u32 clk;
		u32 val;
	} cfg2_info [] = {
		{ RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd
		{ RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff },
		{ RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe
		{ RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff }
4564 4565
	};
	const struct rtl_cfg2_info *p = cfg2_info;
4566 4567 4568 4569
	unsigned int i;
	u32 clk;

	clk = RTL_R8(Config2) & PCI_Clock_66MHz;
4570
	for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) {
4571 4572 4573 4574 4575 4576 4577
		if ((p->mac_version == mac_version) && (p->clk == clk)) {
			RTL_W32(0x7c, p->val);
			break;
		}
	}
}

4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621
static void rtl_set_rx_mode(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	u32 mc_filter[2];	/* Multicast hash filter */
	int rx_mode;
	u32 tmp = 0;

	if (dev->flags & IFF_PROMISC) {
		/* Unconditionally log net taps. */
		netif_notice(tp, link, dev, "Promiscuous mode enabled\n");
		rx_mode =
		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
		    AcceptAllPhys;
		mc_filter[1] = mc_filter[0] = 0xffffffff;
	} else if ((netdev_mc_count(dev) > multicast_filter_limit) ||
		   (dev->flags & IFF_ALLMULTI)) {
		/* Too many to filter perfectly -- accept all multicasts. */
		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
		mc_filter[1] = mc_filter[0] = 0xffffffff;
	} else {
		struct netdev_hw_addr *ha;

		rx_mode = AcceptBroadcast | AcceptMyPhys;
		mc_filter[1] = mc_filter[0] = 0;
		netdev_for_each_mc_addr(ha, dev) {
			int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
			rx_mode |= AcceptMulticast;
		}
	}

	if (dev->features & NETIF_F_RXALL)
		rx_mode |= (AcceptErr | AcceptRunt);

	tmp = (RTL_R32(RxConfig) & ~RX_CONFIG_ACCEPT_MASK) | rx_mode;

	if (tp->mac_version > RTL_GIGA_MAC_VER_06) {
		u32 data = mc_filter[0];

		mc_filter[0] = swab32(mc_filter[1]);
		mc_filter[1] = swab32(data);
	}

4622 4623 4624
	if (tp->mac_version == RTL_GIGA_MAC_VER_35)
		mc_filter[1] = mc_filter[0] = 0xffffffff;

4625 4626 4627 4628 4629 4630
	RTL_W32(MAR0 + 4, mc_filter[1]);
	RTL_W32(MAR0 + 0, mc_filter[0]);

	RTL_W32(RxConfig, tmp);
}

4631 4632 4633 4634 4635 4636
static void rtl_hw_start_8169(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

4637 4638 4639 4640 4641
	if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
		RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);
		pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08);
	}

L
Linus Torvalds 已提交
4642
	RTL_W8(Cfg9346, Cfg9346_Unlock);
F
Francois Romieu 已提交
4643 4644 4645 4646
	if (tp->mac_version == RTL_GIGA_MAC_VER_01 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_04)
4647 4648
		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);

4649 4650
	rtl_init_rxcfg(tp);

4651
	RTL_W8(EarlyTxThres, NoEarlyTx);
L
Linus Torvalds 已提交
4652

E
Eric Dumazet 已提交
4653
	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
L
Linus Torvalds 已提交
4654

F
Francois Romieu 已提交
4655 4656 4657 4658
	if (tp->mac_version == RTL_GIGA_MAC_VER_01 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_04)
4659
		rtl_set_rx_tx_config_registers(tp);
L
Linus Torvalds 已提交
4660

4661
	tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
L
Linus Torvalds 已提交
4662

F
Francois Romieu 已提交
4663 4664
	if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03) {
4665
		dprintk("Set MAC Reg C+CR Offset 0xE0. "
L
Linus Torvalds 已提交
4666
			"Bit-3 and bit-14 MUST be 1\n");
4667
		tp->cp_cmd |= (1 << 14);
L
Linus Torvalds 已提交
4668 4669
	}

4670 4671
	RTL_W16(CPlusCmd, tp->cp_cmd);

4672 4673
	rtl8169_set_magic_reg(ioaddr, tp->mac_version);

L
Linus Torvalds 已提交
4674 4675 4676 4677 4678 4679
	/*
	 * Undocumented corner. Supposedly:
	 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
	 */
	RTL_W16(IntrMitigate, 0x0000);

4680
	rtl_set_rx_tx_desc_registers(tp, ioaddr);
4681

F
Francois Romieu 已提交
4682 4683 4684 4685
	if (tp->mac_version != RTL_GIGA_MAC_VER_01 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_02 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_03 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_04) {
4686 4687 4688 4689
		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
		rtl_set_rx_tx_config_registers(tp);
	}

L
Linus Torvalds 已提交
4690
	RTL_W8(Cfg9346, Cfg9346_Lock);
F
Francois Romieu 已提交
4691 4692 4693

	/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
	RTL_R8(IntrMask);
L
Linus Torvalds 已提交
4694 4695 4696

	RTL_W32(RxMissed, 0);

4697
	rtl_set_rx_mode(dev);
L
Linus Torvalds 已提交
4698 4699 4700

	/* no early-rx interrupts */
	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
4701
}
L
Linus Torvalds 已提交
4702

4703 4704 4705
static void rtl_csi_write(struct rtl8169_private *tp, int addr, int value)
{
	if (tp->csi_ops.write)
4706
		tp->csi_ops.write(tp, addr, value);
4707 4708 4709 4710
}

static u32 rtl_csi_read(struct rtl8169_private *tp, int addr)
{
4711
	return tp->csi_ops.read ? tp->csi_ops.read(tp, addr) : ~0;
4712 4713 4714
}

static void rtl_csi_access_enable(struct rtl8169_private *tp, u32 bits)
4715 4716 4717
{
	u32 csi;

4718 4719 4720 4721 4722 4723 4724
	csi = rtl_csi_read(tp, 0x070c) & 0x00ffffff;
	rtl_csi_write(tp, 0x070c, csi | bits);
}

static void rtl_csi_access_enable_1(struct rtl8169_private *tp)
{
	rtl_csi_access_enable(tp, 0x17000000);
4725 4726
}

4727
static void rtl_csi_access_enable_2(struct rtl8169_private *tp)
F
françois romieu 已提交
4728
{
4729
	rtl_csi_access_enable(tp, 0x27000000);
F
françois romieu 已提交
4730 4731
}

4732 4733 4734 4735 4736 4737 4738
DECLARE_RTL_COND(rtl_csiar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(CSIAR) & CSIAR_FLAG;
}

4739
static void r8169_csi_write(struct rtl8169_private *tp, int addr, int value)
4740
{
4741
	void __iomem *ioaddr = tp->mmio_addr;
4742 4743 4744 4745 4746

	RTL_W32(CSIDR, value);
	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);

4747
	rtl_udelay_loop_wait_low(tp, &rtl_csiar_cond, 10, 100);
4748 4749
}

4750
static u32 r8169_csi_read(struct rtl8169_private *tp, int addr)
4751
{
4752
	void __iomem *ioaddr = tp->mmio_addr;
4753 4754 4755 4756

	RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);

4757 4758
	return rtl_udelay_loop_wait_high(tp, &rtl_csiar_cond, 10, 100) ?
		RTL_R32(CSIDR) : ~0;
4759 4760
}

4761
static void r8402_csi_write(struct rtl8169_private *tp, int addr, int value)
4762
{
4763
	void __iomem *ioaddr = tp->mmio_addr;
4764 4765 4766 4767 4768 4769

	RTL_W32(CSIDR, value);
	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT |
		CSIAR_FUNC_NIC);

4770
	rtl_udelay_loop_wait_low(tp, &rtl_csiar_cond, 10, 100);
4771 4772
}

4773
static u32 r8402_csi_read(struct rtl8169_private *tp, int addr)
4774
{
4775
	void __iomem *ioaddr = tp->mmio_addr;
4776 4777 4778 4779

	RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) | CSIAR_FUNC_NIC |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);

4780 4781
	return rtl_udelay_loop_wait_high(tp, &rtl_csiar_cond, 10, 100) ?
		RTL_R32(CSIDR) : ~0;
4782 4783
}

B
Bill Pemberton 已提交
4784
static void rtl_init_csi_ops(struct rtl8169_private *tp)
4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805 4806
{
	struct csi_ops *ops = &tp->csi_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01:
	case RTL_GIGA_MAC_VER_02:
	case RTL_GIGA_MAC_VER_03:
	case RTL_GIGA_MAC_VER_04:
	case RTL_GIGA_MAC_VER_05:
	case RTL_GIGA_MAC_VER_06:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_13:
	case RTL_GIGA_MAC_VER_14:
	case RTL_GIGA_MAC_VER_15:
	case RTL_GIGA_MAC_VER_16:
	case RTL_GIGA_MAC_VER_17:
		ops->write	= NULL;
		ops->read	= NULL;
		break;

4807
	case RTL_GIGA_MAC_VER_37:
4808
	case RTL_GIGA_MAC_VER_38:
4809 4810 4811 4812
		ops->write	= r8402_csi_write;
		ops->read	= r8402_csi_read;
		break;

4813 4814 4815 4816 4817
	default:
		ops->write	= r8169_csi_write;
		ops->read	= r8169_csi_read;
		break;
	}
4818 4819 4820 4821 4822 4823 4824 4825
}

struct ephy_info {
	unsigned int offset;
	u16 mask;
	u16 bits;
};

4826 4827
static void rtl_ephy_init(struct rtl8169_private *tp, const struct ephy_info *e,
			  int len)
4828 4829 4830 4831
{
	u16 w;

	while (len-- > 0) {
4832 4833
		w = (rtl_ephy_read(tp, e->offset) & ~e->mask) | e->bits;
		rtl_ephy_write(tp, e->offset, w);
4834 4835 4836 4837
		e++;
	}
}

4838 4839
static void rtl_disable_clock_request(struct pci_dev *pdev)
{
4840 4841
	pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
				   PCI_EXP_LNKCTL_CLKREQ_EN);
4842 4843
}

F
françois romieu 已提交
4844 4845
static void rtl_enable_clock_request(struct pci_dev *pdev)
{
4846 4847
	pcie_capability_set_word(pdev, PCI_EXP_LNKCTL,
				 PCI_EXP_LNKCTL_CLKREQ_EN);
F
françois romieu 已提交
4848 4849
}

4850 4851 4852 4853 4854 4855 4856 4857 4858 4859 4860
#define R8168_CPCMD_QUIRK_MASK (\
	EnableBist | \
	Mac_dbgo_oe | \
	Force_half_dup | \
	Force_rxflow_en | \
	Force_txflow_en | \
	Cxpl_dbg_sel | \
	ASF | \
	PktCntrDisable | \
	Mac_dbgo_sel)

4861
static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
4862
{
4863 4864 4865
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

4866 4867 4868 4869
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);

4870 4871 4872 4873
	if (tp->dev->mtu <= ETH_DATA_LEN) {
		rtl_tx_performance_tweak(pdev, (0x5 << MAX_READ_REQUEST_SHIFT) |
					 PCI_EXP_DEVCTL_NOSNOOP_EN);
	}
4874 4875
}

4876
static void rtl_hw_start_8168bef(struct rtl8169_private *tp)
4877
{
4878 4879 4880
	void __iomem *ioaddr = tp->mmio_addr;

	rtl_hw_start_8168bb(tp);
4881

4882
	RTL_W8(MaxTxPacketSize, TxPacketMax);
4883 4884

	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
4885 4886
}

4887
static void __rtl_hw_start_8168cp(struct rtl8169_private *tp)
4888
{
4889 4890 4891
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

4892 4893 4894 4895
	RTL_W8(Config1, RTL_R8(Config1) | Speed_down);

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

4896 4897
	if (tp->dev->mtu <= ETH_DATA_LEN)
		rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
4898 4899 4900 4901

	rtl_disable_clock_request(pdev);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
4902 4903
}

4904
static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp)
4905
{
4906
	static const struct ephy_info e_info_8168cp[] = {
4907 4908 4909 4910 4911 4912 4913
		{ 0x01, 0,	0x0001 },
		{ 0x02, 0x0800,	0x1000 },
		{ 0x03, 0,	0x0042 },
		{ 0x06, 0x0080,	0x0000 },
		{ 0x07, 0,	0x2000 }
	};

4914
	rtl_csi_access_enable_2(tp);
4915

4916
	rtl_ephy_init(tp, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
4917

4918
	__rtl_hw_start_8168cp(tp);
4919 4920
}

4921
static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)
F
Francois Romieu 已提交
4922
{
4923 4924 4925 4926
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_2(tp);
F
Francois Romieu 已提交
4927 4928 4929

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

4930 4931
	if (tp->dev->mtu <= ETH_DATA_LEN)
		rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
F
Francois Romieu 已提交
4932 4933 4934 4935

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

4936
static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
4937
{
4938 4939 4940 4941
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_2(tp);
4942 4943 4944 4945 4946 4947

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	/* Magic. */
	RTL_W8(DBG_REG, 0x20);

4948
	RTL_W8(MaxTxPacketSize, TxPacketMax);
4949

4950 4951
	if (tp->dev->mtu <= ETH_DATA_LEN)
		rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
4952 4953 4954 4955

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

4956
static void rtl_hw_start_8168c_1(struct rtl8169_private *tp)
4957
{
4958
	void __iomem *ioaddr = tp->mmio_addr;
4959
	static const struct ephy_info e_info_8168c_1[] = {
4960 4961 4962 4963 4964
		{ 0x02, 0x0800,	0x1000 },
		{ 0x03, 0,	0x0002 },
		{ 0x06, 0x0080,	0x0000 }
	};

4965
	rtl_csi_access_enable_2(tp);
4966 4967 4968

	RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);

4969
	rtl_ephy_init(tp, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1));
4970

4971
	__rtl_hw_start_8168cp(tp);
4972 4973
}

4974
static void rtl_hw_start_8168c_2(struct rtl8169_private *tp)
4975
{
4976
	static const struct ephy_info e_info_8168c_2[] = {
4977 4978 4979 4980
		{ 0x01, 0,	0x0001 },
		{ 0x03, 0x0400,	0x0220 }
	};

4981
	rtl_csi_access_enable_2(tp);
4982

4983
	rtl_ephy_init(tp, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
4984

4985
	__rtl_hw_start_8168cp(tp);
4986 4987
}

4988
static void rtl_hw_start_8168c_3(struct rtl8169_private *tp)
F
Francois Romieu 已提交
4989
{
4990
	rtl_hw_start_8168c_2(tp);
F
Francois Romieu 已提交
4991 4992
}

4993
static void rtl_hw_start_8168c_4(struct rtl8169_private *tp)
4994
{
4995
	rtl_csi_access_enable_2(tp);
4996

4997
	__rtl_hw_start_8168cp(tp);
4998 4999
}

5000
static void rtl_hw_start_8168d(struct rtl8169_private *tp)
F
Francois Romieu 已提交
5001
{
5002 5003 5004 5005
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_2(tp);
F
Francois Romieu 已提交
5006 5007 5008

	rtl_disable_clock_request(pdev);

5009
	RTL_W8(MaxTxPacketSize, TxPacketMax);
F
Francois Romieu 已提交
5010

5011 5012
	if (tp->dev->mtu <= ETH_DATA_LEN)
		rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
F
Francois Romieu 已提交
5013 5014 5015 5016

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

5017
static void rtl_hw_start_8168dp(struct rtl8169_private *tp)
5018
{
5019 5020 5021 5022
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_1(tp);
5023

5024 5025
	if (tp->dev->mtu <= ETH_DATA_LEN)
		rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5026 5027 5028 5029 5030 5031

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	rtl_disable_clock_request(pdev);
}

5032
static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)
F
françois romieu 已提交
5033
{
5034 5035
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
F
françois romieu 已提交
5036 5037 5038 5039 5040 5041 5042
	static const struct ephy_info e_info_8168d_4[] = {
		{ 0x0b, ~0,	0x48 },
		{ 0x19, 0x20,	0x50 },
		{ 0x0c, ~0,	0x20 }
	};
	int i;

5043
	rtl_csi_access_enable_1(tp);
F
françois romieu 已提交
5044 5045 5046 5047 5048 5049 5050 5051 5052

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	for (i = 0; i < ARRAY_SIZE(e_info_8168d_4); i++) {
		const struct ephy_info *e = e_info_8168d_4 + i;
		u16 w;

5053 5054
		w = rtl_ephy_read(tp, e->offset);
		rtl_ephy_write(tp, 0x03, (w & e->mask) | e->bits);
F
françois romieu 已提交
5055 5056 5057 5058 5059
	}

	rtl_enable_clock_request(pdev);
}

5060
static void rtl_hw_start_8168e_1(struct rtl8169_private *tp)
H
hayeswang 已提交
5061
{
5062 5063
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
H
Hayes Wang 已提交
5064
	static const struct ephy_info e_info_8168e_1[] = {
H
hayeswang 已提交
5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079
		{ 0x00, 0x0200,	0x0100 },
		{ 0x00, 0x0000,	0x0004 },
		{ 0x06, 0x0002,	0x0001 },
		{ 0x06, 0x0000,	0x0030 },
		{ 0x07, 0x0000,	0x2000 },
		{ 0x00, 0x0000,	0x0020 },
		{ 0x03, 0x5800,	0x2000 },
		{ 0x03, 0x0000,	0x0001 },
		{ 0x01, 0x0800,	0x1000 },
		{ 0x07, 0x0000,	0x4000 },
		{ 0x1e, 0x0000,	0x2000 },
		{ 0x19, 0xffff,	0xfe6c },
		{ 0x0a, 0x0000,	0x0040 }
	};

5080
	rtl_csi_access_enable_2(tp);
H
hayeswang 已提交
5081

5082
	rtl_ephy_init(tp, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));
H
hayeswang 已提交
5083

5084 5085
	if (tp->dev->mtu <= ETH_DATA_LEN)
		rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
H
hayeswang 已提交
5086 5087 5088 5089 5090 5091

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	rtl_disable_clock_request(pdev);

	/* Reset tx FIFO pointer */
F
Francois Romieu 已提交
5092 5093
	RTL_W32(MISC, RTL_R32(MISC) | TXPLA_RST);
	RTL_W32(MISC, RTL_R32(MISC) & ~TXPLA_RST);
H
hayeswang 已提交
5094

F
Francois Romieu 已提交
5095
	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
H
hayeswang 已提交
5096 5097
}

5098
static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
H
Hayes Wang 已提交
5099
{
5100 5101
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
H
Hayes Wang 已提交
5102 5103 5104 5105 5106
	static const struct ephy_info e_info_8168e_2[] = {
		{ 0x09, 0x0000,	0x0080 },
		{ 0x19, 0x0000,	0x0224 }
	};

5107
	rtl_csi_access_enable_1(tp);
H
Hayes Wang 已提交
5108

5109
	rtl_ephy_init(tp, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));
H
Hayes Wang 已提交
5110

5111 5112
	if (tp->dev->mtu <= ETH_DATA_LEN)
		rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
H
Hayes Wang 已提交
5113

5114 5115 5116 5117 5118 5119 5120 5121
	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00100002, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x07ff0060, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00, ERIAR_EXGMAC);
H
Hayes Wang 已提交
5122

5123
	RTL_W8(MaxTxPacketSize, EarlySize);
H
Hayes Wang 已提交
5124

5125 5126
	rtl_disable_clock_request(pdev);

H
Hayes Wang 已提交
5127 5128 5129 5130 5131 5132 5133 5134
	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);

	/* Adjust EEE LED frequency */
	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);

	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
	RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);
5135
	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
H
Hayes Wang 已提交
5136 5137
}

5138
static void rtl_hw_start_8168f(struct rtl8169_private *tp)
5139
{
5140 5141
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
5142

5143
	rtl_csi_access_enable_2(tp);
5144 5145 5146

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

5147 5148 5149 5150 5151 5152 5153 5154 5155 5156
	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00100002, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x1d0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x00000060, ERIAR_EXGMAC);
5157 5158 5159

	RTL_W8(MaxTxPacketSize, EarlySize);

5160 5161
	rtl_disable_clock_request(pdev);

5162 5163 5164
	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);
	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
5165 5166
	RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);
	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
5167 5168
}

5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180
static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	static const struct ephy_info e_info_8168f_1[] = {
		{ 0x06, 0x00c0,	0x0020 },
		{ 0x08, 0x0001,	0x0002 },
		{ 0x09, 0x0000,	0x0080 },
		{ 0x19, 0x0000,	0x0224 }
	};

	rtl_hw_start_8168f(tp);

5181
	rtl_ephy_init(tp, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
5182

5183
	rtl_w1w0_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00, ERIAR_EXGMAC);
5184 5185 5186 5187 5188

	/* Adjust EEE LED frequency */
	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
}

5189 5190 5191 5192 5193 5194 5195 5196 5197 5198 5199
static void rtl_hw_start_8411(struct rtl8169_private *tp)
{
	static const struct ephy_info e_info_8168f_1[] = {
		{ 0x06, 0x00c0,	0x0020 },
		{ 0x0f, 0xffff,	0x5200 },
		{ 0x1e, 0x0000,	0x4000 },
		{ 0x19, 0x0000,	0x0224 }
	};

	rtl_hw_start_8168f(tp);

5200
	rtl_ephy_init(tp, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
5201

5202
	rtl_w1w0_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000, ERIAR_EXGMAC);
5203 5204
}

H
Hayes Wang 已提交
5205 5206 5207 5208 5209
static void rtl_hw_start_8168g_1(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

5210 5211
	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);

H
Hayes Wang 已提交
5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222
	rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x080002, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, 0x38, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);

	rtl_csi_access_enable_1(tp);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
5223
	rtl_eri_write(tp, 0x2f8, ERIAR_MASK_0011, 0x1d8f, ERIAR_EXGMAC);
H
Hayes Wang 已提交
5224 5225

	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
5226
	RTL_W32(MISC, RTL_R32(MISC) & ~RXDV_GATED_EN);
H
Hayes Wang 已提交
5227 5228 5229 5230 5231 5232 5233 5234
	RTL_W8(MaxTxPacketSize, EarlySize);

	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);

	/* Adjust EEE LED frequency */
	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);

5235 5236
	rtl_w1w0_eri(tp, 0x2fc, ERIAR_MASK_0001, 0x01, 0x06, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, 0x1000, ERIAR_EXGMAC);
H
Hayes Wang 已提交
5237 5238
}

H
hayeswang 已提交
5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256
static void rtl_hw_start_8168g_2(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	static const struct ephy_info e_info_8168g_2[] = {
		{ 0x00, 0x0000,	0x0008 },
		{ 0x0c, 0x3df0,	0x0200 },
		{ 0x19, 0xffff,	0xfc00 },
		{ 0x1e, 0xffff,	0x20eb }
	};

	rtl_hw_start_8168g_1(tp);

	/* disable aspm and clock request before access ephy */
	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);
	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);
	rtl_ephy_init(tp, e_info_8168g_2, ARRAY_SIZE(e_info_8168g_2));
}

5257 5258
static void rtl_hw_start_8168(struct net_device *dev)
{
5259 5260 5261 5262 5263
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Cfg9346, Cfg9346_Unlock);

5264
	RTL_W8(MaxTxPacketSize, TxPacketMax);
5265

E
Eric Dumazet 已提交
5266
	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
5267

5268
	tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1;
5269 5270 5271

	RTL_W16(CPlusCmd, tp->cp_cmd);

5272
	RTL_W16(IntrMitigate, 0x5151);
5273

5274
	/* Work around for RxFIFO overflow. */
F
françois romieu 已提交
5275
	if (tp->mac_version == RTL_GIGA_MAC_VER_11) {
5276 5277
		tp->event_slow |= RxFIFOOver | PCSTimeout;
		tp->event_slow &= ~RxOverflow;
5278 5279 5280
	}

	rtl_set_rx_tx_desc_registers(tp, ioaddr);
5281

H
hayeswang 已提交
5282
	rtl_set_rx_tx_config_registers(tp);
5283 5284 5285

	RTL_R8(IntrMask);

5286 5287
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
5288
		rtl_hw_start_8168bb(tp);
5289
		break;
5290 5291 5292

	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
5293
		rtl_hw_start_8168bef(tp);
5294
		break;
5295 5296

	case RTL_GIGA_MAC_VER_18:
5297
		rtl_hw_start_8168cp_1(tp);
5298
		break;
5299 5300

	case RTL_GIGA_MAC_VER_19:
5301
		rtl_hw_start_8168c_1(tp);
5302
		break;
5303 5304

	case RTL_GIGA_MAC_VER_20:
5305
		rtl_hw_start_8168c_2(tp);
5306
		break;
5307

F
Francois Romieu 已提交
5308
	case RTL_GIGA_MAC_VER_21:
5309
		rtl_hw_start_8168c_3(tp);
5310
		break;
F
Francois Romieu 已提交
5311

5312
	case RTL_GIGA_MAC_VER_22:
5313
		rtl_hw_start_8168c_4(tp);
5314
		break;
5315

F
Francois Romieu 已提交
5316
	case RTL_GIGA_MAC_VER_23:
5317
		rtl_hw_start_8168cp_2(tp);
5318
		break;
F
Francois Romieu 已提交
5319

5320
	case RTL_GIGA_MAC_VER_24:
5321
		rtl_hw_start_8168cp_3(tp);
5322
		break;
5323

F
Francois Romieu 已提交
5324
	case RTL_GIGA_MAC_VER_25:
5325 5326
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
5327
		rtl_hw_start_8168d(tp);
5328
		break;
F
Francois Romieu 已提交
5329

F
françois romieu 已提交
5330
	case RTL_GIGA_MAC_VER_28:
5331
		rtl_hw_start_8168d_4(tp);
5332
		break;
F
Francois Romieu 已提交
5333

5334
	case RTL_GIGA_MAC_VER_31:
5335
		rtl_hw_start_8168dp(tp);
5336 5337
		break;

H
hayeswang 已提交
5338 5339
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
5340
		rtl_hw_start_8168e_1(tp);
H
Hayes Wang 已提交
5341 5342
		break;
	case RTL_GIGA_MAC_VER_34:
5343
		rtl_hw_start_8168e_2(tp);
H
hayeswang 已提交
5344
		break;
F
françois romieu 已提交
5345

5346 5347
	case RTL_GIGA_MAC_VER_35:
	case RTL_GIGA_MAC_VER_36:
5348
		rtl_hw_start_8168f_1(tp);
5349 5350
		break;

5351 5352 5353 5354
	case RTL_GIGA_MAC_VER_38:
		rtl_hw_start_8411(tp);
		break;

H
Hayes Wang 已提交
5355 5356 5357 5358
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
		rtl_hw_start_8168g_1(tp);
		break;
H
hayeswang 已提交
5359 5360 5361
	case RTL_GIGA_MAC_VER_42:
		rtl_hw_start_8168g_2(tp);
		break;
H
Hayes Wang 已提交
5362

5363 5364 5365
	default:
		printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
			dev->name, tp->mac_version);
5366
		break;
5367
	}
5368

H
hayeswang 已提交
5369 5370
	RTL_W8(Cfg9346, Cfg9346_Lock);

5371 5372
	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);

H
hayeswang 已提交
5373
	rtl_set_rx_mode(dev);
5374

5375
	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
5376
}
L
Linus Torvalds 已提交
5377

5378 5379 5380 5381
#define R810X_CPCMD_QUIRK_MASK (\
	EnableBist | \
	Mac_dbgo_oe | \
	Force_half_dup | \
F
françois romieu 已提交
5382
	Force_rxflow_en | \
5383 5384 5385 5386
	Force_txflow_en | \
	Cxpl_dbg_sel | \
	ASF | \
	PktCntrDisable | \
5387
	Mac_dbgo_sel)
5388

5389
static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
5390
{
5391 5392
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
5393
	static const struct ephy_info e_info_8102e_1[] = {
5394 5395 5396 5397 5398 5399 5400 5401 5402 5403 5404
		{ 0x01,	0, 0x6e65 },
		{ 0x02,	0, 0x091f },
		{ 0x03,	0, 0xc2f9 },
		{ 0x06,	0, 0xafb5 },
		{ 0x07,	0, 0x0e00 },
		{ 0x19,	0, 0xec80 },
		{ 0x01,	0, 0x2e65 },
		{ 0x01,	0, 0x6e65 }
	};
	u8 cfg1;

5405
	rtl_csi_access_enable_2(tp);
5406 5407 5408 5409 5410 5411 5412 5413 5414 5415 5416 5417 5418

	RTL_W8(DBG_REG, FIX_NAK_1);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(Config1,
	       LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable);
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	cfg1 = RTL_R8(Config1);
	if ((cfg1 & LEDS0) && (cfg1 & LEDS1))
		RTL_W8(Config1, cfg1 & ~LEDS0);

5419
	rtl_ephy_init(tp, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
5420 5421
}

5422
static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)
5423
{
5424 5425 5426 5427
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_2(tp);
5428 5429 5430 5431 5432 5433 5434

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable);
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
}

5435
static void rtl_hw_start_8102e_3(struct rtl8169_private *tp)
5436
{
5437
	rtl_hw_start_8102e_2(tp);
5438

5439
	rtl_ephy_write(tp, 0x03, 0xc2f9);
5440 5441
}

5442
static void rtl_hw_start_8105e_1(struct rtl8169_private *tp)
5443
{
5444
	void __iomem *ioaddr = tp->mmio_addr;
5445 5446 5447 5448 5449 5450 5451 5452 5453 5454 5455
	static const struct ephy_info e_info_8105e_1[] = {
		{ 0x07,	0, 0x4000 },
		{ 0x19,	0, 0x0200 },
		{ 0x19,	0, 0x0020 },
		{ 0x1e,	0, 0x2000 },
		{ 0x03,	0, 0x0001 },
		{ 0x19,	0, 0x0100 },
		{ 0x19,	0, 0x0004 },
		{ 0x0a,	0, 0x0020 }
	};

F
Francois Romieu 已提交
5456
	/* Force LAN exit from ASPM if Rx/Tx are not idle */
5457 5458
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);

F
Francois Romieu 已提交
5459
	/* Disable Early Tally Counter */
5460 5461 5462
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) & ~0x010000);

	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);
H
Hayes Wang 已提交
5463
	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
5464

5465
	rtl_ephy_init(tp, e_info_8105e_1, ARRAY_SIZE(e_info_8105e_1));
5466 5467
}

5468
static void rtl_hw_start_8105e_2(struct rtl8169_private *tp)
5469
{
5470
	rtl_hw_start_8105e_1(tp);
5471
	rtl_ephy_write(tp, 0x1e, rtl_ephy_read(tp, 0x1e) | 0x8000);
5472 5473
}

5474 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489
static void rtl_hw_start_8402(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	static const struct ephy_info e_info_8402[] = {
		{ 0x19,	0xffff, 0xff64 },
		{ 0x1e,	0, 0x4000 }
	};

	rtl_csi_access_enable_2(tp);

	/* Force LAN exit from ASPM if Rx/Tx are not idle */
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);

	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);

5490
	rtl_ephy_init(tp, e_info_8402, ARRAY_SIZE(e_info_8402));
5491 5492 5493

	rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);

5494 5495 5496 5497 5498 5499 5500
	rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00000002, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00000006, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00, ERIAR_EXGMAC);
5501 5502
}

H
Hayes Wang 已提交
5503 5504 5505 5506 5507 5508 5509
static void rtl_hw_start_8106(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	/* Force LAN exit from ASPM if Rx/Tx are not idle */
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);

5510
	RTL_W32(MISC, (RTL_R32(MISC) | DISABLE_LAN_EN) & ~EARLY_TALLY_EN);
H
Hayes Wang 已提交
5511 5512 5513 5514
	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);
	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
}

5515 5516
static void rtl_hw_start_8101(struct net_device *dev)
{
5517 5518 5519 5520
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

5521 5522
	if (tp->mac_version >= RTL_GIGA_MAC_VER_30)
		tp->event_slow &= ~RxFIFOOver;
F
françois romieu 已提交
5523

F
Francois Romieu 已提交
5524
	if (tp->mac_version == RTL_GIGA_MAC_VER_13 ||
5525
	    tp->mac_version == RTL_GIGA_MAC_VER_16)
5526 5527
		pcie_capability_set_word(pdev, PCI_EXP_DEVCTL,
					 PCI_EXP_DEVCTL_NOSNOOP_EN);
5528

5529 5530
	RTL_W8(Cfg9346, Cfg9346_Unlock);

H
hayeswang 已提交
5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541
	RTL_W8(MaxTxPacketSize, TxPacketMax);

	rtl_set_rx_max_size(ioaddr, rx_buf_sz);

	tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK;
	RTL_W16(CPlusCmd, tp->cp_cmd);

	rtl_set_rx_tx_desc_registers(tp, ioaddr);

	rtl_set_rx_tx_config_registers(tp);

5542 5543
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
5544
		rtl_hw_start_8102e_1(tp);
5545 5546 5547
		break;

	case RTL_GIGA_MAC_VER_08:
5548
		rtl_hw_start_8102e_3(tp);
5549 5550 5551
		break;

	case RTL_GIGA_MAC_VER_09:
5552
		rtl_hw_start_8102e_2(tp);
5553
		break;
5554 5555

	case RTL_GIGA_MAC_VER_29:
5556
		rtl_hw_start_8105e_1(tp);
5557 5558
		break;
	case RTL_GIGA_MAC_VER_30:
5559
		rtl_hw_start_8105e_2(tp);
5560
		break;
5561 5562 5563 5564

	case RTL_GIGA_MAC_VER_37:
		rtl_hw_start_8402(tp);
		break;
H
Hayes Wang 已提交
5565 5566 5567 5568

	case RTL_GIGA_MAC_VER_39:
		rtl_hw_start_8106(tp);
		break;
H
hayeswang 已提交
5569 5570 5571
	case RTL_GIGA_MAC_VER_43:
		rtl_hw_start_8168g_2(tp);
		break;
5572 5573
	}

5574
	RTL_W8(Cfg9346, Cfg9346_Lock);
5575 5576 5577 5578 5579 5580 5581

	RTL_W16(IntrMitigate, 0x0000);

	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);

	rtl_set_rx_mode(dev);

H
hayeswang 已提交
5582 5583
	RTL_R8(IntrMask);

5584
	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);
L
Linus Torvalds 已提交
5585 5586 5587 5588
}

static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
{
F
Francois Romieu 已提交
5589 5590 5591 5592
	struct rtl8169_private *tp = netdev_priv(dev);

	if (new_mtu < ETH_ZLEN ||
	    new_mtu > rtl_chip_infos[tp->mac_version].jumbo_max)
L
Linus Torvalds 已提交
5593 5594
		return -EINVAL;

F
Francois Romieu 已提交
5595 5596 5597 5598 5599
	if (new_mtu > ETH_DATA_LEN)
		rtl_hw_jumbo_enable(tp);
	else
		rtl_hw_jumbo_disable(tp);

L
Linus Torvalds 已提交
5600
	dev->mtu = new_mtu;
5601 5602
	netdev_update_features(dev);

S
Stanislaw Gruszka 已提交
5603
	return 0;
L
Linus Torvalds 已提交
5604 5605 5606 5607
}

static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
{
A
Al Viro 已提交
5608
	desc->addr = cpu_to_le64(0x0badbadbadbadbadull);
L
Linus Torvalds 已提交
5609 5610 5611
	desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
}

E
Eric Dumazet 已提交
5612 5613
static void rtl8169_free_rx_databuff(struct rtl8169_private *tp,
				     void **data_buff, struct RxDesc *desc)
L
Linus Torvalds 已提交
5614
{
5615
	dma_unmap_single(&tp->pci_dev->dev, le64_to_cpu(desc->addr), rx_buf_sz,
5616
			 DMA_FROM_DEVICE);
5617

E
Eric Dumazet 已提交
5618 5619
	kfree(*data_buff);
	*data_buff = NULL;
L
Linus Torvalds 已提交
5620 5621 5622 5623 5624 5625 5626 5627 5628 5629 5630 5631 5632 5633 5634 5635 5636 5637
	rtl8169_make_unusable_by_asic(desc);
}

static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
{
	u32 eor = le32_to_cpu(desc->opts1) & RingEnd;

	desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
}

static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
				       u32 rx_buf_sz)
{
	desc->addr = cpu_to_le64(mapping);
	wmb();
	rtl8169_mark_to_asic(desc, rx_buf_sz);
}

E
Eric Dumazet 已提交
5638 5639 5640 5641 5642
static inline void *rtl8169_align(void *data)
{
	return (void *)ALIGN((long)data, 16);
}

S
Stanislaw Gruszka 已提交
5643 5644
static struct sk_buff *rtl8169_alloc_rx_data(struct rtl8169_private *tp,
					     struct RxDesc *desc)
L
Linus Torvalds 已提交
5645
{
E
Eric Dumazet 已提交
5646
	void *data;
L
Linus Torvalds 已提交
5647
	dma_addr_t mapping;
5648
	struct device *d = &tp->pci_dev->dev;
S
Stanislaw Gruszka 已提交
5649
	struct net_device *dev = tp->dev;
E
Eric Dumazet 已提交
5650
	int node = dev->dev.parent ? dev_to_node(dev->dev.parent) : -1;
L
Linus Torvalds 已提交
5651

E
Eric Dumazet 已提交
5652 5653 5654
	data = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
	if (!data)
		return NULL;
5655

E
Eric Dumazet 已提交
5656 5657 5658 5659 5660 5661
	if (rtl8169_align(data) != data) {
		kfree(data);
		data = kmalloc_node(rx_buf_sz + 15, GFP_KERNEL, node);
		if (!data)
			return NULL;
	}
5662

5663
	mapping = dma_map_single(d, rtl8169_align(data), rx_buf_sz,
5664
				 DMA_FROM_DEVICE);
5665 5666 5667
	if (unlikely(dma_mapping_error(d, mapping))) {
		if (net_ratelimit())
			netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
5668
		goto err_out;
5669
	}
L
Linus Torvalds 已提交
5670 5671

	rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
E
Eric Dumazet 已提交
5672
	return data;
5673 5674 5675 5676

err_out:
	kfree(data);
	return NULL;
L
Linus Torvalds 已提交
5677 5678 5679 5680
}

static void rtl8169_rx_clear(struct rtl8169_private *tp)
{
F
Francois Romieu 已提交
5681
	unsigned int i;
L
Linus Torvalds 已提交
5682 5683

	for (i = 0; i < NUM_RX_DESC; i++) {
E
Eric Dumazet 已提交
5684 5685
		if (tp->Rx_databuff[i]) {
			rtl8169_free_rx_databuff(tp, tp->Rx_databuff + i,
L
Linus Torvalds 已提交
5686 5687 5688 5689 5690
					    tp->RxDescArray + i);
		}
	}
}

S
Stanislaw Gruszka 已提交
5691
static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
L
Linus Torvalds 已提交
5692
{
S
Stanislaw Gruszka 已提交
5693 5694
	desc->opts1 |= cpu_to_le32(RingEnd);
}
5695

S
Stanislaw Gruszka 已提交
5696 5697 5698
static int rtl8169_rx_fill(struct rtl8169_private *tp)
{
	unsigned int i;
L
Linus Torvalds 已提交
5699

S
Stanislaw Gruszka 已提交
5700 5701
	for (i = 0; i < NUM_RX_DESC; i++) {
		void *data;
5702

E
Eric Dumazet 已提交
5703
		if (tp->Rx_databuff[i])
L
Linus Torvalds 已提交
5704
			continue;
5705

S
Stanislaw Gruszka 已提交
5706
		data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i);
E
Eric Dumazet 已提交
5707 5708
		if (!data) {
			rtl8169_make_unusable_by_asic(tp->RxDescArray + i);
S
Stanislaw Gruszka 已提交
5709
			goto err_out;
E
Eric Dumazet 已提交
5710 5711
		}
		tp->Rx_databuff[i] = data;
L
Linus Torvalds 已提交
5712 5713
	}

S
Stanislaw Gruszka 已提交
5714 5715 5716 5717 5718 5719
	rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
	return 0;

err_out:
	rtl8169_rx_clear(tp);
	return -ENOMEM;
L
Linus Torvalds 已提交
5720 5721 5722 5723 5724 5725 5726 5727 5728
}

static int rtl8169_init_ring(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_init_ring_indexes(tp);

	memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
E
Eric Dumazet 已提交
5729
	memset(tp->Rx_databuff, 0x0, NUM_RX_DESC * sizeof(void *));
L
Linus Torvalds 已提交
5730

S
Stanislaw Gruszka 已提交
5731
	return rtl8169_rx_fill(tp);
L
Linus Torvalds 已提交
5732 5733
}

5734
static void rtl8169_unmap_tx_skb(struct device *d, struct ring_info *tx_skb,
L
Linus Torvalds 已提交
5735 5736 5737 5738
				 struct TxDesc *desc)
{
	unsigned int len = tx_skb->len;

5739 5740
	dma_unmap_single(d, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE);

L
Linus Torvalds 已提交
5741 5742 5743 5744 5745 5746
	desc->opts1 = 0x00;
	desc->opts2 = 0x00;
	desc->addr = 0x00;
	tx_skb->len = 0;
}

5747 5748
static void rtl8169_tx_clear_range(struct rtl8169_private *tp, u32 start,
				   unsigned int n)
L
Linus Torvalds 已提交
5749 5750 5751
{
	unsigned int i;

5752 5753
	for (i = 0; i < n; i++) {
		unsigned int entry = (start + i) % NUM_TX_DESC;
L
Linus Torvalds 已提交
5754 5755 5756 5757 5758 5759
		struct ring_info *tx_skb = tp->tx_skb + entry;
		unsigned int len = tx_skb->len;

		if (len) {
			struct sk_buff *skb = tx_skb->skb;

5760
			rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
L
Linus Torvalds 已提交
5761 5762
					     tp->TxDescArray + entry);
			if (skb) {
5763
				tp->dev->stats.tx_dropped++;
L
Linus Torvalds 已提交
5764 5765 5766 5767 5768
				dev_kfree_skb(skb);
				tx_skb->skb = NULL;
			}
		}
	}
5769 5770 5771 5772 5773
}

static void rtl8169_tx_clear(struct rtl8169_private *tp)
{
	rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC);
L
Linus Torvalds 已提交
5774 5775 5776
	tp->cur_tx = tp->dirty_tx = 0;
}

5777
static void rtl_reset_work(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
5778
{
D
David Howells 已提交
5779
	struct net_device *dev = tp->dev;
5780
	int i;
L
Linus Torvalds 已提交
5781

5782 5783 5784
	napi_disable(&tp->napi);
	netif_stop_queue(dev);
	synchronize_sched();
L
Linus Torvalds 已提交
5785

5786 5787
	rtl8169_hw_reset(tp);

5788 5789 5790
	for (i = 0; i < NUM_RX_DESC; i++)
		rtl8169_mark_to_asic(tp->RxDescArray + i, rx_buf_sz);

L
Linus Torvalds 已提交
5791
	rtl8169_tx_clear(tp);
5792
	rtl8169_init_ring_indexes(tp);
L
Linus Torvalds 已提交
5793

5794
	napi_enable(&tp->napi);
5795 5796 5797
	rtl_hw_start(dev);
	netif_wake_queue(dev);
	rtl8169_check_link_status(dev, tp, tp->mmio_addr);
L
Linus Torvalds 已提交
5798 5799 5800 5801
}

static void rtl8169_tx_timeout(struct net_device *dev)
{
5802 5803 5804
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
L
Linus Torvalds 已提交
5805 5806 5807
}

static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
F
Francois Romieu 已提交
5808
			      u32 *opts)
L
Linus Torvalds 已提交
5809 5810 5811
{
	struct skb_shared_info *info = skb_shinfo(skb);
	unsigned int cur_frag, entry;
5812
	struct TxDesc * uninitialized_var(txd);
5813
	struct device *d = &tp->pci_dev->dev;
L
Linus Torvalds 已提交
5814 5815 5816

	entry = tp->cur_tx;
	for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
E
Eric Dumazet 已提交
5817
		const skb_frag_t *frag = info->frags + cur_frag;
L
Linus Torvalds 已提交
5818 5819 5820 5821 5822 5823 5824
		dma_addr_t mapping;
		u32 status, len;
		void *addr;

		entry = (entry + 1) % NUM_TX_DESC;

		txd = tp->TxDescArray + entry;
E
Eric Dumazet 已提交
5825
		len = skb_frag_size(frag);
5826
		addr = skb_frag_address(frag);
5827
		mapping = dma_map_single(d, addr, len, DMA_TO_DEVICE);
5828 5829 5830 5831
		if (unlikely(dma_mapping_error(d, mapping))) {
			if (net_ratelimit())
				netif_err(tp, drv, tp->dev,
					  "Failed to map TX fragments DMA!\n");
5832
			goto err_out;
5833
		}
L
Linus Torvalds 已提交
5834

F
Francois Romieu 已提交
5835
		/* Anti gcc 2.95.3 bugware (sic) */
F
Francois Romieu 已提交
5836 5837
		status = opts[0] | len |
			(RingEnd * !((entry + 1) % NUM_TX_DESC));
L
Linus Torvalds 已提交
5838 5839

		txd->opts1 = cpu_to_le32(status);
F
Francois Romieu 已提交
5840
		txd->opts2 = cpu_to_le32(opts[1]);
L
Linus Torvalds 已提交
5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851
		txd->addr = cpu_to_le64(mapping);

		tp->tx_skb[entry].len = len;
	}

	if (cur_frag) {
		tp->tx_skb[entry].skb = skb;
		txd->opts1 |= cpu_to_le32(LastFrag);
	}

	return cur_frag;
5852 5853 5854 5855

err_out:
	rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag);
	return -EIO;
L
Linus Torvalds 已提交
5856 5857
}

F
Francois Romieu 已提交
5858 5859
static inline void rtl8169_tso_csum(struct rtl8169_private *tp,
				    struct sk_buff *skb, u32 *opts)
L
Linus Torvalds 已提交
5860
{
F
Francois Romieu 已提交
5861
	const struct rtl_tx_desc_info *info = tx_desc_info + tp->txd_version;
5862
	u32 mss = skb_shinfo(skb)->gso_size;
F
Francois Romieu 已提交
5863
	int offset = info->opts_offset;
5864

F
Francois Romieu 已提交
5865 5866 5867 5868
	if (mss) {
		opts[0] |= TD_LSO;
		opts[offset] |= min(mss, TD_MSS_MAX) << info->mss_shift;
	} else if (skb->ip_summed == CHECKSUM_PARTIAL) {
5869
		const struct iphdr *ip = ip_hdr(skb);
L
Linus Torvalds 已提交
5870 5871

		if (ip->protocol == IPPROTO_TCP)
F
Francois Romieu 已提交
5872
			opts[offset] |= info->checksum.tcp;
L
Linus Torvalds 已提交
5873
		else if (ip->protocol == IPPROTO_UDP)
F
Francois Romieu 已提交
5874 5875 5876
			opts[offset] |= info->checksum.udp;
		else
			WARN_ON_ONCE(1);
L
Linus Torvalds 已提交
5877 5878 5879
	}
}

5880 5881
static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
				      struct net_device *dev)
L
Linus Torvalds 已提交
5882 5883
{
	struct rtl8169_private *tp = netdev_priv(dev);
5884
	unsigned int entry = tp->cur_tx % NUM_TX_DESC;
L
Linus Torvalds 已提交
5885 5886
	struct TxDesc *txd = tp->TxDescArray + entry;
	void __iomem *ioaddr = tp->mmio_addr;
5887
	struct device *d = &tp->pci_dev->dev;
L
Linus Torvalds 已提交
5888 5889
	dma_addr_t mapping;
	u32 status, len;
F
Francois Romieu 已提交
5890
	u32 opts[2];
5891
	int frags;
5892

5893
	if (unlikely(!TX_FRAGS_READY_FOR(tp, skb_shinfo(skb)->nr_frags))) {
5894
		netif_err(tp, drv, dev, "BUG! Tx Ring full when queue awake!\n");
5895
		goto err_stop_0;
L
Linus Torvalds 已提交
5896 5897 5898
	}

	if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
5899 5900 5901
		goto err_stop_0;

	len = skb_headlen(skb);
5902
	mapping = dma_map_single(d, skb->data, len, DMA_TO_DEVICE);
5903 5904 5905
	if (unlikely(dma_mapping_error(d, mapping))) {
		if (net_ratelimit())
			netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
5906
		goto err_dma_0;
5907
	}
5908 5909 5910

	tp->tx_skb[entry].len = len;
	txd->addr = cpu_to_le64(mapping);
L
Linus Torvalds 已提交
5911

5912
	opts[1] = cpu_to_le32(rtl8169_tx_vlan_tag(skb));
F
Francois Romieu 已提交
5913
	opts[0] = DescOwn;
L
Linus Torvalds 已提交
5914

F
Francois Romieu 已提交
5915 5916 5917
	rtl8169_tso_csum(tp, skb, opts);

	frags = rtl8169_xmit_frags(tp, skb, opts);
5918 5919 5920
	if (frags < 0)
		goto err_dma_1;
	else if (frags)
F
Francois Romieu 已提交
5921
		opts[0] |= FirstFrag;
5922
	else {
F
Francois Romieu 已提交
5923
		opts[0] |= FirstFrag | LastFrag;
L
Linus Torvalds 已提交
5924 5925 5926
		tp->tx_skb[entry].skb = skb;
	}

F
Francois Romieu 已提交
5927 5928
	txd->opts2 = cpu_to_le32(opts[1]);

5929 5930
	skb_tx_timestamp(skb);

L
Linus Torvalds 已提交
5931 5932
	wmb();

F
Francois Romieu 已提交
5933
	/* Anti gcc 2.95.3 bugware (sic) */
F
Francois Romieu 已提交
5934
	status = opts[0] | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
L
Linus Torvalds 已提交
5935 5936 5937 5938
	txd->opts1 = cpu_to_le32(status);

	tp->cur_tx += frags + 1;

5939
	wmb();
L
Linus Torvalds 已提交
5940

F
Francois Romieu 已提交
5941
	RTL_W8(TxPoll, NPQ);
L
Linus Torvalds 已提交
5942

5943 5944
	mmiowb();

5945
	if (!TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) {
5946 5947 5948 5949
		/* Avoid wrongly optimistic queue wake-up: rtl_tx thread must
		 * not miss a ring update when it notices a stopped queue.
		 */
		smp_wmb();
L
Linus Torvalds 已提交
5950
		netif_stop_queue(dev);
5951 5952 5953 5954 5955 5956 5957
		/* Sync with rtl_tx:
		 * - publish queue status and cur_tx ring index (write barrier)
		 * - refresh dirty_tx ring index (read barrier).
		 * May the current thread have a pessimistic view of the ring
		 * status and forget to wake up queue, a racing rtl_tx thread
		 * can't.
		 */
F
Francois Romieu 已提交
5958
		smp_mb();
5959
		if (TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS))
L
Linus Torvalds 已提交
5960 5961 5962
			netif_wake_queue(dev);
	}

5963
	return NETDEV_TX_OK;
L
Linus Torvalds 已提交
5964

5965
err_dma_1:
5966
	rtl8169_unmap_tx_skb(d, tp->tx_skb + entry, txd);
5967 5968 5969 5970 5971 5972
err_dma_0:
	dev_kfree_skb(skb);
	dev->stats.tx_dropped++;
	return NETDEV_TX_OK;

err_stop_0:
L
Linus Torvalds 已提交
5973
	netif_stop_queue(dev);
5974
	dev->stats.tx_dropped++;
5975
	return NETDEV_TX_BUSY;
L
Linus Torvalds 已提交
5976 5977 5978 5979 5980 5981 5982 5983 5984 5985 5986
}

static void rtl8169_pcierr_interrupt(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct pci_dev *pdev = tp->pci_dev;
	u16 pci_status, pci_cmd;

	pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
	pci_read_config_word(pdev, PCI_STATUS, &pci_status);

5987 5988
	netif_err(tp, intr, dev, "PCI error (cmd = 0x%04x, status = 0x%04x)\n",
		  pci_cmd, pci_status);
L
Linus Torvalds 已提交
5989 5990 5991 5992

	/*
	 * The recovery sequence below admits a very elaborated explanation:
	 * - it seems to work;
5993 5994
	 * - I did not see what else could be done;
	 * - it makes iop3xx happy.
L
Linus Torvalds 已提交
5995 5996 5997
	 *
	 * Feel free to adjust to your needs.
	 */
5998
	if (pdev->broken_parity_status)
5999 6000 6001 6002 6003
		pci_cmd &= ~PCI_COMMAND_PARITY;
	else
		pci_cmd |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY;

	pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
L
Linus Torvalds 已提交
6004 6005 6006 6007 6008 6009 6010

	pci_write_config_word(pdev, PCI_STATUS,
		pci_status & (PCI_STATUS_DETECTED_PARITY |
		PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
		PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));

	/* The infamous DAC f*ckup only happens at boot time */
6011
	if ((tp->cp_cmd & PCIDAC) && !tp->cur_rx) {
F
françois romieu 已提交
6012 6013
		void __iomem *ioaddr = tp->mmio_addr;

6014
		netif_info(tp, intr, dev, "disabling PCI DAC\n");
L
Linus Torvalds 已提交
6015 6016 6017 6018 6019
		tp->cp_cmd &= ~PCIDAC;
		RTL_W16(CPlusCmd, tp->cp_cmd);
		dev->features &= ~NETIF_F_HIGHDMA;
	}

F
françois romieu 已提交
6020
	rtl8169_hw_reset(tp);
6021

6022
	rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
L
Linus Torvalds 已提交
6023 6024
}

6025
static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp)
L
Linus Torvalds 已提交
6026 6027 6028 6029 6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040 6041 6042
{
	unsigned int dirty_tx, tx_left;

	dirty_tx = tp->dirty_tx;
	smp_rmb();
	tx_left = tp->cur_tx - dirty_tx;

	while (tx_left > 0) {
		unsigned int entry = dirty_tx % NUM_TX_DESC;
		struct ring_info *tx_skb = tp->tx_skb + entry;
		u32 status;

		rmb();
		status = le32_to_cpu(tp->TxDescArray[entry].opts1);
		if (status & DescOwn)
			break;

6043 6044
		rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
				     tp->TxDescArray + entry);
L
Linus Torvalds 已提交
6045
		if (status & LastFrag) {
6046 6047 6048 6049 6050
			u64_stats_update_begin(&tp->tx_stats.syncp);
			tp->tx_stats.packets++;
			tp->tx_stats.bytes += tx_skb->skb->len;
			u64_stats_update_end(&tp->tx_stats.syncp);
			dev_kfree_skb(tx_skb->skb);
L
Linus Torvalds 已提交
6051 6052 6053 6054 6055 6056 6057 6058
			tx_skb->skb = NULL;
		}
		dirty_tx++;
		tx_left--;
	}

	if (tp->dirty_tx != dirty_tx) {
		tp->dirty_tx = dirty_tx;
6059 6060 6061 6062 6063 6064 6065
		/* Sync with rtl8169_start_xmit:
		 * - publish dirty_tx ring index (write barrier)
		 * - refresh cur_tx ring index and queue status (read barrier)
		 * May the current thread miss the stopped queue condition,
		 * a racing xmit thread can only have a right view of the
		 * ring status.
		 */
F
Francois Romieu 已提交
6066
		smp_mb();
L
Linus Torvalds 已提交
6067
		if (netif_queue_stopped(dev) &&
6068
		    TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) {
L
Linus Torvalds 已提交
6069 6070
			netif_wake_queue(dev);
		}
6071 6072 6073 6074 6075 6076
		/*
		 * 8168 hack: TxPoll requests are lost when the Tx packets are
		 * too close. Let's kick an extra TxPoll request when a burst
		 * of start_xmit activity is detected (if it is not detected,
		 * it is slow enough). -- FR
		 */
6077 6078 6079
		if (tp->cur_tx != dirty_tx) {
			void __iomem *ioaddr = tp->mmio_addr;

6080
			RTL_W8(TxPoll, NPQ);
6081
		}
L
Linus Torvalds 已提交
6082 6083 6084
	}
}

6085 6086 6087 6088 6089
static inline int rtl8169_fragmented_frame(u32 status)
{
	return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
}

E
Eric Dumazet 已提交
6090
static inline void rtl8169_rx_csum(struct sk_buff *skb, u32 opts1)
L
Linus Torvalds 已提交
6091 6092 6093 6094
{
	u32 status = opts1 & RxProtoMask;

	if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
S
Shan Wei 已提交
6095
	    ((status == RxProtoUDP) && !(opts1 & UDPFail)))
L
Linus Torvalds 已提交
6096 6097
		skb->ip_summed = CHECKSUM_UNNECESSARY;
	else
6098
		skb_checksum_none_assert(skb);
L
Linus Torvalds 已提交
6099 6100
}

E
Eric Dumazet 已提交
6101 6102 6103 6104
static struct sk_buff *rtl8169_try_rx_copy(void *data,
					   struct rtl8169_private *tp,
					   int pkt_size,
					   dma_addr_t addr)
L
Linus Torvalds 已提交
6105
{
S
Stephen Hemminger 已提交
6106
	struct sk_buff *skb;
6107
	struct device *d = &tp->pci_dev->dev;
S
Stephen Hemminger 已提交
6108

E
Eric Dumazet 已提交
6109
	data = rtl8169_align(data);
6110
	dma_sync_single_for_cpu(d, addr, pkt_size, DMA_FROM_DEVICE);
E
Eric Dumazet 已提交
6111 6112 6113 6114
	prefetch(data);
	skb = netdev_alloc_skb_ip_align(tp->dev, pkt_size);
	if (skb)
		memcpy(skb->data, data, pkt_size);
6115 6116
	dma_sync_single_for_device(d, addr, pkt_size, DMA_FROM_DEVICE);

E
Eric Dumazet 已提交
6117
	return skb;
L
Linus Torvalds 已提交
6118 6119
}

6120
static int rtl_rx(struct net_device *dev, struct rtl8169_private *tp, u32 budget)
L
Linus Torvalds 已提交
6121 6122
{
	unsigned int cur_rx, rx_left;
E
Eric Dumazet 已提交
6123
	unsigned int count;
L
Linus Torvalds 已提交
6124 6125 6126

	cur_rx = tp->cur_rx;

6127
	for (rx_left = min(budget, NUM_RX_DESC); rx_left > 0; rx_left--, cur_rx++) {
L
Linus Torvalds 已提交
6128
		unsigned int entry = cur_rx % NUM_RX_DESC;
6129
		struct RxDesc *desc = tp->RxDescArray + entry;
L
Linus Torvalds 已提交
6130 6131 6132
		u32 status;

		rmb();
6133
		status = le32_to_cpu(desc->opts1) & tp->opts1_mask;
L
Linus Torvalds 已提交
6134 6135 6136

		if (status & DescOwn)
			break;
R
Richard Dawe 已提交
6137
		if (unlikely(status & RxRES)) {
6138 6139
			netif_info(tp, rx_err, dev, "Rx ERROR. status = %08x\n",
				   status);
6140
			dev->stats.rx_errors++;
L
Linus Torvalds 已提交
6141
			if (status & (RxRWT | RxRUNT))
6142
				dev->stats.rx_length_errors++;
L
Linus Torvalds 已提交
6143
			if (status & RxCRC)
6144
				dev->stats.rx_crc_errors++;
6145
			if (status & RxFOVF) {
6146
				rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
6147
				dev->stats.rx_fifo_errors++;
6148
			}
B
Ben Greear 已提交
6149 6150 6151 6152
			if ((status & (RxRUNT | RxCRC)) &&
			    !(status & (RxRWT | RxFOVF)) &&
			    (dev->features & NETIF_F_RXALL))
				goto process_pkt;
L
Linus Torvalds 已提交
6153
		} else {
E
Eric Dumazet 已提交
6154
			struct sk_buff *skb;
B
Ben Greear 已提交
6155 6156 6157 6158 6159
			dma_addr_t addr;
			int pkt_size;

process_pkt:
			addr = le64_to_cpu(desc->addr);
B
Ben Greear 已提交
6160 6161 6162 6163
			if (likely(!(dev->features & NETIF_F_RXFCS)))
				pkt_size = (status & 0x00003fff) - 4;
			else
				pkt_size = status & 0x00003fff;
L
Linus Torvalds 已提交
6164

6165 6166 6167 6168 6169 6170
			/*
			 * The driver does not support incoming fragmented
			 * frames. They are seen as a symptom of over-mtu
			 * sized frames.
			 */
			if (unlikely(rtl8169_fragmented_frame(status))) {
6171 6172
				dev->stats.rx_dropped++;
				dev->stats.rx_length_errors++;
6173
				goto release_descriptor;
6174 6175
			}

E
Eric Dumazet 已提交
6176 6177 6178 6179
			skb = rtl8169_try_rx_copy(tp->Rx_databuff[entry],
						  tp, pkt_size, addr);
			if (!skb) {
				dev->stats.rx_dropped++;
6180
				goto release_descriptor;
L
Linus Torvalds 已提交
6181 6182
			}

E
Eric Dumazet 已提交
6183
			rtl8169_rx_csum(skb, status);
L
Linus Torvalds 已提交
6184 6185 6186
			skb_put(skb, pkt_size);
			skb->protocol = eth_type_trans(skb, dev);

6187 6188
			rtl8169_rx_vlan_tag(desc, skb);

6189
			napi_gro_receive(&tp->napi, skb);
L
Linus Torvalds 已提交
6190

J
Junchang Wang 已提交
6191 6192 6193 6194
			u64_stats_update_begin(&tp->rx_stats.syncp);
			tp->rx_stats.packets++;
			tp->rx_stats.bytes += pkt_size;
			u64_stats_update_end(&tp->rx_stats.syncp);
L
Linus Torvalds 已提交
6195
		}
6196 6197 6198 6199
release_descriptor:
		desc->opts2 = 0;
		wmb();
		rtl8169_mark_to_asic(desc, rx_buf_sz);
L
Linus Torvalds 已提交
6200 6201 6202 6203 6204 6205 6206 6207
	}

	count = cur_rx - tp->cur_rx;
	tp->cur_rx = cur_rx;

	return count;
}

F
Francois Romieu 已提交
6208
static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
L
Linus Torvalds 已提交
6209
{
F
Francois Romieu 已提交
6210
	struct net_device *dev = dev_instance;
L
Linus Torvalds 已提交
6211 6212
	struct rtl8169_private *tp = netdev_priv(dev);
	int handled = 0;
F
Francois Romieu 已提交
6213
	u16 status;
L
Linus Torvalds 已提交
6214

F
Francois Romieu 已提交
6215
	status = rtl_get_events(tp);
6216 6217 6218 6219
	if (status && status != 0xffff) {
		status &= RTL_EVENT_NAPI | tp->event_slow;
		if (status) {
			handled = 1;
L
Linus Torvalds 已提交
6220

6221 6222
			rtl_irq_disable(tp);
			napi_schedule(&tp->napi);
6223
		}
6224 6225 6226
	}
	return IRQ_RETVAL(handled);
}
L
Linus Torvalds 已提交
6227

6228 6229 6230 6231 6232 6233 6234 6235 6236 6237
/*
 * Workqueue context.
 */
static void rtl_slow_event_work(struct rtl8169_private *tp)
{
	struct net_device *dev = tp->dev;
	u16 status;

	status = rtl_get_events(tp) & tp->event_slow;
	rtl_ack_events(tp, status);
L
Linus Torvalds 已提交
6238

6239 6240 6241 6242 6243
	if (unlikely(status & RxFIFOOver)) {
		switch (tp->mac_version) {
		/* Work around for rx fifo overflow */
		case RTL_GIGA_MAC_VER_11:
			netif_stop_queue(dev);
6244 6245
			/* XXX - Hack alert. See rtl_task(). */
			set_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags);
6246
		default:
6247 6248
			break;
		}
6249
	}
L
Linus Torvalds 已提交
6250

6251 6252
	if (unlikely(status & SYSErr))
		rtl8169_pcierr_interrupt(dev);
6253

6254 6255
	if (status & LinkChg)
		__rtl8169_check_link_status(dev, tp, tp->mmio_addr, true);
L
Linus Torvalds 已提交
6256

6257
	rtl_irq_enable_all(tp);
L
Linus Torvalds 已提交
6258 6259
}

6260 6261
static void rtl_task(struct work_struct *work)
{
6262 6263 6264 6265
	static const struct {
		int bitnr;
		void (*action)(struct rtl8169_private *);
	} rtl_work[] = {
6266
		/* XXX - keep rtl_slow_event_work() as first element. */
6267 6268 6269 6270
		{ RTL_FLAG_TASK_SLOW_PENDING,	rtl_slow_event_work },
		{ RTL_FLAG_TASK_RESET_PENDING,	rtl_reset_work },
		{ RTL_FLAG_TASK_PHY_PENDING,	rtl_phy_work }
	};
6271 6272
	struct rtl8169_private *tp =
		container_of(work, struct rtl8169_private, wk.work);
6273 6274 6275 6276 6277
	struct net_device *dev = tp->dev;
	int i;

	rtl_lock_work(tp);

6278 6279
	if (!netif_running(dev) ||
	    !test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
6280 6281 6282 6283 6284 6285 6286 6287 6288
		goto out_unlock;

	for (i = 0; i < ARRAY_SIZE(rtl_work); i++) {
		bool pending;

		pending = test_and_clear_bit(rtl_work[i].bitnr, tp->wk.flags);
		if (pending)
			rtl_work[i].action(tp);
	}
6289

6290 6291
out_unlock:
	rtl_unlock_work(tp);
6292 6293
}

6294
static int rtl8169_poll(struct napi_struct *napi, int budget)
L
Linus Torvalds 已提交
6295
{
6296 6297
	struct rtl8169_private *tp = container_of(napi, struct rtl8169_private, napi);
	struct net_device *dev = tp->dev;
6298 6299 6300 6301 6302 6303 6304 6305 6306 6307 6308 6309
	u16 enable_mask = RTL_EVENT_NAPI | tp->event_slow;
	int work_done= 0;
	u16 status;

	status = rtl_get_events(tp);
	rtl_ack_events(tp, status & ~tp->event_slow);

	if (status & RTL_EVENT_NAPI_RX)
		work_done = rtl_rx(dev, tp, (u32) budget);

	if (status & RTL_EVENT_NAPI_TX)
		rtl_tx(dev, tp);
L
Linus Torvalds 已提交
6310

6311 6312 6313 6314 6315
	if (status & tp->event_slow) {
		enable_mask &= ~tp->event_slow;

		rtl_schedule_task(tp, RTL_FLAG_TASK_SLOW_PENDING);
	}
L
Linus Torvalds 已提交
6316

6317
	if (work_done < budget) {
6318
		napi_complete(napi);
6319

6320 6321
		rtl_irq_enable(tp, enable_mask);
		mmiowb();
L
Linus Torvalds 已提交
6322 6323
	}

6324
	return work_done;
L
Linus Torvalds 已提交
6325 6326
}

6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337
static void rtl8169_rx_missed(struct net_device *dev, void __iomem *ioaddr)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	if (tp->mac_version > RTL_GIGA_MAC_VER_06)
		return;

	dev->stats.rx_missed_errors += (RTL_R32(RxMissed) & 0xffffff);
	RTL_W32(RxMissed, 0);
}

L
Linus Torvalds 已提交
6338 6339 6340 6341 6342
static void rtl8169_down(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;

6343
	del_timer_sync(&tp->timer);
L
Linus Torvalds 已提交
6344

6345
	napi_disable(&tp->napi);
6346
	netif_stop_queue(dev);
L
Linus Torvalds 已提交
6347

6348
	rtl8169_hw_reset(tp);
S
Stanislaw Gruszka 已提交
6349 6350
	/*
	 * At this point device interrupts can not be enabled in any function,
6351 6352
	 * as netif_running is not true (rtl8169_interrupt, rtl8169_reset_task)
	 * and napi is disabled (rtl8169_poll).
S
Stanislaw Gruszka 已提交
6353
	 */
6354
	rtl8169_rx_missed(dev, ioaddr);
L
Linus Torvalds 已提交
6355 6356

	/* Give a racing hard_start_xmit a few cycles to complete. */
6357
	synchronize_sched();
L
Linus Torvalds 已提交
6358 6359 6360 6361

	rtl8169_tx_clear(tp);

	rtl8169_rx_clear(tp);
F
françois romieu 已提交
6362 6363

	rtl_pll_power_down(tp);
L
Linus Torvalds 已提交
6364 6365 6366 6367 6368 6369 6370
}

static int rtl8169_close(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct pci_dev *pdev = tp->pci_dev;

6371 6372
	pm_runtime_get_sync(&pdev->dev);

F
Francois Romieu 已提交
6373
	/* Update counters before going down */
6374 6375
	rtl8169_update_counters(dev);

6376
	rtl_lock_work(tp);
6377
	clear_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
6378

L
Linus Torvalds 已提交
6379
	rtl8169_down(dev);
6380
	rtl_unlock_work(tp);
L
Linus Torvalds 已提交
6381

6382
	free_irq(pdev->irq, dev);
L
Linus Torvalds 已提交
6383

6384 6385 6386 6387
	dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
			  tp->RxPhyAddr);
	dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray,
			  tp->TxPhyAddr);
L
Linus Torvalds 已提交
6388 6389 6390
	tp->TxDescArray = NULL;
	tp->RxDescArray = NULL;

6391 6392
	pm_runtime_put_sync(&pdev->dev);

L
Linus Torvalds 已提交
6393 6394 6395
	return 0;
}

6396 6397 6398 6399 6400 6401 6402 6403 6404
#ifdef CONFIG_NET_POLL_CONTROLLER
static void rtl8169_netpoll(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_interrupt(tp->pci_dev->irq, dev);
}
#endif

6405 6406 6407 6408 6409 6410 6411 6412 6413 6414
static int rtl_open(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
	int retval = -ENOMEM;

	pm_runtime_get_sync(&pdev->dev);

	/*
6415
	 * Rx and Tx descriptors needs 256 bytes alignment.
6416 6417 6418 6419 6420 6421 6422 6423 6424 6425 6426 6427 6428 6429 6430 6431 6432 6433 6434 6435 6436 6437
	 * dma_alloc_coherent provides more.
	 */
	tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES,
					     &tp->TxPhyAddr, GFP_KERNEL);
	if (!tp->TxDescArray)
		goto err_pm_runtime_put;

	tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES,
					     &tp->RxPhyAddr, GFP_KERNEL);
	if (!tp->RxDescArray)
		goto err_free_tx_0;

	retval = rtl8169_init_ring(dev);
	if (retval < 0)
		goto err_free_rx_1;

	INIT_WORK(&tp->wk.work, rtl_task);

	smp_mb();

	rtl_request_firmware(tp);

6438
	retval = request_irq(pdev->irq, rtl8169_interrupt,
6439 6440 6441 6442 6443 6444 6445 6446 6447 6448 6449 6450 6451 6452 6453 6454 6455 6456 6457 6458 6459 6460 6461 6462 6463 6464 6465 6466 6467 6468 6469 6470 6471 6472 6473 6474 6475 6476 6477 6478 6479 6480 6481 6482 6483 6484
			     (tp->features & RTL_FEATURE_MSI) ? 0 : IRQF_SHARED,
			     dev->name, dev);
	if (retval < 0)
		goto err_release_fw_2;

	rtl_lock_work(tp);

	set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);

	napi_enable(&tp->napi);

	rtl8169_init_phy(dev, tp);

	__rtl8169_set_features(dev, dev->features);

	rtl_pll_power_up(tp);

	rtl_hw_start(dev);

	netif_start_queue(dev);

	rtl_unlock_work(tp);

	tp->saved_wolopts = 0;
	pm_runtime_put_noidle(&pdev->dev);

	rtl8169_check_link_status(dev, tp, ioaddr);
out:
	return retval;

err_release_fw_2:
	rtl_release_firmware(tp);
	rtl8169_rx_clear(tp);
err_free_rx_1:
	dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
			  tp->RxPhyAddr);
	tp->RxDescArray = NULL;
err_free_tx_0:
	dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray,
			  tp->TxPhyAddr);
	tp->TxDescArray = NULL;
err_pm_runtime_put:
	pm_runtime_put_noidle(&pdev->dev);
	goto out;
}

J
Junchang Wang 已提交
6485 6486
static struct rtnl_link_stats64 *
rtl8169_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
L
Linus Torvalds 已提交
6487 6488 6489
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
J
Junchang Wang 已提交
6490
	unsigned int start;
L
Linus Torvalds 已提交
6491

6492
	if (netif_running(dev))
6493
		rtl8169_rx_missed(dev, ioaddr);
6494

J
Junchang Wang 已提交
6495 6496 6497 6498 6499 6500 6501 6502 6503 6504 6505 6506 6507 6508 6509 6510 6511 6512 6513 6514 6515 6516
	do {
		start = u64_stats_fetch_begin_bh(&tp->rx_stats.syncp);
		stats->rx_packets = tp->rx_stats.packets;
		stats->rx_bytes	= tp->rx_stats.bytes;
	} while (u64_stats_fetch_retry_bh(&tp->rx_stats.syncp, start));


	do {
		start = u64_stats_fetch_begin_bh(&tp->tx_stats.syncp);
		stats->tx_packets = tp->tx_stats.packets;
		stats->tx_bytes	= tp->tx_stats.bytes;
	} while (u64_stats_fetch_retry_bh(&tp->tx_stats.syncp, start));

	stats->rx_dropped	= dev->stats.rx_dropped;
	stats->tx_dropped	= dev->stats.tx_dropped;
	stats->rx_length_errors = dev->stats.rx_length_errors;
	stats->rx_errors	= dev->stats.rx_errors;
	stats->rx_crc_errors	= dev->stats.rx_crc_errors;
	stats->rx_fifo_errors	= dev->stats.rx_fifo_errors;
	stats->rx_missed_errors = dev->stats.rx_missed_errors;

	return stats;
L
Linus Torvalds 已提交
6517 6518
}

6519
static void rtl8169_net_suspend(struct net_device *dev)
6520
{
F
françois romieu 已提交
6521 6522
	struct rtl8169_private *tp = netdev_priv(dev);

6523
	if (!netif_running(dev))
6524
		return;
6525 6526 6527

	netif_device_detach(dev);
	netif_stop_queue(dev);
6528 6529 6530

	rtl_lock_work(tp);
	napi_disable(&tp->napi);
6531
	clear_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
6532 6533 6534
	rtl_unlock_work(tp);

	rtl_pll_power_down(tp);
6535 6536 6537 6538 6539 6540 6541 6542
}

#ifdef CONFIG_PM

static int rtl8169_suspend(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
6543

6544
	rtl8169_net_suspend(dev);
6545

6546 6547 6548
	return 0;
}

6549 6550
static void __rtl8169_resume(struct net_device *dev)
{
F
françois romieu 已提交
6551 6552
	struct rtl8169_private *tp = netdev_priv(dev);

6553
	netif_device_attach(dev);
F
françois romieu 已提交
6554 6555 6556

	rtl_pll_power_up(tp);

A
Artem Savkov 已提交
6557 6558
	rtl_lock_work(tp);
	napi_enable(&tp->napi);
6559
	set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
A
Artem Savkov 已提交
6560
	rtl_unlock_work(tp);
6561

6562
	rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
6563 6564
}

6565
static int rtl8169_resume(struct device *device)
6566
{
6567
	struct pci_dev *pdev = to_pci_dev(device);
6568
	struct net_device *dev = pci_get_drvdata(pdev);
S
Stanislaw Gruszka 已提交
6569 6570 6571
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_init_phy(dev, tp);
6572

6573 6574
	if (netif_running(dev))
		__rtl8169_resume(dev);
6575

6576 6577 6578 6579 6580 6581 6582 6583 6584 6585 6586 6587
	return 0;
}

static int rtl8169_runtime_suspend(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

	if (!tp->TxDescArray)
		return 0;

6588
	rtl_lock_work(tp);
6589 6590
	tp->saved_wolopts = __rtl8169_get_wol(tp);
	__rtl8169_set_wol(tp, WAKE_ANY);
6591
	rtl_unlock_work(tp);
6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606

	rtl8169_net_suspend(dev);

	return 0;
}

static int rtl8169_runtime_resume(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

	if (!tp->TxDescArray)
		return 0;

6607
	rtl_lock_work(tp);
6608 6609
	__rtl8169_set_wol(tp, tp->saved_wolopts);
	tp->saved_wolopts = 0;
6610
	rtl_unlock_work(tp);
6611

S
Stanislaw Gruszka 已提交
6612 6613
	rtl8169_init_phy(dev, tp);

6614
	__rtl8169_resume(dev);
6615 6616 6617 6618

	return 0;
}

6619 6620 6621 6622 6623 6624
static int rtl8169_runtime_idle(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

6625
	return tp->TxDescArray ? -EBUSY : 0;
6626 6627
}

6628
static const struct dev_pm_ops rtl8169_pm_ops = {
F
Francois Romieu 已提交
6629 6630 6631 6632 6633 6634 6635 6636 6637
	.suspend		= rtl8169_suspend,
	.resume			= rtl8169_resume,
	.freeze			= rtl8169_suspend,
	.thaw			= rtl8169_resume,
	.poweroff		= rtl8169_suspend,
	.restore		= rtl8169_resume,
	.runtime_suspend	= rtl8169_runtime_suspend,
	.runtime_resume		= rtl8169_runtime_resume,
	.runtime_idle		= rtl8169_runtime_idle,
6638 6639 6640 6641 6642 6643 6644 6645 6646 6647
};

#define RTL8169_PM_OPS	(&rtl8169_pm_ops)

#else /* !CONFIG_PM */

#define RTL8169_PM_OPS	NULL

#endif /* !CONFIG_PM */

6648 6649 6650 6651 6652 6653 6654 6655 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667
static void rtl_wol_shutdown_quirk(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	/* WoL fails with 8168b when the receiver is disabled. */
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
		pci_clear_master(tp->pci_dev);

		RTL_W8(ChipCmd, CmdRxEnb);
		/* PCI commit */
		RTL_R8(ChipCmd);
		break;
	default:
		break;
	}
}

F
Francois Romieu 已提交
6668 6669
static void rtl_shutdown(struct pci_dev *pdev)
{
6670
	struct net_device *dev = pci_get_drvdata(pdev);
6671
	struct rtl8169_private *tp = netdev_priv(dev);
6672 6673 6674
	struct device *d = &pdev->dev;

	pm_runtime_get_sync(d);
6675 6676

	rtl8169_net_suspend(dev);
F
Francois Romieu 已提交
6677

F
Francois Romieu 已提交
6678
	/* Restore original MAC address */
6679 6680
	rtl_rar_set(tp, dev->perm_addr);

6681
	rtl8169_hw_reset(tp);
6682

6683
	if (system_state == SYSTEM_POWER_OFF) {
6684 6685 6686
		if (__rtl8169_get_wol(tp) & WAKE_ANY) {
			rtl_wol_suspend_quirk(tp);
			rtl_wol_shutdown_quirk(tp);
6687 6688
		}

6689 6690 6691
		pci_wake_from_d3(pdev, true);
		pci_set_power_state(pdev, PCI_D3hot);
	}
6692 6693

	pm_runtime_put_noidle(d);
6694
}
6695

B
Bill Pemberton 已提交
6696
static void rtl_remove_one(struct pci_dev *pdev)
6697 6698 6699 6700 6701 6702 6703 6704 6705 6706 6707 6708
{
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
		rtl8168_driver_stop(tp);
	}

	cancel_work_sync(&tp->wk.work);

6709 6710
	netif_napi_del(&tp->napi);

6711 6712 6713 6714 6715 6716 6717 6718 6719 6720 6721 6722 6723 6724 6725
	unregister_netdev(dev);

	rtl_release_firmware(tp);

	if (pci_dev_run_wake(pdev))
		pm_runtime_get_noresume(&pdev->dev);

	/* restore original MAC address */
	rtl_rar_set(tp, dev->perm_addr);

	rtl_disable_msi(pdev, tp);
	rtl8169_release_board(pdev, dev, tp->mmio_addr);
	pci_set_drvdata(pdev, NULL);
}

6726
static const struct net_device_ops rtl_netdev_ops = {
6727
	.ndo_open		= rtl_open,
6728 6729 6730 6731 6732 6733 6734 6735 6736 6737 6738 6739 6740 6741 6742 6743 6744
	.ndo_stop		= rtl8169_close,
	.ndo_get_stats64	= rtl8169_get_stats64,
	.ndo_start_xmit		= rtl8169_start_xmit,
	.ndo_tx_timeout		= rtl8169_tx_timeout,
	.ndo_validate_addr	= eth_validate_addr,
	.ndo_change_mtu		= rtl8169_change_mtu,
	.ndo_fix_features	= rtl8169_fix_features,
	.ndo_set_features	= rtl8169_set_features,
	.ndo_set_mac_address	= rtl_set_mac_address,
	.ndo_do_ioctl		= rtl8169_ioctl,
	.ndo_set_rx_mode	= rtl_set_rx_mode,
#ifdef CONFIG_NET_POLL_CONTROLLER
	.ndo_poll_controller	= rtl8169_netpoll,
#endif

};

6745 6746 6747 6748 6749 6750 6751 6752 6753 6754 6755 6756 6757 6758 6759 6760 6761 6762 6763 6764 6765 6766 6767 6768 6769 6770 6771 6772 6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786 6787 6788 6789 6790 6791 6792 6793 6794 6795 6796 6797 6798 6799 6800 6801
static const struct rtl_cfg_info {
	void (*hw_start)(struct net_device *);
	unsigned int region;
	unsigned int align;
	u16 event_slow;
	unsigned features;
	u8 default_ver;
} rtl_cfg_infos [] = {
	[RTL_CFG_0] = {
		.hw_start	= rtl_hw_start_8169,
		.region		= 1,
		.align		= 0,
		.event_slow	= SYSErr | LinkChg | RxOverflow | RxFIFOOver,
		.features	= RTL_FEATURE_GMII,
		.default_ver	= RTL_GIGA_MAC_VER_01,
	},
	[RTL_CFG_1] = {
		.hw_start	= rtl_hw_start_8168,
		.region		= 2,
		.align		= 8,
		.event_slow	= SYSErr | LinkChg | RxOverflow,
		.features	= RTL_FEATURE_GMII | RTL_FEATURE_MSI,
		.default_ver	= RTL_GIGA_MAC_VER_11,
	},
	[RTL_CFG_2] = {
		.hw_start	= rtl_hw_start_8101,
		.region		= 2,
		.align		= 8,
		.event_slow	= SYSErr | LinkChg | RxOverflow | RxFIFOOver |
				  PCSTimeout,
		.features	= RTL_FEATURE_MSI,
		.default_ver	= RTL_GIGA_MAC_VER_13,
	}
};

/* Cfg9346_Unlock assumed. */
static unsigned rtl_try_msi(struct rtl8169_private *tp,
			    const struct rtl_cfg_info *cfg)
{
	void __iomem *ioaddr = tp->mmio_addr;
	unsigned msi = 0;
	u8 cfg2;

	cfg2 = RTL_R8(Config2) & ~MSIEnable;
	if (cfg->features & RTL_FEATURE_MSI) {
		if (pci_enable_msi(tp->pci_dev)) {
			netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n");
		} else {
			cfg2 |= MSIEnable;
			msi = RTL_FEATURE_MSI;
		}
	}
	if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
		RTL_W8(Config2, cfg2);
	return msi;
}

H
Hayes Wang 已提交
6802 6803 6804 6805 6806 6807 6808 6809 6810 6811 6812 6813 6814 6815
DECLARE_RTL_COND(rtl_link_list_ready_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R8(MCU) & LINK_LIST_RDY;
}

DECLARE_RTL_COND(rtl_rxtx_empty_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return (RTL_R8(MCU) & RXTX_EMPTY) == RXTX_EMPTY;
}

B
Bill Pemberton 已提交
6816
static void rtl_hw_init_8168g(struct rtl8169_private *tp)
H
Hayes Wang 已提交
6817 6818 6819 6820 6821 6822 6823 6824 6825 6826 6827 6828 6829 6830 6831 6832 6833 6834
{
	void __iomem *ioaddr = tp->mmio_addr;
	u32 data;

	tp->ocp_base = OCP_STD_PHY_BASE;

	RTL_W32(MISC, RTL_R32(MISC) | RXDV_GATED_EN);

	if (!rtl_udelay_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 42))
		return;

	if (!rtl_udelay_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42))
		return;

	RTL_W8(ChipCmd, RTL_R8(ChipCmd) & ~(CmdTxEnb | CmdRxEnb));
	msleep(1);
	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);

6835
	data = r8168_mac_ocp_read(tp, 0xe8de);
H
Hayes Wang 已提交
6836 6837 6838 6839 6840 6841
	data &= ~(1 << 14);
	r8168_mac_ocp_write(tp, 0xe8de, data);

	if (!rtl_udelay_loop_wait_high(tp, &rtl_link_list_ready_cond, 100, 42))
		return;

6842
	data = r8168_mac_ocp_read(tp, 0xe8de);
H
Hayes Wang 已提交
6843 6844 6845 6846 6847 6848 6849
	data |= (1 << 15);
	r8168_mac_ocp_write(tp, 0xe8de, data);

	if (!rtl_udelay_loop_wait_high(tp, &rtl_link_list_ready_cond, 100, 42))
		return;
}

B
Bill Pemberton 已提交
6850
static void rtl_hw_initialize(struct rtl8169_private *tp)
H
Hayes Wang 已提交
6851 6852 6853 6854
{
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
H
hayeswang 已提交
6855
	case RTL_GIGA_MAC_VER_42:
H
hayeswang 已提交
6856
	case RTL_GIGA_MAC_VER_43:
H
Hayes Wang 已提交
6857 6858 6859 6860 6861 6862 6863 6864
		rtl_hw_init_8168g(tp);
		break;

	default:
		break;
	}
}

B
Bill Pemberton 已提交
6865
static int
6866 6867 6868 6869 6870 6871 6872 6873 6874 6875 6876 6877 6878 6879 6880 6881 6882 6883 6884 6885 6886 6887 6888
rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
	const unsigned int region = cfg->region;
	struct rtl8169_private *tp;
	struct mii_if_info *mii;
	struct net_device *dev;
	void __iomem *ioaddr;
	int chipset, i;
	int rc;

	if (netif_msg_drv(&debug)) {
		printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
		       MODULENAME, RTL8169_VERSION);
	}

	dev = alloc_etherdev(sizeof (*tp));
	if (!dev) {
		rc = -ENOMEM;
		goto out;
	}

	SET_NETDEV_DEV(dev, &pdev->dev);
6889
	dev->netdev_ops = &rtl_netdev_ops;
6890 6891 6892 6893 6894 6895 6896 6897 6898 6899 6900 6901 6902 6903 6904 6905 6906 6907 6908 6909 6910 6911 6912 6913 6914 6915 6916 6917 6918 6919 6920 6921 6922 6923 6924 6925 6926 6927 6928 6929 6930 6931 6932 6933 6934 6935 6936 6937 6938 6939 6940 6941 6942 6943 6944 6945 6946 6947 6948 6949 6950 6951 6952 6953 6954 6955 6956 6957 6958 6959 6960 6961 6962 6963 6964 6965 6966 6967 6968 6969 6970 6971 6972 6973
	tp = netdev_priv(dev);
	tp->dev = dev;
	tp->pci_dev = pdev;
	tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);

	mii = &tp->mii;
	mii->dev = dev;
	mii->mdio_read = rtl_mdio_read;
	mii->mdio_write = rtl_mdio_write;
	mii->phy_id_mask = 0x1f;
	mii->reg_num_mask = 0x1f;
	mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII);

	/* disable ASPM completely as that cause random device stop working
	 * problems as well as full system hangs for some PCIe devices users */
	pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
				     PCIE_LINK_STATE_CLKPM);

	/* enable device (incl. PCI PM wakeup and hotplug setup) */
	rc = pci_enable_device(pdev);
	if (rc < 0) {
		netif_err(tp, probe, dev, "enable failure\n");
		goto err_out_free_dev_1;
	}

	if (pci_set_mwi(pdev) < 0)
		netif_info(tp, probe, dev, "Mem-Wr-Inval unavailable\n");

	/* make sure PCI base addr 1 is MMIO */
	if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
		netif_err(tp, probe, dev,
			  "region #%d not an MMIO resource, aborting\n",
			  region);
		rc = -ENODEV;
		goto err_out_mwi_2;
	}

	/* check for weird/broken PCI region reporting */
	if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
		netif_err(tp, probe, dev,
			  "Invalid PCI region size(s), aborting\n");
		rc = -ENODEV;
		goto err_out_mwi_2;
	}

	rc = pci_request_regions(pdev, MODULENAME);
	if (rc < 0) {
		netif_err(tp, probe, dev, "could not request regions\n");
		goto err_out_mwi_2;
	}

	tp->cp_cmd = RxChkSum;

	if ((sizeof(dma_addr_t) > 4) &&
	    !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) {
		tp->cp_cmd |= PCIDAC;
		dev->features |= NETIF_F_HIGHDMA;
	} else {
		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
		if (rc < 0) {
			netif_err(tp, probe, dev, "DMA configuration failed\n");
			goto err_out_free_res_3;
		}
	}

	/* ioremap MMIO region */
	ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
	if (!ioaddr) {
		netif_err(tp, probe, dev, "cannot remap MMIO, aborting\n");
		rc = -EIO;
		goto err_out_free_res_3;
	}
	tp->mmio_addr = ioaddr;

	if (!pci_is_pcie(pdev))
		netif_info(tp, probe, dev, "not PCI Express\n");

	/* Identify chip attached to board */
	rtl8169_get_mac_version(tp, dev, cfg->default_ver);

	rtl_init_rxcfg(tp);

	rtl_irq_disable(tp);

H
Hayes Wang 已提交
6974 6975
	rtl_hw_initialize(tp);

6976 6977 6978 6979 6980 6981 6982 6983 6984 6985 6986 6987 6988 6989 6990 6991
	rtl_hw_reset(tp);

	rtl_ack_events(tp, 0xffff);

	pci_set_master(pdev);

	/*
	 * Pretend we are using VLANs; This bypasses a nasty bug where
	 * Interrupts stop flowing on high load on 8110SCd controllers.
	 */
	if (tp->mac_version == RTL_GIGA_MAC_VER_05)
		tp->cp_cmd |= RxVlan;

	rtl_init_mdio_ops(tp);
	rtl_init_pll_power_ops(tp);
	rtl_init_jumbo_ops(tp);
6992
	rtl_init_csi_ops(tp);
6993 6994 6995 6996 6997 6998 6999 7000 7001 7002 7003 7004 7005 7006 7007 7008 7009 7010 7011 7012 7013 7014 7015 7016 7017 7018 7019 7020 7021 7022 7023 7024 7025 7026 7027 7028 7029 7030 7031 7032 7033 7034 7035 7036 7037 7038 7039 7040 7041 7042 7043 7044 7045 7046 7047 7048 7049 7050 7051 7052 7053 7054 7055 7056 7057 7058 7059 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070

	rtl8169_print_mac_version(tp);

	chipset = tp->mac_version;
	tp->txd_version = rtl_chip_infos[chipset].txd_version;

	RTL_W8(Cfg9346, Cfg9346_Unlock);
	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
	RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
	if ((RTL_R8(Config3) & (LinkUp | MagicPacket)) != 0)
		tp->features |= RTL_FEATURE_WOL;
	if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
		tp->features |= RTL_FEATURE_WOL;
	tp->features |= rtl_try_msi(tp, cfg);
	RTL_W8(Cfg9346, Cfg9346_Lock);

	if (rtl_tbi_enabled(tp)) {
		tp->set_speed = rtl8169_set_speed_tbi;
		tp->get_settings = rtl8169_gset_tbi;
		tp->phy_reset_enable = rtl8169_tbi_reset_enable;
		tp->phy_reset_pending = rtl8169_tbi_reset_pending;
		tp->link_ok = rtl8169_tbi_link_ok;
		tp->do_ioctl = rtl_tbi_ioctl;
	} else {
		tp->set_speed = rtl8169_set_speed_xmii;
		tp->get_settings = rtl8169_gset_xmii;
		tp->phy_reset_enable = rtl8169_xmii_reset_enable;
		tp->phy_reset_pending = rtl8169_xmii_reset_pending;
		tp->link_ok = rtl8169_xmii_link_ok;
		tp->do_ioctl = rtl_xmii_ioctl;
	}

	mutex_init(&tp->wk.mutex);

	/* Get MAC address */
	for (i = 0; i < ETH_ALEN; i++)
		dev->dev_addr[i] = RTL_R8(MAC0 + i);

	SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
	dev->watchdog_timeo = RTL8169_TX_TIMEOUT;

	netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT);

	/* don't enable SG, IP_CSUM and TSO by default - it might not work
	 * properly for all devices */
	dev->features |= NETIF_F_RXCSUM |
		NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;

	dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
		NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
	dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
		NETIF_F_HIGHDMA;

	if (tp->mac_version == RTL_GIGA_MAC_VER_05)
		/* 8110SCd requires hardware Rx VLAN - disallow toggling */
		dev->hw_features &= ~NETIF_F_HW_VLAN_RX;

	dev->hw_features |= NETIF_F_RXALL;
	dev->hw_features |= NETIF_F_RXFCS;

	tp->hw_start = cfg->hw_start;
	tp->event_slow = cfg->event_slow;

	tp->opts1_mask = (tp->mac_version != RTL_GIGA_MAC_VER_01) ?
		~(RxBOVF | RxFOVF) : ~0;

	init_timer(&tp->timer);
	tp->timer.data = (unsigned long) dev;
	tp->timer.function = rtl8169_phy_timer;

	tp->rtl_fw = RTL_FIRMWARE_UNKNOWN;

	rc = register_netdev(dev);
	if (rc < 0)
		goto err_out_msi_4;

	pci_set_drvdata(pdev, dev);

7071 7072 7073
	netif_info(tp, probe, dev, "%s at 0x%p, %pM, XID %08x IRQ %d\n",
		   rtl_chip_infos[chipset].name, ioaddr, dev->dev_addr,
		   (u32)(RTL_R32(TxConfig) & 0x9cf0f8ff), pdev->irq);
7074 7075 7076 7077 7078 7079 7080 7081 7082 7083 7084 7085 7086 7087 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097
	if (rtl_chip_infos[chipset].jumbo_max != JUMBO_1K) {
		netif_info(tp, probe, dev, "jumbo features [frames: %d bytes, "
			   "tx checksumming: %s]\n",
			   rtl_chip_infos[chipset].jumbo_max,
			   rtl_chip_infos[chipset].jumbo_tx_csum ? "ok" : "ko");
	}

	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
		rtl8168_driver_start(tp);
	}

	device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL);

	if (pci_dev_run_wake(pdev))
		pm_runtime_put_noidle(&pdev->dev);

	netif_carrier_off(dev);

out:
	return rc;

err_out_msi_4:
7098
	netif_napi_del(&tp->napi);
7099 7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110
	rtl_disable_msi(pdev, tp);
	iounmap(ioaddr);
err_out_free_res_3:
	pci_release_regions(pdev);
err_out_mwi_2:
	pci_clear_mwi(pdev);
	pci_disable_device(pdev);
err_out_free_dev_1:
	free_netdev(dev);
	goto out;
}

L
Linus Torvalds 已提交
7111 7112 7113
static struct pci_driver rtl8169_pci_driver = {
	.name		= MODULENAME,
	.id_table	= rtl8169_pci_tbl,
7114
	.probe		= rtl_init_one,
B
Bill Pemberton 已提交
7115
	.remove		= rtl_remove_one,
F
Francois Romieu 已提交
7116
	.shutdown	= rtl_shutdown,
7117
	.driver.pm	= RTL8169_PM_OPS,
L
Linus Torvalds 已提交
7118 7119
};

7120
module_pci_driver(rtl8169_pci_driver);