r8169.c 167.7 KB
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/*
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 * r8169.c: RealTek 8169/8168/8101 ethernet driver.
 *
 * Copyright (c) 2002 ShuChen <shuchen@realtek.com.tw>
 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
 * Copyright (c) a lot of people too. Please respect their work.
 *
 * See MAINTAINERS file for support contact information.
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 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
#include <linux/ethtool.h>
#include <linux/mii.h>
#include <linux/if_vlan.h>
#include <linux/crc32.h>
#include <linux/in.h>
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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#include <linux/firmware.h>
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#include <linux/pci-aspm.h>
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#include <linux/prefetch.h>
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#include <asm/io.h>
#include <asm/irq.h>

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#define RTL8169_VERSION "2.3LK-NAPI"
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#define MODULENAME "r8169"
#define PFX MODULENAME ": "

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#define FIRMWARE_8168D_1	"rtl_nic/rtl8168d-1.fw"
#define FIRMWARE_8168D_2	"rtl_nic/rtl8168d-2.fw"
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#define FIRMWARE_8168E_1	"rtl_nic/rtl8168e-1.fw"
#define FIRMWARE_8168E_2	"rtl_nic/rtl8168e-2.fw"
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#define FIRMWARE_8168E_3	"rtl_nic/rtl8168e-3.fw"
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#define FIRMWARE_8168F_1	"rtl_nic/rtl8168f-1.fw"
#define FIRMWARE_8168F_2	"rtl_nic/rtl8168f-2.fw"
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#define FIRMWARE_8105E_1	"rtl_nic/rtl8105e-1.fw"
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#define FIRMWARE_8402_1		"rtl_nic/rtl8402-1.fw"
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#define FIRMWARE_8411_1		"rtl_nic/rtl8411-1.fw"
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#define FIRMWARE_8106E_1	"rtl_nic/rtl8106e-1.fw"
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#define FIRMWARE_8168G_1	"rtl_nic/rtl8168g-1.fw"
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#ifdef RTL8169_DEBUG
#define assert(expr) \
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	if (!(expr)) {					\
		printk( "Assertion failed! %s,%s,%s,line=%d\n",	\
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		#expr,__FILE__,__func__,__LINE__);		\
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	}
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#define dprintk(fmt, args...) \
	do { printk(KERN_DEBUG PFX fmt, ## args); } while (0)
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#else
#define assert(expr) do {} while (0)
#define dprintk(fmt, args...)	do {} while (0)
#endif /* RTL8169_DEBUG */

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#define R8169_MSG_DEFAULT \
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	(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
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#define TX_SLOTS_AVAIL(tp) \
	(tp->dirty_tx + NUM_TX_DESC - tp->cur_tx)

/* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */
#define TX_FRAGS_READY_FOR(tp,nr_frags) \
	(TX_SLOTS_AVAIL(tp) >= (nr_frags + 1))
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/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
   The RTL chips use a 64 element hash table based on the Ethernet CRC. */
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static const int multicast_filter_limit = 32;
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#define MAX_READ_REQUEST_SHIFT	12
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#define TX_DMA_BURST	7	/* Maximum PCI burst, '7' is unlimited */
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#define SafeMtu		0x1c20	/* ... actually life sucks beyond ~7k */
#define InterFrameGap	0x03	/* 3 means InterFrameGap = the shortest one */

#define R8169_REGS_SIZE		256
#define R8169_NAPI_WEIGHT	64
#define NUM_TX_DESC	64	/* Number of Tx descriptor registers */
#define NUM_RX_DESC	256	/* Number of Rx descriptor registers */
#define RX_BUF_SIZE	1536	/* Rx Buffer size */
#define R8169_TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))
#define R8169_RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))

#define RTL8169_TX_TIMEOUT	(6*HZ)
#define RTL8169_PHY_TIMEOUT	(10*HZ)

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#define RTL_EEPROM_SIG		cpu_to_le32(0x8129)
#define RTL_EEPROM_SIG_MASK	cpu_to_le32(0xffff)
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#define RTL_EEPROM_SIG_ADDR	0x0000

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/* write/read MMIO register */
#define RTL_W8(reg, val8)	writeb ((val8), ioaddr + (reg))
#define RTL_W16(reg, val16)	writew ((val16), ioaddr + (reg))
#define RTL_W32(reg, val32)	writel ((val32), ioaddr + (reg))
#define RTL_R8(reg)		readb (ioaddr + (reg))
#define RTL_R16(reg)		readw (ioaddr + (reg))
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#define RTL_R32(reg)		readl (ioaddr + (reg))
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enum mac_version {
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	RTL_GIGA_MAC_VER_01 = 0,
	RTL_GIGA_MAC_VER_02,
	RTL_GIGA_MAC_VER_03,
	RTL_GIGA_MAC_VER_04,
	RTL_GIGA_MAC_VER_05,
	RTL_GIGA_MAC_VER_06,
	RTL_GIGA_MAC_VER_07,
	RTL_GIGA_MAC_VER_08,
	RTL_GIGA_MAC_VER_09,
	RTL_GIGA_MAC_VER_10,
	RTL_GIGA_MAC_VER_11,
	RTL_GIGA_MAC_VER_12,
	RTL_GIGA_MAC_VER_13,
	RTL_GIGA_MAC_VER_14,
	RTL_GIGA_MAC_VER_15,
	RTL_GIGA_MAC_VER_16,
	RTL_GIGA_MAC_VER_17,
	RTL_GIGA_MAC_VER_18,
	RTL_GIGA_MAC_VER_19,
	RTL_GIGA_MAC_VER_20,
	RTL_GIGA_MAC_VER_21,
	RTL_GIGA_MAC_VER_22,
	RTL_GIGA_MAC_VER_23,
	RTL_GIGA_MAC_VER_24,
	RTL_GIGA_MAC_VER_25,
	RTL_GIGA_MAC_VER_26,
	RTL_GIGA_MAC_VER_27,
	RTL_GIGA_MAC_VER_28,
	RTL_GIGA_MAC_VER_29,
	RTL_GIGA_MAC_VER_30,
	RTL_GIGA_MAC_VER_31,
	RTL_GIGA_MAC_VER_32,
	RTL_GIGA_MAC_VER_33,
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	RTL_GIGA_MAC_VER_34,
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	RTL_GIGA_MAC_VER_35,
	RTL_GIGA_MAC_VER_36,
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	RTL_GIGA_MAC_VER_37,
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	RTL_GIGA_MAC_VER_38,
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	RTL_GIGA_MAC_VER_39,
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	RTL_GIGA_MAC_VER_40,
	RTL_GIGA_MAC_VER_41,
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	RTL_GIGA_MAC_NONE   = 0xff,
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};

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enum rtl_tx_desc_version {
	RTL_TD_0	= 0,
	RTL_TD_1	= 1,
};

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#define JUMBO_1K	ETH_DATA_LEN
#define JUMBO_4K	(4*1024 - ETH_HLEN - 2)
#define JUMBO_6K	(6*1024 - ETH_HLEN - 2)
#define JUMBO_7K	(7*1024 - ETH_HLEN - 2)
#define JUMBO_9K	(9*1024 - ETH_HLEN - 2)

#define _R(NAME,TD,FW,SZ,B) {	\
	.name = NAME,		\
	.txd_version = TD,	\
	.fw_name = FW,		\
	.jumbo_max = SZ,	\
	.jumbo_tx_csum = B	\
}
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static const struct {
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	const char *name;
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	enum rtl_tx_desc_version txd_version;
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	const char *fw_name;
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	u16 jumbo_max;
	bool jumbo_tx_csum;
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} rtl_chip_infos[] = {
	/* PCI devices. */
	[RTL_GIGA_MAC_VER_01] =
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		_R("RTL8169",		RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_02] =
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		_R("RTL8169s",		RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_03] =
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		_R("RTL8110s",		RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_04] =
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		_R("RTL8169sb/8110sb",	RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_05] =
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		_R("RTL8169sc/8110sc",	RTL_TD_0, NULL, JUMBO_7K, true),
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	[RTL_GIGA_MAC_VER_06] =
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		_R("RTL8169sc/8110sc",	RTL_TD_0, NULL, JUMBO_7K, true),
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	/* PCI-E devices. */
	[RTL_GIGA_MAC_VER_07] =
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		_R("RTL8102e",		RTL_TD_1, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_08] =
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		_R("RTL8102e",		RTL_TD_1, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_09] =
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		_R("RTL8102e",		RTL_TD_1, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_10] =
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		_R("RTL8101e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_11] =
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		_R("RTL8168b/8111b",	RTL_TD_0, NULL, JUMBO_4K, false),
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	[RTL_GIGA_MAC_VER_12] =
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		_R("RTL8168b/8111b",	RTL_TD_0, NULL, JUMBO_4K, false),
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	[RTL_GIGA_MAC_VER_13] =
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		_R("RTL8101e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_14] =
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		_R("RTL8100e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_15] =
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		_R("RTL8100e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_16] =
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		_R("RTL8101e",		RTL_TD_0, NULL, JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_17] =
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		_R("RTL8168b/8111b",	RTL_TD_1, NULL, JUMBO_4K, false),
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	[RTL_GIGA_MAC_VER_18] =
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		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_19] =
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		_R("RTL8168c/8111c",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_20] =
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		_R("RTL8168c/8111c",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_21] =
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		_R("RTL8168c/8111c",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_22] =
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		_R("RTL8168c/8111c",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_23] =
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		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_24] =
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		_R("RTL8168cp/8111cp",	RTL_TD_1, NULL, JUMBO_6K, false),
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	[RTL_GIGA_MAC_VER_25] =
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		_R("RTL8168d/8111d",	RTL_TD_1, FIRMWARE_8168D_1,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_26] =
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		_R("RTL8168d/8111d",	RTL_TD_1, FIRMWARE_8168D_2,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_27] =
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		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL, JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_28] =
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		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL, JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_29] =
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		_R("RTL8105e",		RTL_TD_1, FIRMWARE_8105E_1,
							JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_30] =
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		_R("RTL8105e",		RTL_TD_1, FIRMWARE_8105E_1,
							JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_31] =
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		_R("RTL8168dp/8111dp",	RTL_TD_1, NULL, JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_32] =
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		_R("RTL8168e/8111e",	RTL_TD_1, FIRMWARE_8168E_1,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_33] =
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		_R("RTL8168e/8111e",	RTL_TD_1, FIRMWARE_8168E_2,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_34] =
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		_R("RTL8168evl/8111evl",RTL_TD_1, FIRMWARE_8168E_3,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_35] =
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		_R("RTL8168f/8111f",	RTL_TD_1, FIRMWARE_8168F_1,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_36] =
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		_R("RTL8168f/8111f",	RTL_TD_1, FIRMWARE_8168F_2,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_37] =
		_R("RTL8402",		RTL_TD_1, FIRMWARE_8402_1,
							JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_38] =
		_R("RTL8411",		RTL_TD_1, FIRMWARE_8411_1,
							JUMBO_9K, false),
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	[RTL_GIGA_MAC_VER_39] =
		_R("RTL8106e",		RTL_TD_1, FIRMWARE_8106E_1,
							JUMBO_1K, true),
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	[RTL_GIGA_MAC_VER_40] =
		_R("RTL8168g/8111g",	RTL_TD_1, FIRMWARE_8168G_1,
							JUMBO_9K, false),
	[RTL_GIGA_MAC_VER_41] =
		_R("RTL8168g/8111g",	RTL_TD_1, NULL, JUMBO_9K, false),
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};
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#undef _R
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enum cfg_version {
	RTL_CFG_0 = 0x00,
	RTL_CFG_1,
	RTL_CFG_2
};

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static DEFINE_PCI_DEVICE_TABLE(rtl8169_pci_tbl) = {
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8129), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8136), 0, 0, RTL_CFG_2 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8167), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8168), 0, 0, RTL_CFG_1 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8169), 0, 0, RTL_CFG_0 },
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	{ PCI_VENDOR_ID_DLINK,			0x4300,
		PCI_VENDOR_ID_DLINK, 0x4b10,		 0, 0, RTL_CFG_1 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_DLINK,	0x4300), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_DLINK,	0x4302), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(PCI_VENDOR_ID_AT,		0xc107), 0, 0, RTL_CFG_0 },
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	{ PCI_DEVICE(0x16ec,			0x0116), 0, 0, RTL_CFG_0 },
	{ PCI_VENDOR_ID_LINKSYS,		0x1032,
		PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
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	{ 0x0001,				0x8168,
		PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 },
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	{0,},
};

MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);

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static int rx_buf_sz = 16383;
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static int use_dac;
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static struct {
	u32 msg_enable;
} debug = { -1 };
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enum rtl_registers {
	MAC0		= 0,	/* Ethernet hardware address. */
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	MAC4		= 4,
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	MAR0		= 8,	/* Multicast filter. */
	CounterAddrLow		= 0x10,
	CounterAddrHigh		= 0x14,
	TxDescStartAddrLow	= 0x20,
	TxDescStartAddrHigh	= 0x24,
	TxHDescStartAddrLow	= 0x28,
	TxHDescStartAddrHigh	= 0x2c,
	FLASH		= 0x30,
	ERSR		= 0x36,
	ChipCmd		= 0x37,
	TxPoll		= 0x38,
	IntrMask	= 0x3c,
	IntrStatus	= 0x3e,
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	TxConfig	= 0x40,
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#define	TXCFG_AUTO_FIFO			(1 << 7)	/* 8111e-vl */
#define	TXCFG_EMPTY			(1 << 11)	/* 8111e-vl */
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	RxConfig	= 0x44,
#define	RX128_INT_EN			(1 << 15)	/* 8111c and later */
#define	RX_MULTI_EN			(1 << 14)	/* 8111c only */
#define	RXCFG_FIFO_SHIFT		13
					/* No threshold before first PCI xfer */
#define	RX_FIFO_THRESH			(7 << RXCFG_FIFO_SHIFT)
#define	RXCFG_DMA_SHIFT			8
					/* Unlimited maximum PCI burst. */
#define	RX_DMA_BURST			(7 << RXCFG_DMA_SHIFT)
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	RxMissed	= 0x4c,
	Cfg9346		= 0x50,
	Config0		= 0x51,
	Config1		= 0x52,
	Config2		= 0x53,
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#define PME_SIGNAL			(1 << 5)	/* 8168c and later */

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	Config3		= 0x54,
	Config4		= 0x55,
	Config5		= 0x56,
	MultiIntr	= 0x5c,
	PHYAR		= 0x60,
	PHYstatus	= 0x6c,
	RxMaxSize	= 0xda,
	CPlusCmd	= 0xe0,
	IntrMitigate	= 0xe2,
	RxDescAddrLow	= 0xe4,
	RxDescAddrHigh	= 0xe8,
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	EarlyTxThres	= 0xec,	/* 8169. Unit of 32 bytes. */

#define NoEarlyTx	0x3f	/* Max value : no early transmit. */

	MaxTxPacketSize	= 0xec,	/* 8101/8168. Unit of 128 bytes. */

#define TxPacketMax	(8064 >> 7)
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#define EarlySize	0x27
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	FuncEvent	= 0xf0,
	FuncEventMask	= 0xf4,
	FuncPresetState	= 0xf8,
	FuncForceEvent	= 0xfc,
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};

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enum rtl8110_registers {
	TBICSR			= 0x64,
	TBI_ANAR		= 0x68,
	TBI_LPAR		= 0x6a,
};

enum rtl8168_8101_registers {
	CSIDR			= 0x64,
	CSIAR			= 0x68,
#define	CSIAR_FLAG			0x80000000
#define	CSIAR_WRITE_CMD			0x80000000
#define	CSIAR_BYTE_ENABLE		0x0f
#define	CSIAR_BYTE_ENABLE_SHIFT		12
#define	CSIAR_ADDR_MASK			0x0fff
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#define CSIAR_FUNC_CARD			0x00000000
#define CSIAR_FUNC_SDIO			0x00010000
#define CSIAR_FUNC_NIC			0x00020000
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	PMCH			= 0x6f,
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	EPHYAR			= 0x80,
#define	EPHYAR_FLAG			0x80000000
#define	EPHYAR_WRITE_CMD		0x80000000
#define	EPHYAR_REG_MASK			0x1f
#define	EPHYAR_REG_SHIFT		16
#define	EPHYAR_DATA_MASK		0xffff
399
	DLLPR			= 0xd0,
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#define	PFM_EN				(1 << 6)
401 402 403
	DBG_REG			= 0xd1,
#define	FIX_NAK_1			(1 << 4)
#define	FIX_NAK_2			(1 << 3)
404 405
	TWSI			= 0xd2,
	MCU			= 0xd3,
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#define	NOW_IS_OOB			(1 << 7)
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#define	TX_EMPTY			(1 << 5)
#define	RX_EMPTY			(1 << 4)
#define	RXTX_EMPTY			(TX_EMPTY | RX_EMPTY)
410 411
#define	EN_NDP				(1 << 3)
#define	EN_OOB_RESET			(1 << 2)
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#define	LINK_LIST_RDY			(1 << 1)
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	EFUSEAR			= 0xdc,
#define	EFUSEAR_FLAG			0x80000000
#define	EFUSEAR_WRITE_CMD		0x80000000
#define	EFUSEAR_READ_CMD		0x00000000
#define	EFUSEAR_REG_MASK		0x03ff
#define	EFUSEAR_REG_SHIFT		8
#define	EFUSEAR_DATA_MASK		0xff
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};

422
enum rtl8168_registers {
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	LED_FREQ		= 0x1a,
	EEE_LED			= 0x1b,
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	ERIDR			= 0x70,
	ERIAR			= 0x74,
#define ERIAR_FLAG			0x80000000
#define ERIAR_WRITE_CMD			0x80000000
#define ERIAR_READ_CMD			0x00000000
#define ERIAR_ADDR_BYTE_ALIGN		4
#define ERIAR_TYPE_SHIFT		16
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#define ERIAR_EXGMAC			(0x00 << ERIAR_TYPE_SHIFT)
#define ERIAR_MSIX			(0x01 << ERIAR_TYPE_SHIFT)
#define ERIAR_ASF			(0x02 << ERIAR_TYPE_SHIFT)
#define ERIAR_MASK_SHIFT		12
#define ERIAR_MASK_0001			(0x1 << ERIAR_MASK_SHIFT)
#define ERIAR_MASK_0011			(0x3 << ERIAR_MASK_SHIFT)
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#define ERIAR_MASK_0101			(0x5 << ERIAR_MASK_SHIFT)
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#define ERIAR_MASK_1111			(0xf << ERIAR_MASK_SHIFT)
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	EPHY_RXER_NUM		= 0x7c,
	OCPDR			= 0xb0,	/* OCP GPHY access */
#define OCPDR_WRITE_CMD			0x80000000
#define OCPDR_READ_CMD			0x00000000
#define OCPDR_REG_MASK			0x7f
#define OCPDR_GPHY_REG_SHIFT		16
#define OCPDR_DATA_MASK			0xffff
	OCPAR			= 0xb4,
#define OCPAR_FLAG			0x80000000
#define OCPAR_GPHY_WRITE_CMD		0x8000f060
#define OCPAR_GPHY_READ_CMD		0x0000f060
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	GPHY_OCP		= 0xb8,
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	RDSAR1			= 0xd0,	/* 8168c only. Undocumented on 8168dp */
	MISC			= 0xf0,	/* 8168e only. */
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#define TXPLA_RST			(1 << 29)
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#define DISABLE_LAN_EN			(1 << 23) /* Enable GPIO pin */
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#define PWM_EN				(1 << 22)
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#define RXDV_GATED_EN			(1 << 19)
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#define EARLY_TALLY_EN			(1 << 16)
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};

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enum rtl_register_content {
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	/* InterruptStatusBits */
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	SYSErr		= 0x8000,
	PCSTimeout	= 0x4000,
	SWInt		= 0x0100,
	TxDescUnavail	= 0x0080,
	RxFIFOOver	= 0x0040,
	LinkChg		= 0x0020,
	RxOverflow	= 0x0010,
	TxErr		= 0x0008,
	TxOK		= 0x0004,
	RxErr		= 0x0002,
	RxOK		= 0x0001,
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	/* RxStatusDesc */
476
	RxBOVF	= (1 << 24),
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	RxFOVF	= (1 << 23),
	RxRWT	= (1 << 22),
	RxRES	= (1 << 21),
	RxRUNT	= (1 << 20),
	RxCRC	= (1 << 19),
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	/* ChipCmdBits */
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	StopReq		= 0x80,
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	CmdReset	= 0x10,
	CmdRxEnb	= 0x08,
	CmdTxEnb	= 0x04,
	RxBufEmpty	= 0x01,
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	/* TXPoll register p.5 */
	HPQ		= 0x80,		/* Poll cmd on the high prio queue */
	NPQ		= 0x40,		/* Poll cmd on the low prio queue */
	FSWInt		= 0x01,		/* Forced software interrupt */

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	/* Cfg9346Bits */
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	Cfg9346_Lock	= 0x00,
	Cfg9346_Unlock	= 0xc0,
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	/* rx_mode_bits */
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	AcceptErr	= 0x20,
	AcceptRunt	= 0x10,
	AcceptBroadcast	= 0x08,
	AcceptMulticast	= 0x04,
	AcceptMyPhys	= 0x02,
	AcceptAllPhys	= 0x01,
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#define RX_CONFIG_ACCEPT_MASK		0x3f
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	/* TxConfigBits */
	TxInterFrameGapShift = 24,
	TxDMAShift = 8,	/* DMA burst value (0-7) is shift this many bits */

512
	/* Config1 register p.24 */
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	LEDS1		= (1 << 7),
	LEDS0		= (1 << 6),
	Speed_down	= (1 << 4),
	MEMMAP		= (1 << 3),
	IOMAP		= (1 << 2),
	VPD		= (1 << 1),
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	PMEnable	= (1 << 0),	/* Power Management Enable */

521
	/* Config2 register p. 25 */
522
	MSIEnable	= (1 << 5),	/* 8169 only. Reserved in the 8168. */
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	PCI_Clock_66MHz = 0x01,
	PCI_Clock_33MHz = 0x00,

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	/* Config3 register p.25 */
	MagicPacket	= (1 << 5),	/* Wake up when receives a Magic Packet */
	LinkUp		= (1 << 4),	/* Wake up when the cable connection is re-established */
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	Jumbo_En0	= (1 << 2),	/* 8168 only. Reserved in the 8168b */
530
	Beacon_en	= (1 << 0),	/* 8168 only. Reserved in the 8168b */
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	/* Config4 register */
	Jumbo_En1	= (1 << 1),	/* 8168 only. Reserved in the 8168b */

535
	/* Config5 register p.27 */
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	BWF		= (1 << 6),	/* Accept Broadcast wakeup frame */
	MWF		= (1 << 5),	/* Accept Multicast wakeup frame */
	UWF		= (1 << 4),	/* Accept Unicast wakeup frame */
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	Spi_en		= (1 << 3),
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	LanWake		= (1 << 1),	/* LanWake enable/disable */
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	PMEStatus	= (1 << 0),	/* PME status can be reset by PCI RST# */

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	/* TBICSR p.28 */
	TBIReset	= 0x80000000,
	TBILoopback	= 0x40000000,
	TBINwEnable	= 0x20000000,
	TBINwRestart	= 0x10000000,
	TBILinkOk	= 0x02000000,
	TBINwComplete	= 0x01000000,

	/* CPlusCmd p.31 */
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	EnableBist	= (1 << 15),	// 8168 8101
	Mac_dbgo_oe	= (1 << 14),	// 8168 8101
	Normal_mode	= (1 << 13),	// unused
	Force_half_dup	= (1 << 12),	// 8168 8101
	Force_rxflow_en	= (1 << 11),	// 8168 8101
	Force_txflow_en	= (1 << 10),	// 8168 8101
	Cxpl_dbg_sel	= (1 << 9),	// 8168 8101
	ASF		= (1 << 8),	// 8168 8101
	PktCntrDisable	= (1 << 7),	// 8168 8101
	Mac_dbgo_sel	= 0x001c,	// 8168
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	RxVlan		= (1 << 6),
	RxChkSum	= (1 << 5),
	PCIDAC		= (1 << 4),
	PCIMulRW	= (1 << 3),
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	INTT_0		= 0x0000,	// 8168
	INTT_1		= 0x0001,	// 8168
	INTT_2		= 0x0002,	// 8168
	INTT_3		= 0x0003,	// 8168
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	/* rtl8169_PHYstatus */
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	TBI_Enable	= 0x80,
	TxFlowCtrl	= 0x40,
	RxFlowCtrl	= 0x20,
	_1000bpsF	= 0x10,
	_100bps		= 0x08,
	_10bps		= 0x04,
	LinkStatus	= 0x02,
	FullDup		= 0x01,
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	/* _TBICSRBit */
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	TBILinkOK	= 0x02000000,
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	/* DumpCounterCommand */
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	CounterDump	= 0x8,
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};

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enum rtl_desc_bit {
	/* First doubleword. */
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	DescOwn		= (1 << 31), /* Descriptor is owned by NIC */
	RingEnd		= (1 << 30), /* End of descriptor ring */
	FirstFrag	= (1 << 29), /* First segment of a packet */
	LastFrag	= (1 << 28), /* Final segment of a packet */
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};

/* Generic case. */
enum rtl_tx_desc_bit {
	/* First doubleword. */
	TD_LSO		= (1 << 27),		/* Large Send Offload */
#define TD_MSS_MAX			0x07ffu	/* MSS value */
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	/* Second doubleword. */
	TxVlanTag	= (1 << 17),		/* Add VLAN tag */
};

/* 8169, 8168b and 810x except 8102e. */
enum rtl_tx_desc_bit_0 {
	/* First doubleword. */
#define TD0_MSS_SHIFT			16	/* MSS position (11 bits) */
	TD0_TCP_CS	= (1 << 16),		/* Calculate TCP/IP checksum */
	TD0_UDP_CS	= (1 << 17),		/* Calculate UDP/IP checksum */
	TD0_IP_CS	= (1 << 18),		/* Calculate IP checksum */
};

/* 8102e, 8168c and beyond. */
enum rtl_tx_desc_bit_1 {
	/* Second doubleword. */
#define TD1_MSS_SHIFT			18	/* MSS position (11 bits) */
	TD1_IP_CS	= (1 << 29),		/* Calculate IP checksum */
	TD1_TCP_CS	= (1 << 30),		/* Calculate TCP/IP checksum */
	TD1_UDP_CS	= (1 << 31),		/* Calculate UDP/IP checksum */
};
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static const struct rtl_tx_desc_info {
	struct {
		u32 udp;
		u32 tcp;
	} checksum;
	u16 mss_shift;
	u16 opts_offset;
} tx_desc_info [] = {
	[RTL_TD_0] = {
		.checksum = {
			.udp	= TD0_IP_CS | TD0_UDP_CS,
			.tcp	= TD0_IP_CS | TD0_TCP_CS
		},
		.mss_shift	= TD0_MSS_SHIFT,
		.opts_offset	= 0
	},
	[RTL_TD_1] = {
		.checksum = {
			.udp	= TD1_IP_CS | TD1_UDP_CS,
			.tcp	= TD1_IP_CS | TD1_TCP_CS
		},
		.mss_shift	= TD1_MSS_SHIFT,
		.opts_offset	= 1
	}
};

enum rtl_rx_desc_bit {
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	/* Rx private */
	PID1		= (1 << 18), /* Protocol ID bit 1/2 */
	PID0		= (1 << 17), /* Protocol ID bit 2/2 */

#define RxProtoUDP	(PID1)
#define RxProtoTCP	(PID0)
#define RxProtoIP	(PID1 | PID0)
#define RxProtoMask	RxProtoIP

	IPFail		= (1 << 16), /* IP checksum failed */
	UDPFail		= (1 << 15), /* UDP/IP checksum failed */
	TCPFail		= (1 << 14), /* TCP/IP checksum failed */
	RxVlanTag	= (1 << 16), /* VLAN tag available */
};

#define RsvdMask	0x3fffc000

struct TxDesc {
669 670 671
	__le32 opts1;
	__le32 opts2;
	__le64 addr;
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};

struct RxDesc {
675 676 677
	__le32 opts1;
	__le32 opts2;
	__le64 addr;
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};

struct ring_info {
	struct sk_buff	*skb;
	u32		len;
	u8		__pad[sizeof(void *) - sizeof(u32)];
};

686
enum features {
687 688 689
	RTL_FEATURE_WOL		= (1 << 0),
	RTL_FEATURE_MSI		= (1 << 1),
	RTL_FEATURE_GMII	= (1 << 2),
690 691
};

692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707
struct rtl8169_counters {
	__le64	tx_packets;
	__le64	rx_packets;
	__le64	tx_errors;
	__le32	rx_errors;
	__le16	rx_missed;
	__le16	align_errors;
	__le32	tx_one_collision;
	__le32	tx_multi_collision;
	__le64	rx_unicast;
	__le64	rx_broadcast;
	__le32	rx_multicast;
	__le16	tx_aborted;
	__le16	tx_underun;
};

708
enum rtl_flag {
709
	RTL_FLAG_TASK_ENABLED,
710 711 712 713 714 715
	RTL_FLAG_TASK_SLOW_PENDING,
	RTL_FLAG_TASK_RESET_PENDING,
	RTL_FLAG_TASK_PHY_PENDING,
	RTL_FLAG_MAX
};

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struct rtl8169_stats {
	u64			packets;
	u64			bytes;
	struct u64_stats_sync	syncp;
};

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struct rtl8169_private {
	void __iomem *mmio_addr;	/* memory map physical address */
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	struct pci_dev *pci_dev;
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	struct net_device *dev;
726
	struct napi_struct napi;
727
	u32 msg_enable;
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	u16 txd_version;
	u16 mac_version;
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	u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
	u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
	u32 dirty_rx;
	u32 dirty_tx;
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	struct rtl8169_stats rx_stats;
	struct rtl8169_stats tx_stats;
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	struct TxDesc *TxDescArray;	/* 256-aligned Tx descriptor ring */
	struct RxDesc *RxDescArray;	/* 256-aligned Rx descriptor ring */
	dma_addr_t TxPhyAddr;
	dma_addr_t RxPhyAddr;
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	void *Rx_databuff[NUM_RX_DESC];	/* Rx data buffers */
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	struct ring_info tx_skb[NUM_TX_DESC];	/* Tx data buffers */
	struct timer_list timer;
	u16 cp_cmd;
744 745

	u16 event_slow;
746 747

	struct mdio_ops {
748 749
		void (*write)(struct rtl8169_private *, int, int);
		int (*read)(struct rtl8169_private *, int);
750 751
	} mdio_ops;

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	struct pll_power_ops {
		void (*down)(struct rtl8169_private *);
		void (*up)(struct rtl8169_private *);
	} pll_power_ops;

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	struct jumbo_ops {
		void (*enable)(struct rtl8169_private *);
		void (*disable)(struct rtl8169_private *);
	} jumbo_ops;

762
	struct csi_ops {
763 764
		void (*write)(struct rtl8169_private *, int, int);
		u32 (*read)(struct rtl8169_private *, int);
765 766
	} csi_ops;

767
	int (*set_speed)(struct net_device *, u8 aneg, u16 sp, u8 dpx, u32 adv);
768
	int (*get_settings)(struct net_device *, struct ethtool_cmd *);
769
	void (*phy_reset_enable)(struct rtl8169_private *tp);
770
	void (*hw_start)(struct net_device *);
771
	unsigned int (*phy_reset_pending)(struct rtl8169_private *tp);
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	unsigned int (*link_ok)(void __iomem *);
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	int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd);
774 775

	struct {
776 777
		DECLARE_BITMAP(flags, RTL_FLAG_MAX);
		struct mutex mutex;
778 779 780
		struct work_struct work;
	} wk;

781
	unsigned features;
782 783

	struct mii_if_info mii;
784
	struct rtl8169_counters counters;
785
	u32 saved_wolopts;
786
	u32 opts1_mask;
787

788 789
	struct rtl_fw {
		const struct firmware *fw;
790 791 792 793 794 795 796 797 798

#define RTL_VER_SIZE		32

		char version[RTL_VER_SIZE];

		struct rtl_fw_phy_action {
			__le32 *code;
			size_t size;
		} phy_action;
799
	} *rtl_fw;
800
#define RTL_FIRMWARE_UNKNOWN	ERR_PTR(-EAGAIN)
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	u32 ocp_base;
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};

805
MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
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MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
module_param(use_dac, int, 0);
808
MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
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module_param_named(debug, debug.msg_enable, int, 0);
MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
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MODULE_LICENSE("GPL");
MODULE_VERSION(RTL8169_VERSION);
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MODULE_FIRMWARE(FIRMWARE_8168D_1);
MODULE_FIRMWARE(FIRMWARE_8168D_2);
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MODULE_FIRMWARE(FIRMWARE_8168E_1);
MODULE_FIRMWARE(FIRMWARE_8168E_2);
817
MODULE_FIRMWARE(FIRMWARE_8168E_3);
818
MODULE_FIRMWARE(FIRMWARE_8105E_1);
819 820
MODULE_FIRMWARE(FIRMWARE_8168F_1);
MODULE_FIRMWARE(FIRMWARE_8168F_2);
821
MODULE_FIRMWARE(FIRMWARE_8402_1);
822
MODULE_FIRMWARE(FIRMWARE_8411_1);
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MODULE_FIRMWARE(FIRMWARE_8106E_1);
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MODULE_FIRMWARE(FIRMWARE_8168G_1);
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static void rtl_lock_work(struct rtl8169_private *tp)
{
	mutex_lock(&tp->wk.mutex);
}

static void rtl_unlock_work(struct rtl8169_private *tp)
{
	mutex_unlock(&tp->wk.mutex);
}

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static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
{
838 839
	pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
					   PCI_EXP_DEVCTL_READRQ, force);
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}

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struct rtl_cond {
	bool (*check)(struct rtl8169_private *);
	const char *msg;
};

static void rtl_udelay(unsigned int d)
{
	udelay(d);
}

static bool rtl_loop_wait(struct rtl8169_private *tp, const struct rtl_cond *c,
			  void (*delay)(unsigned int), unsigned int d, int n,
			  bool high)
{
	int i;

	for (i = 0; i < n; i++) {
		delay(d);
		if (c->check(tp) == high)
			return true;
	}
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	netif_err(tp, drv, tp->dev, "%s == %d (loop: %d, delay: %d).\n",
		  c->msg, !high, n, d);
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	return false;
}

static bool rtl_udelay_loop_wait_high(struct rtl8169_private *tp,
				      const struct rtl_cond *c,
				      unsigned int d, int n)
{
	return rtl_loop_wait(tp, c, rtl_udelay, d, n, true);
}

static bool rtl_udelay_loop_wait_low(struct rtl8169_private *tp,
				     const struct rtl_cond *c,
				     unsigned int d, int n)
{
	return rtl_loop_wait(tp, c, rtl_udelay, d, n, false);
}

static bool rtl_msleep_loop_wait_high(struct rtl8169_private *tp,
				      const struct rtl_cond *c,
				      unsigned int d, int n)
{
	return rtl_loop_wait(tp, c, msleep, d, n, true);
}

static bool rtl_msleep_loop_wait_low(struct rtl8169_private *tp,
				     const struct rtl_cond *c,
				     unsigned int d, int n)
{
	return rtl_loop_wait(tp, c, msleep, d, n, false);
}

#define DECLARE_RTL_COND(name)				\
static bool name ## _check(struct rtl8169_private *);	\
							\
static const struct rtl_cond name = {			\
	.check	= name ## _check,			\
	.msg	= #name					\
};							\
							\
static bool name ## _check(struct rtl8169_private *tp)

DECLARE_RTL_COND(rtl_ocpar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(OCPAR) & OCPAR_FLAG;
}

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static u32 ocp_read(struct rtl8169_private *tp, u8 mask, u16 reg)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W32(OCPAR, ((u32)mask & 0x0f) << 12 | (reg & 0x0fff));
918 919 920

	return rtl_udelay_loop_wait_high(tp, &rtl_ocpar_cond, 100, 20) ?
		RTL_R32(OCPDR) : ~0;
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}

static void ocp_write(struct rtl8169_private *tp, u8 mask, u16 reg, u32 data)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W32(OCPDR, data);
	RTL_W32(OCPAR, OCPAR_FLAG | ((u32)mask & 0x0f) << 12 | (reg & 0x0fff));
929 930 931 932 933 934 935 936 937

	rtl_udelay_loop_wait_low(tp, &rtl_ocpar_cond, 100, 20);
}

DECLARE_RTL_COND(rtl_eriar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(ERIAR) & ERIAR_FLAG;
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}

940
static void rtl8168_oob_notify(struct rtl8169_private *tp, u8 cmd)
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{
942
	void __iomem *ioaddr = tp->mmio_addr;
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	RTL_W8(ERIDR, cmd);
	RTL_W32(ERIAR, 0x800010e8);
	msleep(2);
947 948 949

	if (!rtl_udelay_loop_wait_low(tp, &rtl_eriar_cond, 100, 5))
		return;
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	ocp_write(tp, 0x1, 0x30, 0x00000001);
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}

#define OOB_CMD_RESET		0x00
#define OOB_CMD_DRIVER_START	0x05
#define OOB_CMD_DRIVER_STOP	0x06

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static u16 rtl8168_get_ocp_reg(struct rtl8169_private *tp)
{
	return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10;
}

963
DECLARE_RTL_COND(rtl_ocp_read_cond)
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{
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	u16 reg;
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	reg = rtl8168_get_ocp_reg(tp);
968

969
	return ocp_read(tp, 0x0f, reg) & 0x00000800;
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}

972
static void rtl8168_driver_start(struct rtl8169_private *tp)
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{
974
	rtl8168_oob_notify(tp, OOB_CMD_DRIVER_START);
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976 977
	rtl_msleep_loop_wait_high(tp, &rtl_ocp_read_cond, 10, 10);
}
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static void rtl8168_driver_stop(struct rtl8169_private *tp)
{
	rtl8168_oob_notify(tp, OOB_CMD_DRIVER_STOP);
982

983
	rtl_msleep_loop_wait_low(tp, &rtl_ocp_read_cond, 10, 10);
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}

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static int r8168dp_check_dash(struct rtl8169_private *tp)
{
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	u16 reg = rtl8168_get_ocp_reg(tp);
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	return (ocp_read(tp, 0x0f, reg) & 0x00008000) ? 1 : 0;
991
}
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static bool rtl_ocp_reg_failure(struct rtl8169_private *tp, u32 reg)
{
	if (reg & 0xffff0001) {
		netif_err(tp, drv, tp->dev, "Invalid ocp reg %x!\n", reg);
		return true;
	}
	return false;
}

DECLARE_RTL_COND(rtl_ocp_gphy_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(GPHY_OCP) & OCPAR_FLAG;
}

static void r8168_phy_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data)
{
	void __iomem *ioaddr = tp->mmio_addr;

	if (rtl_ocp_reg_failure(tp, reg))
		return;

	RTL_W32(GPHY_OCP, OCPAR_FLAG | (reg << 15) | data);

	rtl_udelay_loop_wait_low(tp, &rtl_ocp_gphy_cond, 25, 10);
}

static u16 r8168_phy_ocp_read(struct rtl8169_private *tp, u32 reg)
{
	void __iomem *ioaddr = tp->mmio_addr;

	if (rtl_ocp_reg_failure(tp, reg))
		return 0;

	RTL_W32(GPHY_OCP, reg << 15);

	return rtl_udelay_loop_wait_high(tp, &rtl_ocp_gphy_cond, 25, 10) ?
		(RTL_R32(GPHY_OCP) & 0xffff) : ~0;
}

static void rtl_w1w0_phy_ocp(struct rtl8169_private *tp, int reg, int p, int m)
{
	int val;

	val = r8168_phy_ocp_read(tp, reg);
	r8168_phy_ocp_write(tp, reg, (val | p) & ~m);
}

static void r8168_mac_ocp_write(struct rtl8169_private *tp, u32 reg, u32 data)
{
	void __iomem *ioaddr = tp->mmio_addr;

	if (rtl_ocp_reg_failure(tp, reg))
		return;

	RTL_W32(OCPDR, OCPAR_FLAG | (reg << 15) | data);
}

static u16 r8168_mac_ocp_read(struct rtl8169_private *tp, u32 reg)
{
	void __iomem *ioaddr = tp->mmio_addr;

	if (rtl_ocp_reg_failure(tp, reg))
		return 0;

	RTL_W32(OCPDR, reg << 15);

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	return RTL_R32(OCPDR);
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}

#define OCP_STD_PHY_BASE	0xa400

static void r8168g_mdio_write(struct rtl8169_private *tp, int reg, int value)
{
	if (reg == 0x1f) {
		tp->ocp_base = value ? value << 4 : OCP_STD_PHY_BASE;
		return;
	}

	if (tp->ocp_base != OCP_STD_PHY_BASE)
		reg -= 0x10;

	r8168_phy_ocp_write(tp, tp->ocp_base + reg * 2, value);
}

static int r8168g_mdio_read(struct rtl8169_private *tp, int reg)
{
	if (tp->ocp_base != OCP_STD_PHY_BASE)
		reg -= 0x10;

	return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2);
}

1087 1088 1089 1090 1091 1092 1093
DECLARE_RTL_COND(rtl_phyar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(PHYAR) & 0x80000000;
}

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static void r8169_mdio_write(struct rtl8169_private *tp, int reg, int value)
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{
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	void __iomem *ioaddr = tp->mmio_addr;
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	RTL_W32(PHYAR, 0x80000000 | (reg & 0x1f) << 16 | (value & 0xffff));
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	rtl_udelay_loop_wait_low(tp, &rtl_phyar_cond, 25, 20);
1101
	/*
1102 1103
	 * According to hardware specs a 20us delay is required after write
	 * complete indication, but before sending next command.
1104
	 */
1105
	udelay(20);
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}

1108
static int r8169_mdio_read(struct rtl8169_private *tp, int reg)
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{
1110
	void __iomem *ioaddr = tp->mmio_addr;
1111
	int value;
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	RTL_W32(PHYAR, 0x0 | (reg & 0x1f) << 16);
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	value = rtl_udelay_loop_wait_high(tp, &rtl_phyar_cond, 25, 20) ?
		RTL_R32(PHYAR) & 0xffff : ~0;

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	/*
	 * According to hardware specs a 20us delay is required after read
	 * complete indication, but before sending next command.
	 */
	udelay(20);

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	return value;
}

1127
static void r8168dp_1_mdio_access(struct rtl8169_private *tp, int reg, u32 data)
1128
{
1129
	void __iomem *ioaddr = tp->mmio_addr;
1130

1131
	RTL_W32(OCPDR, data | ((reg & OCPDR_REG_MASK) << OCPDR_GPHY_REG_SHIFT));
1132 1133 1134
	RTL_W32(OCPAR, OCPAR_GPHY_WRITE_CMD);
	RTL_W32(EPHY_RXER_NUM, 0);

1135
	rtl_udelay_loop_wait_low(tp, &rtl_ocpar_cond, 1000, 100);
1136 1137
}

1138
static void r8168dp_1_mdio_write(struct rtl8169_private *tp, int reg, int value)
1139
{
1140 1141
	r8168dp_1_mdio_access(tp, reg,
			      OCPDR_WRITE_CMD | (value & OCPDR_DATA_MASK));
1142 1143
}

1144
static int r8168dp_1_mdio_read(struct rtl8169_private *tp, int reg)
1145
{
1146
	void __iomem *ioaddr = tp->mmio_addr;
1147

1148
	r8168dp_1_mdio_access(tp, reg, OCPDR_READ_CMD);
1149 1150 1151 1152 1153

	mdelay(1);
	RTL_W32(OCPAR, OCPAR_GPHY_READ_CMD);
	RTL_W32(EPHY_RXER_NUM, 0);

1154 1155
	return rtl_udelay_loop_wait_high(tp, &rtl_ocpar_cond, 1000, 100) ?
		RTL_R32(OCPDR) & OCPDR_DATA_MASK : ~0;
1156 1157
}

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#define R8168DP_1_MDIO_ACCESS_BIT	0x00020000

static void r8168dp_2_mdio_start(void __iomem *ioaddr)
{
	RTL_W32(0xd0, RTL_R32(0xd0) & ~R8168DP_1_MDIO_ACCESS_BIT);
}

static void r8168dp_2_mdio_stop(void __iomem *ioaddr)
{
	RTL_W32(0xd0, RTL_R32(0xd0) | R8168DP_1_MDIO_ACCESS_BIT);
}

1170
static void r8168dp_2_mdio_write(struct rtl8169_private *tp, int reg, int value)
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{
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	void __iomem *ioaddr = tp->mmio_addr;

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	r8168dp_2_mdio_start(ioaddr);

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	r8169_mdio_write(tp, reg, value);
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	r8168dp_2_mdio_stop(ioaddr);
}

1181
static int r8168dp_2_mdio_read(struct rtl8169_private *tp, int reg)
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{
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	void __iomem *ioaddr = tp->mmio_addr;
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	int value;

	r8168dp_2_mdio_start(ioaddr);

1188
	value = r8169_mdio_read(tp, reg);
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	r8168dp_2_mdio_stop(ioaddr);

	return value;
}

1195
static void rtl_writephy(struct rtl8169_private *tp, int location, u32 val)
1196
{
1197
	tp->mdio_ops.write(tp, location, val);
1198 1199
}

1200 1201
static int rtl_readphy(struct rtl8169_private *tp, int location)
{
1202
	return tp->mdio_ops.read(tp, location);
1203 1204 1205 1206 1207 1208 1209 1210
}

static void rtl_patchphy(struct rtl8169_private *tp, int reg_addr, int value)
{
	rtl_writephy(tp, reg_addr, rtl_readphy(tp, reg_addr) | value);
}

static void rtl_w1w0_phy(struct rtl8169_private *tp, int reg_addr, int p, int m)
1211 1212 1213
{
	int val;

1214 1215
	val = rtl_readphy(tp, reg_addr);
	rtl_writephy(tp, reg_addr, (val | p) & ~m);
1216 1217
}

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static void rtl_mdio_write(struct net_device *dev, int phy_id, int location,
			   int val)
{
	struct rtl8169_private *tp = netdev_priv(dev);

1223
	rtl_writephy(tp, location, val);
1224 1225 1226 1227 1228 1229
}

static int rtl_mdio_read(struct net_device *dev, int phy_id, int location)
{
	struct rtl8169_private *tp = netdev_priv(dev);

1230
	return rtl_readphy(tp, location);
1231 1232
}

1233 1234 1235 1236 1237 1238 1239
DECLARE_RTL_COND(rtl_ephyar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(EPHYAR) & EPHYAR_FLAG;
}

1240
static void rtl_ephy_write(struct rtl8169_private *tp, int reg_addr, int value)
1241
{
1242
	void __iomem *ioaddr = tp->mmio_addr;
1243 1244 1245 1246

	RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) |
		(reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);

1247 1248 1249
	rtl_udelay_loop_wait_low(tp, &rtl_ephyar_cond, 10, 100);

	udelay(10);
1250 1251
}

1252
static u16 rtl_ephy_read(struct rtl8169_private *tp, int reg_addr)
1253
{
1254
	void __iomem *ioaddr = tp->mmio_addr;
1255 1256 1257

	RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);

1258 1259
	return rtl_udelay_loop_wait_high(tp, &rtl_ephyar_cond, 10, 100) ?
		RTL_R32(EPHYAR) & EPHYAR_DATA_MASK : ~0;
1260 1261
}

1262 1263
static void rtl_eri_write(struct rtl8169_private *tp, int addr, u32 mask,
			  u32 val, int type)
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{
1265
	void __iomem *ioaddr = tp->mmio_addr;
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	BUG_ON((addr & 3) || (mask == 0));
	RTL_W32(ERIDR, val);
	RTL_W32(ERIAR, ERIAR_WRITE_CMD | type | mask | addr);

1271
	rtl_udelay_loop_wait_low(tp, &rtl_eriar_cond, 100, 100);
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}

1274
static u32 rtl_eri_read(struct rtl8169_private *tp, int addr, int type)
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{
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	void __iomem *ioaddr = tp->mmio_addr;
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	RTL_W32(ERIAR, ERIAR_READ_CMD | type | ERIAR_MASK_1111 | addr);

1280 1281
	return rtl_udelay_loop_wait_high(tp, &rtl_eriar_cond, 100, 100) ?
		RTL_R32(ERIDR) : ~0;
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}

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static void rtl_w1w0_eri(struct rtl8169_private *tp, int addr, u32 mask, u32 p,
			 u32 m, int type)
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{
	u32 val;

1289 1290
	val = rtl_eri_read(tp, addr, type);
	rtl_eri_write(tp, addr, mask, (val & ~m) | p, type);
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}

1293 1294 1295 1296 1297 1298
struct exgmac_reg {
	u16 addr;
	u16 mask;
	u32 val;
};

1299
static void rtl_write_exgmac_batch(struct rtl8169_private *tp,
1300 1301 1302
				   const struct exgmac_reg *r, int len)
{
	while (len-- > 0) {
1303
		rtl_eri_write(tp, r->addr, r->mask, r->val, ERIAR_EXGMAC);
1304 1305 1306 1307
		r++;
	}
}

1308 1309 1310 1311 1312 1313 1314
DECLARE_RTL_COND(rtl_efusear_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(EFUSEAR) & EFUSEAR_FLAG;
}

1315
static u8 rtl8168d_efuse_read(struct rtl8169_private *tp, int reg_addr)
1316
{
1317
	void __iomem *ioaddr = tp->mmio_addr;
1318 1319 1320

	RTL_W32(EFUSEAR, (reg_addr & EFUSEAR_REG_MASK) << EFUSEAR_REG_SHIFT);

1321 1322
	return rtl_udelay_loop_wait_high(tp, &rtl_efusear_cond, 100, 300) ?
		RTL_R32(EFUSEAR) & EFUSEAR_DATA_MASK : ~0;
1323 1324
}

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static u16 rtl_get_events(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R16(IntrStatus);
}

static void rtl_ack_events(struct rtl8169_private *tp, u16 bits)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W16(IntrStatus, bits);
	mmiowb();
}

static void rtl_irq_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W16(IntrMask, 0);
	mmiowb();
}

1348 1349 1350 1351 1352 1353 1354
static void rtl_irq_enable(struct rtl8169_private *tp, u16 bits)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W16(IntrMask, bits);
}

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#define RTL_EVENT_NAPI_RX	(RxOK | RxErr)
#define RTL_EVENT_NAPI_TX	(TxOK | TxErr)
#define RTL_EVENT_NAPI		(RTL_EVENT_NAPI_RX | RTL_EVENT_NAPI_TX)

static void rtl_irq_enable_all(struct rtl8169_private *tp)
{
	rtl_irq_enable(tp, RTL_EVENT_NAPI | tp->event_slow);
}

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static void rtl8169_irq_mask_and_ack(struct rtl8169_private *tp)
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{
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	void __iomem *ioaddr = tp->mmio_addr;
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	rtl_irq_disable(tp);
1369
	rtl_ack_events(tp, RTL_EVENT_NAPI | tp->event_slow);
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	RTL_R8(ChipCmd);
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}

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static unsigned int rtl8169_tbi_reset_pending(struct rtl8169_private *tp)
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{
1375 1376
	void __iomem *ioaddr = tp->mmio_addr;

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	return RTL_R32(TBICSR) & TBIReset;
}

1380
static unsigned int rtl8169_xmii_reset_pending(struct rtl8169_private *tp)
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{
1382
	return rtl_readphy(tp, MII_BMCR) & BMCR_RESET;
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1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394
}

static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
{
	return RTL_R32(TBICSR) & TBILinkOk;
}

static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
{
	return RTL_R8(PHYstatus) & LinkStatus;
}

1395
static void rtl8169_tbi_reset_enable(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1396
{
1397 1398
	void __iomem *ioaddr = tp->mmio_addr;

L
Linus Torvalds 已提交
1399 1400 1401
	RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
}

1402
static void rtl8169_xmii_reset_enable(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
1403 1404 1405
{
	unsigned int val;

1406 1407
	val = rtl_readphy(tp, MII_BMCR) | BMCR_RESET;
	rtl_writephy(tp, MII_BMCR, val & 0xffff);
L
Linus Torvalds 已提交
1408 1409
}

H
Hayes Wang 已提交
1410 1411 1412 1413 1414 1415 1416 1417
static void rtl_link_chg_patch(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	struct net_device *dev = tp->dev;

	if (!netif_running(dev))
		return;

1418 1419
	if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_38) {
H
Hayes Wang 已提交
1420
		if (RTL_R8(PHYstatus) & _1000bpsF) {
1421 1422 1423 1424
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x00000011,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
				      ERIAR_EXGMAC);
H
Hayes Wang 已提交
1425
		} else if (RTL_R8(PHYstatus) & _100bps) {
1426 1427 1428 1429
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
				      ERIAR_EXGMAC);
H
Hayes Wang 已提交
1430
		} else {
1431 1432 1433 1434
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x0000003f,
				      ERIAR_EXGMAC);
H
Hayes Wang 已提交
1435 1436
		}
		/* Reset packet filter */
1437
		rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01,
H
Hayes Wang 已提交
1438
			     ERIAR_EXGMAC);
1439
		rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00,
H
Hayes Wang 已提交
1440
			     ERIAR_EXGMAC);
1441 1442 1443
	} else if (tp->mac_version == RTL_GIGA_MAC_VER_35 ||
		   tp->mac_version == RTL_GIGA_MAC_VER_36) {
		if (RTL_R8(PHYstatus) & _1000bpsF) {
1444 1445 1446 1447
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x00000011,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005,
				      ERIAR_EXGMAC);
1448
		} else {
1449 1450 1451 1452
			rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x0000003f,
				      ERIAR_EXGMAC);
1453
		}
1454 1455
	} else if (tp->mac_version == RTL_GIGA_MAC_VER_37) {
		if (RTL_R8(PHYstatus) & _10bps) {
1456 1457 1458 1459
			rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x4d02,
				      ERIAR_EXGMAC);
			rtl_eri_write(tp, 0x1dc, ERIAR_MASK_0011, 0x0060,
				      ERIAR_EXGMAC);
1460
		} else {
1461 1462
			rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000,
				      ERIAR_EXGMAC);
1463
		}
H
Hayes Wang 已提交
1464 1465 1466
	}
}

1467
static void __rtl8169_check_link_status(struct net_device *dev,
F
Francois Romieu 已提交
1468 1469
					struct rtl8169_private *tp,
					void __iomem *ioaddr, bool pm)
L
Linus Torvalds 已提交
1470 1471
{
	if (tp->link_ok(ioaddr)) {
H
Hayes Wang 已提交
1472
		rtl_link_chg_patch(tp);
1473
		/* This is to cancel a scheduled suspend if there's one. */
1474 1475
		if (pm)
			pm_request_resume(&tp->pci_dev->dev);
L
Linus Torvalds 已提交
1476
		netif_carrier_on(dev);
1477 1478
		if (net_ratelimit())
			netif_info(tp, ifup, dev, "link up\n");
1479
	} else {
L
Linus Torvalds 已提交
1480
		netif_carrier_off(dev);
1481
		netif_info(tp, ifdown, dev, "link down\n");
1482
		if (pm)
1483
			pm_schedule_suspend(&tp->pci_dev->dev, 5000);
1484
	}
L
Linus Torvalds 已提交
1485 1486
}

1487 1488 1489 1490 1491 1492 1493
static void rtl8169_check_link_status(struct net_device *dev,
				      struct rtl8169_private *tp,
				      void __iomem *ioaddr)
{
	__rtl8169_check_link_status(dev, tp, ioaddr, false);
}

1494 1495 1496
#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)

static u32 __rtl8169_get_wol(struct rtl8169_private *tp)
F
Francois Romieu 已提交
1497 1498 1499
{
	void __iomem *ioaddr = tp->mmio_addr;
	u8 options;
1500
	u32 wolopts = 0;
F
Francois Romieu 已提交
1501 1502 1503

	options = RTL_R8(Config1);
	if (!(options & PMEnable))
1504
		return 0;
F
Francois Romieu 已提交
1505 1506 1507

	options = RTL_R8(Config3);
	if (options & LinkUp)
1508
		wolopts |= WAKE_PHY;
F
Francois Romieu 已提交
1509
	if (options & MagicPacket)
1510
		wolopts |= WAKE_MAGIC;
F
Francois Romieu 已提交
1511 1512 1513

	options = RTL_R8(Config5);
	if (options & UWF)
1514
		wolopts |= WAKE_UCAST;
F
Francois Romieu 已提交
1515
	if (options & BWF)
1516
		wolopts |= WAKE_BCAST;
F
Francois Romieu 已提交
1517
	if (options & MWF)
1518
		wolopts |= WAKE_MCAST;
F
Francois Romieu 已提交
1519

1520
	return wolopts;
F
Francois Romieu 已提交
1521 1522
}

1523
static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
F
Francois Romieu 已提交
1524 1525
{
	struct rtl8169_private *tp = netdev_priv(dev);
1526

1527
	rtl_lock_work(tp);
1528 1529 1530 1531

	wol->supported = WAKE_ANY;
	wol->wolopts = __rtl8169_get_wol(tp);

1532
	rtl_unlock_work(tp);
1533 1534 1535 1536
}

static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
{
F
Francois Romieu 已提交
1537
	void __iomem *ioaddr = tp->mmio_addr;
F
Francois Romieu 已提交
1538
	unsigned int i;
1539
	static const struct {
F
Francois Romieu 已提交
1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550
		u32 opt;
		u16 reg;
		u8  mask;
	} cfg[] = {
		{ WAKE_PHY,   Config3, LinkUp },
		{ WAKE_MAGIC, Config3, MagicPacket },
		{ WAKE_UCAST, Config5, UWF },
		{ WAKE_BCAST, Config5, BWF },
		{ WAKE_MCAST, Config5, MWF },
		{ WAKE_ANY,   Config5, LanWake }
	};
1551
	u8 options;
F
Francois Romieu 已提交
1552 1553 1554 1555

	RTL_W8(Cfg9346, Cfg9346_Unlock);

	for (i = 0; i < ARRAY_SIZE(cfg); i++) {
1556
		options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
1557
		if (wolopts & cfg[i].opt)
F
Francois Romieu 已提交
1558 1559 1560 1561
			options |= cfg[i].mask;
		RTL_W8(cfg[i].reg, options);
	}

1562 1563 1564 1565 1566 1567 1568 1569
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_17:
		options = RTL_R8(Config1) & ~PMEnable;
		if (wolopts)
			options |= PMEnable;
		RTL_W8(Config1, options);
		break;
	default:
1570 1571 1572 1573
		options = RTL_R8(Config2) & ~PME_SIGNAL;
		if (wolopts)
			options |= PME_SIGNAL;
		RTL_W8(Config2, options);
1574 1575 1576
		break;
	}

F
Francois Romieu 已提交
1577
	RTL_W8(Cfg9346, Cfg9346_Lock);
1578 1579 1580 1581 1582 1583
}

static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
{
	struct rtl8169_private *tp = netdev_priv(dev);

1584
	rtl_lock_work(tp);
F
Francois Romieu 已提交
1585

1586 1587 1588 1589
	if (wol->wolopts)
		tp->features |= RTL_FEATURE_WOL;
	else
		tp->features &= ~RTL_FEATURE_WOL;
1590
	__rtl8169_set_wol(tp, wol->wolopts);
1591 1592

	rtl_unlock_work(tp);
F
Francois Romieu 已提交
1593

1594 1595
	device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts);

F
Francois Romieu 已提交
1596 1597 1598
	return 0;
}

1599 1600
static const char *rtl_lookup_firmware_name(struct rtl8169_private *tp)
{
1601
	return rtl_chip_infos[tp->mac_version].fw_name;
1602 1603
}

L
Linus Torvalds 已提交
1604 1605 1606 1607
static void rtl8169_get_drvinfo(struct net_device *dev,
				struct ethtool_drvinfo *info)
{
	struct rtl8169_private *tp = netdev_priv(dev);
1608
	struct rtl_fw *rtl_fw = tp->rtl_fw;
L
Linus Torvalds 已提交
1609

1610 1611 1612
	strlcpy(info->driver, MODULENAME, sizeof(info->driver));
	strlcpy(info->version, RTL8169_VERSION, sizeof(info->version));
	strlcpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info));
1613
	BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version));
1614 1615 1616
	if (!IS_ERR_OR_NULL(rtl_fw))
		strlcpy(info->fw_version, rtl_fw->version,
			sizeof(info->fw_version));
L
Linus Torvalds 已提交
1617 1618 1619 1620 1621 1622 1623 1624
}

static int rtl8169_get_regs_len(struct net_device *dev)
{
	return R8169_REGS_SIZE;
}

static int rtl8169_set_speed_tbi(struct net_device *dev,
1625
				 u8 autoneg, u16 speed, u8 duplex, u32 ignored)
L
Linus Torvalds 已提交
1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	int ret = 0;
	u32 reg;

	reg = RTL_R32(TBICSR);
	if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
	    (duplex == DUPLEX_FULL)) {
		RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
	} else if (autoneg == AUTONEG_ENABLE)
		RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
	else {
1639 1640
		netif_warn(tp, link, dev,
			   "incorrect speed setting refused in TBI mode\n");
L
Linus Torvalds 已提交
1641 1642 1643 1644 1645 1646 1647
		ret = -EOPNOTSUPP;
	}

	return ret;
}

static int rtl8169_set_speed_xmii(struct net_device *dev,
1648
				  u8 autoneg, u16 speed, u8 duplex, u32 adv)
L
Linus Torvalds 已提交
1649 1650
{
	struct rtl8169_private *tp = netdev_priv(dev);
1651
	int giga_ctrl, bmcr;
1652
	int rc = -EINVAL;
L
Linus Torvalds 已提交
1653

1654
	rtl_writephy(tp, 0x1f, 0x0000);
L
Linus Torvalds 已提交
1655 1656

	if (autoneg == AUTONEG_ENABLE) {
1657 1658
		int auto_nego;

1659
		auto_nego = rtl_readphy(tp, MII_ADVERTISE);
1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671
		auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
				ADVERTISE_100HALF | ADVERTISE_100FULL);

		if (adv & ADVERTISED_10baseT_Half)
			auto_nego |= ADVERTISE_10HALF;
		if (adv & ADVERTISED_10baseT_Full)
			auto_nego |= ADVERTISE_10FULL;
		if (adv & ADVERTISED_100baseT_Half)
			auto_nego |= ADVERTISE_100HALF;
		if (adv & ADVERTISED_100baseT_Full)
			auto_nego |= ADVERTISE_100FULL;

1672
		auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
L
Linus Torvalds 已提交
1673

1674
		giga_ctrl = rtl_readphy(tp, MII_CTRL1000);
1675
		giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
1676

1677
		/* The 8100e/8101e/8102e do Fast Ethernet only. */
1678
		if (tp->mii.supports_gmii) {
1679 1680 1681 1682 1683 1684
			if (adv & ADVERTISED_1000baseT_Half)
				giga_ctrl |= ADVERTISE_1000HALF;
			if (adv & ADVERTISED_1000baseT_Full)
				giga_ctrl |= ADVERTISE_1000FULL;
		} else if (adv & (ADVERTISED_1000baseT_Half |
				  ADVERTISED_1000baseT_Full)) {
1685 1686
			netif_info(tp, link, dev,
				   "PHY does not support 1000Mbps\n");
1687
			goto out;
1688
		}
L
Linus Torvalds 已提交
1689

1690 1691
		bmcr = BMCR_ANENABLE | BMCR_ANRESTART;

1692 1693
		rtl_writephy(tp, MII_ADVERTISE, auto_nego);
		rtl_writephy(tp, MII_CTRL1000, giga_ctrl);
1694 1695 1696 1697 1698 1699 1700 1701
	} else {
		giga_ctrl = 0;

		if (speed == SPEED_10)
			bmcr = 0;
		else if (speed == SPEED_100)
			bmcr = BMCR_SPEED100;
		else
1702
			goto out;
1703 1704 1705

		if (duplex == DUPLEX_FULL)
			bmcr |= BMCR_FULLDPLX;
R
Roger So 已提交
1706 1707
	}

1708
	rtl_writephy(tp, MII_BMCR, bmcr);
1709

F
Francois Romieu 已提交
1710 1711
	if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03) {
1712
		if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) {
1713 1714
			rtl_writephy(tp, 0x17, 0x2138);
			rtl_writephy(tp, 0x0e, 0x0260);
1715
		} else {
1716 1717
			rtl_writephy(tp, 0x17, 0x2108);
			rtl_writephy(tp, 0x0e, 0x0000);
1718 1719 1720
		}
	}

1721 1722 1723
	rc = 0;
out:
	return rc;
L
Linus Torvalds 已提交
1724 1725 1726
}

static int rtl8169_set_speed(struct net_device *dev,
1727
			     u8 autoneg, u16 speed, u8 duplex, u32 advertising)
L
Linus Torvalds 已提交
1728 1729 1730 1731
{
	struct rtl8169_private *tp = netdev_priv(dev);
	int ret;

1732
	ret = tp->set_speed(dev, autoneg, speed, duplex, advertising);
1733 1734
	if (ret < 0)
		goto out;
L
Linus Torvalds 已提交
1735

1736 1737
	if (netif_running(dev) && (autoneg == AUTONEG_ENABLE) &&
	    (advertising & ADVERTISED_1000baseT_Full)) {
L
Linus Torvalds 已提交
1738
		mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
1739 1740
	}
out:
L
Linus Torvalds 已提交
1741 1742 1743 1744 1745 1746 1747 1748
	return ret;
}

static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	int ret;

1749 1750
	del_timer_sync(&tp->timer);

1751
	rtl_lock_work(tp);
F
Francois Romieu 已提交
1752
	ret = rtl8169_set_speed(dev, cmd->autoneg, ethtool_cmd_speed(cmd),
1753
				cmd->duplex, cmd->advertising);
1754
	rtl_unlock_work(tp);
1755

L
Linus Torvalds 已提交
1756 1757 1758
	return ret;
}

1759 1760
static netdev_features_t rtl8169_fix_features(struct net_device *dev,
	netdev_features_t features)
L
Linus Torvalds 已提交
1761
{
F
Francois Romieu 已提交
1762 1763
	struct rtl8169_private *tp = netdev_priv(dev);

F
Francois Romieu 已提交
1764
	if (dev->mtu > TD_MSS_MAX)
1765
		features &= ~NETIF_F_ALL_TSO;
L
Linus Torvalds 已提交
1766

F
Francois Romieu 已提交
1767 1768 1769 1770
	if (dev->mtu > JUMBO_1K &&
	    !rtl_chip_infos[tp->mac_version].jumbo_tx_csum)
		features &= ~NETIF_F_IP_CSUM;

1771
	return features;
L
Linus Torvalds 已提交
1772 1773
}

1774 1775
static void __rtl8169_set_features(struct net_device *dev,
				   netdev_features_t features)
L
Linus Torvalds 已提交
1776 1777
{
	struct rtl8169_private *tp = netdev_priv(dev);
B
Ben Greear 已提交
1778
	netdev_features_t changed = features ^ dev->features;
1779
	void __iomem *ioaddr = tp->mmio_addr;
L
Linus Torvalds 已提交
1780

B
Ben Greear 已提交
1781 1782
	if (!(changed & (NETIF_F_RXALL | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX)))
		return;
L
Linus Torvalds 已提交
1783

B
Ben Greear 已提交
1784 1785 1786 1787 1788
	if (changed & (NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX)) {
		if (features & NETIF_F_RXCSUM)
			tp->cp_cmd |= RxChkSum;
		else
			tp->cp_cmd &= ~RxChkSum;
1789

B
Ben Greear 已提交
1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803
		if (dev->features & NETIF_F_HW_VLAN_RX)
			tp->cp_cmd |= RxVlan;
		else
			tp->cp_cmd &= ~RxVlan;

		RTL_W16(CPlusCmd, tp->cp_cmd);
		RTL_R16(CPlusCmd);
	}
	if (changed & NETIF_F_RXALL) {
		int tmp = (RTL_R32(RxConfig) & ~(AcceptErr | AcceptRunt));
		if (features & NETIF_F_RXALL)
			tmp |= (AcceptErr | AcceptRunt);
		RTL_W32(RxConfig, tmp);
	}
1804
}
L
Linus Torvalds 已提交
1805

1806 1807 1808 1809 1810 1811 1812 1813
static int rtl8169_set_features(struct net_device *dev,
				netdev_features_t features)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl_lock_work(tp);
	__rtl8169_set_features(dev, features);
	rtl_unlock_work(tp);
L
Linus Torvalds 已提交
1814 1815 1816 1817

	return 0;
}

1818

L
Linus Torvalds 已提交
1819 1820 1821
static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
				      struct sk_buff *skb)
{
1822
	return (vlan_tx_tag_present(skb)) ?
L
Linus Torvalds 已提交
1823 1824 1825
		TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
}

1826
static void rtl8169_rx_vlan_tag(struct RxDesc *desc, struct sk_buff *skb)
L
Linus Torvalds 已提交
1827 1828 1829
{
	u32 opts2 = le32_to_cpu(desc->opts2);

1830 1831
	if (opts2 & RxVlanTag)
		__vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff));
E
Eric Dumazet 已提交
1832

L
Linus Torvalds 已提交
1833 1834 1835
	desc->opts2 = 0;
}

1836
static int rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
L
Linus Torvalds 已提交
1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	u32 status;

	cmd->supported =
		SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
	cmd->port = PORT_FIBRE;
	cmd->transceiver = XCVR_INTERNAL;

	status = RTL_R32(TBICSR);
	cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
	cmd->autoneg = !!(status & TBINwEnable);

1851
	ethtool_cmd_speed_set(cmd, SPEED_1000);
L
Linus Torvalds 已提交
1852
	cmd->duplex = DUPLEX_FULL; /* Always set */
1853 1854

	return 0;
L
Linus Torvalds 已提交
1855 1856
}

1857
static int rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
L
Linus Torvalds 已提交
1858 1859
{
	struct rtl8169_private *tp = netdev_priv(dev);
1860 1861

	return mii_ethtool_gset(&tp->mii, cmd);
L
Linus Torvalds 已提交
1862 1863 1864 1865 1866
}

static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
1867
	int rc;
L
Linus Torvalds 已提交
1868

1869
	rtl_lock_work(tp);
1870
	rc = tp->get_settings(dev, cmd);
1871
	rtl_unlock_work(tp);
L
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1872

1873
	return rc;
L
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1874 1875 1876 1877 1878
}

static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
			     void *p)
{
1879
	struct rtl8169_private *tp = netdev_priv(dev);
L
Linus Torvalds 已提交
1880

1881 1882
	if (regs->len > R8169_REGS_SIZE)
		regs->len = R8169_REGS_SIZE;
L
Linus Torvalds 已提交
1883

1884
	rtl_lock_work(tp);
1885
	memcpy_fromio(p, tp->mmio_addr, regs->len);
1886
	rtl_unlock_work(tp);
L
Linus Torvalds 已提交
1887 1888
}

1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902
static u32 rtl8169_get_msglevel(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	return tp->msg_enable;
}

static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	tp->msg_enable = value;
}

1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918
static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
	"tx_packets",
	"rx_packets",
	"tx_errors",
	"rx_errors",
	"rx_missed",
	"align_errors",
	"tx_single_collisions",
	"tx_multi_collisions",
	"unicast",
	"broadcast",
	"multicast",
	"tx_aborted",
	"tx_underrun",
};

1919
static int rtl8169_get_sset_count(struct net_device *dev, int sset)
1920
{
1921 1922 1923 1924 1925 1926
	switch (sset) {
	case ETH_SS_STATS:
		return ARRAY_SIZE(rtl8169_gstrings);
	default:
		return -EOPNOTSUPP;
	}
1927 1928
}

1929 1930 1931 1932 1933 1934 1935
DECLARE_RTL_COND(rtl_counters_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(CounterAddrLow) & CounterDump;
}

1936
static void rtl8169_update_counters(struct net_device *dev)
1937 1938 1939
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
F
Francois Romieu 已提交
1940
	struct device *d = &tp->pci_dev->dev;
1941 1942 1943 1944
	struct rtl8169_counters *counters;
	dma_addr_t paddr;
	u32 cmd;

1945 1946 1947 1948 1949 1950
	/*
	 * Some chips are unable to dump tally counters when the receiver
	 * is disabled.
	 */
	if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0)
		return;
1951

1952
	counters = dma_alloc_coherent(d, sizeof(*counters), &paddr, GFP_KERNEL);
1953 1954 1955 1956
	if (!counters)
		return;

	RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1957
	cmd = (u64)paddr & DMA_BIT_MASK(32);
1958 1959 1960
	RTL_W32(CounterAddrLow, cmd);
	RTL_W32(CounterAddrLow, cmd | CounterDump);

1961 1962
	if (rtl_udelay_loop_wait_low(tp, &rtl_counters_cond, 10, 1000))
		memcpy(&tp->counters, counters, sizeof(*counters));
1963 1964 1965 1966

	RTL_W32(CounterAddrLow, 0);
	RTL_W32(CounterAddrHigh, 0);

1967
	dma_free_coherent(d, sizeof(*counters), counters, paddr);
1968 1969
}

1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993
static void rtl8169_get_ethtool_stats(struct net_device *dev,
				      struct ethtool_stats *stats, u64 *data)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	ASSERT_RTNL();

	rtl8169_update_counters(dev);

	data[0] = le64_to_cpu(tp->counters.tx_packets);
	data[1] = le64_to_cpu(tp->counters.rx_packets);
	data[2] = le64_to_cpu(tp->counters.tx_errors);
	data[3] = le32_to_cpu(tp->counters.rx_errors);
	data[4] = le16_to_cpu(tp->counters.rx_missed);
	data[5] = le16_to_cpu(tp->counters.align_errors);
	data[6] = le32_to_cpu(tp->counters.tx_one_collision);
	data[7] = le32_to_cpu(tp->counters.tx_multi_collision);
	data[8] = le64_to_cpu(tp->counters.rx_unicast);
	data[9] = le64_to_cpu(tp->counters.rx_broadcast);
	data[10] = le32_to_cpu(tp->counters.rx_multicast);
	data[11] = le16_to_cpu(tp->counters.tx_aborted);
	data[12] = le16_to_cpu(tp->counters.tx_underun);
}

1994 1995 1996 1997 1998 1999 2000 2001 2002
static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
{
	switch(stringset) {
	case ETH_SS_STATS:
		memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
		break;
	}
}

2003
static const struct ethtool_ops rtl8169_ethtool_ops = {
L
Linus Torvalds 已提交
2004 2005 2006 2007 2008
	.get_drvinfo		= rtl8169_get_drvinfo,
	.get_regs_len		= rtl8169_get_regs_len,
	.get_link		= ethtool_op_get_link,
	.get_settings		= rtl8169_get_settings,
	.set_settings		= rtl8169_set_settings,
2009 2010
	.get_msglevel		= rtl8169_get_msglevel,
	.set_msglevel		= rtl8169_set_msglevel,
L
Linus Torvalds 已提交
2011
	.get_regs		= rtl8169_get_regs,
F
Francois Romieu 已提交
2012 2013
	.get_wol		= rtl8169_get_wol,
	.set_wol		= rtl8169_set_wol,
2014
	.get_strings		= rtl8169_get_strings,
2015
	.get_sset_count		= rtl8169_get_sset_count,
2016
	.get_ethtool_stats	= rtl8169_get_ethtool_stats,
2017
	.get_ts_info		= ethtool_op_get_ts_info,
L
Linus Torvalds 已提交
2018 2019
};

F
Francois Romieu 已提交
2020
static void rtl8169_get_mac_version(struct rtl8169_private *tp,
2021
				    struct net_device *dev, u8 default_version)
L
Linus Torvalds 已提交
2022
{
2023
	void __iomem *ioaddr = tp->mmio_addr;
2024 2025 2026 2027 2028 2029
	/*
	 * The driver currently handles the 8168Bf and the 8168Be identically
	 * but they can be identified more specifically through the test below
	 * if needed:
	 *
	 * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
F
Francois Romieu 已提交
2030 2031 2032 2033
	 *
	 * Same thing for the 8101Eb and the 8101Ec:
	 *
	 * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec
2034
	 */
2035
	static const struct rtl_mac_info {
L
Linus Torvalds 已提交
2036
		u32 mask;
F
Francois Romieu 已提交
2037
		u32 val;
L
Linus Torvalds 已提交
2038 2039
		int mac_version;
	} mac_info[] = {
H
Hayes Wang 已提交
2040 2041 2042 2043
		/* 8168G family. */
		{ 0x7cf00000, 0x4c100000,	RTL_GIGA_MAC_VER_41 },
		{ 0x7cf00000, 0x4c000000,	RTL_GIGA_MAC_VER_40 },

2044
		/* 8168F family. */
2045
		{ 0x7c800000, 0x48800000,	RTL_GIGA_MAC_VER_38 },
2046 2047 2048
		{ 0x7cf00000, 0x48100000,	RTL_GIGA_MAC_VER_36 },
		{ 0x7cf00000, 0x48000000,	RTL_GIGA_MAC_VER_35 },

H
hayeswang 已提交
2049
		/* 8168E family. */
H
Hayes Wang 已提交
2050
		{ 0x7c800000, 0x2c800000,	RTL_GIGA_MAC_VER_34 },
H
hayeswang 已提交
2051 2052 2053 2054
		{ 0x7cf00000, 0x2c200000,	RTL_GIGA_MAC_VER_33 },
		{ 0x7cf00000, 0x2c100000,	RTL_GIGA_MAC_VER_32 },
		{ 0x7c800000, 0x2c000000,	RTL_GIGA_MAC_VER_33 },

F
Francois Romieu 已提交
2055
		/* 8168D family. */
2056 2057 2058
		{ 0x7cf00000, 0x28300000,	RTL_GIGA_MAC_VER_26 },
		{ 0x7cf00000, 0x28100000,	RTL_GIGA_MAC_VER_25 },
		{ 0x7c800000, 0x28000000,	RTL_GIGA_MAC_VER_26 },
F
Francois Romieu 已提交
2059

F
françois romieu 已提交
2060 2061 2062
		/* 8168DP family. */
		{ 0x7cf00000, 0x28800000,	RTL_GIGA_MAC_VER_27 },
		{ 0x7cf00000, 0x28a00000,	RTL_GIGA_MAC_VER_28 },
2063
		{ 0x7cf00000, 0x28b00000,	RTL_GIGA_MAC_VER_31 },
F
françois romieu 已提交
2064

2065
		/* 8168C family. */
2066
		{ 0x7cf00000, 0x3cb00000,	RTL_GIGA_MAC_VER_24 },
F
Francois Romieu 已提交
2067
		{ 0x7cf00000, 0x3c900000,	RTL_GIGA_MAC_VER_23 },
2068
		{ 0x7cf00000, 0x3c800000,	RTL_GIGA_MAC_VER_18 },
2069
		{ 0x7c800000, 0x3c800000,	RTL_GIGA_MAC_VER_24 },
F
Francois Romieu 已提交
2070 2071
		{ 0x7cf00000, 0x3c000000,	RTL_GIGA_MAC_VER_19 },
		{ 0x7cf00000, 0x3c200000,	RTL_GIGA_MAC_VER_20 },
F
Francois Romieu 已提交
2072
		{ 0x7cf00000, 0x3c300000,	RTL_GIGA_MAC_VER_21 },
2073
		{ 0x7cf00000, 0x3c400000,	RTL_GIGA_MAC_VER_22 },
2074
		{ 0x7c800000, 0x3c000000,	RTL_GIGA_MAC_VER_22 },
F
Francois Romieu 已提交
2075 2076 2077 2078 2079 2080 2081 2082

		/* 8168B family. */
		{ 0x7cf00000, 0x38000000,	RTL_GIGA_MAC_VER_12 },
		{ 0x7cf00000, 0x38500000,	RTL_GIGA_MAC_VER_17 },
		{ 0x7c800000, 0x38000000,	RTL_GIGA_MAC_VER_17 },
		{ 0x7c800000, 0x30000000,	RTL_GIGA_MAC_VER_11 },

		/* 8101 family. */
H
Hayes Wang 已提交
2083 2084
		{ 0x7cf00000, 0x44900000,	RTL_GIGA_MAC_VER_39 },
		{ 0x7c800000, 0x44800000,	RTL_GIGA_MAC_VER_39 },
2085
		{ 0x7c800000, 0x44000000,	RTL_GIGA_MAC_VER_37 },
2086
		{ 0x7cf00000, 0x40b00000,	RTL_GIGA_MAC_VER_30 },
2087 2088 2089
		{ 0x7cf00000, 0x40a00000,	RTL_GIGA_MAC_VER_30 },
		{ 0x7cf00000, 0x40900000,	RTL_GIGA_MAC_VER_29 },
		{ 0x7c800000, 0x40800000,	RTL_GIGA_MAC_VER_30 },
2090 2091 2092 2093 2094 2095
		{ 0x7cf00000, 0x34a00000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7cf00000, 0x24a00000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7cf00000, 0x34900000,	RTL_GIGA_MAC_VER_08 },
		{ 0x7cf00000, 0x24900000,	RTL_GIGA_MAC_VER_08 },
		{ 0x7cf00000, 0x34800000,	RTL_GIGA_MAC_VER_07 },
		{ 0x7cf00000, 0x24800000,	RTL_GIGA_MAC_VER_07 },
F
Francois Romieu 已提交
2096
		{ 0x7cf00000, 0x34000000,	RTL_GIGA_MAC_VER_13 },
2097
		{ 0x7cf00000, 0x34300000,	RTL_GIGA_MAC_VER_10 },
F
Francois Romieu 已提交
2098
		{ 0x7cf00000, 0x34200000,	RTL_GIGA_MAC_VER_16 },
2099 2100
		{ 0x7c800000, 0x34800000,	RTL_GIGA_MAC_VER_09 },
		{ 0x7c800000, 0x24800000,	RTL_GIGA_MAC_VER_09 },
F
Francois Romieu 已提交
2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113
		{ 0x7c800000, 0x34000000,	RTL_GIGA_MAC_VER_16 },
		/* FIXME: where did these entries come from ? -- FR */
		{ 0xfc800000, 0x38800000,	RTL_GIGA_MAC_VER_15 },
		{ 0xfc800000, 0x30800000,	RTL_GIGA_MAC_VER_14 },

		/* 8110 family. */
		{ 0xfc800000, 0x98000000,	RTL_GIGA_MAC_VER_06 },
		{ 0xfc800000, 0x18000000,	RTL_GIGA_MAC_VER_05 },
		{ 0xfc800000, 0x10000000,	RTL_GIGA_MAC_VER_04 },
		{ 0xfc800000, 0x04000000,	RTL_GIGA_MAC_VER_03 },
		{ 0xfc800000, 0x00800000,	RTL_GIGA_MAC_VER_02 },
		{ 0xfc800000, 0x00000000,	RTL_GIGA_MAC_VER_01 },

2114 2115
		/* Catch-all */
		{ 0x00000000, 0x00000000,	RTL_GIGA_MAC_NONE   }
2116 2117
	};
	const struct rtl_mac_info *p = mac_info;
L
Linus Torvalds 已提交
2118 2119
	u32 reg;

F
Francois Romieu 已提交
2120 2121
	reg = RTL_R32(TxConfig);
	while ((reg & p->mask) != p->val)
L
Linus Torvalds 已提交
2122 2123
		p++;
	tp->mac_version = p->mac_version;
2124 2125 2126 2127 2128 2129

	if (tp->mac_version == RTL_GIGA_MAC_NONE) {
		netif_notice(tp, probe, dev,
			     "unknown MAC, using family default\n");
		tp->mac_version = default_version;
	}
L
Linus Torvalds 已提交
2130 2131 2132 2133
}

static void rtl8169_print_mac_version(struct rtl8169_private *tp)
{
2134
	dprintk("mac_version = 0x%02x\n", tp->mac_version);
L
Linus Torvalds 已提交
2135 2136
}

F
Francois Romieu 已提交
2137 2138 2139 2140 2141
struct phy_reg {
	u16 reg;
	u16 val;
};

2142 2143
static void rtl_writephy_batch(struct rtl8169_private *tp,
			       const struct phy_reg *regs, int len)
F
Francois Romieu 已提交
2144 2145
{
	while (len-- > 0) {
2146
		rtl_writephy(tp, regs->reg, regs->val);
F
Francois Romieu 已提交
2147 2148 2149 2150
		regs++;
	}
}

2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167
#define PHY_READ		0x00000000
#define PHY_DATA_OR		0x10000000
#define PHY_DATA_AND		0x20000000
#define PHY_BJMPN		0x30000000
#define PHY_READ_EFUSE		0x40000000
#define PHY_READ_MAC_BYTE	0x50000000
#define PHY_WRITE_MAC_BYTE	0x60000000
#define PHY_CLEAR_READCOUNT	0x70000000
#define PHY_WRITE		0x80000000
#define PHY_READCOUNT_EQ_SKIP	0x90000000
#define PHY_COMP_EQ_SKIPN	0xa0000000
#define PHY_COMP_NEQ_SKIPN	0xb0000000
#define PHY_WRITE_PREVIOUS	0xc0000000
#define PHY_SKIPN		0xd0000000
#define PHY_DELAY_MS		0xe0000000
#define PHY_WRITE_ERI_WORD	0xf0000000

H
Hayes Wang 已提交
2168 2169 2170 2171 2172 2173 2174 2175
struct fw_info {
	u32	magic;
	char	version[RTL_VER_SIZE];
	__le32	fw_start;
	__le32	fw_len;
	u8	chksum;
} __packed;

2176 2177 2178
#define FW_OPCODE_SIZE	sizeof(typeof(*((struct rtl_fw_phy_action *)0)->code))

static bool rtl_fw_format_ok(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
2179
{
2180
	const struct firmware *fw = rtl_fw->fw;
H
Hayes Wang 已提交
2181
	struct fw_info *fw_info = (struct fw_info *)fw->data;
2182 2183 2184 2185 2186 2187
	struct rtl_fw_phy_action *pa = &rtl_fw->phy_action;
	char *version = rtl_fw->version;
	bool rc = false;

	if (fw->size < FW_OPCODE_SIZE)
		goto out;
H
Hayes Wang 已提交
2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213

	if (!fw_info->magic) {
		size_t i, size, start;
		u8 checksum = 0;

		if (fw->size < sizeof(*fw_info))
			goto out;

		for (i = 0; i < fw->size; i++)
			checksum += fw->data[i];
		if (checksum != 0)
			goto out;

		start = le32_to_cpu(fw_info->fw_start);
		if (start > fw->size)
			goto out;

		size = le32_to_cpu(fw_info->fw_len);
		if (size > (fw->size - start) / FW_OPCODE_SIZE)
			goto out;

		memcpy(version, fw_info->version, RTL_VER_SIZE);

		pa->code = (__le32 *)(fw->data + start);
		pa->size = size;
	} else {
2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228
		if (fw->size % FW_OPCODE_SIZE)
			goto out;

		strlcpy(version, rtl_lookup_firmware_name(tp), RTL_VER_SIZE);

		pa->code = (__le32 *)fw->data;
		pa->size = fw->size / FW_OPCODE_SIZE;
	}
	version[RTL_VER_SIZE - 1] = 0;

	rc = true;
out:
	return rc;
}

2229 2230
static bool rtl_fw_data_ok(struct rtl8169_private *tp, struct net_device *dev,
			   struct rtl_fw_phy_action *pa)
2231
{
2232
	bool rc = false;
2233
	size_t index;
2234

2235 2236
	for (index = 0; index < pa->size; index++) {
		u32 action = le32_to_cpu(pa->code[index]);
2237
		u32 regno = (action & 0x0fff0000) >> 16;
2238

2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251
		switch(action & 0xf0000000) {
		case PHY_READ:
		case PHY_DATA_OR:
		case PHY_DATA_AND:
		case PHY_READ_EFUSE:
		case PHY_CLEAR_READCOUNT:
		case PHY_WRITE:
		case PHY_WRITE_PREVIOUS:
		case PHY_DELAY_MS:
			break;

		case PHY_BJMPN:
			if (regno > index) {
2252
				netif_err(tp, ifup, tp->dev,
F
Francois Romieu 已提交
2253
					  "Out of range of firmware\n");
2254
				goto out;
2255 2256 2257
			}
			break;
		case PHY_READCOUNT_EQ_SKIP:
2258
			if (index + 2 >= pa->size) {
2259
				netif_err(tp, ifup, tp->dev,
F
Francois Romieu 已提交
2260
					  "Out of range of firmware\n");
2261
				goto out;
2262 2263 2264 2265 2266
			}
			break;
		case PHY_COMP_EQ_SKIPN:
		case PHY_COMP_NEQ_SKIPN:
		case PHY_SKIPN:
2267
			if (index + 1 + regno >= pa->size) {
2268
				netif_err(tp, ifup, tp->dev,
F
Francois Romieu 已提交
2269
					  "Out of range of firmware\n");
2270
				goto out;
2271
			}
2272 2273
			break;

2274 2275 2276 2277
		case PHY_READ_MAC_BYTE:
		case PHY_WRITE_MAC_BYTE:
		case PHY_WRITE_ERI_WORD:
		default:
2278
			netif_err(tp, ifup, tp->dev,
2279
				  "Invalid action 0x%08x\n", action);
2280
			goto out;
2281 2282
		}
	}
2283 2284 2285 2286
	rc = true;
out:
	return rc;
}
2287

2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310
static int rtl_check_firmware(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
{
	struct net_device *dev = tp->dev;
	int rc = -EINVAL;

	if (!rtl_fw_format_ok(tp, rtl_fw)) {
		netif_err(tp, ifup, dev, "invalid firwmare\n");
		goto out;
	}

	if (rtl_fw_data_ok(tp, dev, &rtl_fw->phy_action))
		rc = 0;
out:
	return rc;
}

static void rtl_phy_write_fw(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
{
	struct rtl_fw_phy_action *pa = &rtl_fw->phy_action;
	u32 predata, count;
	size_t index;

	predata = count = 0;
2311

2312 2313
	for (index = 0; index < pa->size; ) {
		u32 action = le32_to_cpu(pa->code[index]);
2314
		u32 data = action & 0x0000ffff;
2315 2316 2317 2318
		u32 regno = (action & 0x0fff0000) >> 16;

		if (!action)
			break;
2319 2320

		switch(action & 0xf0000000) {
2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337
		case PHY_READ:
			predata = rtl_readphy(tp, regno);
			count++;
			index++;
			break;
		case PHY_DATA_OR:
			predata |= data;
			index++;
			break;
		case PHY_DATA_AND:
			predata &= data;
			index++;
			break;
		case PHY_BJMPN:
			index -= regno;
			break;
		case PHY_READ_EFUSE:
2338
			predata = rtl8168d_efuse_read(tp, regno);
2339 2340 2341 2342 2343 2344
			index++;
			break;
		case PHY_CLEAR_READCOUNT:
			count = 0;
			index++;
			break;
2345
		case PHY_WRITE:
2346 2347 2348 2349
			rtl_writephy(tp, regno, data);
			index++;
			break;
		case PHY_READCOUNT_EQ_SKIP:
F
Francois Romieu 已提交
2350
			index += (count == data) ? 2 : 1;
2351
			break;
2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376
		case PHY_COMP_EQ_SKIPN:
			if (predata == data)
				index += regno;
			index++;
			break;
		case PHY_COMP_NEQ_SKIPN:
			if (predata != data)
				index += regno;
			index++;
			break;
		case PHY_WRITE_PREVIOUS:
			rtl_writephy(tp, regno, predata);
			index++;
			break;
		case PHY_SKIPN:
			index += regno + 1;
			break;
		case PHY_DELAY_MS:
			mdelay(data);
			index++;
			break;

		case PHY_READ_MAC_BYTE:
		case PHY_WRITE_MAC_BYTE:
		case PHY_WRITE_ERI_WORD:
2377 2378 2379 2380 2381 2382
		default:
			BUG();
		}
	}
}

2383 2384
static void rtl_release_firmware(struct rtl8169_private *tp)
{
2385 2386 2387 2388 2389
	if (!IS_ERR_OR_NULL(tp->rtl_fw)) {
		release_firmware(tp->rtl_fw->fw);
		kfree(tp->rtl_fw);
	}
	tp->rtl_fw = RTL_FIRMWARE_UNKNOWN;
2390 2391
}

2392
static void rtl_apply_firmware(struct rtl8169_private *tp)
2393
{
2394
	struct rtl_fw *rtl_fw = tp->rtl_fw;
2395 2396

	/* TODO: release firmware once rtl_phy_write_fw signals failures. */
2397 2398
	if (!IS_ERR_OR_NULL(rtl_fw))
		rtl_phy_write_fw(tp, rtl_fw);
2399 2400 2401 2402 2403 2404 2405 2406
}

static void rtl_apply_firmware_cond(struct rtl8169_private *tp, u8 reg, u16 val)
{
	if (rtl_readphy(tp, reg) != val)
		netif_warn(tp, hw, tp->dev, "chipset not ready for firmware\n");
	else
		rtl_apply_firmware(tp);
2407 2408
}

2409
static void rtl8169s_hw_phy_config(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
2410
{
2411
	static const struct phy_reg phy_reg_init[] = {
F
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2412 2413 2414 2415 2416
		{ 0x1f, 0x0001 },
		{ 0x06, 0x006e },
		{ 0x08, 0x0708 },
		{ 0x15, 0x4000 },
		{ 0x18, 0x65c7 },
L
Linus Torvalds 已提交
2417

F
françois romieu 已提交
2418 2419 2420 2421 2422 2423 2424
		{ 0x1f, 0x0001 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x0000 },
L
Linus Torvalds 已提交
2425

F
françois romieu 已提交
2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471
		{ 0x03, 0xff41 },
		{ 0x02, 0xdf60 },
		{ 0x01, 0x0140 },
		{ 0x00, 0x0077 },
		{ 0x04, 0x7800 },
		{ 0x04, 0x7000 },

		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf0f9 },
		{ 0x04, 0x9800 },
		{ 0x04, 0x9000 },

		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xa000 },

		{ 0x03, 0xff41 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x0140 },
		{ 0x00, 0x00bb },
		{ 0x04, 0xb800 },
		{ 0x04, 0xb000 },

		{ 0x03, 0xdf41 },
		{ 0x02, 0xdc60 },
		{ 0x01, 0x6340 },
		{ 0x00, 0x007d },
		{ 0x04, 0xd800 },
		{ 0x04, 0xd000 },

		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x100a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0xf000 },

		{ 0x1f, 0x0000 },
		{ 0x0b, 0x0000 },
		{ 0x00, 0x9200 }
	};
L
Linus Torvalds 已提交
2472

2473
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
L
Linus Torvalds 已提交
2474 2475
}

2476
static void rtl8169sb_hw_phy_config(struct rtl8169_private *tp)
2477
{
2478
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2479 2480 2481 2482 2483
		{ 0x1f, 0x0002 },
		{ 0x01, 0x90d0 },
		{ 0x1f, 0x0000 }
	};

2484
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2485 2486
}

2487
static void rtl8169scd_hw_phy_config_quirk(struct rtl8169_private *tp)
2488 2489 2490
{
	struct pci_dev *pdev = tp->pci_dev;

2491 2492
	if ((pdev->subsystem_vendor != PCI_VENDOR_ID_GIGABYTE) ||
	    (pdev->subsystem_device != 0xe000))
2493 2494
		return;

2495 2496 2497
	rtl_writephy(tp, 0x1f, 0x0001);
	rtl_writephy(tp, 0x10, 0xf01b);
	rtl_writephy(tp, 0x1f, 0x0000);
2498 2499
}

2500
static void rtl8169scd_hw_phy_config(struct rtl8169_private *tp)
2501
{
2502
	static const struct phy_reg phy_reg_init[] = {
2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541
		{ 0x1f, 0x0001 },
		{ 0x04, 0x0000 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x9000 },
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0xa000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x10, 0xf41b },
		{ 0x14, 0xfb54 },
		{ 0x18, 0xf5c7 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
		{ 0x1f, 0x0000 }
	};

2542
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2543

2544
	rtl8169scd_hw_phy_config_quirk(tp);
2545 2546
}

2547
static void rtl8169sce_hw_phy_config(struct rtl8169_private *tp)
2548
{
2549
	static const struct phy_reg phy_reg_init[] = {
2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596
		{ 0x1f, 0x0001 },
		{ 0x04, 0x0000 },
		{ 0x03, 0x00a1 },
		{ 0x02, 0x0008 },
		{ 0x01, 0x0120 },
		{ 0x00, 0x1000 },
		{ 0x04, 0x0800 },
		{ 0x04, 0x9000 },
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0xa000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0xff95 },
		{ 0x00, 0xba00 },
		{ 0x04, 0xa800 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x0b, 0x8480 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x18, 0x67c7 },
		{ 0x04, 0x2000 },
		{ 0x03, 0x002f },
		{ 0x02, 0x4360 },
		{ 0x01, 0x0109 },
		{ 0x00, 0x3022 },
		{ 0x04, 0x2800 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
		{ 0x1f, 0x0000 }
	};

2597
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2598 2599
}

2600
static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp)
2601
{
2602
	static const struct phy_reg phy_reg_init[] = {
2603 2604 2605 2606
		{ 0x10, 0xf41b },
		{ 0x1f, 0x0000 }
	};

2607 2608
	rtl_writephy(tp, 0x1f, 0x0001);
	rtl_patchphy(tp, 0x16, 1 << 0);
2609

2610
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2611 2612
}

2613
static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp)
2614
{
2615
	static const struct phy_reg phy_reg_init[] = {
2616 2617 2618 2619 2620
		{ 0x1f, 0x0001 },
		{ 0x10, 0xf41b },
		{ 0x1f, 0x0000 }
	};

2621
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2622 2623
}

2624
static void rtl8168cp_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2625
{
2626
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2627 2628 2629 2630 2631 2632 2633
		{ 0x1f, 0x0000 },
		{ 0x1d, 0x0f00 },
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x1ec8 },
		{ 0x1f, 0x0000 }
	};

2634
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2635 2636
}

2637
static void rtl8168cp_2_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2638
{
2639
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2640 2641 2642 2643 2644
		{ 0x1f, 0x0001 },
		{ 0x1d, 0x3d98 },
		{ 0x1f, 0x0000 }
	};

2645 2646 2647
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
F
Francois Romieu 已提交
2648

2649
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2650 2651
}

2652
static void rtl8168c_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2653
{
2654
	static const struct phy_reg phy_reg_init[] = {
2655 2656
		{ 0x1f, 0x0001 },
		{ 0x12, 0x2300 },
F
Francois Romieu 已提交
2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667
		{ 0x1f, 0x0002 },
		{ 0x00, 0x88d4 },
		{ 0x01, 0x82b1 },
		{ 0x03, 0x7002 },
		{ 0x08, 0x9e30 },
		{ 0x09, 0x01f0 },
		{ 0x0a, 0x5500 },
		{ 0x0c, 0x00c8 },
		{ 0x1f, 0x0003 },
		{ 0x12, 0xc096 },
		{ 0x16, 0x000a },
2668 2669 2670 2671
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0000 },
		{ 0x09, 0x2000 },
		{ 0x09, 0x0000 }
F
Francois Romieu 已提交
2672 2673
	};

2674
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2675

2676 2677 2678
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
F
Francois Romieu 已提交
2679 2680
}

2681
static void rtl8168c_2_hw_phy_config(struct rtl8169_private *tp)
2682
{
2683
	static const struct phy_reg phy_reg_init[] = {
2684
		{ 0x1f, 0x0001 },
2685
		{ 0x12, 0x2300 },
2686 2687 2688 2689 2690 2691 2692
		{ 0x03, 0x802f },
		{ 0x02, 0x4f02 },
		{ 0x01, 0x0409 },
		{ 0x00, 0xf099 },
		{ 0x04, 0x9800 },
		{ 0x04, 0x9000 },
		{ 0x1d, 0x3d98 },
2693 2694
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x7eb8 },
2695 2696 2697
		{ 0x06, 0x0761 },
		{ 0x1f, 0x0003 },
		{ 0x16, 0x0f0a },
2698 2699 2700
		{ 0x1f, 0x0000 }
	};

2701
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2702

2703 2704 2705 2706
	rtl_patchphy(tp, 0x16, 1 << 0);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
2707 2708
}

2709
static void rtl8168c_3_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2710
{
2711
	static const struct phy_reg phy_reg_init[] = {
F
Francois Romieu 已提交
2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722
		{ 0x1f, 0x0001 },
		{ 0x12, 0x2300 },
		{ 0x1d, 0x3d98 },
		{ 0x1f, 0x0002 },
		{ 0x0c, 0x7eb8 },
		{ 0x06, 0x5461 },
		{ 0x1f, 0x0003 },
		{ 0x16, 0x0f0a },
		{ 0x1f, 0x0000 }
	};

2723
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2724

2725 2726 2727 2728
	rtl_patchphy(tp, 0x16, 1 << 0);
	rtl_patchphy(tp, 0x14, 1 << 5);
	rtl_patchphy(tp, 0x0d, 1 << 5);
	rtl_writephy(tp, 0x1f, 0x0000);
F
Francois Romieu 已提交
2729 2730
}

2731
static void rtl8168c_4_hw_phy_config(struct rtl8169_private *tp)
2732
{
2733
	rtl8168c_3_hw_phy_config(tp);
2734 2735
}

2736
static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp)
F
Francois Romieu 已提交
2737
{
2738
	static const struct phy_reg phy_reg_init_0[] = {
2739
		/* Channel Estimation */
F
Francois Romieu 已提交
2740
		{ 0x1f, 0x0001 },
2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751
		{ 0x06, 0x4064 },
		{ 0x07, 0x2863 },
		{ 0x08, 0x059c },
		{ 0x09, 0x26b4 },
		{ 0x0a, 0x6a19 },
		{ 0x0b, 0xdcc8 },
		{ 0x10, 0xf06d },
		{ 0x14, 0x7f68 },
		{ 0x18, 0x7fd9 },
		{ 0x1c, 0xf0ff },
		{ 0x1d, 0x3d9c },
F
Francois Romieu 已提交
2752
		{ 0x1f, 0x0003 },
2753 2754 2755
		{ 0x12, 0xf49f },
		{ 0x13, 0x070b },
		{ 0x1a, 0x05ad },
2756 2757 2758 2759
		{ 0x14, 0x94c0 },

		/*
		 * Tx Error Issue
F
Francois Romieu 已提交
2760
		 * Enhance line driver power
2761
		 */
F
Francois Romieu 已提交
2762
		{ 0x1f, 0x0002 },
2763 2764 2765
		{ 0x06, 0x5561 },
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8332 },
2766 2767 2768 2769 2770 2771 2772 2773
		{ 0x06, 0x5561 },

		/*
		 * Can not link to 1Gbps with bad cable
		 * Decrease SNR threshold form 21.07dB to 19.04dB
		 */
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
2774

F
Francois Romieu 已提交
2775
		{ 0x1f, 0x0000 },
2776
		{ 0x0d, 0xf880 }
2777 2778
	};

2779
	rtl_writephy_batch(tp, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
2780

2781 2782 2783 2784
	/*
	 * Rx Error Issue
	 * Fine Tune Switching regulator parameter
	 */
2785 2786 2787
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x0b, 0x0010, 0x00ef);
	rtl_w1w0_phy(tp, 0x0c, 0xa200, 0x5d00);
2788

2789
	if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) {
2790
		static const struct phy_reg phy_reg_init[] = {
2791 2792 2793 2794 2795 2796 2797 2798 2799
			{ 0x1f, 0x0002 },
			{ 0x05, 0x669a },
			{ 0x1f, 0x0005 },
			{ 0x05, 0x8330 },
			{ 0x06, 0x669a },
			{ 0x1f, 0x0002 }
		};
		int val;

2800
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2801

2802
		val = rtl_readphy(tp, 0x0d);
2803 2804

		if ((val & 0x00ff) != 0x006c) {
2805
			static const u32 set[] = {
2806 2807 2808 2809 2810
				0x0065, 0x0066, 0x0067, 0x0068,
				0x0069, 0x006a, 0x006b, 0x006c
			};
			int i;

2811
			rtl_writephy(tp, 0x1f, 0x0002);
2812 2813 2814

			val &= 0xff00;
			for (i = 0; i < ARRAY_SIZE(set); i++)
2815
				rtl_writephy(tp, 0x0d, val | set[i]);
2816 2817
		}
	} else {
2818
		static const struct phy_reg phy_reg_init[] = {
2819 2820 2821 2822 2823 2824 2825
			{ 0x1f, 0x0002 },
			{ 0x05, 0x6662 },
			{ 0x1f, 0x0005 },
			{ 0x05, 0x8330 },
			{ 0x06, 0x6662 }
		};

2826
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2827 2828
	}

2829
	/* RSET couple improve */
2830 2831 2832
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_patchphy(tp, 0x0d, 0x0300);
	rtl_patchphy(tp, 0x0f, 0x0010);
2833

2834
	/* Fine tune PLL performance */
2835 2836 2837
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x02, 0x0100, 0x0600);
	rtl_w1w0_phy(tp, 0x03, 0x0000, 0xe000);
2838

2839 2840
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x001b);
2841 2842

	rtl_apply_firmware_cond(tp, MII_EXPANSION, 0xbf00);
2843

2844
	rtl_writephy(tp, 0x1f, 0x0000);
2845 2846
}

2847
static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp)
2848
{
2849
	static const struct phy_reg phy_reg_init_0[] = {
2850
		/* Channel Estimation */
2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868
		{ 0x1f, 0x0001 },
		{ 0x06, 0x4064 },
		{ 0x07, 0x2863 },
		{ 0x08, 0x059c },
		{ 0x09, 0x26b4 },
		{ 0x0a, 0x6a19 },
		{ 0x0b, 0xdcc8 },
		{ 0x10, 0xf06d },
		{ 0x14, 0x7f68 },
		{ 0x18, 0x7fd9 },
		{ 0x1c, 0xf0ff },
		{ 0x1d, 0x3d9c },
		{ 0x1f, 0x0003 },
		{ 0x12, 0xf49f },
		{ 0x13, 0x070b },
		{ 0x1a, 0x05ad },
		{ 0x14, 0x94c0 },

2869 2870
		/*
		 * Tx Error Issue
F
Francois Romieu 已提交
2871
		 * Enhance line driver power
2872
		 */
2873 2874 2875 2876
		{ 0x1f, 0x0002 },
		{ 0x06, 0x5561 },
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8332 },
2877 2878 2879 2880 2881 2882 2883 2884
		{ 0x06, 0x5561 },

		/*
		 * Can not link to 1Gbps with bad cable
		 * Decrease SNR threshold form 21.07dB to 19.04dB
		 */
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },
2885 2886

		{ 0x1f, 0x0000 },
2887
		{ 0x0d, 0xf880 }
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2888 2889
	};

2890
	rtl_writephy_batch(tp, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
F
Francois Romieu 已提交
2891

2892
	if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) {
2893
		static const struct phy_reg phy_reg_init[] = {
2894 2895
			{ 0x1f, 0x0002 },
			{ 0x05, 0x669a },
F
Francois Romieu 已提交
2896
			{ 0x1f, 0x0005 },
2897 2898 2899 2900 2901 2902 2903
			{ 0x05, 0x8330 },
			{ 0x06, 0x669a },

			{ 0x1f, 0x0002 }
		};
		int val;

2904
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2905

2906
		val = rtl_readphy(tp, 0x0d);
2907
		if ((val & 0x00ff) != 0x006c) {
J
Joe Perches 已提交
2908
			static const u32 set[] = {
2909 2910 2911 2912 2913
				0x0065, 0x0066, 0x0067, 0x0068,
				0x0069, 0x006a, 0x006b, 0x006c
			};
			int i;

2914
			rtl_writephy(tp, 0x1f, 0x0002);
2915 2916 2917

			val &= 0xff00;
			for (i = 0; i < ARRAY_SIZE(set); i++)
2918
				rtl_writephy(tp, 0x0d, val | set[i]);
2919 2920
		}
	} else {
2921
		static const struct phy_reg phy_reg_init[] = {
2922 2923
			{ 0x1f, 0x0002 },
			{ 0x05, 0x2642 },
F
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2924
			{ 0x1f, 0x0005 },
2925 2926
			{ 0x05, 0x8330 },
			{ 0x06, 0x2642 }
F
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2927 2928
		};

2929
		rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
F
Francois Romieu 已提交
2930 2931
	}

2932
	/* Fine tune PLL performance */
2933 2934 2935
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x02, 0x0100, 0x0600);
	rtl_w1w0_phy(tp, 0x03, 0x0000, 0xe000);
2936

2937
	/* Switching regulator Slew rate */
2938 2939
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_patchphy(tp, 0x0f, 0x0017);
2940

2941 2942
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x001b);
2943 2944

	rtl_apply_firmware_cond(tp, MII_EXPANSION, 0xb300);
2945

2946
	rtl_writephy(tp, 0x1f, 0x0000);
2947 2948
}

2949
static void rtl8168d_3_hw_phy_config(struct rtl8169_private *tp)
2950
{
2951
	static const struct phy_reg phy_reg_init[] = {
2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006
		{ 0x1f, 0x0002 },
		{ 0x10, 0x0008 },
		{ 0x0d, 0x006c },

		{ 0x1f, 0x0000 },
		{ 0x0d, 0xf880 },

		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },

		{ 0x1f, 0x0001 },
		{ 0x0b, 0xa4d8 },
		{ 0x09, 0x281c },
		{ 0x07, 0x2883 },
		{ 0x0a, 0x6b35 },
		{ 0x1d, 0x3da4 },
		{ 0x1c, 0xeffd },
		{ 0x14, 0x7f52 },
		{ 0x18, 0x7fc6 },
		{ 0x08, 0x0601 },
		{ 0x06, 0x4063 },
		{ 0x10, 0xf074 },
		{ 0x1f, 0x0003 },
		{ 0x13, 0x0789 },
		{ 0x12, 0xf4bd },
		{ 0x1a, 0x04fd },
		{ 0x14, 0x84b0 },
		{ 0x1f, 0x0000 },
		{ 0x00, 0x9200 },

		{ 0x1f, 0x0005 },
		{ 0x01, 0x0340 },
		{ 0x1f, 0x0001 },
		{ 0x04, 0x4000 },
		{ 0x03, 0x1d21 },
		{ 0x02, 0x0c32 },
		{ 0x01, 0x0200 },
		{ 0x00, 0x5554 },
		{ 0x04, 0x4800 },
		{ 0x04, 0x4000 },
		{ 0x04, 0xf000 },
		{ 0x03, 0xdf01 },
		{ 0x02, 0xdf20 },
		{ 0x01, 0x101a },
		{ 0x00, 0xa0ff },
		{ 0x04, 0xf800 },
		{ 0x04, 0xf000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x0023 },
		{ 0x16, 0x0000 },
		{ 0x1f, 0x0000 }
	};

3007
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
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3008 3009
}

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3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025
static void rtl8168d_4_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		{ 0x1f, 0x0001 },
		{ 0x17, 0x0cc0 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x002d },
		{ 0x18, 0x0040 },
		{ 0x1f, 0x0000 }
	};

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
	rtl_patchphy(tp, 0x0d, 1 << 5);
}

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Hayes Wang 已提交
3026
static void rtl8168e_1_hw_phy_config(struct rtl8169_private *tp)
H
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3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055
{
	static const struct phy_reg phy_reg_init[] = {
		/* Enable Delay cap */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b80 },
		{ 0x06, 0xc896 },
		{ 0x1f, 0x0000 },

		/* Channel estimation fine tune */
		{ 0x1f, 0x0001 },
		{ 0x0b, 0x6c20 },
		{ 0x07, 0x2872 },
		{ 0x1c, 0xefff },
		{ 0x1f, 0x0003 },
		{ 0x14, 0x6420 },
		{ 0x1f, 0x0000 },

		/* Update PFM & 10M TX idle timer */
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x002f },
		{ 0x15, 0x1919 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0007 },
		{ 0x1e, 0x00ac },
		{ 0x18, 0x0006 },
		{ 0x1f, 0x0000 }
	};

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3056 3057
	rtl_apply_firmware(tp);

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3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

	/* DCO enable for 10M IDLE Power */
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0023);
	rtl_w1w0_phy(tp, 0x17, 0x0006, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* For impedance matching */
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_w1w0_phy(tp, 0x08, 0x8000, 0x7f00);
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3069
	rtl_writephy(tp, 0x1f, 0x0000);
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3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098

	/* PHY auto speed down */
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x002d);
	rtl_w1w0_phy(tp, 0x18, 0x0050, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b86);
	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0020);
	rtl_w1w0_phy(tp, 0x15, 0x0000, 0x1100);
	rtl_writephy(tp, 0x1f, 0x0006);
	rtl_writephy(tp, 0x00, 0x5a00);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0007);
	rtl_writephy(tp, 0x0e, 0x003c);
	rtl_writephy(tp, 0x0d, 0x4007);
	rtl_writephy(tp, 0x0e, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0000);
}

H
Hayes Wang 已提交
3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159
static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		/* Enable Delay cap */
		{ 0x1f, 0x0004 },
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x00ac },
		{ 0x18, 0x0006 },
		{ 0x1f, 0x0002 },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0000 },

		/* Channel estimation fine tune */
		{ 0x1f, 0x0003 },
		{ 0x09, 0xa20f },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0000 },

		/* Green Setting */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b5b },
		{ 0x06, 0x9222 },
		{ 0x05, 0x8b6d },
		{ 0x06, 0x8000 },
		{ 0x05, 0x8b76 },
		{ 0x06, 0x8000 },
		{ 0x1f, 0x0000 }
	};

	rtl_apply_firmware(tp);

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

	/* For 4-corner performance improve */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b80);
	rtl_w1w0_phy(tp, 0x17, 0x0006, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* PHY auto speed down */
	rtl_writephy(tp, 0x1f, 0x0004);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x002d);
	rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

	/* improve 10M EEE waveform */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b86);
	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* Improve 2-pair detection performance */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* EEE setting */
3160
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_1111, 0x0000, 0x0003, ERIAR_EXGMAC);
H
Hayes Wang 已提交
3161 3162 3163 3164 3165 3166
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
	rtl_writephy(tp, 0x1f, 0x0004);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0020);
3167
	rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0100);
H
Hayes Wang 已提交
3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182
	rtl_writephy(tp, 0x1f, 0x0002);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0007);
	rtl_writephy(tp, 0x0e, 0x003c);
	rtl_writephy(tp, 0x0d, 0x4007);
	rtl_writephy(tp, 0x0e, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0000);

	/* Green feature */
	rtl_writephy(tp, 0x1f, 0x0003);
	rtl_w1w0_phy(tp, 0x19, 0x0000, 0x0001);
	rtl_w1w0_phy(tp, 0x10, 0x0000, 0x0400);
	rtl_writephy(tp, 0x1f, 0x0000);
}

3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204
static void rtl8168f_hw_phy_config(struct rtl8169_private *tp)
{
	/* For 4-corner performance improve */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b80);
	rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* PHY auto speed down */
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x002d);
	rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);

	/* Improve 10M EEE waveform */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b86);
	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
}

3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245
static void rtl8168f_1_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		/* Channel estimation fine tune */
		{ 0x1f, 0x0003 },
		{ 0x09, 0xa20f },
		{ 0x1f, 0x0000 },

		/* Modify green table for giga & fnet */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b55 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b5e },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b67 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b70 },
		{ 0x06, 0x0000 },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x0078 },
		{ 0x17, 0x0000 },
		{ 0x19, 0x00fb },
		{ 0x1f, 0x0000 },

		/* Modify green table for 10M */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b79 },
		{ 0x06, 0xaa00 },
		{ 0x1f, 0x0000 },

		/* Disable hiimpedance detection (RTCT) */
		{ 0x1f, 0x0003 },
		{ 0x01, 0x328a },
		{ 0x1f, 0x0000 }
	};

	rtl_apply_firmware(tp);

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

3246
	rtl8168f_hw_phy_config(tp);
3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258

	/* Improve 2-pair detection performance */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);
}

static void rtl8168f_2_hw_phy_config(struct rtl8169_private *tp)
{
	rtl_apply_firmware(tp);

3259
	rtl8168f_hw_phy_config(tp);
3260 3261
}

3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336
static void rtl8411_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		/* Channel estimation fine tune */
		{ 0x1f, 0x0003 },
		{ 0x09, 0xa20f },
		{ 0x1f, 0x0000 },

		/* Modify green table for giga & fnet */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b55 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b5e },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b67 },
		{ 0x06, 0x0000 },
		{ 0x05, 0x8b70 },
		{ 0x06, 0x0000 },
		{ 0x1f, 0x0000 },
		{ 0x1f, 0x0007 },
		{ 0x1e, 0x0078 },
		{ 0x17, 0x0000 },
		{ 0x19, 0x00aa },
		{ 0x1f, 0x0000 },

		/* Modify green table for 10M */
		{ 0x1f, 0x0005 },
		{ 0x05, 0x8b79 },
		{ 0x06, 0xaa00 },
		{ 0x1f, 0x0000 },

		/* Disable hiimpedance detection (RTCT) */
		{ 0x1f, 0x0003 },
		{ 0x01, 0x328a },
		{ 0x1f, 0x0000 }
	};


	rtl_apply_firmware(tp);

	rtl8168f_hw_phy_config(tp);

	/* Improve 2-pair detection performance */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

	/* Modify green table for giga */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b54);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
	rtl_writephy(tp, 0x05, 0x8b5d);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
	rtl_writephy(tp, 0x05, 0x8a7c);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
	rtl_writephy(tp, 0x05, 0x8a7f);
	rtl_w1w0_phy(tp, 0x06, 0x0100, 0x0000);
	rtl_writephy(tp, 0x05, 0x8a82);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
	rtl_writephy(tp, 0x05, 0x8a85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
	rtl_writephy(tp, 0x05, 0x8a88);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* uc same-seed solution */
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x8000, 0x0000);
	rtl_writephy(tp, 0x1f, 0x0000);

	/* eee setting */
3337
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x00, 0x03, ERIAR_EXGMAC);
3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358
	rtl_writephy(tp, 0x1f, 0x0005);
	rtl_writephy(tp, 0x05, 0x8b85);
	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
	rtl_writephy(tp, 0x1f, 0x0004);
	rtl_writephy(tp, 0x1f, 0x0007);
	rtl_writephy(tp, 0x1e, 0x0020);
	rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0100);
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0007);
	rtl_writephy(tp, 0x0e, 0x003c);
	rtl_writephy(tp, 0x0d, 0x4007);
	rtl_writephy(tp, 0x0e, 0x0000);
	rtl_writephy(tp, 0x0d, 0x0000);

	/* Green feature */
	rtl_writephy(tp, 0x1f, 0x0003);
	rtl_w1w0_phy(tp, 0x19, 0x0000, 0x0001);
	rtl_w1w0_phy(tp, 0x10, 0x0000, 0x0400);
	rtl_writephy(tp, 0x1f, 0x0000);
}

H
Hayes Wang 已提交
3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407
static void rtl8168g_1_hw_phy_config(struct rtl8169_private *tp)
{
	static const u16 mac_ocp_patch[] = {
		0xe008, 0xe01b, 0xe01d, 0xe01f,
		0xe021, 0xe023, 0xe025, 0xe027,
		0x49d2, 0xf10d, 0x766c, 0x49e2,
		0xf00a, 0x1ec0, 0x8ee1, 0xc60a,

		0x77c0, 0x4870, 0x9fc0, 0x1ea0,
		0xc707, 0x8ee1, 0x9d6c, 0xc603,
		0xbe00, 0xb416, 0x0076, 0xe86c,
		0xc602, 0xbe00, 0x0000, 0xc602,

		0xbe00, 0x0000, 0xc602, 0xbe00,
		0x0000, 0xc602, 0xbe00, 0x0000,
		0xc602, 0xbe00, 0x0000, 0xc602,
		0xbe00, 0x0000, 0xc602, 0xbe00,

		0x0000, 0x0000, 0x0000, 0x0000
	};
	u32 i;

	/* Patch code for GPHY reset */
	for (i = 0; i < ARRAY_SIZE(mac_ocp_patch); i++)
		r8168_mac_ocp_write(tp, 0xf800 + 2*i, mac_ocp_patch[i]);
	r8168_mac_ocp_write(tp, 0xfc26, 0x8000);
	r8168_mac_ocp_write(tp, 0xfc28, 0x0075);

	rtl_apply_firmware(tp);

	if (r8168_phy_ocp_read(tp, 0xa460) & 0x0100)
		rtl_w1w0_phy_ocp(tp, 0xbcc4, 0x0000, 0x8000);
	else
		rtl_w1w0_phy_ocp(tp, 0xbcc4, 0x8000, 0x0000);

	if (r8168_phy_ocp_read(tp, 0xa466) & 0x0100)
		rtl_w1w0_phy_ocp(tp, 0xc41a, 0x0002, 0x0000);
	else
		rtl_w1w0_phy_ocp(tp, 0xbcc4, 0x0000, 0x0002);

	rtl_w1w0_phy_ocp(tp, 0xa442, 0x000c, 0x0000);
	rtl_w1w0_phy_ocp(tp, 0xa4b2, 0x0004, 0x0000);

	r8168_phy_ocp_write(tp, 0xa436, 0x8012);
	rtl_w1w0_phy_ocp(tp, 0xa438, 0x8000, 0x0000);

	rtl_w1w0_phy_ocp(tp, 0xc422, 0x4000, 0x2000);
}

3408
static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
3409
{
3410
	static const struct phy_reg phy_reg_init[] = {
3411 3412 3413 3414 3415 3416
		{ 0x1f, 0x0003 },
		{ 0x08, 0x441d },
		{ 0x01, 0x9100 },
		{ 0x1f, 0x0000 }
	};

3417 3418 3419 3420
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_patchphy(tp, 0x11, 1 << 12);
	rtl_patchphy(tp, 0x19, 1 << 13);
	rtl_patchphy(tp, 0x10, 1 << 15);
3421

3422
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
3423 3424
}

3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445
static void rtl8105e_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		{ 0x1f, 0x0005 },
		{ 0x1a, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0004 },
		{ 0x1c, 0x0000 },
		{ 0x1f, 0x0000 },

		{ 0x1f, 0x0001 },
		{ 0x15, 0x7701 },
		{ 0x1f, 0x0000 }
	};

	/* Disable ALDPS before ram code */
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x18, 0x0310);
	msleep(100);

3446
	rtl_apply_firmware(tp);
3447 3448 3449 3450

	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}

3451 3452 3453 3454 3455 3456 3457 3458 3459 3460
static void rtl8402_hw_phy_config(struct rtl8169_private *tp)
{
	/* Disable ALDPS before setting firmware */
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x18, 0x0310);
	msleep(20);

	rtl_apply_firmware(tp);

	/* EEE setting */
3461
	rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
3462 3463 3464 3465 3466 3467
	rtl_writephy(tp, 0x1f, 0x0004);
	rtl_writephy(tp, 0x10, 0x401f);
	rtl_writephy(tp, 0x19, 0x7030);
	rtl_writephy(tp, 0x1f, 0x0000);
}

H
Hayes Wang 已提交
3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483
static void rtl8106e_hw_phy_config(struct rtl8169_private *tp)
{
	static const struct phy_reg phy_reg_init[] = {
		{ 0x1f, 0x0004 },
		{ 0x10, 0xc07f },
		{ 0x19, 0x7030 },
		{ 0x1f, 0x0000 }
	};

	/* Disable ALDPS before ram code */
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, 0x18, 0x0310);
	msleep(100);

	rtl_apply_firmware(tp);

3484
	rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
H
Hayes Wang 已提交
3485 3486
	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));

3487
	rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
H
Hayes Wang 已提交
3488 3489
}

3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500
static void rtl_hw_phy_config(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_print_mac_version(tp);

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01:
		break;
	case RTL_GIGA_MAC_VER_02:
	case RTL_GIGA_MAC_VER_03:
3501
		rtl8169s_hw_phy_config(tp);
3502 3503
		break;
	case RTL_GIGA_MAC_VER_04:
3504
		rtl8169sb_hw_phy_config(tp);
3505
		break;
3506
	case RTL_GIGA_MAC_VER_05:
3507
		rtl8169scd_hw_phy_config(tp);
3508
		break;
3509
	case RTL_GIGA_MAC_VER_06:
3510
		rtl8169sce_hw_phy_config(tp);
3511
		break;
3512 3513 3514
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
3515
		rtl8102e_hw_phy_config(tp);
3516
		break;
3517
	case RTL_GIGA_MAC_VER_11:
3518
		rtl8168bb_hw_phy_config(tp);
3519 3520
		break;
	case RTL_GIGA_MAC_VER_12:
3521
		rtl8168bef_hw_phy_config(tp);
3522 3523
		break;
	case RTL_GIGA_MAC_VER_17:
3524
		rtl8168bef_hw_phy_config(tp);
3525
		break;
F
Francois Romieu 已提交
3526
	case RTL_GIGA_MAC_VER_18:
3527
		rtl8168cp_1_hw_phy_config(tp);
F
Francois Romieu 已提交
3528 3529
		break;
	case RTL_GIGA_MAC_VER_19:
3530
		rtl8168c_1_hw_phy_config(tp);
F
Francois Romieu 已提交
3531
		break;
3532
	case RTL_GIGA_MAC_VER_20:
3533
		rtl8168c_2_hw_phy_config(tp);
3534
		break;
F
Francois Romieu 已提交
3535
	case RTL_GIGA_MAC_VER_21:
3536
		rtl8168c_3_hw_phy_config(tp);
F
Francois Romieu 已提交
3537
		break;
3538
	case RTL_GIGA_MAC_VER_22:
3539
		rtl8168c_4_hw_phy_config(tp);
3540
		break;
F
Francois Romieu 已提交
3541
	case RTL_GIGA_MAC_VER_23:
3542
	case RTL_GIGA_MAC_VER_24:
3543
		rtl8168cp_2_hw_phy_config(tp);
F
Francois Romieu 已提交
3544
		break;
F
Francois Romieu 已提交
3545
	case RTL_GIGA_MAC_VER_25:
3546
		rtl8168d_1_hw_phy_config(tp);
3547 3548
		break;
	case RTL_GIGA_MAC_VER_26:
3549
		rtl8168d_2_hw_phy_config(tp);
3550 3551
		break;
	case RTL_GIGA_MAC_VER_27:
3552
		rtl8168d_3_hw_phy_config(tp);
F
Francois Romieu 已提交
3553
		break;
F
françois romieu 已提交
3554 3555 3556
	case RTL_GIGA_MAC_VER_28:
		rtl8168d_4_hw_phy_config(tp);
		break;
3557 3558 3559 3560
	case RTL_GIGA_MAC_VER_29:
	case RTL_GIGA_MAC_VER_30:
		rtl8105e_hw_phy_config(tp);
		break;
F
Francois Romieu 已提交
3561 3562 3563
	case RTL_GIGA_MAC_VER_31:
		/* None. */
		break;
H
hayeswang 已提交
3564 3565
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
H
Hayes Wang 已提交
3566 3567 3568 3569
		rtl8168e_1_hw_phy_config(tp);
		break;
	case RTL_GIGA_MAC_VER_34:
		rtl8168e_2_hw_phy_config(tp);
H
hayeswang 已提交
3570
		break;
3571 3572 3573 3574 3575 3576
	case RTL_GIGA_MAC_VER_35:
		rtl8168f_1_hw_phy_config(tp);
		break;
	case RTL_GIGA_MAC_VER_36:
		rtl8168f_2_hw_phy_config(tp);
		break;
F
Francois Romieu 已提交
3577

3578 3579 3580 3581
	case RTL_GIGA_MAC_VER_37:
		rtl8402_hw_phy_config(tp);
		break;

3582 3583 3584 3585
	case RTL_GIGA_MAC_VER_38:
		rtl8411_hw_phy_config(tp);
		break;

H
Hayes Wang 已提交
3586 3587 3588 3589
	case RTL_GIGA_MAC_VER_39:
		rtl8106e_hw_phy_config(tp);
		break;

H
Hayes Wang 已提交
3590 3591 3592 3593 3594
	case RTL_GIGA_MAC_VER_40:
		rtl8168g_1_hw_phy_config(tp);
		break;

	case RTL_GIGA_MAC_VER_41:
3595 3596 3597 3598 3599
	default:
		break;
	}
}

3600
static void rtl_phy_work(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
3601 3602 3603 3604 3605
{
	struct timer_list *timer = &tp->timer;
	void __iomem *ioaddr = tp->mmio_addr;
	unsigned long timeout = RTL8169_PHY_TIMEOUT;

3606
	assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
L
Linus Torvalds 已提交
3607

3608
	if (tp->phy_reset_pending(tp)) {
3609
		/*
L
Linus Torvalds 已提交
3610 3611 3612 3613 3614 3615 3616 3617
		 * A busy loop could burn quite a few cycles on nowadays CPU.
		 * Let's delay the execution of the timer for a few ticks.
		 */
		timeout = HZ/10;
		goto out_mod_timer;
	}

	if (tp->link_ok(ioaddr))
3618
		return;
L
Linus Torvalds 已提交
3619

3620
	netif_warn(tp, link, tp->dev, "PHY reset until link up\n");
L
Linus Torvalds 已提交
3621

3622
	tp->phy_reset_enable(tp);
L
Linus Torvalds 已提交
3623 3624 3625

out_mod_timer:
	mod_timer(timer, jiffies + timeout);
3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638
}

static void rtl_schedule_task(struct rtl8169_private *tp, enum rtl_flag flag)
{
	if (!test_and_set_bit(flag, tp->wk.flags))
		schedule_work(&tp->wk.work);
}

static void rtl8169_phy_timer(unsigned long __opaque)
{
	struct net_device *dev = (struct net_device *)__opaque;
	struct rtl8169_private *tp = netdev_priv(dev);

3639
	rtl_schedule_task(tp, RTL_FLAG_TASK_PHY_PENDING);
L
Linus Torvalds 已提交
3640 3641 3642 3643 3644 3645 3646
}

static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
				  void __iomem *ioaddr)
{
	iounmap(ioaddr);
	pci_release_regions(pdev);
3647
	pci_clear_mwi(pdev);
L
Linus Torvalds 已提交
3648 3649 3650 3651
	pci_disable_device(pdev);
	free_netdev(dev);
}

3652 3653 3654 3655 3656
DECLARE_RTL_COND(rtl_phy_reset_cond)
{
	return tp->phy_reset_pending(tp);
}

3657 3658 3659
static void rtl8169_phy_reset(struct net_device *dev,
			      struct rtl8169_private *tp)
{
3660
	tp->phy_reset_enable(tp);
3661
	rtl_msleep_loop_wait_low(tp, &rtl_phy_reset_cond, 1, 100);
3662 3663
}

3664 3665 3666 3667 3668 3669 3670 3671
static bool rtl_tbi_enabled(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return (tp->mac_version == RTL_GIGA_MAC_VER_01) &&
	    (RTL_R8(PHYstatus) & TBI_Enable);
}

3672 3673 3674 3675
static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

3676
	rtl_hw_phy_config(dev);
3677

3678 3679 3680 3681
	if (tp->mac_version <= RTL_GIGA_MAC_VER_06) {
		dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
		RTL_W8(0x82, 0x01);
	}
3682

3683 3684 3685 3686
	pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);

	if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
		pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
3687

3688
	if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
3689 3690 3691
		dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
		RTL_W8(0x82, 0x01);
		dprintk("Set PHY Reg 0x0bh = 0x00h\n");
3692
		rtl_writephy(tp, 0x0b, 0x0000); //w 0x0b 15 0 0
3693 3694
	}

3695 3696
	rtl8169_phy_reset(dev, tp);

3697
	rtl8169_set_speed(dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL,
F
Francois Romieu 已提交
3698 3699 3700 3701 3702
			  ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
			  ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
			  (tp->mii.supports_gmii ?
			   ADVERTISED_1000baseT_Half |
			   ADVERTISED_1000baseT_Full : 0));
3703

3704
	if (rtl_tbi_enabled(tp))
3705
		netif_info(tp, link, dev, "TBI auto-negotiating\n");
3706 3707
}

3708 3709 3710 3711 3712 3713 3714 3715 3716
static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
{
	void __iomem *ioaddr = tp->mmio_addr;
	u32 high;
	u32 low;

	low  = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24);
	high = addr[4] | (addr[5] << 8);

3717
	rtl_lock_work(tp);
3718 3719

	RTL_W8(Cfg9346, Cfg9346_Unlock);
3720

3721
	RTL_W32(MAC4, high);
3722 3723
	RTL_R32(MAC4);

3724
	RTL_W32(MAC0, low);
3725 3726
	RTL_R32(MAC0);

3727 3728 3729 3730 3731 3732 3733 3734 3735
	if (tp->mac_version == RTL_GIGA_MAC_VER_34) {
		const struct exgmac_reg e[] = {
			{ .addr = 0xe0, ERIAR_MASK_1111, .val = low },
			{ .addr = 0xe4, ERIAR_MASK_1111, .val = high },
			{ .addr = 0xf0, ERIAR_MASK_1111, .val = low << 16 },
			{ .addr = 0xf4, ERIAR_MASK_1111, .val = high << 16 |
								low  >> 16 },
		};

3736
		rtl_write_exgmac_batch(tp, e, ARRAY_SIZE(e));
3737 3738
	}

3739 3740
	RTL_W8(Cfg9346, Cfg9346_Lock);

3741
	rtl_unlock_work(tp);
3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758
}

static int rtl_set_mac_address(struct net_device *dev, void *p)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct sockaddr *addr = p;

	if (!is_valid_ether_addr(addr->sa_data))
		return -EADDRNOTAVAIL;

	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);

	rtl_rar_set(tp, dev->dev_addr);

	return 0;
}

3759 3760 3761 3762 3763
static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct mii_ioctl_data *data = if_mii(ifr);

F
Francois Romieu 已提交
3764 3765
	return netif_running(dev) ? tp->do_ioctl(tp, data, cmd) : -ENODEV;
}
3766

F
Francois Romieu 已提交
3767 3768
static int rtl_xmii_ioctl(struct rtl8169_private *tp,
			  struct mii_ioctl_data *data, int cmd)
F
Francois Romieu 已提交
3769
{
3770 3771 3772 3773 3774 3775
	switch (cmd) {
	case SIOCGMIIPHY:
		data->phy_id = 32; /* Internal PHY */
		return 0;

	case SIOCGMIIREG:
3776
		data->val_out = rtl_readphy(tp, data->reg_num & 0x1f);
3777 3778 3779
		return 0;

	case SIOCSMIIREG:
3780
		rtl_writephy(tp, data->reg_num & 0x1f, data->val_in);
3781 3782 3783 3784 3785
		return 0;
	}
	return -EOPNOTSUPP;
}

F
Francois Romieu 已提交
3786 3787 3788 3789 3790
static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd)
{
	return -EOPNOTSUPP;
}

F
Francois Romieu 已提交
3791 3792 3793 3794 3795 3796 3797 3798
static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp)
{
	if (tp->features & RTL_FEATURE_MSI) {
		pci_disable_msi(pdev);
		tp->features &= ~RTL_FEATURE_MSI;
	}
}

3799 3800 3801 3802 3803 3804 3805 3806 3807
static void __devinit rtl_init_mdio_ops(struct rtl8169_private *tp)
{
	struct mdio_ops *ops = &tp->mdio_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_27:
		ops->write	= r8168dp_1_mdio_write;
		ops->read	= r8168dp_1_mdio_read;
		break;
F
françois romieu 已提交
3808
	case RTL_GIGA_MAC_VER_28:
3809
	case RTL_GIGA_MAC_VER_31:
F
françois romieu 已提交
3810 3811 3812
		ops->write	= r8168dp_2_mdio_write;
		ops->read	= r8168dp_2_mdio_read;
		break;
H
Hayes Wang 已提交
3813 3814 3815 3816 3817
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
		ops->write	= r8168g_mdio_write;
		ops->read	= r8168g_mdio_read;
		break;
3818 3819 3820 3821 3822 3823 3824
	default:
		ops->write	= r8169_mdio_write;
		ops->read	= r8169_mdio_read;
		break;
	}
}

3825 3826 3827 3828 3829 3830 3831 3832 3833 3834
static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_29:
	case RTL_GIGA_MAC_VER_30:
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
	case RTL_GIGA_MAC_VER_34:
3835
	case RTL_GIGA_MAC_VER_37:
3836
	case RTL_GIGA_MAC_VER_38:
H
Hayes Wang 已提交
3837
	case RTL_GIGA_MAC_VER_39:
H
Hayes Wang 已提交
3838 3839
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860
		RTL_W32(RxConfig, RTL_R32(RxConfig) |
			AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
		break;
	default:
		break;
	}
}

static bool rtl_wol_pll_power_down(struct rtl8169_private *tp)
{
	if (!(__rtl8169_get_wol(tp) & WAKE_ANY))
		return false;

	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, MII_BMCR, 0x0000);

	rtl_wol_suspend_quirk(tp);

	return true;
}

F
françois romieu 已提交
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static void r810x_phy_power_down(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
}

static void r810x_phy_power_up(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
	rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
}

static void r810x_pll_power_down(struct rtl8169_private *tp)
{
H
Hayes Wang 已提交
3875 3876
	void __iomem *ioaddr = tp->mmio_addr;

3877
	if (rtl_wol_pll_power_down(tp))
F
françois romieu 已提交
3878 3879 3880
		return;

	r810x_phy_power_down(tp);
H
Hayes Wang 已提交
3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_13:
	case RTL_GIGA_MAC_VER_16:
		break;
	default:
		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
		break;
	}
F
françois romieu 已提交
3894 3895 3896 3897
}

static void r810x_pll_power_up(struct rtl8169_private *tp)
{
H
Hayes Wang 已提交
3898 3899
	void __iomem *ioaddr = tp->mmio_addr;

F
françois romieu 已提交
3900
	r810x_phy_power_up(tp);
H
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3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_13:
	case RTL_GIGA_MAC_VER_16:
		break;
	default:
		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
		break;
	}
F
françois romieu 已提交
3914 3915 3916 3917 3918
}

static void r8168_phy_power_up(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
H
hayeswang 已提交
3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
	case RTL_GIGA_MAC_VER_31:
		rtl_writephy(tp, 0x0e, 0x0000);
		break;
	default:
		break;
	}
F
françois romieu 已提交
3940 3941 3942 3943 3944 3945
	rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE);
}

static void r8168_phy_power_down(struct rtl8169_private *tp)
{
	rtl_writephy(tp, 0x1f, 0x0000);
H
hayeswang 已提交
3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
		rtl_writephy(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
		break;

	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
	case RTL_GIGA_MAC_VER_31:
		rtl_writephy(tp, 0x0e, 0x0200);
	default:
		rtl_writephy(tp, MII_BMCR, BMCR_PDOWN);
		break;
	}
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3972 3973 3974 3975 3976 3977
}

static void r8168_pll_power_down(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

F
Francois Romieu 已提交
3978 3979 3980
	if ((tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_31) &&
3981
	    r8168dp_check_dash(tp)) {
F
françois romieu 已提交
3982
		return;
3983
	}
F
françois romieu 已提交
3984

F
Francois Romieu 已提交
3985 3986
	if ((tp->mac_version == RTL_GIGA_MAC_VER_23 ||
	     tp->mac_version == RTL_GIGA_MAC_VER_24) &&
F
françois romieu 已提交
3987 3988 3989 3990
	    (RTL_R16(CPlusCmd) & ASF)) {
		return;
	}

H
hayeswang 已提交
3991 3992
	if (tp->mac_version == RTL_GIGA_MAC_VER_32 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_33)
3993
		rtl_ephy_write(tp, 0x19, 0xff64);
H
hayeswang 已提交
3994

3995
	if (rtl_wol_pll_power_down(tp))
F
françois romieu 已提交
3996 3997 3998 3999 4000 4001 4002
		return;

	r8168_phy_power_down(tp);

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
4003 4004
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
4005
	case RTL_GIGA_MAC_VER_31:
H
hayeswang 已提交
4006 4007
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
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françois romieu 已提交
4008 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019
		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
		break;
	}
}

static void r8168_pll_power_up(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
4020 4021
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
4022
	case RTL_GIGA_MAC_VER_31:
H
hayeswang 已提交
4023 4024
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
F
françois romieu 已提交
4025 4026 4027 4028 4029 4030 4031
		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
		break;
	}

	r8168_phy_power_up(tp);
}

F
Francois Romieu 已提交
4032 4033
static void rtl_generic_op(struct rtl8169_private *tp,
			   void (*op)(struct rtl8169_private *))
F
françois romieu 已提交
4034 4035 4036 4037 4038 4039 4040
{
	if (op)
		op(tp);
}

static void rtl_pll_power_down(struct rtl8169_private *tp)
{
F
Francois Romieu 已提交
4041
	rtl_generic_op(tp, tp->pll_power_ops.down);
F
françois romieu 已提交
4042 4043 4044 4045
}

static void rtl_pll_power_up(struct rtl8169_private *tp)
{
F
Francois Romieu 已提交
4046
	rtl_generic_op(tp, tp->pll_power_ops.up);
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françois romieu 已提交
4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058
}

static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
{
	struct pll_power_ops *ops = &tp->pll_power_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
	case RTL_GIGA_MAC_VER_08:
	case RTL_GIGA_MAC_VER_09:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_16:
4059 4060
	case RTL_GIGA_MAC_VER_29:
	case RTL_GIGA_MAC_VER_30:
4061
	case RTL_GIGA_MAC_VER_37:
H
Hayes Wang 已提交
4062
	case RTL_GIGA_MAC_VER_39:
F
françois romieu 已提交
4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079
		ops->down	= r810x_pll_power_down;
		ops->up		= r810x_pll_power_up;
		break;

	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
F
françois romieu 已提交
4080
	case RTL_GIGA_MAC_VER_28:
4081
	case RTL_GIGA_MAC_VER_31:
H
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4082 4083
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
H
Hayes Wang 已提交
4084
	case RTL_GIGA_MAC_VER_34:
4085 4086
	case RTL_GIGA_MAC_VER_35:
	case RTL_GIGA_MAC_VER_36:
4087
	case RTL_GIGA_MAC_VER_38:
H
Hayes Wang 已提交
4088 4089
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
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françois romieu 已提交
4090 4091 4092 4093 4094 4095 4096 4097 4098 4099 4100
		ops->down	= r8168_pll_power_down;
		ops->up		= r8168_pll_power_up;
		break;

	default:
		ops->down	= NULL;
		ops->up		= NULL;
		break;
	}
}

4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128
static void rtl_init_rxcfg(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01:
	case RTL_GIGA_MAC_VER_02:
	case RTL_GIGA_MAC_VER_03:
	case RTL_GIGA_MAC_VER_04:
	case RTL_GIGA_MAC_VER_05:
	case RTL_GIGA_MAC_VER_06:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_13:
	case RTL_GIGA_MAC_VER_14:
	case RTL_GIGA_MAC_VER_15:
	case RTL_GIGA_MAC_VER_16:
	case RTL_GIGA_MAC_VER_17:
		RTL_W32(RxConfig, RX_FIFO_THRESH | RX_DMA_BURST);
		break;
	case RTL_GIGA_MAC_VER_18:
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21:
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
4129
	case RTL_GIGA_MAC_VER_34:
4130 4131 4132 4133 4134 4135 4136 4137
		RTL_W32(RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST);
		break;
	default:
		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST);
		break;
	}
}

4138 4139 4140 4141 4142
static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
{
	tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
}

F
Francois Romieu 已提交
4143 4144
static void rtl_hw_jumbo_enable(struct rtl8169_private *tp)
{
4145 4146 4147
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Cfg9346, Cfg9346_Unlock);
F
Francois Romieu 已提交
4148
	rtl_generic_op(tp, tp->jumbo_ops.enable);
4149
	RTL_W8(Cfg9346, Cfg9346_Lock);
F
Francois Romieu 已提交
4150 4151 4152 4153
}

static void rtl_hw_jumbo_disable(struct rtl8169_private *tp)
{
4154 4155 4156
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Cfg9346, Cfg9346_Unlock);
F
Francois Romieu 已提交
4157
	rtl_generic_op(tp, tp->jumbo_ops.disable);
4158
	RTL_W8(Cfg9346, Cfg9346_Lock);
F
Francois Romieu 已提交
4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199
}

static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
	RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
	rtl_tx_performance_tweak(tp->pci_dev, 0x2 << MAX_READ_REQUEST_SHIFT);
}

static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
	RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
	rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);
}

static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
}

static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
}

static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(MaxTxPacketSize, 0x3f);
	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
	RTL_W8(Config4, RTL_R8(Config4) | 0x01);
4200
	rtl_tx_performance_tweak(tp->pci_dev, 0x2 << MAX_READ_REQUEST_SHIFT);
F
Francois Romieu 已提交
4201 4202 4203 4204 4205 4206 4207 4208 4209
}

static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(MaxTxPacketSize, 0x0c);
	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
	RTL_W8(Config4, RTL_R8(Config4) & ~0x01);
4210
	rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);
F
Francois Romieu 已提交
4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285
}

static void r8168b_0_hw_jumbo_enable(struct rtl8169_private *tp)
{
	rtl_tx_performance_tweak(tp->pci_dev,
		(0x2 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
}

static void r8168b_0_hw_jumbo_disable(struct rtl8169_private *tp)
{
	rtl_tx_performance_tweak(tp->pci_dev,
		(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
}

static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	r8168b_0_hw_jumbo_enable(tp);

	RTL_W8(Config4, RTL_R8(Config4) | (1 << 0));
}

static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	r8168b_0_hw_jumbo_disable(tp);

	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
}

static void __devinit rtl_init_jumbo_ops(struct rtl8169_private *tp)
{
	struct jumbo_ops *ops = &tp->jumbo_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
		ops->disable	= r8168b_0_hw_jumbo_disable;
		ops->enable	= r8168b_0_hw_jumbo_enable;
		break;
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
		ops->disable	= r8168b_1_hw_jumbo_disable;
		ops->enable	= r8168b_1_hw_jumbo_enable;
		break;
	case RTL_GIGA_MAC_VER_18: /* Wild guess. Needs info from Realtek. */
	case RTL_GIGA_MAC_VER_19:
	case RTL_GIGA_MAC_VER_20:
	case RTL_GIGA_MAC_VER_21: /* Wild guess. Needs info from Realtek. */
	case RTL_GIGA_MAC_VER_22:
	case RTL_GIGA_MAC_VER_23:
	case RTL_GIGA_MAC_VER_24:
	case RTL_GIGA_MAC_VER_25:
	case RTL_GIGA_MAC_VER_26:
		ops->disable	= r8168c_hw_jumbo_disable;
		ops->enable	= r8168c_hw_jumbo_enable;
		break;
	case RTL_GIGA_MAC_VER_27:
	case RTL_GIGA_MAC_VER_28:
		ops->disable	= r8168dp_hw_jumbo_disable;
		ops->enable	= r8168dp_hw_jumbo_enable;
		break;
	case RTL_GIGA_MAC_VER_31: /* Wild guess. Needs info from Realtek. */
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
	case RTL_GIGA_MAC_VER_34:
		ops->disable	= r8168e_hw_jumbo_disable;
		ops->enable	= r8168e_hw_jumbo_enable;
		break;

	/*
	 * No action needed for jumbo frames with 8169.
	 * No jumbo for 810x at all.
	 */
H
Hayes Wang 已提交
4286 4287
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
F
Francois Romieu 已提交
4288 4289 4290 4291 4292 4293 4294
	default:
		ops->disable	= NULL;
		ops->enable	= NULL;
		break;
	}
}

4295 4296 4297 4298 4299 4300 4301
DECLARE_RTL_COND(rtl_chipcmd_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R8(ChipCmd) & CmdReset;
}

4302 4303 4304 4305 4306 4307
static void rtl_hw_reset(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(ChipCmd, CmdReset);

4308
	rtl_udelay_loop_wait_low(tp, &rtl_chipcmd_cond, 100, 100);
4309 4310
}

4311
static void rtl_request_uncached_firmware(struct rtl8169_private *tp)
4312
{
4313 4314 4315
	struct rtl_fw *rtl_fw;
	const char *name;
	int rc = -ENOMEM;
4316

4317 4318 4319
	name = rtl_lookup_firmware_name(tp);
	if (!name)
		goto out_no_firmware;
4320

4321 4322 4323
	rtl_fw = kzalloc(sizeof(*rtl_fw), GFP_KERNEL);
	if (!rtl_fw)
		goto err_warn;
4324

4325 4326 4327 4328
	rc = request_firmware(&rtl_fw->fw, name, &tp->pci_dev->dev);
	if (rc < 0)
		goto err_free;

4329 4330 4331 4332
	rc = rtl_check_firmware(tp, rtl_fw);
	if (rc < 0)
		goto err_release_firmware;

4333 4334 4335 4336
	tp->rtl_fw = rtl_fw;
out:
	return;

4337 4338
err_release_firmware:
	release_firmware(rtl_fw->fw);
4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352
err_free:
	kfree(rtl_fw);
err_warn:
	netif_warn(tp, ifup, tp->dev, "unable to load firmware patch %s (%d)\n",
		   name, rc);
out_no_firmware:
	tp->rtl_fw = NULL;
	goto out;
}

static void rtl_request_firmware(struct rtl8169_private *tp)
{
	if (IS_ERR(tp->rtl_fw))
		rtl_request_uncached_firmware(tp);
4353 4354
}

4355 4356 4357 4358
static void rtl_rx_close(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

4359
	RTL_W32(RxConfig, RTL_R32(RxConfig) & ~RX_CONFIG_ACCEPT_MASK);
4360 4361
}

4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375
DECLARE_RTL_COND(rtl_npq_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R8(TxPoll) & NPQ;
}

DECLARE_RTL_COND(rtl_txcfg_empty_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(TxConfig) & TXCFG_EMPTY;
}

F
françois romieu 已提交
4376
static void rtl8169_hw_reset(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
4377
{
F
françois romieu 已提交
4378 4379
	void __iomem *ioaddr = tp->mmio_addr;

L
Linus Torvalds 已提交
4380
	/* Disable interrupts */
F
françois romieu 已提交
4381
	rtl8169_irq_mask_and_ack(tp);
L
Linus Torvalds 已提交
4382

4383 4384
	rtl_rx_close(tp);

4385
	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
4386 4387
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
4388
		rtl_udelay_loop_wait_low(tp, &rtl_npq_cond, 20, 42*42);
4389 4390
	} else if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
	           tp->mac_version == RTL_GIGA_MAC_VER_35 ||
4391
	           tp->mac_version == RTL_GIGA_MAC_VER_36 ||
4392
	           tp->mac_version == RTL_GIGA_MAC_VER_37 ||
H
Hayes Wang 已提交
4393 4394
	           tp->mac_version == RTL_GIGA_MAC_VER_40 ||
	           tp->mac_version == RTL_GIGA_MAC_VER_41 ||
4395
	           tp->mac_version == RTL_GIGA_MAC_VER_38) {
4396
		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
4397
		rtl_udelay_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
4398 4399 4400
	} else {
		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
		udelay(100);
F
françois romieu 已提交
4401 4402
	}

4403
	rtl_hw_reset(tp);
L
Linus Torvalds 已提交
4404 4405
}

4406
static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)
4407 4408 4409 4410 4411 4412 4413 4414
{
	void __iomem *ioaddr = tp->mmio_addr;

	/* Set DMA burst size and Interframe Gap Time */
	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
		(InterFrameGap << TxInterFrameGapShift));
}

4415
static void rtl_hw_start(struct net_device *dev)
L
Linus Torvalds 已提交
4416 4417 4418
{
	struct rtl8169_private *tp = netdev_priv(dev);

4419 4420
	tp->hw_start(dev);

4421
	rtl_irq_enable_all(tp);
4422 4423
}

4424 4425 4426 4427 4428 4429 4430 4431 4432
static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp,
					 void __iomem *ioaddr)
{
	/*
	 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
	 * register to be written before TxDescAddrLow to work.
	 * Switching from MMIO to I/O access fixes the issue as well.
	 */
	RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32);
4433
	RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32));
4434
	RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32);
4435
	RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32));
4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446
}

static u16 rtl_rw_cpluscmd(void __iomem *ioaddr)
{
	u16 cmd;

	cmd = RTL_R16(CPlusCmd);
	RTL_W16(CPlusCmd, cmd);
	return cmd;
}

4447
static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz)
4448 4449
{
	/* Low hurts. Let's disable the filtering. */
4450
	RTL_W16(RxMaxSize, rx_buf_sz + 1);
4451 4452
}

4453 4454
static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version)
{
4455
	static const struct rtl_cfg2_info {
4456 4457 4458 4459 4460 4461 4462 4463
		u32 mac_version;
		u32 clk;
		u32 val;
	} cfg2_info [] = {
		{ RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd
		{ RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff },
		{ RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe
		{ RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff }
4464 4465
	};
	const struct rtl_cfg2_info *p = cfg2_info;
4466 4467 4468 4469
	unsigned int i;
	u32 clk;

	clk = RTL_R8(Config2) & PCI_Clock_66MHz;
4470
	for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) {
4471 4472 4473 4474 4475 4476 4477
		if ((p->mac_version == mac_version) && (p->clk == clk)) {
			RTL_W32(0x7c, p->val);
			break;
		}
	}
}

4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527
static void rtl_set_rx_mode(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	u32 mc_filter[2];	/* Multicast hash filter */
	int rx_mode;
	u32 tmp = 0;

	if (dev->flags & IFF_PROMISC) {
		/* Unconditionally log net taps. */
		netif_notice(tp, link, dev, "Promiscuous mode enabled\n");
		rx_mode =
		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
		    AcceptAllPhys;
		mc_filter[1] = mc_filter[0] = 0xffffffff;
	} else if ((netdev_mc_count(dev) > multicast_filter_limit) ||
		   (dev->flags & IFF_ALLMULTI)) {
		/* Too many to filter perfectly -- accept all multicasts. */
		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
		mc_filter[1] = mc_filter[0] = 0xffffffff;
	} else {
		struct netdev_hw_addr *ha;

		rx_mode = AcceptBroadcast | AcceptMyPhys;
		mc_filter[1] = mc_filter[0] = 0;
		netdev_for_each_mc_addr(ha, dev) {
			int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
			rx_mode |= AcceptMulticast;
		}
	}

	if (dev->features & NETIF_F_RXALL)
		rx_mode |= (AcceptErr | AcceptRunt);

	tmp = (RTL_R32(RxConfig) & ~RX_CONFIG_ACCEPT_MASK) | rx_mode;

	if (tp->mac_version > RTL_GIGA_MAC_VER_06) {
		u32 data = mc_filter[0];

		mc_filter[0] = swab32(mc_filter[1]);
		mc_filter[1] = swab32(data);
	}

	RTL_W32(MAR0 + 4, mc_filter[1]);
	RTL_W32(MAR0 + 0, mc_filter[0]);

	RTL_W32(RxConfig, tmp);
}

4528 4529 4530 4531 4532 4533
static void rtl_hw_start_8169(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

4534 4535 4536 4537 4538
	if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
		RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);
		pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08);
	}

L
Linus Torvalds 已提交
4539
	RTL_W8(Cfg9346, Cfg9346_Unlock);
F
Francois Romieu 已提交
4540 4541 4542 4543
	if (tp->mac_version == RTL_GIGA_MAC_VER_01 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_04)
4544 4545
		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);

4546 4547
	rtl_init_rxcfg(tp);

4548
	RTL_W8(EarlyTxThres, NoEarlyTx);
L
Linus Torvalds 已提交
4549

E
Eric Dumazet 已提交
4550
	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
L
Linus Torvalds 已提交
4551

F
Francois Romieu 已提交
4552 4553 4554 4555
	if (tp->mac_version == RTL_GIGA_MAC_VER_01 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_04)
4556
		rtl_set_rx_tx_config_registers(tp);
L
Linus Torvalds 已提交
4557

4558
	tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
L
Linus Torvalds 已提交
4559

F
Francois Romieu 已提交
4560 4561
	if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_03) {
4562
		dprintk("Set MAC Reg C+CR Offset 0xE0. "
L
Linus Torvalds 已提交
4563
			"Bit-3 and bit-14 MUST be 1\n");
4564
		tp->cp_cmd |= (1 << 14);
L
Linus Torvalds 已提交
4565 4566
	}

4567 4568
	RTL_W16(CPlusCmd, tp->cp_cmd);

4569 4570
	rtl8169_set_magic_reg(ioaddr, tp->mac_version);

L
Linus Torvalds 已提交
4571 4572 4573 4574 4575 4576
	/*
	 * Undocumented corner. Supposedly:
	 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
	 */
	RTL_W16(IntrMitigate, 0x0000);

4577
	rtl_set_rx_tx_desc_registers(tp, ioaddr);
4578

F
Francois Romieu 已提交
4579 4580 4581 4582
	if (tp->mac_version != RTL_GIGA_MAC_VER_01 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_02 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_03 &&
	    tp->mac_version != RTL_GIGA_MAC_VER_04) {
4583 4584 4585 4586
		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
		rtl_set_rx_tx_config_registers(tp);
	}

L
Linus Torvalds 已提交
4587
	RTL_W8(Cfg9346, Cfg9346_Lock);
F
Francois Romieu 已提交
4588 4589 4590

	/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
	RTL_R8(IntrMask);
L
Linus Torvalds 已提交
4591 4592 4593

	RTL_W32(RxMissed, 0);

4594
	rtl_set_rx_mode(dev);
L
Linus Torvalds 已提交
4595 4596 4597

	/* no early-rx interrupts */
	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
4598
}
L
Linus Torvalds 已提交
4599

4600 4601 4602
static void rtl_csi_write(struct rtl8169_private *tp, int addr, int value)
{
	if (tp->csi_ops.write)
4603
		tp->csi_ops.write(tp, addr, value);
4604 4605 4606 4607
}

static u32 rtl_csi_read(struct rtl8169_private *tp, int addr)
{
4608
	return tp->csi_ops.read ? tp->csi_ops.read(tp, addr) : ~0;
4609 4610 4611
}

static void rtl_csi_access_enable(struct rtl8169_private *tp, u32 bits)
4612 4613 4614
{
	u32 csi;

4615 4616 4617 4618 4619 4620 4621
	csi = rtl_csi_read(tp, 0x070c) & 0x00ffffff;
	rtl_csi_write(tp, 0x070c, csi | bits);
}

static void rtl_csi_access_enable_1(struct rtl8169_private *tp)
{
	rtl_csi_access_enable(tp, 0x17000000);
4622 4623
}

4624
static void rtl_csi_access_enable_2(struct rtl8169_private *tp)
F
françois romieu 已提交
4625
{
4626
	rtl_csi_access_enable(tp, 0x27000000);
F
françois romieu 已提交
4627 4628
}

4629 4630 4631 4632 4633 4634 4635
DECLARE_RTL_COND(rtl_csiar_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R32(CSIAR) & CSIAR_FLAG;
}

4636
static void r8169_csi_write(struct rtl8169_private *tp, int addr, int value)
4637
{
4638
	void __iomem *ioaddr = tp->mmio_addr;
4639 4640 4641 4642 4643

	RTL_W32(CSIDR, value);
	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);

4644
	rtl_udelay_loop_wait_low(tp, &rtl_csiar_cond, 10, 100);
4645 4646
}

4647
static u32 r8169_csi_read(struct rtl8169_private *tp, int addr)
4648
{
4649
	void __iomem *ioaddr = tp->mmio_addr;
4650 4651 4652 4653

	RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);

4654 4655
	return rtl_udelay_loop_wait_high(tp, &rtl_csiar_cond, 10, 100) ?
		RTL_R32(CSIDR) : ~0;
4656 4657
}

4658
static void r8402_csi_write(struct rtl8169_private *tp, int addr, int value)
4659
{
4660
	void __iomem *ioaddr = tp->mmio_addr;
4661 4662 4663 4664 4665 4666

	RTL_W32(CSIDR, value);
	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT |
		CSIAR_FUNC_NIC);

4667
	rtl_udelay_loop_wait_low(tp, &rtl_csiar_cond, 10, 100);
4668 4669
}

4670
static u32 r8402_csi_read(struct rtl8169_private *tp, int addr)
4671
{
4672
	void __iomem *ioaddr = tp->mmio_addr;
4673 4674 4675 4676

	RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) | CSIAR_FUNC_NIC |
		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);

4677 4678
	return rtl_udelay_loop_wait_high(tp, &rtl_csiar_cond, 10, 100) ?
		RTL_R32(CSIDR) : ~0;
4679 4680
}

4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703
static void __devinit rtl_init_csi_ops(struct rtl8169_private *tp)
{
	struct csi_ops *ops = &tp->csi_ops;

	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_01:
	case RTL_GIGA_MAC_VER_02:
	case RTL_GIGA_MAC_VER_03:
	case RTL_GIGA_MAC_VER_04:
	case RTL_GIGA_MAC_VER_05:
	case RTL_GIGA_MAC_VER_06:
	case RTL_GIGA_MAC_VER_10:
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_13:
	case RTL_GIGA_MAC_VER_14:
	case RTL_GIGA_MAC_VER_15:
	case RTL_GIGA_MAC_VER_16:
	case RTL_GIGA_MAC_VER_17:
		ops->write	= NULL;
		ops->read	= NULL;
		break;

4704
	case RTL_GIGA_MAC_VER_37:
4705
	case RTL_GIGA_MAC_VER_38:
4706 4707 4708 4709
		ops->write	= r8402_csi_write;
		ops->read	= r8402_csi_read;
		break;

4710 4711 4712 4713 4714
	default:
		ops->write	= r8169_csi_write;
		ops->read	= r8169_csi_read;
		break;
	}
4715 4716 4717 4718 4719 4720 4721 4722
}

struct ephy_info {
	unsigned int offset;
	u16 mask;
	u16 bits;
};

4723 4724
static void rtl_ephy_init(struct rtl8169_private *tp, const struct ephy_info *e,
			  int len)
4725 4726 4727 4728
{
	u16 w;

	while (len-- > 0) {
4729 4730
		w = (rtl_ephy_read(tp, e->offset) & ~e->mask) | e->bits;
		rtl_ephy_write(tp, e->offset, w);
4731 4732 4733 4734
		e++;
	}
}

4735 4736
static void rtl_disable_clock_request(struct pci_dev *pdev)
{
4737 4738
	pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
				   PCI_EXP_LNKCTL_CLKREQ_EN);
4739 4740
}

F
françois romieu 已提交
4741 4742
static void rtl_enable_clock_request(struct pci_dev *pdev)
{
4743 4744
	pcie_capability_set_word(pdev, PCI_EXP_LNKCTL,
				 PCI_EXP_LNKCTL_CLKREQ_EN);
F
françois romieu 已提交
4745 4746
}

4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757
#define R8168_CPCMD_QUIRK_MASK (\
	EnableBist | \
	Mac_dbgo_oe | \
	Force_half_dup | \
	Force_rxflow_en | \
	Force_txflow_en | \
	Cxpl_dbg_sel | \
	ASF | \
	PktCntrDisable | \
	Mac_dbgo_sel)

4758
static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
4759
{
4760 4761 4762
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

4763 4764 4765 4766
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);

4767 4768
	rtl_tx_performance_tweak(pdev,
		(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
4769 4770
}

4771
static void rtl_hw_start_8168bef(struct rtl8169_private *tp)
4772
{
4773 4774 4775
	void __iomem *ioaddr = tp->mmio_addr;

	rtl_hw_start_8168bb(tp);
4776

4777
	RTL_W8(MaxTxPacketSize, TxPacketMax);
4778 4779

	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
4780 4781
}

4782
static void __rtl_hw_start_8168cp(struct rtl8169_private *tp)
4783
{
4784 4785 4786
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

4787 4788 4789 4790
	RTL_W8(Config1, RTL_R8(Config1) | Speed_down);

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

4791
	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
4792 4793 4794 4795

	rtl_disable_clock_request(pdev);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
4796 4797
}

4798
static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp)
4799
{
4800
	static const struct ephy_info e_info_8168cp[] = {
4801 4802 4803 4804 4805 4806 4807
		{ 0x01, 0,	0x0001 },
		{ 0x02, 0x0800,	0x1000 },
		{ 0x03, 0,	0x0042 },
		{ 0x06, 0x0080,	0x0000 },
		{ 0x07, 0,	0x2000 }
	};

4808
	rtl_csi_access_enable_2(tp);
4809

4810
	rtl_ephy_init(tp, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
4811

4812
	__rtl_hw_start_8168cp(tp);
4813 4814
}

4815
static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)
F
Francois Romieu 已提交
4816
{
4817 4818 4819 4820
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_2(tp);
F
Francois Romieu 已提交
4821 4822 4823 4824 4825 4826 4827 4828

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

4829
static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
4830
{
4831 4832 4833 4834
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_2(tp);
4835 4836 4837 4838 4839 4840

	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	/* Magic. */
	RTL_W8(DBG_REG, 0x20);

4841
	RTL_W8(MaxTxPacketSize, TxPacketMax);
4842 4843 4844 4845 4846 4847

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

4848
static void rtl_hw_start_8168c_1(struct rtl8169_private *tp)
4849
{
4850
	void __iomem *ioaddr = tp->mmio_addr;
4851
	static const struct ephy_info e_info_8168c_1[] = {
4852 4853 4854 4855 4856
		{ 0x02, 0x0800,	0x1000 },
		{ 0x03, 0,	0x0002 },
		{ 0x06, 0x0080,	0x0000 }
	};

4857
	rtl_csi_access_enable_2(tp);
4858 4859 4860

	RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);

4861
	rtl_ephy_init(tp, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1));
4862

4863
	__rtl_hw_start_8168cp(tp);
4864 4865
}

4866
static void rtl_hw_start_8168c_2(struct rtl8169_private *tp)
4867
{
4868
	static const struct ephy_info e_info_8168c_2[] = {
4869 4870 4871 4872
		{ 0x01, 0,	0x0001 },
		{ 0x03, 0x0400,	0x0220 }
	};

4873
	rtl_csi_access_enable_2(tp);
4874

4875
	rtl_ephy_init(tp, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
4876

4877
	__rtl_hw_start_8168cp(tp);
4878 4879
}

4880
static void rtl_hw_start_8168c_3(struct rtl8169_private *tp)
F
Francois Romieu 已提交
4881
{
4882
	rtl_hw_start_8168c_2(tp);
F
Francois Romieu 已提交
4883 4884
}

4885
static void rtl_hw_start_8168c_4(struct rtl8169_private *tp)
4886
{
4887
	rtl_csi_access_enable_2(tp);
4888

4889
	__rtl_hw_start_8168cp(tp);
4890 4891
}

4892
static void rtl_hw_start_8168d(struct rtl8169_private *tp)
F
Francois Romieu 已提交
4893
{
4894 4895 4896 4897
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_2(tp);
F
Francois Romieu 已提交
4898 4899 4900

	rtl_disable_clock_request(pdev);

4901
	RTL_W8(MaxTxPacketSize, TxPacketMax);
F
Francois Romieu 已提交
4902 4903 4904 4905 4906 4907

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}

4908
static void rtl_hw_start_8168dp(struct rtl8169_private *tp)
4909
{
4910 4911 4912 4913
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_1(tp);
4914 4915 4916 4917 4918 4919 4920 4921

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	rtl_disable_clock_request(pdev);
}

4922
static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)
F
françois romieu 已提交
4923
{
4924 4925
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
F
françois romieu 已提交
4926 4927 4928 4929 4930 4931 4932
	static const struct ephy_info e_info_8168d_4[] = {
		{ 0x0b, ~0,	0x48 },
		{ 0x19, 0x20,	0x50 },
		{ 0x0c, ~0,	0x20 }
	};
	int i;

4933
	rtl_csi_access_enable_1(tp);
F
françois romieu 已提交
4934 4935 4936 4937 4938 4939 4940 4941 4942

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	for (i = 0; i < ARRAY_SIZE(e_info_8168d_4); i++) {
		const struct ephy_info *e = e_info_8168d_4 + i;
		u16 w;

4943 4944
		w = rtl_ephy_read(tp, e->offset);
		rtl_ephy_write(tp, 0x03, (w & e->mask) | e->bits);
F
françois romieu 已提交
4945 4946 4947 4948 4949
	}

	rtl_enable_clock_request(pdev);
}

4950
static void rtl_hw_start_8168e_1(struct rtl8169_private *tp)
H
hayeswang 已提交
4951
{
4952 4953
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
H
Hayes Wang 已提交
4954
	static const struct ephy_info e_info_8168e_1[] = {
H
hayeswang 已提交
4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969
		{ 0x00, 0x0200,	0x0100 },
		{ 0x00, 0x0000,	0x0004 },
		{ 0x06, 0x0002,	0x0001 },
		{ 0x06, 0x0000,	0x0030 },
		{ 0x07, 0x0000,	0x2000 },
		{ 0x00, 0x0000,	0x0020 },
		{ 0x03, 0x5800,	0x2000 },
		{ 0x03, 0x0000,	0x0001 },
		{ 0x01, 0x0800,	0x1000 },
		{ 0x07, 0x0000,	0x4000 },
		{ 0x1e, 0x0000,	0x2000 },
		{ 0x19, 0xffff,	0xfe6c },
		{ 0x0a, 0x0000,	0x0040 }
	};

4970
	rtl_csi_access_enable_2(tp);
H
hayeswang 已提交
4971

4972
	rtl_ephy_init(tp, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));
H
hayeswang 已提交
4973 4974 4975 4976 4977 4978 4979 4980

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(MaxTxPacketSize, TxPacketMax);

	rtl_disable_clock_request(pdev);

	/* Reset tx FIFO pointer */
F
Francois Romieu 已提交
4981 4982
	RTL_W32(MISC, RTL_R32(MISC) | TXPLA_RST);
	RTL_W32(MISC, RTL_R32(MISC) & ~TXPLA_RST);
H
hayeswang 已提交
4983

F
Francois Romieu 已提交
4984
	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
H
hayeswang 已提交
4985 4986
}

4987
static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
H
Hayes Wang 已提交
4988
{
4989 4990
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
H
Hayes Wang 已提交
4991 4992 4993 4994 4995
	static const struct ephy_info e_info_8168e_2[] = {
		{ 0x09, 0x0000,	0x0080 },
		{ 0x19, 0x0000,	0x0224 }
	};

4996
	rtl_csi_access_enable_1(tp);
H
Hayes Wang 已提交
4997

4998
	rtl_ephy_init(tp, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));
H
Hayes Wang 已提交
4999 5000 5001

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

5002 5003 5004 5005 5006 5007 5008 5009
	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00100002, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x07ff0060, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00, ERIAR_EXGMAC);
H
Hayes Wang 已提交
5010

5011
	RTL_W8(MaxTxPacketSize, EarlySize);
H
Hayes Wang 已提交
5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025

	rtl_disable_clock_request(pdev);

	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);

	/* Adjust EEE LED frequency */
	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);

	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
	RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);
	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
}

5026
static void rtl_hw_start_8168f(struct rtl8169_private *tp)
5027
{
5028 5029
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
5030

5031
	rtl_csi_access_enable_2(tp);
5032 5033 5034

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

5035 5036 5037 5038 5039 5040 5041 5042 5043 5044
	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00100002, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x1d0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x00000060, ERIAR_EXGMAC);
5045 5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056

	RTL_W8(MaxTxPacketSize, EarlySize);

	rtl_disable_clock_request(pdev);

	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);
	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
	RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);
	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
}

5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068
static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	static const struct ephy_info e_info_8168f_1[] = {
		{ 0x06, 0x00c0,	0x0020 },
		{ 0x08, 0x0001,	0x0002 },
		{ 0x09, 0x0000,	0x0080 },
		{ 0x19, 0x0000,	0x0224 }
	};

	rtl_hw_start_8168f(tp);

5069
	rtl_ephy_init(tp, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
5070

5071
	rtl_w1w0_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00, ERIAR_EXGMAC);
5072 5073 5074 5075 5076

	/* Adjust EEE LED frequency */
	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
}

5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087
static void rtl_hw_start_8411(struct rtl8169_private *tp)
{
	static const struct ephy_info e_info_8168f_1[] = {
		{ 0x06, 0x00c0,	0x0020 },
		{ 0x0f, 0xffff,	0x5200 },
		{ 0x1e, 0x0000,	0x4000 },
		{ 0x19, 0x0000,	0x0224 }
	};

	rtl_hw_start_8168f(tp);

5088
	rtl_ephy_init(tp, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
5089

5090
	rtl_w1w0_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000, ERIAR_EXGMAC);
5091 5092
}

H
Hayes Wang 已提交
5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105 5106 5107 5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119 5120 5121 5122
static void rtl_hw_start_8168g_1(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x080002, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, 0x38, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC);

	rtl_csi_access_enable_1(tp);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);

	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
	RTL_W32(MISC, RTL_R32(MISC) & ~RXDV_GATED_EN);
	RTL_W8(MaxTxPacketSize, EarlySize);

	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);

	/* Adjust EEE LED frequency */
	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);

	rtl_w1w0_eri(tp, 0x2fc, ERIAR_MASK_0001, 0x01, 0x02, ERIAR_EXGMAC);
}

5123 5124
static void rtl_hw_start_8168(struct net_device *dev)
{
5125 5126 5127 5128 5129
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;

	RTL_W8(Cfg9346, Cfg9346_Unlock);

5130
	RTL_W8(MaxTxPacketSize, TxPacketMax);
5131

E
Eric Dumazet 已提交
5132
	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
5133

5134
	tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1;
5135 5136 5137

	RTL_W16(CPlusCmd, tp->cp_cmd);

5138
	RTL_W16(IntrMitigate, 0x5151);
5139

5140
	/* Work around for RxFIFO overflow. */
F
françois romieu 已提交
5141
	if (tp->mac_version == RTL_GIGA_MAC_VER_11) {
5142 5143
		tp->event_slow |= RxFIFOOver | PCSTimeout;
		tp->event_slow &= ~RxOverflow;
5144 5145 5146
	}

	rtl_set_rx_tx_desc_registers(tp, ioaddr);
5147

5148 5149 5150 5151
	rtl_set_rx_mode(dev);

	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
		(InterFrameGap << TxInterFrameGapShift));
5152 5153 5154

	RTL_R8(IntrMask);

5155 5156
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
5157
		rtl_hw_start_8168bb(tp);
5158
		break;
5159 5160 5161

	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
5162
		rtl_hw_start_8168bef(tp);
5163
		break;
5164 5165

	case RTL_GIGA_MAC_VER_18:
5166
		rtl_hw_start_8168cp_1(tp);
5167
		break;
5168 5169

	case RTL_GIGA_MAC_VER_19:
5170
		rtl_hw_start_8168c_1(tp);
5171
		break;
5172 5173

	case RTL_GIGA_MAC_VER_20:
5174
		rtl_hw_start_8168c_2(tp);
5175
		break;
5176

F
Francois Romieu 已提交
5177
	case RTL_GIGA_MAC_VER_21:
5178
		rtl_hw_start_8168c_3(tp);
5179
		break;
F
Francois Romieu 已提交
5180

5181
	case RTL_GIGA_MAC_VER_22:
5182
		rtl_hw_start_8168c_4(tp);
5183
		break;
5184

F
Francois Romieu 已提交
5185
	case RTL_GIGA_MAC_VER_23:
5186
		rtl_hw_start_8168cp_2(tp);
5187
		break;
F
Francois Romieu 已提交
5188

5189
	case RTL_GIGA_MAC_VER_24:
5190
		rtl_hw_start_8168cp_3(tp);
5191
		break;
5192

F
Francois Romieu 已提交
5193
	case RTL_GIGA_MAC_VER_25:
5194 5195
	case RTL_GIGA_MAC_VER_26:
	case RTL_GIGA_MAC_VER_27:
5196
		rtl_hw_start_8168d(tp);
5197
		break;
F
Francois Romieu 已提交
5198

F
françois romieu 已提交
5199
	case RTL_GIGA_MAC_VER_28:
5200
		rtl_hw_start_8168d_4(tp);
5201
		break;
F
Francois Romieu 已提交
5202

5203
	case RTL_GIGA_MAC_VER_31:
5204
		rtl_hw_start_8168dp(tp);
5205 5206
		break;

H
hayeswang 已提交
5207 5208
	case RTL_GIGA_MAC_VER_32:
	case RTL_GIGA_MAC_VER_33:
5209
		rtl_hw_start_8168e_1(tp);
H
Hayes Wang 已提交
5210 5211
		break;
	case RTL_GIGA_MAC_VER_34:
5212
		rtl_hw_start_8168e_2(tp);
H
hayeswang 已提交
5213
		break;
F
françois romieu 已提交
5214

5215 5216
	case RTL_GIGA_MAC_VER_35:
	case RTL_GIGA_MAC_VER_36:
5217
		rtl_hw_start_8168f_1(tp);
5218 5219
		break;

5220 5221 5222 5223
	case RTL_GIGA_MAC_VER_38:
		rtl_hw_start_8411(tp);
		break;

H
Hayes Wang 已提交
5224 5225 5226 5227 5228
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
		rtl_hw_start_8168g_1(tp);
		break;

5229 5230 5231
	default:
		printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
			dev->name, tp->mac_version);
5232
		break;
5233
	}
5234

5235 5236
	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);

5237 5238
	RTL_W8(Cfg9346, Cfg9346_Lock);

5239
	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
5240
}
L
Linus Torvalds 已提交
5241

5242 5243 5244 5245
#define R810X_CPCMD_QUIRK_MASK (\
	EnableBist | \
	Mac_dbgo_oe | \
	Force_half_dup | \
F
françois romieu 已提交
5246
	Force_rxflow_en | \
5247 5248 5249 5250
	Force_txflow_en | \
	Cxpl_dbg_sel | \
	ASF | \
	PktCntrDisable | \
5251
	Mac_dbgo_sel)
5252

5253
static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
5254
{
5255 5256
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
5257
	static const struct ephy_info e_info_8102e_1[] = {
5258 5259 5260 5261 5262 5263 5264 5265 5266 5267 5268
		{ 0x01,	0, 0x6e65 },
		{ 0x02,	0, 0x091f },
		{ 0x03,	0, 0xc2f9 },
		{ 0x06,	0, 0xafb5 },
		{ 0x07,	0, 0x0e00 },
		{ 0x19,	0, 0xec80 },
		{ 0x01,	0, 0x2e65 },
		{ 0x01,	0, 0x6e65 }
	};
	u8 cfg1;

5269
	rtl_csi_access_enable_2(tp);
5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282

	RTL_W8(DBG_REG, FIX_NAK_1);

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(Config1,
	       LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable);
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);

	cfg1 = RTL_R8(Config1);
	if ((cfg1 & LEDS0) && (cfg1 & LEDS1))
		RTL_W8(Config1, cfg1 & ~LEDS0);

5283
	rtl_ephy_init(tp, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
5284 5285
}

5286
static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)
5287
{
5288 5289 5290 5291
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

	rtl_csi_access_enable_2(tp);
5292 5293 5294 5295 5296 5297 5298

	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);

	RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable);
	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
}

5299
static void rtl_hw_start_8102e_3(struct rtl8169_private *tp)
5300
{
5301
	rtl_hw_start_8102e_2(tp);
5302

5303
	rtl_ephy_write(tp, 0x03, 0xc2f9);
5304 5305
}

5306
static void rtl_hw_start_8105e_1(struct rtl8169_private *tp)
5307
{
5308
	void __iomem *ioaddr = tp->mmio_addr;
5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319
	static const struct ephy_info e_info_8105e_1[] = {
		{ 0x07,	0, 0x4000 },
		{ 0x19,	0, 0x0200 },
		{ 0x19,	0, 0x0020 },
		{ 0x1e,	0, 0x2000 },
		{ 0x03,	0, 0x0001 },
		{ 0x19,	0, 0x0100 },
		{ 0x19,	0, 0x0004 },
		{ 0x0a,	0, 0x0020 }
	};

F
Francois Romieu 已提交
5320
	/* Force LAN exit from ASPM if Rx/Tx are not idle */
5321 5322
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);

F
Francois Romieu 已提交
5323
	/* Disable Early Tally Counter */
5324 5325 5326
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) & ~0x010000);

	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);
H
Hayes Wang 已提交
5327
	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
5328

5329
	rtl_ephy_init(tp, e_info_8105e_1, ARRAY_SIZE(e_info_8105e_1));
5330 5331
}

5332
static void rtl_hw_start_8105e_2(struct rtl8169_private *tp)
5333
{
5334
	rtl_hw_start_8105e_1(tp);
5335
	rtl_ephy_write(tp, 0x1e, rtl_ephy_read(tp, 0x1e) | 0x8000);
5336 5337
}

5338 5339 5340 5341 5342 5343 5344 5345 5346 5347 5348 5349 5350 5351 5352 5353
static void rtl_hw_start_8402(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	static const struct ephy_info e_info_8402[] = {
		{ 0x19,	0xffff, 0xff64 },
		{ 0x1e,	0, 0x4000 }
	};

	rtl_csi_access_enable_2(tp);

	/* Force LAN exit from ASPM if Rx/Tx are not idle */
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);

	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);

5354
	rtl_ephy_init(tp, e_info_8402, ARRAY_SIZE(e_info_8402));
5355 5356 5357

	rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);

5358 5359 5360 5361 5362 5363 5364
	rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00000002, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00000006, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
	rtl_w1w0_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00, ERIAR_EXGMAC);
5365 5366
}

H
Hayes Wang 已提交
5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378
static void rtl_hw_start_8106(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	/* Force LAN exit from ASPM if Rx/Tx are not idle */
	RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);

	RTL_W32(MISC, (RTL_R32(MISC) | DISABLE_LAN_EN) & ~EARLY_TALLY_EN);
	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);
	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
}

5379 5380
static void rtl_hw_start_8101(struct net_device *dev)
{
5381 5382 5383 5384
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;

5385 5386
	if (tp->mac_version >= RTL_GIGA_MAC_VER_30)
		tp->event_slow &= ~RxFIFOOver;
F
françois romieu 已提交
5387

F
Francois Romieu 已提交
5388
	if (tp->mac_version == RTL_GIGA_MAC_VER_13 ||
5389
	    tp->mac_version == RTL_GIGA_MAC_VER_16)
5390 5391
		pcie_capability_set_word(pdev, PCI_EXP_DEVCTL,
					 PCI_EXP_DEVCTL_NOSNOOP_EN);
5392

5393 5394
	RTL_W8(Cfg9346, Cfg9346_Unlock);

5395 5396
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_07:
5397
		rtl_hw_start_8102e_1(tp);
5398 5399 5400
		break;

	case RTL_GIGA_MAC_VER_08:
5401
		rtl_hw_start_8102e_3(tp);
5402 5403 5404
		break;

	case RTL_GIGA_MAC_VER_09:
5405
		rtl_hw_start_8102e_2(tp);
5406
		break;
5407 5408

	case RTL_GIGA_MAC_VER_29:
5409
		rtl_hw_start_8105e_1(tp);
5410 5411
		break;
	case RTL_GIGA_MAC_VER_30:
5412
		rtl_hw_start_8105e_2(tp);
5413
		break;
5414 5415 5416 5417

	case RTL_GIGA_MAC_VER_37:
		rtl_hw_start_8402(tp);
		break;
H
Hayes Wang 已提交
5418 5419 5420 5421

	case RTL_GIGA_MAC_VER_39:
		rtl_hw_start_8106(tp);
		break;
5422 5423
	}

5424
	RTL_W8(Cfg9346, Cfg9346_Lock);
5425

5426
	RTL_W8(MaxTxPacketSize, TxPacketMax);
5427

E
Eric Dumazet 已提交
5428
	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
5429

5430
	tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK;
5431 5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444
	RTL_W16(CPlusCmd, tp->cp_cmd);

	RTL_W16(IntrMitigate, 0x0000);

	rtl_set_rx_tx_desc_registers(tp, ioaddr);

	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
	rtl_set_rx_tx_config_registers(tp);

	RTL_R8(IntrMask);

	rtl_set_rx_mode(dev);

	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);
L
Linus Torvalds 已提交
5445 5446 5447 5448
}

static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
{
F
Francois Romieu 已提交
5449 5450 5451 5452
	struct rtl8169_private *tp = netdev_priv(dev);

	if (new_mtu < ETH_ZLEN ||
	    new_mtu > rtl_chip_infos[tp->mac_version].jumbo_max)
L
Linus Torvalds 已提交
5453 5454
		return -EINVAL;

F
Francois Romieu 已提交
5455 5456 5457 5458 5459
	if (new_mtu > ETH_DATA_LEN)
		rtl_hw_jumbo_enable(tp);
	else
		rtl_hw_jumbo_disable(tp);

L
Linus Torvalds 已提交
5460
	dev->mtu = new_mtu;
5461 5462
	netdev_update_features(dev);

S
Stanislaw Gruszka 已提交
5463
	return 0;
L
Linus Torvalds 已提交
5464 5465 5466 5467
}

static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
{
A
Al Viro 已提交
5468
	desc->addr = cpu_to_le64(0x0badbadbadbadbadull);
L
Linus Torvalds 已提交
5469 5470 5471
	desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
}

E
Eric Dumazet 已提交
5472 5473
static void rtl8169_free_rx_databuff(struct rtl8169_private *tp,
				     void **data_buff, struct RxDesc *desc)
L
Linus Torvalds 已提交
5474
{
5475
	dma_unmap_single(&tp->pci_dev->dev, le64_to_cpu(desc->addr), rx_buf_sz,
5476
			 DMA_FROM_DEVICE);
5477

E
Eric Dumazet 已提交
5478 5479
	kfree(*data_buff);
	*data_buff = NULL;
L
Linus Torvalds 已提交
5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495 5496 5497
	rtl8169_make_unusable_by_asic(desc);
}

static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
{
	u32 eor = le32_to_cpu(desc->opts1) & RingEnd;

	desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
}

static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
				       u32 rx_buf_sz)
{
	desc->addr = cpu_to_le64(mapping);
	wmb();
	rtl8169_mark_to_asic(desc, rx_buf_sz);
}

E
Eric Dumazet 已提交
5498 5499 5500 5501 5502
static inline void *rtl8169_align(void *data)
{
	return (void *)ALIGN((long)data, 16);
}

S
Stanislaw Gruszka 已提交
5503 5504
static struct sk_buff *rtl8169_alloc_rx_data(struct rtl8169_private *tp,
					     struct RxDesc *desc)
L
Linus Torvalds 已提交
5505
{
E
Eric Dumazet 已提交
5506
	void *data;
L
Linus Torvalds 已提交
5507
	dma_addr_t mapping;
5508
	struct device *d = &tp->pci_dev->dev;
S
Stanislaw Gruszka 已提交
5509
	struct net_device *dev = tp->dev;
E
Eric Dumazet 已提交
5510
	int node = dev->dev.parent ? dev_to_node(dev->dev.parent) : -1;
L
Linus Torvalds 已提交
5511

E
Eric Dumazet 已提交
5512 5513 5514
	data = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
	if (!data)
		return NULL;
5515

E
Eric Dumazet 已提交
5516 5517 5518 5519 5520 5521
	if (rtl8169_align(data) != data) {
		kfree(data);
		data = kmalloc_node(rx_buf_sz + 15, GFP_KERNEL, node);
		if (!data)
			return NULL;
	}
5522

5523
	mapping = dma_map_single(d, rtl8169_align(data), rx_buf_sz,
5524
				 DMA_FROM_DEVICE);
5525 5526 5527
	if (unlikely(dma_mapping_error(d, mapping))) {
		if (net_ratelimit())
			netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
5528
		goto err_out;
5529
	}
L
Linus Torvalds 已提交
5530 5531

	rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
E
Eric Dumazet 已提交
5532
	return data;
5533 5534 5535 5536

err_out:
	kfree(data);
	return NULL;
L
Linus Torvalds 已提交
5537 5538 5539 5540
}

static void rtl8169_rx_clear(struct rtl8169_private *tp)
{
F
Francois Romieu 已提交
5541
	unsigned int i;
L
Linus Torvalds 已提交
5542 5543

	for (i = 0; i < NUM_RX_DESC; i++) {
E
Eric Dumazet 已提交
5544 5545
		if (tp->Rx_databuff[i]) {
			rtl8169_free_rx_databuff(tp, tp->Rx_databuff + i,
L
Linus Torvalds 已提交
5546 5547 5548 5549 5550
					    tp->RxDescArray + i);
		}
	}
}

S
Stanislaw Gruszka 已提交
5551
static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
L
Linus Torvalds 已提交
5552
{
S
Stanislaw Gruszka 已提交
5553 5554
	desc->opts1 |= cpu_to_le32(RingEnd);
}
5555

S
Stanislaw Gruszka 已提交
5556 5557 5558
static int rtl8169_rx_fill(struct rtl8169_private *tp)
{
	unsigned int i;
L
Linus Torvalds 已提交
5559

S
Stanislaw Gruszka 已提交
5560 5561
	for (i = 0; i < NUM_RX_DESC; i++) {
		void *data;
5562

E
Eric Dumazet 已提交
5563
		if (tp->Rx_databuff[i])
L
Linus Torvalds 已提交
5564
			continue;
5565

S
Stanislaw Gruszka 已提交
5566
		data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i);
E
Eric Dumazet 已提交
5567 5568
		if (!data) {
			rtl8169_make_unusable_by_asic(tp->RxDescArray + i);
S
Stanislaw Gruszka 已提交
5569
			goto err_out;
E
Eric Dumazet 已提交
5570 5571
		}
		tp->Rx_databuff[i] = data;
L
Linus Torvalds 已提交
5572 5573
	}

S
Stanislaw Gruszka 已提交
5574 5575 5576 5577 5578 5579
	rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
	return 0;

err_out:
	rtl8169_rx_clear(tp);
	return -ENOMEM;
L
Linus Torvalds 已提交
5580 5581 5582 5583 5584 5585 5586 5587 5588
}

static int rtl8169_init_ring(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_init_ring_indexes(tp);

	memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
E
Eric Dumazet 已提交
5589
	memset(tp->Rx_databuff, 0x0, NUM_RX_DESC * sizeof(void *));
L
Linus Torvalds 已提交
5590

S
Stanislaw Gruszka 已提交
5591
	return rtl8169_rx_fill(tp);
L
Linus Torvalds 已提交
5592 5593
}

5594
static void rtl8169_unmap_tx_skb(struct device *d, struct ring_info *tx_skb,
L
Linus Torvalds 已提交
5595 5596 5597 5598
				 struct TxDesc *desc)
{
	unsigned int len = tx_skb->len;

5599 5600
	dma_unmap_single(d, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE);

L
Linus Torvalds 已提交
5601 5602 5603 5604 5605 5606
	desc->opts1 = 0x00;
	desc->opts2 = 0x00;
	desc->addr = 0x00;
	tx_skb->len = 0;
}

5607 5608
static void rtl8169_tx_clear_range(struct rtl8169_private *tp, u32 start,
				   unsigned int n)
L
Linus Torvalds 已提交
5609 5610 5611
{
	unsigned int i;

5612 5613
	for (i = 0; i < n; i++) {
		unsigned int entry = (start + i) % NUM_TX_DESC;
L
Linus Torvalds 已提交
5614 5615 5616 5617 5618 5619
		struct ring_info *tx_skb = tp->tx_skb + entry;
		unsigned int len = tx_skb->len;

		if (len) {
			struct sk_buff *skb = tx_skb->skb;

5620
			rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
L
Linus Torvalds 已提交
5621 5622
					     tp->TxDescArray + entry);
			if (skb) {
5623
				tp->dev->stats.tx_dropped++;
L
Linus Torvalds 已提交
5624 5625 5626 5627 5628
				dev_kfree_skb(skb);
				tx_skb->skb = NULL;
			}
		}
	}
5629 5630 5631 5632 5633
}

static void rtl8169_tx_clear(struct rtl8169_private *tp)
{
	rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC);
L
Linus Torvalds 已提交
5634 5635 5636
	tp->cur_tx = tp->dirty_tx = 0;
}

5637
static void rtl_reset_work(struct rtl8169_private *tp)
L
Linus Torvalds 已提交
5638
{
D
David Howells 已提交
5639
	struct net_device *dev = tp->dev;
5640
	int i;
L
Linus Torvalds 已提交
5641

5642 5643 5644
	napi_disable(&tp->napi);
	netif_stop_queue(dev);
	synchronize_sched();
L
Linus Torvalds 已提交
5645

5646 5647
	rtl8169_hw_reset(tp);

5648 5649 5650
	for (i = 0; i < NUM_RX_DESC; i++)
		rtl8169_mark_to_asic(tp->RxDescArray + i, rx_buf_sz);

L
Linus Torvalds 已提交
5651
	rtl8169_tx_clear(tp);
5652
	rtl8169_init_ring_indexes(tp);
L
Linus Torvalds 已提交
5653

5654
	napi_enable(&tp->napi);
5655 5656 5657
	rtl_hw_start(dev);
	netif_wake_queue(dev);
	rtl8169_check_link_status(dev, tp, tp->mmio_addr);
L
Linus Torvalds 已提交
5658 5659 5660 5661
}

static void rtl8169_tx_timeout(struct net_device *dev)
{
5662 5663 5664
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
L
Linus Torvalds 已提交
5665 5666 5667
}

static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
F
Francois Romieu 已提交
5668
			      u32 *opts)
L
Linus Torvalds 已提交
5669 5670 5671
{
	struct skb_shared_info *info = skb_shinfo(skb);
	unsigned int cur_frag, entry;
5672
	struct TxDesc * uninitialized_var(txd);
5673
	struct device *d = &tp->pci_dev->dev;
L
Linus Torvalds 已提交
5674 5675 5676

	entry = tp->cur_tx;
	for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
E
Eric Dumazet 已提交
5677
		const skb_frag_t *frag = info->frags + cur_frag;
L
Linus Torvalds 已提交
5678 5679 5680 5681 5682 5683 5684
		dma_addr_t mapping;
		u32 status, len;
		void *addr;

		entry = (entry + 1) % NUM_TX_DESC;

		txd = tp->TxDescArray + entry;
E
Eric Dumazet 已提交
5685
		len = skb_frag_size(frag);
5686
		addr = skb_frag_address(frag);
5687
		mapping = dma_map_single(d, addr, len, DMA_TO_DEVICE);
5688 5689 5690 5691
		if (unlikely(dma_mapping_error(d, mapping))) {
			if (net_ratelimit())
				netif_err(tp, drv, tp->dev,
					  "Failed to map TX fragments DMA!\n");
5692
			goto err_out;
5693
		}
L
Linus Torvalds 已提交
5694

F
Francois Romieu 已提交
5695
		/* Anti gcc 2.95.3 bugware (sic) */
F
Francois Romieu 已提交
5696 5697
		status = opts[0] | len |
			(RingEnd * !((entry + 1) % NUM_TX_DESC));
L
Linus Torvalds 已提交
5698 5699

		txd->opts1 = cpu_to_le32(status);
F
Francois Romieu 已提交
5700
		txd->opts2 = cpu_to_le32(opts[1]);
L
Linus Torvalds 已提交
5701 5702 5703 5704 5705 5706 5707 5708 5709 5710 5711
		txd->addr = cpu_to_le64(mapping);

		tp->tx_skb[entry].len = len;
	}

	if (cur_frag) {
		tp->tx_skb[entry].skb = skb;
		txd->opts1 |= cpu_to_le32(LastFrag);
	}

	return cur_frag;
5712 5713 5714 5715

err_out:
	rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag);
	return -EIO;
L
Linus Torvalds 已提交
5716 5717
}

F
Francois Romieu 已提交
5718 5719
static inline void rtl8169_tso_csum(struct rtl8169_private *tp,
				    struct sk_buff *skb, u32 *opts)
L
Linus Torvalds 已提交
5720
{
F
Francois Romieu 已提交
5721
	const struct rtl_tx_desc_info *info = tx_desc_info + tp->txd_version;
5722
	u32 mss = skb_shinfo(skb)->gso_size;
F
Francois Romieu 已提交
5723
	int offset = info->opts_offset;
5724

F
Francois Romieu 已提交
5725 5726 5727 5728
	if (mss) {
		opts[0] |= TD_LSO;
		opts[offset] |= min(mss, TD_MSS_MAX) << info->mss_shift;
	} else if (skb->ip_summed == CHECKSUM_PARTIAL) {
5729
		const struct iphdr *ip = ip_hdr(skb);
L
Linus Torvalds 已提交
5730 5731

		if (ip->protocol == IPPROTO_TCP)
F
Francois Romieu 已提交
5732
			opts[offset] |= info->checksum.tcp;
L
Linus Torvalds 已提交
5733
		else if (ip->protocol == IPPROTO_UDP)
F
Francois Romieu 已提交
5734 5735 5736
			opts[offset] |= info->checksum.udp;
		else
			WARN_ON_ONCE(1);
L
Linus Torvalds 已提交
5737 5738 5739
	}
}

5740 5741
static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
				      struct net_device *dev)
L
Linus Torvalds 已提交
5742 5743
{
	struct rtl8169_private *tp = netdev_priv(dev);
5744
	unsigned int entry = tp->cur_tx % NUM_TX_DESC;
L
Linus Torvalds 已提交
5745 5746
	struct TxDesc *txd = tp->TxDescArray + entry;
	void __iomem *ioaddr = tp->mmio_addr;
5747
	struct device *d = &tp->pci_dev->dev;
L
Linus Torvalds 已提交
5748 5749
	dma_addr_t mapping;
	u32 status, len;
F
Francois Romieu 已提交
5750
	u32 opts[2];
5751
	int frags;
5752

5753
	if (unlikely(!TX_FRAGS_READY_FOR(tp, skb_shinfo(skb)->nr_frags))) {
5754
		netif_err(tp, drv, dev, "BUG! Tx Ring full when queue awake!\n");
5755
		goto err_stop_0;
L
Linus Torvalds 已提交
5756 5757 5758
	}

	if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
5759 5760 5761
		goto err_stop_0;

	len = skb_headlen(skb);
5762
	mapping = dma_map_single(d, skb->data, len, DMA_TO_DEVICE);
5763 5764 5765
	if (unlikely(dma_mapping_error(d, mapping))) {
		if (net_ratelimit())
			netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
5766
		goto err_dma_0;
5767
	}
5768 5769 5770

	tp->tx_skb[entry].len = len;
	txd->addr = cpu_to_le64(mapping);
L
Linus Torvalds 已提交
5771

F
Francois Romieu 已提交
5772 5773
	opts[1] = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
	opts[0] = DescOwn;
L
Linus Torvalds 已提交
5774

F
Francois Romieu 已提交
5775 5776 5777
	rtl8169_tso_csum(tp, skb, opts);

	frags = rtl8169_xmit_frags(tp, skb, opts);
5778 5779 5780
	if (frags < 0)
		goto err_dma_1;
	else if (frags)
F
Francois Romieu 已提交
5781
		opts[0] |= FirstFrag;
5782
	else {
F
Francois Romieu 已提交
5783
		opts[0] |= FirstFrag | LastFrag;
L
Linus Torvalds 已提交
5784 5785 5786
		tp->tx_skb[entry].skb = skb;
	}

F
Francois Romieu 已提交
5787 5788
	txd->opts2 = cpu_to_le32(opts[1]);

5789 5790
	skb_tx_timestamp(skb);

L
Linus Torvalds 已提交
5791 5792
	wmb();

F
Francois Romieu 已提交
5793
	/* Anti gcc 2.95.3 bugware (sic) */
F
Francois Romieu 已提交
5794
	status = opts[0] | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
L
Linus Torvalds 已提交
5795 5796 5797 5798
	txd->opts1 = cpu_to_le32(status);

	tp->cur_tx += frags + 1;

5799
	wmb();
L
Linus Torvalds 已提交
5800

F
Francois Romieu 已提交
5801
	RTL_W8(TxPoll, NPQ);
L
Linus Torvalds 已提交
5802

5803 5804
	mmiowb();

5805
	if (!TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) {
5806 5807 5808 5809
		/* Avoid wrongly optimistic queue wake-up: rtl_tx thread must
		 * not miss a ring update when it notices a stopped queue.
		 */
		smp_wmb();
L
Linus Torvalds 已提交
5810
		netif_stop_queue(dev);
5811 5812 5813 5814 5815 5816 5817
		/* Sync with rtl_tx:
		 * - publish queue status and cur_tx ring index (write barrier)
		 * - refresh dirty_tx ring index (read barrier).
		 * May the current thread have a pessimistic view of the ring
		 * status and forget to wake up queue, a racing rtl_tx thread
		 * can't.
		 */
F
Francois Romieu 已提交
5818
		smp_mb();
5819
		if (TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS))
L
Linus Torvalds 已提交
5820 5821 5822
			netif_wake_queue(dev);
	}

5823
	return NETDEV_TX_OK;
L
Linus Torvalds 已提交
5824

5825
err_dma_1:
5826
	rtl8169_unmap_tx_skb(d, tp->tx_skb + entry, txd);
5827 5828 5829 5830 5831 5832
err_dma_0:
	dev_kfree_skb(skb);
	dev->stats.tx_dropped++;
	return NETDEV_TX_OK;

err_stop_0:
L
Linus Torvalds 已提交
5833
	netif_stop_queue(dev);
5834
	dev->stats.tx_dropped++;
5835
	return NETDEV_TX_BUSY;
L
Linus Torvalds 已提交
5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846
}

static void rtl8169_pcierr_interrupt(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct pci_dev *pdev = tp->pci_dev;
	u16 pci_status, pci_cmd;

	pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
	pci_read_config_word(pdev, PCI_STATUS, &pci_status);

5847 5848
	netif_err(tp, intr, dev, "PCI error (cmd = 0x%04x, status = 0x%04x)\n",
		  pci_cmd, pci_status);
L
Linus Torvalds 已提交
5849 5850 5851 5852

	/*
	 * The recovery sequence below admits a very elaborated explanation:
	 * - it seems to work;
5853 5854
	 * - I did not see what else could be done;
	 * - it makes iop3xx happy.
L
Linus Torvalds 已提交
5855 5856 5857
	 *
	 * Feel free to adjust to your needs.
	 */
5858
	if (pdev->broken_parity_status)
5859 5860 5861 5862 5863
		pci_cmd &= ~PCI_COMMAND_PARITY;
	else
		pci_cmd |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY;

	pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
L
Linus Torvalds 已提交
5864 5865 5866 5867 5868 5869 5870 5871

	pci_write_config_word(pdev, PCI_STATUS,
		pci_status & (PCI_STATUS_DETECTED_PARITY |
		PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
		PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));

	/* The infamous DAC f*ckup only happens at boot time */
	if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
F
françois romieu 已提交
5872 5873
		void __iomem *ioaddr = tp->mmio_addr;

5874
		netif_info(tp, intr, dev, "disabling PCI DAC\n");
L
Linus Torvalds 已提交
5875 5876 5877 5878 5879
		tp->cp_cmd &= ~PCIDAC;
		RTL_W16(CPlusCmd, tp->cp_cmd);
		dev->features &= ~NETIF_F_HIGHDMA;
	}

F
françois romieu 已提交
5880
	rtl8169_hw_reset(tp);
5881

5882
	rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
L
Linus Torvalds 已提交
5883 5884
}

5885
static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp)
L
Linus Torvalds 已提交
5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902
{
	unsigned int dirty_tx, tx_left;

	dirty_tx = tp->dirty_tx;
	smp_rmb();
	tx_left = tp->cur_tx - dirty_tx;

	while (tx_left > 0) {
		unsigned int entry = dirty_tx % NUM_TX_DESC;
		struct ring_info *tx_skb = tp->tx_skb + entry;
		u32 status;

		rmb();
		status = le32_to_cpu(tp->TxDescArray[entry].opts1);
		if (status & DescOwn)
			break;

5903 5904
		rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
				     tp->TxDescArray + entry);
L
Linus Torvalds 已提交
5905
		if (status & LastFrag) {
5906 5907 5908 5909 5910
			u64_stats_update_begin(&tp->tx_stats.syncp);
			tp->tx_stats.packets++;
			tp->tx_stats.bytes += tx_skb->skb->len;
			u64_stats_update_end(&tp->tx_stats.syncp);
			dev_kfree_skb(tx_skb->skb);
L
Linus Torvalds 已提交
5911 5912 5913 5914 5915 5916 5917 5918
			tx_skb->skb = NULL;
		}
		dirty_tx++;
		tx_left--;
	}

	if (tp->dirty_tx != dirty_tx) {
		tp->dirty_tx = dirty_tx;
5919 5920 5921 5922 5923 5924 5925
		/* Sync with rtl8169_start_xmit:
		 * - publish dirty_tx ring index (write barrier)
		 * - refresh cur_tx ring index and queue status (read barrier)
		 * May the current thread miss the stopped queue condition,
		 * a racing xmit thread can only have a right view of the
		 * ring status.
		 */
F
Francois Romieu 已提交
5926
		smp_mb();
L
Linus Torvalds 已提交
5927
		if (netif_queue_stopped(dev) &&
5928
		    TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) {
L
Linus Torvalds 已提交
5929 5930
			netif_wake_queue(dev);
		}
5931 5932 5933 5934 5935 5936
		/*
		 * 8168 hack: TxPoll requests are lost when the Tx packets are
		 * too close. Let's kick an extra TxPoll request when a burst
		 * of start_xmit activity is detected (if it is not detected,
		 * it is slow enough). -- FR
		 */
5937 5938 5939
		if (tp->cur_tx != dirty_tx) {
			void __iomem *ioaddr = tp->mmio_addr;

5940
			RTL_W8(TxPoll, NPQ);
5941
		}
L
Linus Torvalds 已提交
5942 5943 5944
	}
}

5945 5946 5947 5948 5949
static inline int rtl8169_fragmented_frame(u32 status)
{
	return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
}

E
Eric Dumazet 已提交
5950
static inline void rtl8169_rx_csum(struct sk_buff *skb, u32 opts1)
L
Linus Torvalds 已提交
5951 5952 5953 5954
{
	u32 status = opts1 & RxProtoMask;

	if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
S
Shan Wei 已提交
5955
	    ((status == RxProtoUDP) && !(opts1 & UDPFail)))
L
Linus Torvalds 已提交
5956 5957
		skb->ip_summed = CHECKSUM_UNNECESSARY;
	else
5958
		skb_checksum_none_assert(skb);
L
Linus Torvalds 已提交
5959 5960
}

E
Eric Dumazet 已提交
5961 5962 5963 5964
static struct sk_buff *rtl8169_try_rx_copy(void *data,
					   struct rtl8169_private *tp,
					   int pkt_size,
					   dma_addr_t addr)
L
Linus Torvalds 已提交
5965
{
S
Stephen Hemminger 已提交
5966
	struct sk_buff *skb;
5967
	struct device *d = &tp->pci_dev->dev;
S
Stephen Hemminger 已提交
5968

E
Eric Dumazet 已提交
5969
	data = rtl8169_align(data);
5970
	dma_sync_single_for_cpu(d, addr, pkt_size, DMA_FROM_DEVICE);
E
Eric Dumazet 已提交
5971 5972 5973 5974
	prefetch(data);
	skb = netdev_alloc_skb_ip_align(tp->dev, pkt_size);
	if (skb)
		memcpy(skb->data, data, pkt_size);
5975 5976
	dma_sync_single_for_device(d, addr, pkt_size, DMA_FROM_DEVICE);

E
Eric Dumazet 已提交
5977
	return skb;
L
Linus Torvalds 已提交
5978 5979
}

5980
static int rtl_rx(struct net_device *dev, struct rtl8169_private *tp, u32 budget)
L
Linus Torvalds 已提交
5981 5982
{
	unsigned int cur_rx, rx_left;
E
Eric Dumazet 已提交
5983
	unsigned int count;
L
Linus Torvalds 已提交
5984 5985 5986

	cur_rx = tp->cur_rx;
	rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
F
Francois Romieu 已提交
5987
	rx_left = min(rx_left, budget);
L
Linus Torvalds 已提交
5988

R
Richard Dawe 已提交
5989
	for (; rx_left > 0; rx_left--, cur_rx++) {
L
Linus Torvalds 已提交
5990
		unsigned int entry = cur_rx % NUM_RX_DESC;
5991
		struct RxDesc *desc = tp->RxDescArray + entry;
L
Linus Torvalds 已提交
5992 5993 5994
		u32 status;

		rmb();
5995
		status = le32_to_cpu(desc->opts1) & tp->opts1_mask;
L
Linus Torvalds 已提交
5996 5997 5998

		if (status & DescOwn)
			break;
R
Richard Dawe 已提交
5999
		if (unlikely(status & RxRES)) {
6000 6001
			netif_info(tp, rx_err, dev, "Rx ERROR. status = %08x\n",
				   status);
6002
			dev->stats.rx_errors++;
L
Linus Torvalds 已提交
6003
			if (status & (RxRWT | RxRUNT))
6004
				dev->stats.rx_length_errors++;
L
Linus Torvalds 已提交
6005
			if (status & RxCRC)
6006
				dev->stats.rx_crc_errors++;
6007
			if (status & RxFOVF) {
6008
				rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
6009
				dev->stats.rx_fifo_errors++;
6010
			}
B
Ben Greear 已提交
6011 6012 6013 6014 6015
			if ((status & (RxRUNT | RxCRC)) &&
			    !(status & (RxRWT | RxFOVF)) &&
			    (dev->features & NETIF_F_RXALL))
				goto process_pkt;

E
Eric Dumazet 已提交
6016
			rtl8169_mark_to_asic(desc, rx_buf_sz);
L
Linus Torvalds 已提交
6017
		} else {
E
Eric Dumazet 已提交
6018
			struct sk_buff *skb;
B
Ben Greear 已提交
6019 6020 6021 6022 6023
			dma_addr_t addr;
			int pkt_size;

process_pkt:
			addr = le64_to_cpu(desc->addr);
B
Ben Greear 已提交
6024 6025 6026 6027
			if (likely(!(dev->features & NETIF_F_RXFCS)))
				pkt_size = (status & 0x00003fff) - 4;
			else
				pkt_size = status & 0x00003fff;
L
Linus Torvalds 已提交
6028

6029 6030 6031 6032 6033 6034
			/*
			 * The driver does not support incoming fragmented
			 * frames. They are seen as a symptom of over-mtu
			 * sized frames.
			 */
			if (unlikely(rtl8169_fragmented_frame(status))) {
6035 6036
				dev->stats.rx_dropped++;
				dev->stats.rx_length_errors++;
E
Eric Dumazet 已提交
6037
				rtl8169_mark_to_asic(desc, rx_buf_sz);
R
Richard Dawe 已提交
6038
				continue;
6039 6040
			}

E
Eric Dumazet 已提交
6041 6042 6043 6044 6045 6046
			skb = rtl8169_try_rx_copy(tp->Rx_databuff[entry],
						  tp, pkt_size, addr);
			rtl8169_mark_to_asic(desc, rx_buf_sz);
			if (!skb) {
				dev->stats.rx_dropped++;
				continue;
L
Linus Torvalds 已提交
6047 6048
			}

E
Eric Dumazet 已提交
6049
			rtl8169_rx_csum(skb, status);
L
Linus Torvalds 已提交
6050 6051 6052
			skb_put(skb, pkt_size);
			skb->protocol = eth_type_trans(skb, dev);

6053 6054
			rtl8169_rx_vlan_tag(desc, skb);

6055
			napi_gro_receive(&tp->napi, skb);
L
Linus Torvalds 已提交
6056

J
Junchang Wang 已提交
6057 6058 6059 6060
			u64_stats_update_begin(&tp->rx_stats.syncp);
			tp->rx_stats.packets++;
			tp->rx_stats.bytes += pkt_size;
			u64_stats_update_end(&tp->rx_stats.syncp);
L
Linus Torvalds 已提交
6061
		}
6062 6063

		/* Work around for AMD plateform. */
A
Al Viro 已提交
6064
		if ((desc->opts2 & cpu_to_le32(0xfffe000)) &&
6065 6066 6067 6068
		    (tp->mac_version == RTL_GIGA_MAC_VER_05)) {
			desc->opts2 = 0;
			cur_rx++;
		}
L
Linus Torvalds 已提交
6069 6070 6071 6072 6073
	}

	count = cur_rx - tp->cur_rx;
	tp->cur_rx = cur_rx;

E
Eric Dumazet 已提交
6074
	tp->dirty_rx += count;
L
Linus Torvalds 已提交
6075 6076 6077 6078

	return count;
}

F
Francois Romieu 已提交
6079
static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
L
Linus Torvalds 已提交
6080
{
F
Francois Romieu 已提交
6081
	struct net_device *dev = dev_instance;
L
Linus Torvalds 已提交
6082 6083
	struct rtl8169_private *tp = netdev_priv(dev);
	int handled = 0;
F
Francois Romieu 已提交
6084
	u16 status;
L
Linus Torvalds 已提交
6085

F
Francois Romieu 已提交
6086
	status = rtl_get_events(tp);
6087 6088 6089 6090
	if (status && status != 0xffff) {
		status &= RTL_EVENT_NAPI | tp->event_slow;
		if (status) {
			handled = 1;
L
Linus Torvalds 已提交
6091

6092 6093
			rtl_irq_disable(tp);
			napi_schedule(&tp->napi);
6094
		}
6095 6096 6097
	}
	return IRQ_RETVAL(handled);
}
L
Linus Torvalds 已提交
6098

6099 6100 6101 6102 6103 6104 6105 6106 6107 6108
/*
 * Workqueue context.
 */
static void rtl_slow_event_work(struct rtl8169_private *tp)
{
	struct net_device *dev = tp->dev;
	u16 status;

	status = rtl_get_events(tp) & tp->event_slow;
	rtl_ack_events(tp, status);
L
Linus Torvalds 已提交
6109

6110 6111 6112 6113 6114
	if (unlikely(status & RxFIFOOver)) {
		switch (tp->mac_version) {
		/* Work around for rx fifo overflow */
		case RTL_GIGA_MAC_VER_11:
			netif_stop_queue(dev);
6115 6116
			/* XXX - Hack alert. See rtl_task(). */
			set_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags);
6117
		default:
6118 6119
			break;
		}
6120
	}
L
Linus Torvalds 已提交
6121

6122 6123
	if (unlikely(status & SYSErr))
		rtl8169_pcierr_interrupt(dev);
6124

6125 6126
	if (status & LinkChg)
		__rtl8169_check_link_status(dev, tp, tp->mmio_addr, true);
L
Linus Torvalds 已提交
6127

6128
	rtl_irq_enable_all(tp);
L
Linus Torvalds 已提交
6129 6130
}

6131 6132
static void rtl_task(struct work_struct *work)
{
6133 6134 6135 6136
	static const struct {
		int bitnr;
		void (*action)(struct rtl8169_private *);
	} rtl_work[] = {
6137
		/* XXX - keep rtl_slow_event_work() as first element. */
6138 6139 6140 6141
		{ RTL_FLAG_TASK_SLOW_PENDING,	rtl_slow_event_work },
		{ RTL_FLAG_TASK_RESET_PENDING,	rtl_reset_work },
		{ RTL_FLAG_TASK_PHY_PENDING,	rtl_phy_work }
	};
6142 6143
	struct rtl8169_private *tp =
		container_of(work, struct rtl8169_private, wk.work);
6144 6145 6146 6147 6148
	struct net_device *dev = tp->dev;
	int i;

	rtl_lock_work(tp);

6149 6150
	if (!netif_running(dev) ||
	    !test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
6151 6152 6153 6154 6155 6156 6157 6158 6159
		goto out_unlock;

	for (i = 0; i < ARRAY_SIZE(rtl_work); i++) {
		bool pending;

		pending = test_and_clear_bit(rtl_work[i].bitnr, tp->wk.flags);
		if (pending)
			rtl_work[i].action(tp);
	}
6160

6161 6162
out_unlock:
	rtl_unlock_work(tp);
6163 6164
}

6165
static int rtl8169_poll(struct napi_struct *napi, int budget)
L
Linus Torvalds 已提交
6166
{
6167 6168
	struct rtl8169_private *tp = container_of(napi, struct rtl8169_private, napi);
	struct net_device *dev = tp->dev;
6169 6170 6171 6172 6173 6174 6175 6176 6177 6178 6179 6180
	u16 enable_mask = RTL_EVENT_NAPI | tp->event_slow;
	int work_done= 0;
	u16 status;

	status = rtl_get_events(tp);
	rtl_ack_events(tp, status & ~tp->event_slow);

	if (status & RTL_EVENT_NAPI_RX)
		work_done = rtl_rx(dev, tp, (u32) budget);

	if (status & RTL_EVENT_NAPI_TX)
		rtl_tx(dev, tp);
L
Linus Torvalds 已提交
6181

6182 6183 6184 6185 6186
	if (status & tp->event_slow) {
		enable_mask &= ~tp->event_slow;

		rtl_schedule_task(tp, RTL_FLAG_TASK_SLOW_PENDING);
	}
L
Linus Torvalds 已提交
6187

6188
	if (work_done < budget) {
6189
		napi_complete(napi);
6190

6191 6192
		rtl_irq_enable(tp, enable_mask);
		mmiowb();
L
Linus Torvalds 已提交
6193 6194
	}

6195
	return work_done;
L
Linus Torvalds 已提交
6196 6197
}

6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208
static void rtl8169_rx_missed(struct net_device *dev, void __iomem *ioaddr)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	if (tp->mac_version > RTL_GIGA_MAC_VER_06)
		return;

	dev->stats.rx_missed_errors += (RTL_R32(RxMissed) & 0xffffff);
	RTL_W32(RxMissed, 0);
}

L
Linus Torvalds 已提交
6209 6210 6211 6212 6213
static void rtl8169_down(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;

6214
	del_timer_sync(&tp->timer);
L
Linus Torvalds 已提交
6215

6216
	napi_disable(&tp->napi);
6217
	netif_stop_queue(dev);
L
Linus Torvalds 已提交
6218

6219
	rtl8169_hw_reset(tp);
S
Stanislaw Gruszka 已提交
6220 6221
	/*
	 * At this point device interrupts can not be enabled in any function,
6222 6223
	 * as netif_running is not true (rtl8169_interrupt, rtl8169_reset_task)
	 * and napi is disabled (rtl8169_poll).
S
Stanislaw Gruszka 已提交
6224
	 */
6225
	rtl8169_rx_missed(dev, ioaddr);
L
Linus Torvalds 已提交
6226 6227

	/* Give a racing hard_start_xmit a few cycles to complete. */
6228
	synchronize_sched();
L
Linus Torvalds 已提交
6229 6230 6231 6232

	rtl8169_tx_clear(tp);

	rtl8169_rx_clear(tp);
F
françois romieu 已提交
6233 6234

	rtl_pll_power_down(tp);
L
Linus Torvalds 已提交
6235 6236 6237 6238 6239 6240 6241
}

static int rtl8169_close(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	struct pci_dev *pdev = tp->pci_dev;

6242 6243
	pm_runtime_get_sync(&pdev->dev);

F
Francois Romieu 已提交
6244
	/* Update counters before going down */
6245 6246
	rtl8169_update_counters(dev);

6247
	rtl_lock_work(tp);
6248
	clear_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
6249

L
Linus Torvalds 已提交
6250
	rtl8169_down(dev);
6251
	rtl_unlock_work(tp);
L
Linus Torvalds 已提交
6252

6253
	free_irq(pdev->irq, dev);
L
Linus Torvalds 已提交
6254

6255 6256 6257 6258
	dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
			  tp->RxPhyAddr);
	dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray,
			  tp->TxPhyAddr);
L
Linus Torvalds 已提交
6259 6260 6261
	tp->TxDescArray = NULL;
	tp->RxDescArray = NULL;

6262 6263
	pm_runtime_put_sync(&pdev->dev);

L
Linus Torvalds 已提交
6264 6265 6266
	return 0;
}

6267 6268 6269 6270 6271 6272 6273 6274 6275
#ifdef CONFIG_NET_POLL_CONTROLLER
static void rtl8169_netpoll(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_interrupt(tp->pci_dev->irq, dev);
}
#endif

6276 6277 6278 6279 6280 6281 6282 6283 6284 6285
static int rtl_open(struct net_device *dev)
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
	struct pci_dev *pdev = tp->pci_dev;
	int retval = -ENOMEM;

	pm_runtime_get_sync(&pdev->dev);

	/*
6286
	 * Rx and Tx descriptors needs 256 bytes alignment.
6287 6288 6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302 6303 6304 6305 6306 6307 6308
	 * dma_alloc_coherent provides more.
	 */
	tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES,
					     &tp->TxPhyAddr, GFP_KERNEL);
	if (!tp->TxDescArray)
		goto err_pm_runtime_put;

	tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES,
					     &tp->RxPhyAddr, GFP_KERNEL);
	if (!tp->RxDescArray)
		goto err_free_tx_0;

	retval = rtl8169_init_ring(dev);
	if (retval < 0)
		goto err_free_rx_1;

	INIT_WORK(&tp->wk.work, rtl_task);

	smp_mb();

	rtl_request_firmware(tp);

6309
	retval = request_irq(pdev->irq, rtl8169_interrupt,
6310 6311 6312 6313 6314 6315 6316 6317 6318 6319 6320 6321 6322 6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337 6338 6339 6340 6341 6342 6343 6344 6345 6346 6347 6348 6349 6350 6351 6352 6353 6354 6355
			     (tp->features & RTL_FEATURE_MSI) ? 0 : IRQF_SHARED,
			     dev->name, dev);
	if (retval < 0)
		goto err_release_fw_2;

	rtl_lock_work(tp);

	set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);

	napi_enable(&tp->napi);

	rtl8169_init_phy(dev, tp);

	__rtl8169_set_features(dev, dev->features);

	rtl_pll_power_up(tp);

	rtl_hw_start(dev);

	netif_start_queue(dev);

	rtl_unlock_work(tp);

	tp->saved_wolopts = 0;
	pm_runtime_put_noidle(&pdev->dev);

	rtl8169_check_link_status(dev, tp, ioaddr);
out:
	return retval;

err_release_fw_2:
	rtl_release_firmware(tp);
	rtl8169_rx_clear(tp);
err_free_rx_1:
	dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
			  tp->RxPhyAddr);
	tp->RxDescArray = NULL;
err_free_tx_0:
	dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray,
			  tp->TxPhyAddr);
	tp->TxDescArray = NULL;
err_pm_runtime_put:
	pm_runtime_put_noidle(&pdev->dev);
	goto out;
}

J
Junchang Wang 已提交
6356 6357
static struct rtnl_link_stats64 *
rtl8169_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
L
Linus Torvalds 已提交
6358 6359 6360
{
	struct rtl8169_private *tp = netdev_priv(dev);
	void __iomem *ioaddr = tp->mmio_addr;
J
Junchang Wang 已提交
6361
	unsigned int start;
L
Linus Torvalds 已提交
6362

6363
	if (netif_running(dev))
6364
		rtl8169_rx_missed(dev, ioaddr);
6365

J
Junchang Wang 已提交
6366 6367 6368 6369 6370 6371 6372 6373 6374 6375 6376 6377 6378 6379 6380 6381 6382 6383 6384 6385 6386 6387
	do {
		start = u64_stats_fetch_begin_bh(&tp->rx_stats.syncp);
		stats->rx_packets = tp->rx_stats.packets;
		stats->rx_bytes	= tp->rx_stats.bytes;
	} while (u64_stats_fetch_retry_bh(&tp->rx_stats.syncp, start));


	do {
		start = u64_stats_fetch_begin_bh(&tp->tx_stats.syncp);
		stats->tx_packets = tp->tx_stats.packets;
		stats->tx_bytes	= tp->tx_stats.bytes;
	} while (u64_stats_fetch_retry_bh(&tp->tx_stats.syncp, start));

	stats->rx_dropped	= dev->stats.rx_dropped;
	stats->tx_dropped	= dev->stats.tx_dropped;
	stats->rx_length_errors = dev->stats.rx_length_errors;
	stats->rx_errors	= dev->stats.rx_errors;
	stats->rx_crc_errors	= dev->stats.rx_crc_errors;
	stats->rx_fifo_errors	= dev->stats.rx_fifo_errors;
	stats->rx_missed_errors = dev->stats.rx_missed_errors;

	return stats;
L
Linus Torvalds 已提交
6388 6389
}

6390
static void rtl8169_net_suspend(struct net_device *dev)
6391
{
F
françois romieu 已提交
6392 6393
	struct rtl8169_private *tp = netdev_priv(dev);

6394
	if (!netif_running(dev))
6395
		return;
6396 6397 6398

	netif_device_detach(dev);
	netif_stop_queue(dev);
6399 6400 6401

	rtl_lock_work(tp);
	napi_disable(&tp->napi);
6402
	clear_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
6403 6404 6405
	rtl_unlock_work(tp);

	rtl_pll_power_down(tp);
6406 6407 6408 6409 6410 6411 6412 6413
}

#ifdef CONFIG_PM

static int rtl8169_suspend(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
6414

6415
	rtl8169_net_suspend(dev);
6416

6417 6418 6419
	return 0;
}

6420 6421
static void __rtl8169_resume(struct net_device *dev)
{
F
françois romieu 已提交
6422 6423
	struct rtl8169_private *tp = netdev_priv(dev);

6424
	netif_device_attach(dev);
F
françois romieu 已提交
6425 6426 6427

	rtl_pll_power_up(tp);

A
Artem Savkov 已提交
6428 6429
	rtl_lock_work(tp);
	napi_enable(&tp->napi);
6430
	set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
A
Artem Savkov 已提交
6431
	rtl_unlock_work(tp);
6432

6433
	rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
6434 6435
}

6436
static int rtl8169_resume(struct device *device)
6437
{
6438
	struct pci_dev *pdev = to_pci_dev(device);
6439
	struct net_device *dev = pci_get_drvdata(pdev);
S
Stanislaw Gruszka 已提交
6440 6441 6442
	struct rtl8169_private *tp = netdev_priv(dev);

	rtl8169_init_phy(dev, tp);
6443

6444 6445
	if (netif_running(dev))
		__rtl8169_resume(dev);
6446

6447 6448 6449 6450 6451 6452 6453 6454 6455 6456 6457 6458
	return 0;
}

static int rtl8169_runtime_suspend(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

	if (!tp->TxDescArray)
		return 0;

6459
	rtl_lock_work(tp);
6460 6461
	tp->saved_wolopts = __rtl8169_get_wol(tp);
	__rtl8169_set_wol(tp, WAKE_ANY);
6462
	rtl_unlock_work(tp);
6463 6464 6465 6466 6467 6468 6469 6470 6471 6472 6473 6474 6475 6476 6477

	rtl8169_net_suspend(dev);

	return 0;
}

static int rtl8169_runtime_resume(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

	if (!tp->TxDescArray)
		return 0;

6478
	rtl_lock_work(tp);
6479 6480
	__rtl8169_set_wol(tp, tp->saved_wolopts);
	tp->saved_wolopts = 0;
6481
	rtl_unlock_work(tp);
6482

S
Stanislaw Gruszka 已提交
6483 6484
	rtl8169_init_phy(dev, tp);

6485
	__rtl8169_resume(dev);
6486 6487 6488 6489

	return 0;
}

6490 6491 6492 6493 6494 6495
static int rtl8169_runtime_idle(struct device *device)
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

6496
	return tp->TxDescArray ? -EBUSY : 0;
6497 6498
}

6499
static const struct dev_pm_ops rtl8169_pm_ops = {
F
Francois Romieu 已提交
6500 6501 6502 6503 6504 6505 6506 6507 6508
	.suspend		= rtl8169_suspend,
	.resume			= rtl8169_resume,
	.freeze			= rtl8169_suspend,
	.thaw			= rtl8169_resume,
	.poweroff		= rtl8169_suspend,
	.restore		= rtl8169_resume,
	.runtime_suspend	= rtl8169_runtime_suspend,
	.runtime_resume		= rtl8169_runtime_resume,
	.runtime_idle		= rtl8169_runtime_idle,
6509 6510 6511 6512 6513 6514 6515 6516 6517 6518
};

#define RTL8169_PM_OPS	(&rtl8169_pm_ops)

#else /* !CONFIG_PM */

#define RTL8169_PM_OPS	NULL

#endif /* !CONFIG_PM */

6519 6520 6521 6522 6523 6524 6525 6526 6527 6528 6529 6530 6531 6532 6533 6534 6535 6536 6537 6538
static void rtl_wol_shutdown_quirk(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;

	/* WoL fails with 8168b when the receiver is disabled. */
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_11:
	case RTL_GIGA_MAC_VER_12:
	case RTL_GIGA_MAC_VER_17:
		pci_clear_master(tp->pci_dev);

		RTL_W8(ChipCmd, CmdRxEnb);
		/* PCI commit */
		RTL_R8(ChipCmd);
		break;
	default:
		break;
	}
}

F
Francois Romieu 已提交
6539 6540
static void rtl_shutdown(struct pci_dev *pdev)
{
6541
	struct net_device *dev = pci_get_drvdata(pdev);
6542
	struct rtl8169_private *tp = netdev_priv(dev);
6543 6544 6545
	struct device *d = &pdev->dev;

	pm_runtime_get_sync(d);
6546 6547

	rtl8169_net_suspend(dev);
F
Francois Romieu 已提交
6548

F
Francois Romieu 已提交
6549
	/* Restore original MAC address */
6550 6551
	rtl_rar_set(tp, dev->perm_addr);

6552
	rtl8169_hw_reset(tp);
6553

6554
	if (system_state == SYSTEM_POWER_OFF) {
6555 6556 6557
		if (__rtl8169_get_wol(tp) & WAKE_ANY) {
			rtl_wol_suspend_quirk(tp);
			rtl_wol_shutdown_quirk(tp);
6558 6559
		}

6560 6561 6562
		pci_wake_from_d3(pdev, true);
		pci_set_power_state(pdev, PCI_D3hot);
	}
6563 6564

	pm_runtime_put_noidle(d);
6565
}
6566

6567 6568 6569 6570 6571 6572 6573 6574 6575 6576 6577 6578 6579
static void __devexit rtl_remove_one(struct pci_dev *pdev)
{
	struct net_device *dev = pci_get_drvdata(pdev);
	struct rtl8169_private *tp = netdev_priv(dev);

	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
		rtl8168_driver_stop(tp);
	}

	cancel_work_sync(&tp->wk.work);

6580 6581
	netif_napi_del(&tp->napi);

6582 6583 6584 6585 6586 6587 6588 6589 6590 6591 6592 6593 6594 6595 6596
	unregister_netdev(dev);

	rtl_release_firmware(tp);

	if (pci_dev_run_wake(pdev))
		pm_runtime_get_noresume(&pdev->dev);

	/* restore original MAC address */
	rtl_rar_set(tp, dev->perm_addr);

	rtl_disable_msi(pdev, tp);
	rtl8169_release_board(pdev, dev, tp->mmio_addr);
	pci_set_drvdata(pdev, NULL);
}

6597
static const struct net_device_ops rtl_netdev_ops = {
6598
	.ndo_open		= rtl_open,
6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609 6610 6611 6612 6613 6614 6615
	.ndo_stop		= rtl8169_close,
	.ndo_get_stats64	= rtl8169_get_stats64,
	.ndo_start_xmit		= rtl8169_start_xmit,
	.ndo_tx_timeout		= rtl8169_tx_timeout,
	.ndo_validate_addr	= eth_validate_addr,
	.ndo_change_mtu		= rtl8169_change_mtu,
	.ndo_fix_features	= rtl8169_fix_features,
	.ndo_set_features	= rtl8169_set_features,
	.ndo_set_mac_address	= rtl_set_mac_address,
	.ndo_do_ioctl		= rtl8169_ioctl,
	.ndo_set_rx_mode	= rtl_set_rx_mode,
#ifdef CONFIG_NET_POLL_CONTROLLER
	.ndo_poll_controller	= rtl8169_netpoll,
#endif

};

6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6654 6655 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667 6668 6669 6670 6671 6672
static const struct rtl_cfg_info {
	void (*hw_start)(struct net_device *);
	unsigned int region;
	unsigned int align;
	u16 event_slow;
	unsigned features;
	u8 default_ver;
} rtl_cfg_infos [] = {
	[RTL_CFG_0] = {
		.hw_start	= rtl_hw_start_8169,
		.region		= 1,
		.align		= 0,
		.event_slow	= SYSErr | LinkChg | RxOverflow | RxFIFOOver,
		.features	= RTL_FEATURE_GMII,
		.default_ver	= RTL_GIGA_MAC_VER_01,
	},
	[RTL_CFG_1] = {
		.hw_start	= rtl_hw_start_8168,
		.region		= 2,
		.align		= 8,
		.event_slow	= SYSErr | LinkChg | RxOverflow,
		.features	= RTL_FEATURE_GMII | RTL_FEATURE_MSI,
		.default_ver	= RTL_GIGA_MAC_VER_11,
	},
	[RTL_CFG_2] = {
		.hw_start	= rtl_hw_start_8101,
		.region		= 2,
		.align		= 8,
		.event_slow	= SYSErr | LinkChg | RxOverflow | RxFIFOOver |
				  PCSTimeout,
		.features	= RTL_FEATURE_MSI,
		.default_ver	= RTL_GIGA_MAC_VER_13,
	}
};

/* Cfg9346_Unlock assumed. */
static unsigned rtl_try_msi(struct rtl8169_private *tp,
			    const struct rtl_cfg_info *cfg)
{
	void __iomem *ioaddr = tp->mmio_addr;
	unsigned msi = 0;
	u8 cfg2;

	cfg2 = RTL_R8(Config2) & ~MSIEnable;
	if (cfg->features & RTL_FEATURE_MSI) {
		if (pci_enable_msi(tp->pci_dev)) {
			netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n");
		} else {
			cfg2 |= MSIEnable;
			msi = RTL_FEATURE_MSI;
		}
	}
	if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
		RTL_W8(Config2, cfg2);
	return msi;
}

H
Hayes Wang 已提交
6673 6674 6675 6676 6677 6678 6679 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690 6691 6692 6693 6694 6695 6696 6697 6698 6699 6700 6701 6702 6703 6704 6705
DECLARE_RTL_COND(rtl_link_list_ready_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return RTL_R8(MCU) & LINK_LIST_RDY;
}

DECLARE_RTL_COND(rtl_rxtx_empty_cond)
{
	void __iomem *ioaddr = tp->mmio_addr;

	return (RTL_R8(MCU) & RXTX_EMPTY) == RXTX_EMPTY;
}

static void __devinit rtl_hw_init_8168g(struct rtl8169_private *tp)
{
	void __iomem *ioaddr = tp->mmio_addr;
	u32 data;

	tp->ocp_base = OCP_STD_PHY_BASE;

	RTL_W32(MISC, RTL_R32(MISC) | RXDV_GATED_EN);

	if (!rtl_udelay_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 42))
		return;

	if (!rtl_udelay_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42))
		return;

	RTL_W8(ChipCmd, RTL_R8(ChipCmd) & ~(CmdTxEnb | CmdRxEnb));
	msleep(1);
	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);

6706
	data = r8168_mac_ocp_read(tp, 0xe8de);
H
Hayes Wang 已提交
6707 6708 6709 6710 6711 6712
	data &= ~(1 << 14);
	r8168_mac_ocp_write(tp, 0xe8de, data);

	if (!rtl_udelay_loop_wait_high(tp, &rtl_link_list_ready_cond, 100, 42))
		return;

6713
	data = r8168_mac_ocp_read(tp, 0xe8de);
H
Hayes Wang 已提交
6714 6715 6716 6717 6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 6731 6732 6733
	data |= (1 << 15);
	r8168_mac_ocp_write(tp, 0xe8de, data);

	if (!rtl_udelay_loop_wait_high(tp, &rtl_link_list_ready_cond, 100, 42))
		return;
}

static void __devinit rtl_hw_initialize(struct rtl8169_private *tp)
{
	switch (tp->mac_version) {
	case RTL_GIGA_MAC_VER_40:
	case RTL_GIGA_MAC_VER_41:
		rtl_hw_init_8168g(tp);
		break;

	default:
		break;
	}
}

6734 6735 6736 6737 6738 6739 6740 6741 6742 6743 6744 6745 6746 6747 6748 6749 6750 6751 6752 6753 6754 6755 6756 6757
static int __devinit
rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
	const unsigned int region = cfg->region;
	struct rtl8169_private *tp;
	struct mii_if_info *mii;
	struct net_device *dev;
	void __iomem *ioaddr;
	int chipset, i;
	int rc;

	if (netif_msg_drv(&debug)) {
		printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
		       MODULENAME, RTL8169_VERSION);
	}

	dev = alloc_etherdev(sizeof (*tp));
	if (!dev) {
		rc = -ENOMEM;
		goto out;
	}

	SET_NETDEV_DEV(dev, &pdev->dev);
6758
	dev->netdev_ops = &rtl_netdev_ops;
6759 6760 6761 6762 6763 6764 6765 6766 6767 6768 6769 6770 6771 6772 6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786 6787 6788 6789 6790 6791 6792 6793 6794 6795 6796 6797 6798 6799 6800 6801 6802 6803 6804 6805 6806 6807 6808 6809 6810 6811 6812 6813 6814 6815 6816 6817 6818 6819 6820 6821 6822 6823 6824 6825 6826 6827 6828 6829 6830 6831 6832 6833 6834 6835 6836 6837 6838 6839 6840 6841 6842
	tp = netdev_priv(dev);
	tp->dev = dev;
	tp->pci_dev = pdev;
	tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);

	mii = &tp->mii;
	mii->dev = dev;
	mii->mdio_read = rtl_mdio_read;
	mii->mdio_write = rtl_mdio_write;
	mii->phy_id_mask = 0x1f;
	mii->reg_num_mask = 0x1f;
	mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII);

	/* disable ASPM completely as that cause random device stop working
	 * problems as well as full system hangs for some PCIe devices users */
	pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
				     PCIE_LINK_STATE_CLKPM);

	/* enable device (incl. PCI PM wakeup and hotplug setup) */
	rc = pci_enable_device(pdev);
	if (rc < 0) {
		netif_err(tp, probe, dev, "enable failure\n");
		goto err_out_free_dev_1;
	}

	if (pci_set_mwi(pdev) < 0)
		netif_info(tp, probe, dev, "Mem-Wr-Inval unavailable\n");

	/* make sure PCI base addr 1 is MMIO */
	if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
		netif_err(tp, probe, dev,
			  "region #%d not an MMIO resource, aborting\n",
			  region);
		rc = -ENODEV;
		goto err_out_mwi_2;
	}

	/* check for weird/broken PCI region reporting */
	if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
		netif_err(tp, probe, dev,
			  "Invalid PCI region size(s), aborting\n");
		rc = -ENODEV;
		goto err_out_mwi_2;
	}

	rc = pci_request_regions(pdev, MODULENAME);
	if (rc < 0) {
		netif_err(tp, probe, dev, "could not request regions\n");
		goto err_out_mwi_2;
	}

	tp->cp_cmd = RxChkSum;

	if ((sizeof(dma_addr_t) > 4) &&
	    !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) {
		tp->cp_cmd |= PCIDAC;
		dev->features |= NETIF_F_HIGHDMA;
	} else {
		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
		if (rc < 0) {
			netif_err(tp, probe, dev, "DMA configuration failed\n");
			goto err_out_free_res_3;
		}
	}

	/* ioremap MMIO region */
	ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
	if (!ioaddr) {
		netif_err(tp, probe, dev, "cannot remap MMIO, aborting\n");
		rc = -EIO;
		goto err_out_free_res_3;
	}
	tp->mmio_addr = ioaddr;

	if (!pci_is_pcie(pdev))
		netif_info(tp, probe, dev, "not PCI Express\n");

	/* Identify chip attached to board */
	rtl8169_get_mac_version(tp, dev, cfg->default_ver);

	rtl_init_rxcfg(tp);

	rtl_irq_disable(tp);

H
Hayes Wang 已提交
6843 6844
	rtl_hw_initialize(tp);

6845 6846 6847 6848 6849 6850 6851 6852 6853 6854 6855 6856 6857 6858 6859 6860
	rtl_hw_reset(tp);

	rtl_ack_events(tp, 0xffff);

	pci_set_master(pdev);

	/*
	 * Pretend we are using VLANs; This bypasses a nasty bug where
	 * Interrupts stop flowing on high load on 8110SCd controllers.
	 */
	if (tp->mac_version == RTL_GIGA_MAC_VER_05)
		tp->cp_cmd |= RxVlan;

	rtl_init_mdio_ops(tp);
	rtl_init_pll_power_ops(tp);
	rtl_init_jumbo_ops(tp);
6861
	rtl_init_csi_ops(tp);
6862 6863 6864 6865 6866 6867 6868 6869 6870 6871 6872 6873 6874 6875 6876 6877 6878 6879 6880 6881 6882 6883 6884 6885 6886 6887 6888 6889 6890 6891 6892 6893 6894 6895 6896 6897 6898 6899 6900 6901 6902 6903 6904 6905 6906 6907 6908 6909 6910 6911 6912 6913 6914 6915 6916 6917 6918 6919 6920 6921 6922 6923 6924 6925 6926 6927 6928 6929 6930 6931 6932 6933 6934 6935 6936 6937 6938 6939 6940

	rtl8169_print_mac_version(tp);

	chipset = tp->mac_version;
	tp->txd_version = rtl_chip_infos[chipset].txd_version;

	RTL_W8(Cfg9346, Cfg9346_Unlock);
	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
	RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
	if ((RTL_R8(Config3) & (LinkUp | MagicPacket)) != 0)
		tp->features |= RTL_FEATURE_WOL;
	if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
		tp->features |= RTL_FEATURE_WOL;
	tp->features |= rtl_try_msi(tp, cfg);
	RTL_W8(Cfg9346, Cfg9346_Lock);

	if (rtl_tbi_enabled(tp)) {
		tp->set_speed = rtl8169_set_speed_tbi;
		tp->get_settings = rtl8169_gset_tbi;
		tp->phy_reset_enable = rtl8169_tbi_reset_enable;
		tp->phy_reset_pending = rtl8169_tbi_reset_pending;
		tp->link_ok = rtl8169_tbi_link_ok;
		tp->do_ioctl = rtl_tbi_ioctl;
	} else {
		tp->set_speed = rtl8169_set_speed_xmii;
		tp->get_settings = rtl8169_gset_xmii;
		tp->phy_reset_enable = rtl8169_xmii_reset_enable;
		tp->phy_reset_pending = rtl8169_xmii_reset_pending;
		tp->link_ok = rtl8169_xmii_link_ok;
		tp->do_ioctl = rtl_xmii_ioctl;
	}

	mutex_init(&tp->wk.mutex);

	/* Get MAC address */
	for (i = 0; i < ETH_ALEN; i++)
		dev->dev_addr[i] = RTL_R8(MAC0 + i);
	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);

	SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
	dev->watchdog_timeo = RTL8169_TX_TIMEOUT;

	netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT);

	/* don't enable SG, IP_CSUM and TSO by default - it might not work
	 * properly for all devices */
	dev->features |= NETIF_F_RXCSUM |
		NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;

	dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
		NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
	dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
		NETIF_F_HIGHDMA;

	if (tp->mac_version == RTL_GIGA_MAC_VER_05)
		/* 8110SCd requires hardware Rx VLAN - disallow toggling */
		dev->hw_features &= ~NETIF_F_HW_VLAN_RX;

	dev->hw_features |= NETIF_F_RXALL;
	dev->hw_features |= NETIF_F_RXFCS;

	tp->hw_start = cfg->hw_start;
	tp->event_slow = cfg->event_slow;

	tp->opts1_mask = (tp->mac_version != RTL_GIGA_MAC_VER_01) ?
		~(RxBOVF | RxFOVF) : ~0;

	init_timer(&tp->timer);
	tp->timer.data = (unsigned long) dev;
	tp->timer.function = rtl8169_phy_timer;

	tp->rtl_fw = RTL_FIRMWARE_UNKNOWN;

	rc = register_netdev(dev);
	if (rc < 0)
		goto err_out_msi_4;

	pci_set_drvdata(pdev, dev);

6941 6942 6943
	netif_info(tp, probe, dev, "%s at 0x%p, %pM, XID %08x IRQ %d\n",
		   rtl_chip_infos[chipset].name, ioaddr, dev->dev_addr,
		   (u32)(RTL_R32(TxConfig) & 0x9cf0f8ff), pdev->irq);
6944 6945 6946 6947 6948 6949 6950 6951 6952 6953 6954 6955 6956 6957 6958 6959 6960 6961 6962 6963 6964 6965 6966 6967
	if (rtl_chip_infos[chipset].jumbo_max != JUMBO_1K) {
		netif_info(tp, probe, dev, "jumbo features [frames: %d bytes, "
			   "tx checksumming: %s]\n",
			   rtl_chip_infos[chipset].jumbo_max,
			   rtl_chip_infos[chipset].jumbo_tx_csum ? "ok" : "ko");
	}

	if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_28 ||
	    tp->mac_version == RTL_GIGA_MAC_VER_31) {
		rtl8168_driver_start(tp);
	}

	device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL);

	if (pci_dev_run_wake(pdev))
		pm_runtime_put_noidle(&pdev->dev);

	netif_carrier_off(dev);

out:
	return rc;

err_out_msi_4:
6968
	netif_napi_del(&tp->napi);
6969 6970 6971 6972 6973 6974 6975 6976 6977 6978 6979 6980
	rtl_disable_msi(pdev, tp);
	iounmap(ioaddr);
err_out_free_res_3:
	pci_release_regions(pdev);
err_out_mwi_2:
	pci_clear_mwi(pdev);
	pci_disable_device(pdev);
err_out_free_dev_1:
	free_netdev(dev);
	goto out;
}

L
Linus Torvalds 已提交
6981 6982 6983
static struct pci_driver rtl8169_pci_driver = {
	.name		= MODULENAME,
	.id_table	= rtl8169_pci_tbl,
6984
	.probe		= rtl_init_one,
6985
	.remove		= __devexit_p(rtl_remove_one),
F
Francois Romieu 已提交
6986
	.shutdown	= rtl_shutdown,
6987
	.driver.pm	= RTL8169_PM_OPS,
L
Linus Torvalds 已提交
6988 6989
};

F
Francois Romieu 已提交
6990
static int __init rtl8169_init_module(void)
L
Linus Torvalds 已提交
6991
{
6992
	return pci_register_driver(&rtl8169_pci_driver);
L
Linus Torvalds 已提交
6993 6994
}

F
Francois Romieu 已提交
6995
static void __exit rtl8169_cleanup_module(void)
L
Linus Torvalds 已提交
6996 6997 6998 6999 7000 7001
{
	pci_unregister_driver(&rtl8169_pci_driver);
}

module_init(rtl8169_init_module);
module_exit(rtl8169_cleanup_module);