ov519.c 134.2 KB
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/**
 * OV519 driver
 *
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 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
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 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
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 *
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 * This module is adapted from the ov51x-jpeg package, which itself
 * was adapted from the ov511 driver.
 *
 * Original copyright for the ov511 driver is:
 *
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 * Copyright (c) 1999-2006 Mark W. McClelland
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 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
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 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
 * Changes by Claudio Matsuoka <claudio@conectiva.com>
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 *
 * ov51x-jpeg original copyright is:
 *
 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
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 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 */
#define MODULE_NAME "ov519"

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#include <linux/input.h>
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#include "gspca.h"

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/* The jpeg_hdr is used by w996Xcf only */
/* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
#define CONEX_CAM
#include "jpeg.h"

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MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
MODULE_DESCRIPTION("OV519 USB Camera Driver");
MODULE_LICENSE("GPL");

/* global parameters */
static int frame_rate;

/* Number of times to retry a failed I2C transaction. Increase this if you
 * are getting "Failed to read sensor ID..." */
static int i2c_detect_tries = 10;

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/* controls */
enum e_ctrl {
	BRIGHTNESS,
	CONTRAST,
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	EXPOSURE,
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	COLORS,
	HFLIP,
	VFLIP,
	AUTOBRIGHT,
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	AUTOGAIN,
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	FREQ,
	NCTRL		/* number of controls */
};

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/* ov519 device descriptor */
struct sd {
	struct gspca_dev gspca_dev;		/* !! must be the first item */

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	struct gspca_ctrl ctrls[NCTRL];

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	u8 packet_nr;
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	char bridge;
#define BRIDGE_OV511		0
#define BRIDGE_OV511PLUS	1
#define BRIDGE_OV518		2
#define BRIDGE_OV518PLUS	3
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#define BRIDGE_OV519		4		/* = ov530 */
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#define BRIDGE_OVFX2		5
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#define BRIDGE_W9968CF		6
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#define BRIDGE_MASK		7

	char invert_led;
#define BRIDGE_INVERT_LED	8
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	char snapshot_pressed;
	char snapshot_needs_reset;

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	/* Determined by sensor type */
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	u8 sif;
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	u8 quality;
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#define QUALITY_MIN 50
#define QUALITY_MAX 70
#define QUALITY_DEF 50
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	u8 stopped;		/* Streaming is temporarily paused */
	u8 first_frame;
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	u8 frame_rate;		/* current Framerate */
	u8 clockdiv;		/* clockdiv override */
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	s8 sensor;		/* Type of image sensor chip (SEN_*) */
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	u8 sensor_addr;
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	u16 sensor_width;
	u16 sensor_height;
	s16 sensor_reg_cache[256];
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	u8 jpeg_hdr[JPEG_HDR_SZ];
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};
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enum sensors {
	SEN_OV2610,
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	SEN_OV2610AE,
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	SEN_OV3610,
	SEN_OV6620,
	SEN_OV6630,
	SEN_OV66308AF,
	SEN_OV7610,
	SEN_OV7620,
	SEN_OV7620AE,
	SEN_OV7640,
	SEN_OV7648,
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	SEN_OV7660,
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	SEN_OV7670,
	SEN_OV76BE,
	SEN_OV8610,
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	SEN_OV9600,
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};
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/* Note this is a bit of a hack, but the w9968cf driver needs the code for all
   the ov sensors which is already present here. When we have the time we
   really should move the sensor drivers to v4l2 sub drivers. */
#include "w996Xcf.c"

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/* V4L2 controls supported by the driver */
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static void setbrightness(struct gspca_dev *gspca_dev);
static void setcontrast(struct gspca_dev *gspca_dev);
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static void setexposure(struct gspca_dev *gspca_dev);
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static void setcolors(struct gspca_dev *gspca_dev);
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static void sethvflip(struct gspca_dev *gspca_dev);
static void setautobright(struct gspca_dev *gspca_dev);
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static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
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static void setfreq(struct gspca_dev *gspca_dev);
static void setfreq_i(struct sd *sd);
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static const struct ctrl sd_ctrls[] = {
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[BRIGHTNESS] = {
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	    {
		.id      = V4L2_CID_BRIGHTNESS,
		.type    = V4L2_CTRL_TYPE_INTEGER,
		.name    = "Brightness",
		.minimum = 0,
		.maximum = 255,
		.step    = 1,
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		.default_value = 127,
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	    },
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	    .set_control = setbrightness,
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	},
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[CONTRAST] = {
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	    {
		.id      = V4L2_CID_CONTRAST,
		.type    = V4L2_CTRL_TYPE_INTEGER,
		.name    = "Contrast",
		.minimum = 0,
		.maximum = 255,
		.step    = 1,
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		.default_value = 127,
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	    },
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	    .set_control = setcontrast,
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	},
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[EXPOSURE] = {
	    {
		.id      = V4L2_CID_EXPOSURE,
		.type    = V4L2_CTRL_TYPE_INTEGER,
		.name    = "Exposure",
		.minimum = 0,
		.maximum = 255,
		.step    = 1,
		.default_value = 127,
	    },
	    .set_control = setexposure,
	},
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[COLORS] = {
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	    {
		.id      = V4L2_CID_SATURATION,
		.type    = V4L2_CTRL_TYPE_INTEGER,
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		.name    = "Color",
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		.minimum = 0,
		.maximum = 255,
		.step    = 1,
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		.default_value = 127,
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	    },
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	    .set_control = setcolors,
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	},
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/* The flip controls work for sensors ov7660 and ov7670 only */
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[HFLIP] = {
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	    {
		.id      = V4L2_CID_HFLIP,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Mirror",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
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		.default_value = 0,
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	    },
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	    .set_control = sethvflip,
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	},
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[VFLIP] = {
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	    {
		.id      = V4L2_CID_VFLIP,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Vflip",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
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		.default_value = 0,
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	    },
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	    .set_control = sethvflip,
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	},
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[AUTOBRIGHT] = {
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	    {
		.id      = V4L2_CID_AUTOBRIGHTNESS,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Auto Brightness",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
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		.default_value = 1,
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	    },
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	    .set_control = setautobright,
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	},
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[AUTOGAIN] = {
	    {
		.id      = V4L2_CID_AUTOGAIN,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Auto Gain",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
		.default_value = 1,
		.flags	 = V4L2_CTRL_FLAG_UPDATE
	    },
	    .set = sd_setautogain,
	},
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[FREQ] = {
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	    {
		.id	 = V4L2_CID_POWER_LINE_FREQUENCY,
		.type    = V4L2_CTRL_TYPE_MENU,
		.name    = "Light frequency filter",
		.minimum = 0,
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		.maximum = 2,	/* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
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		.step    = 1,
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		.default_value = 0,
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	    },
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	    .set_control = setfreq,
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	},
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};

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/* table of the disabled controls */
static const unsigned ctrl_dis[] = {
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[SEN_OV2610] =		((1 << NCTRL) - 1)	/* no control */
			^ ((1 << EXPOSURE)	/* but exposure */
			 | (1 << AUTOGAIN)),	/* and autogain */
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[SEN_OV2610AE] =	((1 << NCTRL) - 1)	/* no control */
			^ ((1 << EXPOSURE)	/* but exposure */
			 | (1 << AUTOGAIN)),	/* and autogain */
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[SEN_OV3610] =		(1 << NCTRL) - 1,	/* no control */

[SEN_OV6620] =		(1 << HFLIP) |
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			(1 << VFLIP) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV6630] =		(1 << HFLIP) |
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			(1 << VFLIP) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV66308AF] =	(1 << HFLIP) |
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			(1 << VFLIP) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV7610] =		(1 << HFLIP) |
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			(1 << VFLIP) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV7620] =		(1 << HFLIP) |
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			(1 << VFLIP) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV7620AE] =	(1 << HFLIP) |
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			(1 << VFLIP) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV7640] =		(1 << HFLIP) |
			(1 << VFLIP) |
			(1 << AUTOBRIGHT) |
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			(1 << CONTRAST) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV7648] =		(1 << HFLIP) |
			(1 << VFLIP) |
			(1 << AUTOBRIGHT) |
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			(1 << CONTRAST) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV7660] =		(1 << AUTOBRIGHT) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV7670] =		(1 << COLORS) |
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			(1 << AUTOBRIGHT) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV76BE] =		(1 << HFLIP) |
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			(1 << VFLIP) |
			(1 << EXPOSURE) |
			(1 << AUTOGAIN),
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[SEN_OV8610] =		(1 << HFLIP) |
			(1 << VFLIP) |
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			(1 << EXPOSURE) |
			(1 << AUTOGAIN) |
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			(1 << FREQ),
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[SEN_OV9600] =		((1 << NCTRL) - 1)	/* no control */
			^ ((1 << EXPOSURE)	/* but exposure */
			 | (1 << AUTOGAIN)),	/* and autogain */

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};

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static const struct v4l2_pix_format ov519_vga_mode[] = {
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	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 320,
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		.sizeimage = 320 * 240 * 3 / 8 + 590,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
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};
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static const struct v4l2_pix_format ov519_sif_mode[] = {
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	{160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 160,
		.sizeimage = 160 * 120 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
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	{176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 176,
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		.sizeimage = 176 * 144 * 3 / 8 + 590,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
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	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
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	{352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 352,
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		.sizeimage = 352 * 288 * 3 / 8 + 590,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
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};

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/* Note some of the sizeimage values for the ov511 / ov518 may seem
   larger then necessary, however they need to be this big as the ov511 /
   ov518 always fills the entire isoc frame, using 0 padding bytes when
   it doesn't have any data. So with low framerates the amount of data
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Lucas De Marchi 已提交
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   transferred can become quite large (libv4l will remove all the 0 padding
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   in userspace). */
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static const struct v4l2_pix_format ov518_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 320,
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		.sizeimage = 320 * 240 * 3,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 640,
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		.sizeimage = 640 * 480 * 2,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
static const struct v4l2_pix_format ov518_sif_mode[] = {
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	{160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 160,
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		.sizeimage = 70000,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
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	{176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 176,
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		.sizeimage = 70000,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
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	{320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 320,
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		.sizeimage = 320 * 240 * 3,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
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	{352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 352,
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		.sizeimage = 352 * 288 * 3,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};

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static const struct v4l2_pix_format ov511_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480 * 2,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
static const struct v4l2_pix_format ov511_sif_mode[] = {
	{160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 160,
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		.sizeimage = 70000,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
	{176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 176,
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		.sizeimage = 70000,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
	{352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 352,
		.sizeimage = 352 * 288 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
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static const struct v4l2_pix_format ovfx2_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
};
static const struct v4l2_pix_format ovfx2_cif_mode[] = {
	{160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 160,
		.sizeimage = 160 * 120,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 3},
	{176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 176,
		.sizeimage = 176 * 144,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 2},
	{352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 352,
		.sizeimage = 352 * 288,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
};
static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
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	{800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 800,
		.sizeimage = 800 * 600,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
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	{1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1600,
		.sizeimage = 1600 * 1200,
		.colorspace = V4L2_COLORSPACE_SRGB},
};
static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480,
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		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 800,
		.sizeimage = 800 * 600,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1024,
		.sizeimage = 1024 * 768,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1600,
		.sizeimage = 1600 * 1200,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
	{2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 2048,
		.sizeimage = 2048 * 1536,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
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};
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static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1280,
		.sizeimage = 1280 * 1024,
		.colorspace = V4L2_COLORSPACE_SRGB},
};
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/* Registers common to OV511 / OV518 */
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#define R51x_FIFO_PSIZE			0x30	/* 2 bytes wide w/ OV518(+) */
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#define R51x_SYS_RESET			0x50
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	/* Reset type flags */
	#define	OV511_RESET_OMNICE	0x08
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#define R51x_SYS_INIT			0x53
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#define R51x_SYS_SNAP			0x52
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#define R51x_SYS_CUST_ID		0x5f
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#define R51x_COMP_LUT_BEGIN		0x80

/* OV511 Camera interface register numbers */
556 557 558 559 560 561 562 563 564 565 566
#define R511_CAM_DELAY			0x10
#define R511_CAM_EDGE			0x11
#define R511_CAM_PXCNT			0x12
#define R511_CAM_LNCNT			0x13
#define R511_CAM_PXDIV			0x14
#define R511_CAM_LNDIV			0x15
#define R511_CAM_UV_EN			0x16
#define R511_CAM_LINE_MODE		0x17
#define R511_CAM_OPTS			0x18

#define R511_SNAP_FRAME			0x19
567 568 569 570 571 572
#define R511_SNAP_PXCNT			0x1a
#define R511_SNAP_LNCNT			0x1b
#define R511_SNAP_PXDIV			0x1c
#define R511_SNAP_LNDIV			0x1d
#define R511_SNAP_UV_EN			0x1e
#define R511_SNAP_OPTS			0x1f
573 574 575 576

#define R511_DRAM_FLOW_CTL		0x20
#define R511_FIFO_OPTS			0x31
#define R511_I2C_CTL			0x40
577
#define R511_SYS_LED_CTL		0x55	/* OV511+ only */
578 579
#define R511_COMP_EN			0x78
#define R511_COMP_LUT_EN		0x79
580 581 582 583 584

/* OV518 Camera interface register numbers */
#define R518_GPIO_OUT			0x56	/* OV518(+) only */
#define R518_GPIO_CTL			0x57	/* OV518(+) only */

585
/* OV519 Camera interface register numbers */
586 587 588 589 590 591 592 593 594
#define OV519_R10_H_SIZE		0x10
#define OV519_R11_V_SIZE		0x11
#define OV519_R12_X_OFFSETL		0x12
#define OV519_R13_X_OFFSETH		0x13
#define OV519_R14_Y_OFFSETL		0x14
#define OV519_R15_Y_OFFSETH		0x15
#define OV519_R16_DIVIDER		0x16
#define OV519_R20_DFR			0x20
#define OV519_R25_FORMAT		0x25
595 596

/* OV519 System Controller register numbers */
597 598
#define OV519_R51_RESET1		0x51
#define OV519_R54_EN_CLK1		0x54
599
#define OV519_R57_SNAPSHOT		0x57
600 601 602 603

#define OV519_GPIO_DATA_OUT0		0x71
#define OV519_GPIO_IO_CTRL0		0x72

604
/*#define OV511_ENDPOINT_ADDRESS 1	 * Isoc endpoint number */
605

606 607 608
/*
 * The FX2 chip does not give us a zero length read at end of frame.
 * It does, however, give a short read at the end of a frame, if
D
Daniel Mack 已提交
609
 * necessary, rather than run two frames together.
610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627
 *
 * By choosing the right bulk transfer size, we are guaranteed to always
 * get a short read for the last read of each frame.  Frame sizes are
 * always a composite number (width * height, or a multiple) so if we
 * choose a prime number, we are guaranteed that the last read of a
 * frame will be short.
 *
 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 * to figure out why.  [PMiller]
 *
 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 *
 * It isn't enough to know the number of bytes per frame, in case we
 * have data dropouts or buffer overruns (even though the FX2 double
 * buffers, there are some pretty strict real time constraints for
 * isochronous transfer for larger frame sizes).
 */
628
/*jfm: this value does not work for 800x600 - see isoc_init */
629 630
#define OVFX2_BULK_SIZE (13 * 4096)

631 632 633 634 635 636 637
/* I2C registers */
#define R51x_I2C_W_SID		0x41
#define R51x_I2C_SADDR_3	0x42
#define R51x_I2C_SADDR_2	0x43
#define R51x_I2C_R_SID		0x44
#define R51x_I2C_DATA		0x45
#define R518_I2C_CTL		0x47	/* OV518(+) only */
638
#define OVFX2_I2C_ADDR		0x00
639 640 641

/* I2C ADDRESSES */
#define OV7xx0_SID   0x42
642
#define OV_HIRES_SID 0x60		/* OV9xxx / OV2xxx / OV3xxx */
643 644 645 646 647
#define OV8xx0_SID   0xa0
#define OV6xx0_SID   0xc0

/* OV7610 registers */
#define OV7610_REG_GAIN		0x00	/* gain setting (5:0) */
648 649
#define OV7610_REG_BLUE		0x01	/* blue channel balance */
#define OV7610_REG_RED		0x02	/* red channel balance */
650 651 652 653 654 655 656 657 658
#define OV7610_REG_SAT		0x03	/* saturation */
#define OV8610_REG_HUE		0x04	/* 04 reserved */
#define OV7610_REG_CNT		0x05	/* Y contrast */
#define OV7610_REG_BRT		0x06	/* Y brightness */
#define OV7610_REG_COM_C	0x14	/* misc common regs */
#define OV7610_REG_ID_HIGH	0x1c	/* manufacturer ID MSB */
#define OV7610_REG_ID_LOW	0x1d	/* manufacturer ID LSB */
#define OV7610_REG_COM_I	0x29	/* misc settings */

659
/* OV7660 and OV7670 registers */
660 661 662 663 664 665 666 667 668 669 670 671 672
#define OV7670_R00_GAIN		0x00	/* Gain lower 8 bits (rest in vref) */
#define OV7670_R01_BLUE		0x01	/* blue gain */
#define OV7670_R02_RED		0x02	/* red gain */
#define OV7670_R03_VREF		0x03	/* Pieces of GAIN, VSTART, VSTOP */
#define OV7670_R04_COM1		0x04	/* Control 1 */
/*#define OV7670_R07_AECHH	0x07	 * AEC MS 5 bits */
#define OV7670_R0C_COM3		0x0c	/* Control 3 */
#define OV7670_R0D_COM4		0x0d	/* Control 4 */
#define OV7670_R0E_COM5		0x0e	/* All "reserved" */
#define OV7670_R0F_COM6		0x0f	/* Control 6 */
#define OV7670_R10_AECH		0x10	/* More bits of AEC value */
#define OV7670_R11_CLKRC	0x11	/* Clock control */
#define OV7670_R12_COM7		0x12	/* Control 7 */
673 674 675 676 677
#define   OV7670_COM7_FMT_VGA	 0x00
/*#define   OV7670_COM7_YUV	 0x00	 * YUV */
#define   OV7670_COM7_FMT_QVGA	 0x10	/* QVGA format */
#define   OV7670_COM7_FMT_MASK	 0x38
#define   OV7670_COM7_RESET	 0x80	/* Register reset */
678
#define OV7670_R13_COM8		0x13	/* Control 8 */
679 680 681 682 683 684
#define   OV7670_COM8_AEC	 0x01	/* Auto exposure enable */
#define   OV7670_COM8_AWB	 0x02	/* White balance enable */
#define   OV7670_COM8_AGC	 0x04	/* Auto gain enable */
#define   OV7670_COM8_BFILT	 0x20	/* Band filter enable */
#define   OV7670_COM8_AECSTEP	 0x40	/* Unlimited AEC step size */
#define   OV7670_COM8_FASTAEC	 0x80	/* Enable fast AGC/AEC */
685 686 687 688 689 690 691
#define OV7670_R14_COM9		0x14	/* Control 9 - gain ceiling */
#define OV7670_R15_COM10	0x15	/* Control 10 */
#define OV7670_R17_HSTART	0x17	/* Horiz start high bits */
#define OV7670_R18_HSTOP	0x18	/* Horiz stop high bits */
#define OV7670_R19_VSTART	0x19	/* Vert start high bits */
#define OV7670_R1A_VSTOP	0x1a	/* Vert stop high bits */
#define OV7670_R1E_MVFP		0x1e	/* Mirror / vflip */
692 693
#define   OV7670_MVFP_VFLIP	 0x10	/* vertical flip */
#define   OV7670_MVFP_MIRROR	 0x20	/* Mirror image */
694 695 696 697 698 699
#define OV7670_R24_AEW		0x24	/* AGC upper limit */
#define OV7670_R25_AEB		0x25	/* AGC lower limit */
#define OV7670_R26_VPT		0x26	/* AGC/AEC fast mode op region */
#define OV7670_R32_HREF		0x32	/* HREF pieces */
#define OV7670_R3A_TSLB		0x3a	/* lots of stuff */
#define OV7670_R3B_COM11	0x3b	/* Control 11 */
700 701
#define   OV7670_COM11_EXP	 0x02
#define   OV7670_COM11_HZAUTO	 0x10	/* Auto detect 50/60 Hz */
702 703
#define OV7670_R3C_COM12	0x3c	/* Control 12 */
#define OV7670_R3D_COM13	0x3d	/* Control 13 */
704 705
#define   OV7670_COM13_GAMMA	 0x80	/* Gamma enable */
#define   OV7670_COM13_UVSAT	 0x40	/* UV saturation auto adjustment */
706 707 708
#define OV7670_R3E_COM14	0x3e	/* Control 14 */
#define OV7670_R3F_EDGE		0x3f	/* Edge enhancement factor */
#define OV7670_R40_COM15	0x40	/* Control 15 */
709
/*#define   OV7670_COM15_R00FF	 0xc0	 *	00 to FF */
710
#define OV7670_R41_COM16	0x41	/* Control 16 */
711
#define   OV7670_COM16_AWBGAIN	 0x08	/* AWB gain enable */
712
/* end of ov7660 common registers */
713 714 715 716 717 718 719 720 721 722 723 724 725
#define OV7670_R55_BRIGHT	0x55	/* Brightness */
#define OV7670_R56_CONTRAS	0x56	/* Contrast control */
#define OV7670_R69_GFIX		0x69	/* Fix gain control */
/*#define OV7670_R8C_RGB444	0x8c	 * RGB 444 control */
#define OV7670_R9F_HAECC1	0x9f	/* Hist AEC/AGC control 1 */
#define OV7670_RA0_HAECC2	0xa0	/* Hist AEC/AGC control 2 */
#define OV7670_RA5_BD50MAX	0xa5	/* 50hz banding step limit */
#define OV7670_RA6_HAECC3	0xa6	/* Hist AEC/AGC control 3 */
#define OV7670_RA7_HAECC4	0xa7	/* Hist AEC/AGC control 4 */
#define OV7670_RA8_HAECC5	0xa8	/* Hist AEC/AGC control 5 */
#define OV7670_RA9_HAECC6	0xa9	/* Hist AEC/AGC control 6 */
#define OV7670_RAA_HAECC7	0xaa	/* Hist AEC/AGC control 7 */
#define OV7670_RAB_BD60MAX	0xab	/* 60hz banding step limit */
726

727
struct ov_regvals {
728 729
	u8 reg;
	u8 val;
730 731
};
struct ov_i2c_regvals {
732 733
	u8 reg;
	u8 val;
734 735
};

736
/* Settings for OV2610 camera chip */
737
static const struct ov_i2c_regvals norm_2610[] = {
738
	{ 0x12, 0x80 },	/* reset */
739 740
};

741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758
static const struct ov_i2c_regvals norm_2610ae[] = {
	{0x12, 0x80},	/* reset */
	{0x13, 0xcd},
	{0x09, 0x01},
	{0x0d, 0x00},
	{0x11, 0x80},
	{0x12, 0x20},	/* 1600x1200 */
	{0x33, 0x0c},
	{0x35, 0x90},
	{0x36, 0x37},
/* ms-win traces */
	{0x11, 0x83},	/* clock / 3 ? */
	{0x2d, 0x00},	/* 60 Hz filter */
	{0x24, 0xb0},	/* normal colors */
	{0x25, 0x90},
	{0x10, 0x43},
};

759
static const struct ov_i2c_regvals norm_3620b[] = {
760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800
	/*
	 * From the datasheet: "Note that after writing to register COMH
	 * (0x12) to change the sensor mode, registers related to the
	 * sensor’s cropping window will be reset back to their default
	 * values."
	 *
	 * "wait 4096 external clock ... to make sure the sensor is
	 * stable and ready to access registers" i.e. 160us at 24MHz
	 */
	{ 0x12, 0x80 }, /* COMH reset */
	{ 0x12, 0x00 }, /* QXGA, master */

	/*
	 * 11 CLKRC "Clock Rate Control"
	 * [7] internal frequency doublers: on
	 * [6] video port mode: master
	 * [5:0] clock divider: 1
	 */
	{ 0x11, 0x80 },

	/*
	 * 13 COMI "Common Control I"
	 *                  = 192 (0xC0) 11000000
	 *    COMI[7] "AEC speed selection"
	 *                  =   1 (0x01) 1....... "Faster AEC correction"
	 *    COMI[6] "AEC speed step selection"
	 *                  =   1 (0x01) .1...... "Big steps, fast"
	 *    COMI[5] "Banding filter on off"
	 *                  =   0 (0x00) ..0..... "Off"
	 *    COMI[4] "Banding filter option"
	 *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
	 *                                         the PLL is ON"
	 *    COMI[3] "Reserved"
	 *                  =   0 (0x00) ....0...
	 *    COMI[2] "AGC auto manual control selection"
	 *                  =   0 (0x00) .....0.. "Manual"
	 *    COMI[1] "AWB auto manual control selection"
	 *                  =   0 (0x00) ......0. "Manual"
	 *    COMI[0] "Exposure control"
	 *                  =   0 (0x00) .......0 "Manual"
	 */
801
	{ 0x13, 0xc0 },
802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856

	/*
	 * 09 COMC "Common Control C"
	 *                  =   8 (0x08) 00001000
	 *    COMC[7:5] "Reserved"
	 *                  =   0 (0x00) 000.....
	 *    COMC[4] "Sleep Mode Enable"
	 *                  =   0 (0x00) ...0.... "Normal mode"
	 *    COMC[3:2] "Sensor sampling reset timing selection"
	 *                  =   2 (0x02) ....10.. "Longer reset time"
	 *    COMC[1:0] "Output drive current select"
	 *                  =   0 (0x00) ......00 "Weakest"
	 */
	{ 0x09, 0x08 },

	/*
	 * 0C COMD "Common Control D"
	 *                  =   8 (0x08) 00001000
	 *    COMD[7] "Reserved"
	 *                  =   0 (0x00) 0.......
	 *    COMD[6] "Swap MSB and LSB at the output port"
	 *                  =   0 (0x00) .0...... "False"
	 *    COMD[5:3] "Reserved"
	 *                  =   1 (0x01) ..001...
	 *    COMD[2] "Output Average On Off"
	 *                  =   0 (0x00) .....0.. "Output Normal"
	 *    COMD[1] "Sensor precharge voltage selection"
	 *                  =   0 (0x00) ......0. "Selects internal
	 *                                         reference precharge
	 *                                         voltage"
	 *    COMD[0] "Snapshot option"
	 *                  =   0 (0x00) .......0 "Enable live video output
	 *                                         after snapshot sequence"
	 */
	{ 0x0c, 0x08 },

	/*
	 * 0D COME "Common Control E"
	 *                  = 161 (0xA1) 10100001
	 *    COME[7] "Output average option"
	 *                  =   1 (0x01) 1....... "Output average of 4 pixels"
	 *    COME[6] "Anti-blooming control"
	 *                  =   0 (0x00) .0...... "Off"
	 *    COME[5:3] "Reserved"
	 *                  =   4 (0x04) ..100...
	 *    COME[2] "Clock output power down pin status"
	 *                  =   0 (0x00) .....0.. "Tri-state data output pin
	 *                                         on power down"
	 *    COME[1] "Data output pin status selection at power down"
	 *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
	 *                                         HREF, and CHSYNC pins on
	 *                                         power down"
	 *    COME[0] "Auto zero circuit select"
	 *                  =   1 (0x01) .......1 "On"
	 */
857
	{ 0x0d, 0xa1 },
858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920

	/*
	 * 0E COMF "Common Control F"
	 *                  = 112 (0x70) 01110000
	 *    COMF[7] "System clock selection"
	 *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
	 *    COMF[6:4] "Reserved"
	 *                  =   7 (0x07) .111....
	 *    COMF[3] "Manual auto negative offset canceling selection"
	 *                  =   0 (0x00) ....0... "Auto detect negative
	 *                                         offset and cancel it"
	 *    COMF[2:0] "Reserved"
	 *                  =   0 (0x00) .....000
	 */
	{ 0x0e, 0x70 },

	/*
	 * 0F COMG "Common Control G"
	 *                  =  66 (0x42) 01000010
	 *    COMG[7] "Optical black output selection"
	 *                  =   0 (0x00) 0....... "Disable"
	 *    COMG[6] "Black level calibrate selection"
	 *                  =   1 (0x01) .1...... "Use optical black pixels
	 *                                         to calibrate"
	 *    COMG[5:4] "Reserved"
	 *                  =   0 (0x00) ..00....
	 *    COMG[3] "Channel offset adjustment"
	 *                  =   0 (0x00) ....0... "Disable offset adjustment"
	 *    COMG[2] "ADC black level calibration option"
	 *                  =   0 (0x00) .....0.. "Use B/G line and G/R
	 *                                         line to calibrate each
	 *                                         channel's black level"
	 *    COMG[1] "Reserved"
	 *                  =   1 (0x01) ......1.
	 *    COMG[0] "ADC black level calibration enable"
	 *                  =   0 (0x00) .......0 "Disable"
	 */
	{ 0x0f, 0x42 },

	/*
	 * 14 COMJ "Common Control J"
	 *                  = 198 (0xC6) 11000110
	 *    COMJ[7:6] "AGC gain ceiling"
	 *                  =   3 (0x03) 11...... "8x"
	 *    COMJ[5:4] "Reserved"
	 *                  =   0 (0x00) ..00....
	 *    COMJ[3] "Auto banding filter"
	 *                  =   0 (0x00) ....0... "Banding filter is always
	 *                                         on off depending on
	 *                                         COMI[5] setting"
	 *    COMJ[2] "VSYNC drop option"
	 *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
	 *                                         data is dropped"
	 *    COMJ[1] "Frame data drop"
	 *                  =   1 (0x01) ......1. "Drop frame data if
	 *                                         exposure is not within
	 *                                         tolerance.  In AEC mode,
	 *                                         data is normally dropped
	 *                                         when data is out of
	 *                                         range."
	 *    COMJ[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
921
	{ 0x14, 0xc6 },
922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026

	/*
	 * 15 COMK "Common Control K"
	 *                  =   2 (0x02) 00000010
	 *    COMK[7] "CHSYNC pin output swap"
	 *                  =   0 (0x00) 0....... "CHSYNC"
	 *    COMK[6] "HREF pin output swap"
	 *                  =   0 (0x00) .0...... "HREF"
	 *    COMK[5] "PCLK output selection"
	 *                  =   0 (0x00) ..0..... "PCLK always output"
	 *    COMK[4] "PCLK edge selection"
	 *                  =   0 (0x00) ...0.... "Data valid on falling edge"
	 *    COMK[3] "HREF output polarity"
	 *                  =   0 (0x00) ....0... "positive"
	 *    COMK[2] "Reserved"
	 *                  =   0 (0x00) .....0..
	 *    COMK[1] "VSYNC polarity"
	 *                  =   1 (0x01) ......1. "negative"
	 *    COMK[0] "HSYNC polarity"
	 *                  =   0 (0x00) .......0 "positive"
	 */
	{ 0x15, 0x02 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =   9 (0x09) 00001001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   0 (0x00) ...0.... "normal current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x09 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  80 (0x50) 01010000
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x34, 0x50 },

	/*
	 * 36 VCHG "Sensor Precharge Voltage Control"
	 *                  =   0 (0x00) 00000000
	 *    VCHG[7] "Reserved"
	 *                  =   0 (0x00) 0.......
	 *    VCHG[6:4] "Sensor precharge voltage control"
	 *                  =   0 (0x00) .000....
	 *    VCHG[3:0] "Sensor array common reference"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x36, 0x00 },

	/*
	 * 37 ADC "ADC Reference Control"
	 *                  =   4 (0x04) 00000100
	 *    ADC[7:4] "Reserved"
	 *                  =   0 (0x00) 0000....
	 *    ADC[3] "ADC input signal range"
	 *                  =   0 (0x00) ....0... "Input signal 1.0x"
	 *    ADC[2:0] "ADC range control"
	 *                  =   4 (0x04) .....100
	 */
	{ 0x37, 0x04 },

	/*
	 * 38 ACOM "Analog Common Ground"
	 *                  =  82 (0x52) 01010010
	 *    ACOM[7] "Analog gain control"
	 *                  =   0 (0x00) 0....... "Gain 1x"
	 *    ACOM[6] "Analog black level calibration"
	 *                  =   1 (0x01) .1...... "On"
	 *    ACOM[5:0] "Reserved"
	 *                  =  18 (0x12) ..010010
	 */
	{ 0x38, 0x52 },

	/*
	 * 3A FREFA "Internal Reference Adjustment"
	 *                  =   0 (0x00) 00000000
	 *    FREFA[7:0] "Range"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x3a, 0x00 },

	/*
	 * 3C FVOPT "Internal Reference Adjustment"
	 *                  =  31 (0x1F) 00011111
	 *    FVOPT[7:0] "Range"
	 *                  =  31 (0x1F) 00011111
	 */
1027
	{ 0x3c, 0x1f },
1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075

	/*
	 * 44 Undocumented  =   0 (0x00) 00000000
	 *    44[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x44, 0x00 },

	/*
	 * 40 Undocumented  =   0 (0x00) 00000000
	 *    40[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x40, 0x00 },

	/*
	 * 41 Undocumented  =   0 (0x00) 00000000
	 *    41[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x41, 0x00 },

	/*
	 * 42 Undocumented  =   0 (0x00) 00000000
	 *    42[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x42, 0x00 },

	/*
	 * 43 Undocumented  =   0 (0x00) 00000000
	 *    43[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x43, 0x00 },

	/*
	 * 45 Undocumented  = 128 (0x80) 10000000
	 *    45[7:0] "It's a secret"
	 *                  = 128 (0x80) 10000000
	 */
	{ 0x45, 0x80 },

	/*
	 * 48 Undocumented  = 192 (0xC0) 11000000
	 *    48[7:0] "It's a secret"
	 *                  = 192 (0xC0) 11000000
	 */
1076
	{ 0x48, 0xc0 },
1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089

	/*
	 * 49 Undocumented  =  25 (0x19) 00011001
	 *    49[7:0] "It's a secret"
	 *                  =  25 (0x19) 00011001
	 */
	{ 0x49, 0x19 },

	/*
	 * 4B Undocumented  = 128 (0x80) 10000000
	 *    4B[7:0] "It's a secret"
	 *                  = 128 (0x80) 10000000
	 */
1090
	{ 0x4b, 0x80 },
1091 1092 1093 1094 1095 1096

	/*
	 * 4D Undocumented  = 196 (0xC4) 11000100
	 *    4D[7:0] "It's a secret"
	 *                  = 196 (0xC4) 11000100
	 */
1097
	{ 0x4d, 0xc4 },
1098 1099 1100

	/*
	 * 35 VREF "Reference Voltage Control"
1101
	 *                  =  76 (0x4c) 01001100
1102 1103 1104 1105 1106 1107 1108
	 *    VREF[7:5] "Column high reference control"
	 *                  =   2 (0x02) 010..... "higher voltage"
	 *    VREF[4:2] "Column low reference control"
	 *                  =   3 (0x03) ...011.. "Highest voltage"
	 *    VREF[1:0] "Reserved"
	 *                  =   0 (0x00) ......00
	 */
1109
	{ 0x35, 0x4c },
1110 1111 1112 1113 1114 1115

	/*
	 * 3D Undocumented  =   0 (0x00) 00000000
	 *    3D[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
1116
	{ 0x3d, 0x00 },
1117 1118 1119 1120 1121 1122

	/*
	 * 3E Undocumented  =   0 (0x00) 00000000
	 *    3E[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
1123
	{ 0x3e, 0x00 },
1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162

	/*
	 * 3B FREFB "Internal Reference Adjustment"
	 *                  =  24 (0x18) 00011000
	 *    FREFB[7:0] "Range"
	 *                  =  24 (0x18) 00011000
	 */
	{ 0x3b, 0x18 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =  25 (0x19) 00011001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   1 (0x01) ...1.... "double current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x19 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  90 (0x5A) 01011010
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =  10 (0x0A) ....1010
	 */
1163
	{ 0x34, 0x5a },
1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228

	/*
	 * 3B FREFB "Internal Reference Adjustment"
	 *                  =   0 (0x00) 00000000
	 *    FREFB[7:0] "Range"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x3b, 0x00 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =   9 (0x09) 00001001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   0 (0x00) ...0.... "normal current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x09 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  80 (0x50) 01010000
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x34, 0x50 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =  64 (0x40) 01000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   4 (0x04) .100.... "XGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x40 },

	/*
	 * 17 HREFST "Horizontal window start"
	 *                  =  31 (0x1F) 00011111
	 *    HREFST[7:0] "Horizontal window start, 8 MSBs"
	 *                  =  31 (0x1F) 00011111
	 */
1229
	{ 0x17, 0x1f },
1230 1231 1232 1233 1234 1235 1236

	/*
	 * 18 HREFEND "Horizontal window end"
	 *                  =  95 (0x5F) 01011111
	 *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
	 *                  =  95 (0x5F) 01011111
	 */
1237
	{ 0x18, 0x5f },
1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276

	/*
	 * 19 VSTRT "Vertical window start"
	 *                  =   0 (0x00) 00000000
	 *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x19, 0x00 },

	/*
	 * 1A VEND "Vertical window end"
	 *                  =  96 (0x60) 01100000
	 *    VEND[7:0] "Vertical Window End, 8 MSBs"
	 *                  =  96 (0x60) 01100000
	 */
	{ 0x1a, 0x60 },

	/*
	 * 32 COMM "Common Control M"
	 *                  =  18 (0x12) 00010010
	 *    COMM[7:6] "Pixel clock divide option"
	 *                  =   0 (0x00) 00...... "/1"
	 *    COMM[5:3] "Horizontal window end position, 3 LSBs"
	 *                  =   2 (0x02) ..010...
	 *    COMM[2:0] "Horizontal window start position, 3 LSBs"
	 *                  =   2 (0x02) .....010
	 */
	{ 0x32, 0x12 },

	/*
	 * 03 COMA "Common Control A"
	 *                  =  74 (0x4A) 01001010
	 *    COMA[7:4] "AWB Update Threshold"
	 *                  =   4 (0x04) 0100....
	 *    COMA[3:2] "Vertical window end line control 2 LSBs"
	 *                  =   2 (0x02) ....10..
	 *    COMA[1:0] "Vertical window start line control 2 LSBs"
	 *                  =   2 (0x02) ......10
	 */
1277
	{ 0x03, 0x4a },
1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333

	/*
	 * 11 CLKRC "Clock Rate Control"
	 *                  = 128 (0x80) 10000000
	 *    CLKRC[7] "Internal frequency doublers on off seclection"
	 *                  =   1 (0x01) 1....... "On"
	 *    CLKRC[6] "Digital video master slave selection"
	 *                  =   0 (0x00) .0...... "Master mode, sensor
	 *                                         provides PCLK"
	 *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
	 *                  =   0 (0x00) ..000000
	 */
	{ 0x11, 0x80 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =   0 (0x00) 00000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   0 (0x00) .000.... "QXGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x00 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =  64 (0x40) 01000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   4 (0x04) .100.... "XGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x40 },

	/*
	 * 17 HREFST "Horizontal window start"
	 *                  =  31 (0x1F) 00011111
	 *    HREFST[7:0] "Horizontal window start, 8 MSBs"
	 *                  =  31 (0x1F) 00011111
	 */
1334
	{ 0x17, 0x1f },
1335 1336 1337 1338 1339 1340 1341

	/*
	 * 18 HREFEND "Horizontal window end"
	 *                  =  95 (0x5F) 01011111
	 *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
	 *                  =  95 (0x5F) 01011111
	 */
1342
	{ 0x18, 0x5f },
1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381

	/*
	 * 19 VSTRT "Vertical window start"
	 *                  =   0 (0x00) 00000000
	 *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x19, 0x00 },

	/*
	 * 1A VEND "Vertical window end"
	 *                  =  96 (0x60) 01100000
	 *    VEND[7:0] "Vertical Window End, 8 MSBs"
	 *                  =  96 (0x60) 01100000
	 */
	{ 0x1a, 0x60 },

	/*
	 * 32 COMM "Common Control M"
	 *                  =  18 (0x12) 00010010
	 *    COMM[7:6] "Pixel clock divide option"
	 *                  =   0 (0x00) 00...... "/1"
	 *    COMM[5:3] "Horizontal window end position, 3 LSBs"
	 *                  =   2 (0x02) ..010...
	 *    COMM[2:0] "Horizontal window start position, 3 LSBs"
	 *                  =   2 (0x02) .....010
	 */
	{ 0x32, 0x12 },

	/*
	 * 03 COMA "Common Control A"
	 *                  =  74 (0x4A) 01001010
	 *    COMA[7:4] "AWB Update Threshold"
	 *                  =   4 (0x04) 0100....
	 *    COMA[3:2] "Vertical window end line control 2 LSBs"
	 *                  =   2 (0x02) ....10..
	 *    COMA[1:0] "Vertical window start line control 2 LSBs"
	 *                  =   2 (0x02) ......10
	 */
1382
	{ 0x03, 0x4a },
1383 1384 1385 1386 1387 1388 1389 1390 1391

	/*
	 * 02 RED "Red Gain Control"
	 *                  = 175 (0xAF) 10101111
	 *    RED[7] "Action"
	 *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
	 *    RED[6:0] "Value"
	 *                  =  47 (0x2F) .0101111
	 */
1392
	{ 0x02, 0xaf },
1393 1394 1395 1396 1397 1398 1399

	/*
	 * 2D ADDVSL "VSYNC Pulse Width"
	 *                  = 210 (0xD2) 11010010
	 *    ADDVSL[7:0] "VSYNC pulse width, LSB"
	 *                  = 210 (0xD2) 11010010
	 */
1400
	{ 0x2d, 0xd2 },
1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422

	/*
	 * 00 GAIN          =  24 (0x18) 00011000
	 *    GAIN[7:6] "Reserved"
	 *                  =   0 (0x00) 00......
	 *    GAIN[5] "Double"
	 *                  =   0 (0x00) ..0..... "False"
	 *    GAIN[4] "Double"
	 *                  =   1 (0x01) ...1.... "True"
	 *    GAIN[3:0] "Range"
	 *                  =   8 (0x08) ....1000
	 */
	{ 0x00, 0x18 },

	/*
	 * 01 BLUE "Blue Gain Control"
	 *                  = 240 (0xF0) 11110000
	 *    BLUE[7] "Action"
	 *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
	 *    BLUE[6:0] "Value"
	 *                  = 112 (0x70) .1110000
	 */
1423
	{ 0x01, 0xf0 },
1424 1425 1426 1427 1428 1429 1430

	/*
	 * 10 AEC "Automatic Exposure Control"
	 *                  =  10 (0x0A) 00001010
	 *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
	 *                  =  10 (0x0A) 00001010
	 */
1431 1432 1433 1434 1435 1436 1437 1438
	{ 0x10, 0x0a },

	{ 0xe1, 0x67 },
	{ 0xe3, 0x03 },
	{ 0xe4, 0x26 },
	{ 0xe5, 0x3e },
	{ 0xf8, 0x01 },
	{ 0xff, 0x01 },
1439 1440
};

1441 1442 1443 1444 1445 1446
static const struct ov_i2c_regvals norm_6x20[] = {
	{ 0x12, 0x80 }, /* reset */
	{ 0x11, 0x01 },
	{ 0x03, 0x60 },
	{ 0x05, 0x7f }, /* For when autoadjust is off */
	{ 0x07, 0xa8 },
1447
	/* The ratio of 0x0c and 0x0d controls the white point */
1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
	{ 0x0f, 0x15 }, /* COMS */
	{ 0x10, 0x75 }, /* AEC Exposure time */
	{ 0x12, 0x24 }, /* Enable AGC */
	{ 0x14, 0x04 },
	/* 0x16: 0x06 helps frame stability with moving objects */
	{ 0x16, 0x06 },
/*	{ 0x20, 0x30 },  * Aperture correction enable */
	{ 0x26, 0xb2 }, /* BLC enable */
	/* 0x28: 0x05 Selects RGB format if RGB on */
	{ 0x28, 0x05 },
	{ 0x2a, 0x04 }, /* Disable framerate adjust */
/*	{ 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1462
	{ 0x2d, 0x85 },
1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494
	{ 0x33, 0xa0 }, /* Color Processing Parameter */
	{ 0x34, 0xd2 }, /* Max A/D range */
	{ 0x38, 0x8b },
	{ 0x39, 0x40 },

	{ 0x3c, 0x39 }, /* Enable AEC mode changing */
	{ 0x3c, 0x3c }, /* Change AEC mode */
	{ 0x3c, 0x24 }, /* Disable AEC mode changing */

	{ 0x3d, 0x80 },
	/* These next two registers (0x4a, 0x4b) are undocumented.
	 * They control the color balance */
	{ 0x4a, 0x80 },
	{ 0x4b, 0x80 },
	{ 0x4d, 0xd2 }, /* This reduces noise a bit */
	{ 0x4e, 0xc1 },
	{ 0x4f, 0x04 },
/* Do 50-53 have any effect? */
/* Toggle 0x12[2] off and on here? */
};

static const struct ov_i2c_regvals norm_6x30[] = {
	{ 0x12, 0x80 }, /* Reset */
	{ 0x00, 0x1f }, /* Gain */
	{ 0x01, 0x99 }, /* Blue gain */
	{ 0x02, 0x7c }, /* Red gain */
	{ 0x03, 0xc0 }, /* Saturation */
	{ 0x05, 0x0a }, /* Contrast */
	{ 0x06, 0x95 }, /* Brightness */
	{ 0x07, 0x2d }, /* Sharpness */
	{ 0x0c, 0x20 },
	{ 0x0d, 0x20 },
1495
	{ 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610
	{ 0x0f, 0x05 },
	{ 0x10, 0x9a },
	{ 0x11, 0x00 }, /* Pixel clock = fastest */
	{ 0x12, 0x24 }, /* Enable AGC and AWB */
	{ 0x13, 0x21 },
	{ 0x14, 0x80 },
	{ 0x15, 0x01 },
	{ 0x16, 0x03 },
	{ 0x17, 0x38 },
	{ 0x18, 0xea },
	{ 0x19, 0x04 },
	{ 0x1a, 0x93 },
	{ 0x1b, 0x00 },
	{ 0x1e, 0xc4 },
	{ 0x1f, 0x04 },
	{ 0x20, 0x20 },
	{ 0x21, 0x10 },
	{ 0x22, 0x88 },
	{ 0x23, 0xc0 }, /* Crystal circuit power level */
	{ 0x25, 0x9a }, /* Increase AEC black ratio */
	{ 0x26, 0xb2 }, /* BLC enable */
	{ 0x27, 0xa2 },
	{ 0x28, 0x00 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x84 }, /* 60 Hz power */
	{ 0x2b, 0xa8 }, /* 60 Hz power */
	{ 0x2c, 0xa0 },
	{ 0x2d, 0x95 }, /* Enable auto-brightness */
	{ 0x2e, 0x88 },
	{ 0x33, 0x26 },
	{ 0x34, 0x03 },
	{ 0x36, 0x8f },
	{ 0x37, 0x80 },
	{ 0x38, 0x83 },
	{ 0x39, 0x80 },
	{ 0x3a, 0x0f },
	{ 0x3b, 0x3c },
	{ 0x3c, 0x1a },
	{ 0x3d, 0x80 },
	{ 0x3e, 0x80 },
	{ 0x3f, 0x0e },
	{ 0x40, 0x00 }, /* White bal */
	{ 0x41, 0x00 }, /* White bal */
	{ 0x42, 0x80 },
	{ 0x43, 0x3f }, /* White bal */
	{ 0x44, 0x80 },
	{ 0x45, 0x20 },
	{ 0x46, 0x20 },
	{ 0x47, 0x80 },
	{ 0x48, 0x7f },
	{ 0x49, 0x00 },
	{ 0x4a, 0x00 },
	{ 0x4b, 0x80 },
	{ 0x4c, 0xd0 },
	{ 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
	{ 0x4e, 0x40 },
	{ 0x4f, 0x07 }, /* UV avg., col. killer: max */
	{ 0x50, 0xff },
	{ 0x54, 0x23 }, /* Max AGC gain: 18dB */
	{ 0x55, 0xff },
	{ 0x56, 0x12 },
	{ 0x57, 0x81 },
	{ 0x58, 0x75 },
	{ 0x59, 0x01 }, /* AGC dark current comp.: +1 */
	{ 0x5a, 0x2c },
	{ 0x5b, 0x0f }, /* AWB chrominance levels */
	{ 0x5c, 0x10 },
	{ 0x3d, 0x80 },
	{ 0x27, 0xa6 },
	{ 0x12, 0x20 }, /* Toggle AWB */
	{ 0x12, 0x24 },
};

/* Lawrence Glaister <lg@jfm.bc.ca> reports:
 *
 * Register 0x0f in the 7610 has the following effects:
 *
 * 0x85 (AEC method 1): Best overall, good contrast range
 * 0x45 (AEC method 2): Very overexposed
 * 0xa5 (spec sheet default): Ok, but the black level is
 *	shifted resulting in loss of contrast
 * 0x05 (old driver setting): very overexposed, too much
 *	contrast
 */
static const struct ov_i2c_regvals norm_7610[] = {
	{ 0x10, 0xff },
	{ 0x16, 0x06 },
	{ 0x28, 0x24 },
	{ 0x2b, 0xac },
	{ 0x12, 0x00 },
	{ 0x38, 0x81 },
	{ 0x28, 0x24 },	/* 0c */
	{ 0x0f, 0x85 },	/* lg's setting */
	{ 0x15, 0x01 },
	{ 0x20, 0x1c },
	{ 0x23, 0x2a },
	{ 0x24, 0x10 },
	{ 0x25, 0x8a },
	{ 0x26, 0xa2 },
	{ 0x27, 0xc2 },
	{ 0x2a, 0x04 },
	{ 0x2c, 0xfe },
	{ 0x2d, 0x93 },
	{ 0x30, 0x71 },
	{ 0x31, 0x60 },
	{ 0x32, 0x26 },
	{ 0x33, 0x20 },
	{ 0x34, 0x48 },
	{ 0x12, 0x24 },
	{ 0x11, 0x01 },
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
};

static const struct ov_i2c_regvals norm_7620[] = {
1611
	{ 0x12, 0x80 },		/* reset */
1612 1613 1614
	{ 0x00, 0x00 },		/* gain */
	{ 0x01, 0x80 },		/* blue gain */
	{ 0x02, 0x80 },		/* red gain */
1615
	{ 0x03, 0xc0 },		/* OV7670_R03_VREF */
1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637
	{ 0x06, 0x60 },
	{ 0x07, 0x00 },
	{ 0x0c, 0x24 },
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
	{ 0x11, 0x01 },
	{ 0x12, 0x24 },
	{ 0x13, 0x01 },
	{ 0x14, 0x84 },
	{ 0x15, 0x01 },
	{ 0x16, 0x03 },
	{ 0x17, 0x2f },
	{ 0x18, 0xcf },
	{ 0x19, 0x06 },
	{ 0x1a, 0xf5 },
	{ 0x1b, 0x00 },
	{ 0x20, 0x18 },
	{ 0x21, 0x80 },
	{ 0x22, 0x80 },
	{ 0x23, 0x00 },
	{ 0x26, 0xa2 },
	{ 0x27, 0xea },
1638
	{ 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682
	{ 0x29, 0x00 },
	{ 0x2a, 0x10 },
	{ 0x2b, 0x00 },
	{ 0x2c, 0x88 },
	{ 0x2d, 0x91 },
	{ 0x2e, 0x80 },
	{ 0x2f, 0x44 },
	{ 0x60, 0x27 },
	{ 0x61, 0x02 },
	{ 0x62, 0x5f },
	{ 0x63, 0xd5 },
	{ 0x64, 0x57 },
	{ 0x65, 0x83 },
	{ 0x66, 0x55 },
	{ 0x67, 0x92 },
	{ 0x68, 0xcf },
	{ 0x69, 0x76 },
	{ 0x6a, 0x22 },
	{ 0x6b, 0x00 },
	{ 0x6c, 0x02 },
	{ 0x6d, 0x44 },
	{ 0x6e, 0x80 },
	{ 0x6f, 0x1d },
	{ 0x70, 0x8b },
	{ 0x71, 0x00 },
	{ 0x72, 0x14 },
	{ 0x73, 0x54 },
	{ 0x74, 0x00 },
	{ 0x75, 0x8e },
	{ 0x76, 0x00 },
	{ 0x77, 0xff },
	{ 0x78, 0x80 },
	{ 0x79, 0x80 },
	{ 0x7a, 0x80 },
	{ 0x7b, 0xe2 },
	{ 0x7c, 0x00 },
};

/* 7640 and 7648. The defaults should be OK for most registers. */
static const struct ov_i2c_regvals norm_7640[] = {
	{ 0x12, 0x80 },
	{ 0x12, 0x14 },
};

1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825
static const struct ov_regvals init_519_ov7660[] = {
	{ 0x5d,	0x03 }, /* Turn off suspend mode */
	{ 0x53,	0x9b }, /* 0x9f enables the (unused) microcontroller */
	{ 0x54,	0x0f }, /* bit2 (jpeg enable) */
	{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
	{ 0xa3,	0x18 },
	{ 0xa4,	0x04 },
	{ 0xa5,	0x28 },
	{ 0x37,	0x00 },	/* SetUsbInit */
	{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
	/* Enable both fields, YUV Input, disable defect comp (why?) */
	{ 0x20,	0x0c },	/* 0x0d does U <-> V swap */
	{ 0x21,	0x38 },
	{ 0x22,	0x1d },
	{ 0x17,	0x50 }, /* undocumented */
	{ 0x37,	0x00 }, /* undocumented */
	{ 0x40,	0xff }, /* I2C timeout counter */
	{ 0x46,	0x00 }, /* I2C clock prescaler */
};
static const struct ov_i2c_regvals norm_7660[] = {
	{OV7670_R12_COM7, OV7670_COM7_RESET},
	{OV7670_R11_CLKRC, 0x81},
	{0x92, 0x00},			/* DM_LNL */
	{0x93, 0x00},			/* DM_LNH */
	{0x9d, 0x4c},			/* BD50ST */
	{0x9e, 0x3f},			/* BD60ST */
	{OV7670_R3B_COM11, 0x02},
	{OV7670_R13_COM8, 0xf5},
	{OV7670_R10_AECH, 0x00},
	{OV7670_R00_GAIN, 0x00},
	{OV7670_R01_BLUE, 0x7c},
	{OV7670_R02_RED, 0x9d},
	{OV7670_R12_COM7, 0x00},
	{OV7670_R04_COM1, 00},
	{OV7670_R18_HSTOP, 0x01},
	{OV7670_R17_HSTART, 0x13},
	{OV7670_R32_HREF, 0x92},
	{OV7670_R19_VSTART, 0x02},
	{OV7670_R1A_VSTOP, 0x7a},
	{OV7670_R03_VREF, 0x00},
	{OV7670_R0E_COM5, 0x04},
	{OV7670_R0F_COM6, 0x62},
	{OV7670_R15_COM10, 0x00},
	{0x16, 0x02},			/* RSVD */
	{0x1b, 0x00},			/* PSHFT */
	{OV7670_R1E_MVFP, 0x01},
	{0x29, 0x3c},			/* RSVD */
	{0x33, 0x00},			/* CHLF */
	{0x34, 0x07},			/* ARBLM */
	{0x35, 0x84},			/* RSVD */
	{0x36, 0x00},			/* RSVD */
	{0x37, 0x04},			/* ADC */
	{0x39, 0x43},			/* OFON */
	{OV7670_R3A_TSLB, 0x00},
	{OV7670_R3C_COM12, 0x6c},
	{OV7670_R3D_COM13, 0x98},
	{OV7670_R3F_EDGE, 0x23},
	{OV7670_R40_COM15, 0xc1},
	{OV7670_R41_COM16, 0x22},
	{0x6b, 0x0a},			/* DBLV */
	{0xa1, 0x08},			/* RSVD */
	{0x69, 0x80},			/* HV */
	{0x43, 0xf0},			/* RSVD.. */
	{0x44, 0x10},
	{0x45, 0x78},
	{0x46, 0xa8},
	{0x47, 0x60},
	{0x48, 0x80},
	{0x59, 0xba},
	{0x5a, 0x9a},
	{0x5b, 0x22},
	{0x5c, 0xb9},
	{0x5d, 0x9b},
	{0x5e, 0x10},
	{0x5f, 0xe0},
	{0x60, 0x85},
	{0x61, 0x60},
	{0x9f, 0x9d},			/* RSVD */
	{0xa0, 0xa0},			/* DSPC2 */
	{0x4f, 0x60},			/* matrix */
	{0x50, 0x64},
	{0x51, 0x04},
	{0x52, 0x18},
	{0x53, 0x3c},
	{0x54, 0x54},
	{0x55, 0x40},
	{0x56, 0x40},
	{0x57, 0x40},
	{0x58, 0x0d},			/* matrix sign */
	{0x8b, 0xcc},			/* RSVD */
	{0x8c, 0xcc},
	{0x8d, 0xcf},
	{0x6c, 0x40},			/* gamma curve */
	{0x6d, 0xe0},
	{0x6e, 0xa0},
	{0x6f, 0x80},
	{0x70, 0x70},
	{0x71, 0x80},
	{0x72, 0x60},
	{0x73, 0x60},
	{0x74, 0x50},
	{0x75, 0x40},
	{0x76, 0x38},
	{0x77, 0x3c},
	{0x78, 0x32},
	{0x79, 0x1a},
	{0x7a, 0x28},
	{0x7b, 0x24},
	{0x7c, 0x04},			/* gamma curve */
	{0x7d, 0x12},
	{0x7e, 0x26},
	{0x7f, 0x46},
	{0x80, 0x54},
	{0x81, 0x64},
	{0x82, 0x70},
	{0x83, 0x7c},
	{0x84, 0x86},
	{0x85, 0x8e},
	{0x86, 0x9c},
	{0x87, 0xab},
	{0x88, 0xc4},
	{0x89, 0xd1},
	{0x8a, 0xe5},
	{OV7670_R14_COM9, 0x1e},
	{OV7670_R24_AEW, 0x80},
	{OV7670_R25_AEB, 0x72},
	{OV7670_R26_VPT, 0xb3},
	{0x62, 0x80},			/* LCC1 */
	{0x63, 0x80},			/* LCC2 */
	{0x64, 0x06},			/* LCC3 */
	{0x65, 0x00},			/* LCC4 */
	{0x66, 0x01},			/* LCC5 */
	{0x94, 0x0e},			/* RSVD.. */
	{0x95, 0x14},
	{OV7670_R13_COM8, OV7670_COM8_FASTAEC
			| OV7670_COM8_AECSTEP
			| OV7670_COM8_BFILT
			| 0x10
			| OV7670_COM8_AGC
			| OV7670_COM8_AWB
			| OV7670_COM8_AEC},
	{0xa1, 0xc8}
};
1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841
static const struct ov_i2c_regvals norm_9600[] = {
	{0x12, 0x80},
	{0x0c, 0x28},
	{0x11, 0x80},
	{0x13, 0xb5},
	{0x14, 0x3e},
	{0x1b, 0x04},
	{0x24, 0xb0},
	{0x25, 0x90},
	{0x26, 0x94},
	{0x35, 0x90},
	{0x37, 0x07},
	{0x38, 0x08},
	{0x01, 0x8e},
	{0x02, 0x85}
};
1842

1843 1844 1845
/* 7670. Defaults taken from OmniVision provided data,
*  as provided by Jonathan Corbet of OLPC		*/
static const struct ov_i2c_regvals norm_7670[] = {
1846 1847 1848 1849
	{ OV7670_R12_COM7, OV7670_COM7_RESET },
	{ OV7670_R3A_TSLB, 0x04 },		/* OV */
	{ OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
	{ OV7670_R11_CLKRC, 0x01 },
1850 1851 1852 1853
/*
 * Set the hardware window.  These values from OV don't entirely
 * make sense - hstop is less than hstart.  But they work...
 */
1854 1855 1856 1857 1858 1859 1860 1861 1862
	{ OV7670_R17_HSTART, 0x13 },
	{ OV7670_R18_HSTOP, 0x01 },
	{ OV7670_R32_HREF, 0xb6 },
	{ OV7670_R19_VSTART, 0x02 },
	{ OV7670_R1A_VSTOP, 0x7a },
	{ OV7670_R03_VREF, 0x0a },

	{ OV7670_R0C_COM3, 0x00 },
	{ OV7670_R3E_COM14, 0x00 },
1863 1864 1865 1866 1867 1868
/* Mystery scaling numbers */
	{ 0x70, 0x3a },
	{ 0x71, 0x35 },
	{ 0x72, 0x11 },
	{ 0x73, 0xf0 },
	{ 0xa2, 0x02 },
1869
/*	{ OV7670_R15_COM10, 0x0 }, */
1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890

/* Gamma curve values */
	{ 0x7a, 0x20 },
	{ 0x7b, 0x10 },
	{ 0x7c, 0x1e },
	{ 0x7d, 0x35 },
	{ 0x7e, 0x5a },
	{ 0x7f, 0x69 },
	{ 0x80, 0x76 },
	{ 0x81, 0x80 },
	{ 0x82, 0x88 },
	{ 0x83, 0x8f },
	{ 0x84, 0x96 },
	{ 0x85, 0xa3 },
	{ 0x86, 0xaf },
	{ 0x87, 0xc4 },
	{ 0x88, 0xd7 },
	{ 0x89, 0xe8 },

/* AGC and AEC parameters.  Note we start by disabling those features,
   then turn them only after tweaking the values. */
1891
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1892 1893
			 | OV7670_COM8_AECSTEP
			 | OV7670_COM8_BFILT },
1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904
	{ OV7670_R00_GAIN, 0x00 },
	{ OV7670_R10_AECH, 0x00 },
	{ OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
	{ OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
	{ OV7670_RA5_BD50MAX, 0x05 },
	{ OV7670_RAB_BD60MAX, 0x07 },
	{ OV7670_R24_AEW, 0x95 },
	{ OV7670_R25_AEB, 0x33 },
	{ OV7670_R26_VPT, 0xe3 },
	{ OV7670_R9F_HAECC1, 0x78 },
	{ OV7670_RA0_HAECC2, 0x68 },
1905
	{ 0xa1, 0x03 }, /* magic */
1906 1907 1908 1909 1910 1911
	{ OV7670_RA6_HAECC3, 0xd8 },
	{ OV7670_RA7_HAECC4, 0xd8 },
	{ OV7670_RA8_HAECC5, 0xf0 },
	{ OV7670_RA9_HAECC6, 0x90 },
	{ OV7670_RAA_HAECC7, 0x94 },
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1912 1913 1914 1915 1916 1917
			| OV7670_COM8_AECSTEP
			| OV7670_COM8_BFILT
			| OV7670_COM8_AGC
			| OV7670_COM8_AEC },

/* Almost all of these are magic "reserved" values.  */
1918 1919
	{ OV7670_R0E_COM5, 0x61 },
	{ OV7670_R0F_COM6, 0x4b },
1920
	{ 0x16, 0x02 },
1921
	{ OV7670_R1E_MVFP, 0x07 },
1922 1923 1924 1925 1926 1927 1928 1929
	{ 0x21, 0x02 },
	{ 0x22, 0x91 },
	{ 0x29, 0x07 },
	{ 0x33, 0x0b },
	{ 0x35, 0x0b },
	{ 0x37, 0x1d },
	{ 0x38, 0x71 },
	{ 0x39, 0x2a },
1930
	{ OV7670_R3C_COM12, 0x78 },
1931 1932
	{ 0x4d, 0x40 },
	{ 0x4e, 0x20 },
1933
	{ OV7670_R69_GFIX, 0x00 },
1934 1935 1936
	{ 0x6b, 0x4a },
	{ 0x74, 0x10 },
	{ 0x8d, 0x4f },
1937 1938 1939 1940 1941 1942
	{ 0x8e, 0x00 },
	{ 0x8f, 0x00 },
	{ 0x90, 0x00 },
	{ 0x91, 0x00 },
	{ 0x96, 0x00 },
	{ 0x9a, 0x00 },
1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964
	{ 0xb0, 0x84 },
	{ 0xb1, 0x0c },
	{ 0xb2, 0x0e },
	{ 0xb3, 0x82 },
	{ 0xb8, 0x0a },

/* More reserved magic, some of which tweaks white balance */
	{ 0x43, 0x0a },
	{ 0x44, 0xf0 },
	{ 0x45, 0x34 },
	{ 0x46, 0x58 },
	{ 0x47, 0x28 },
	{ 0x48, 0x3a },
	{ 0x59, 0x88 },
	{ 0x5a, 0x88 },
	{ 0x5b, 0x44 },
	{ 0x5c, 0x67 },
	{ 0x5d, 0x49 },
	{ 0x5e, 0x0e },
	{ 0x6c, 0x0a },
	{ 0x6d, 0x55 },
	{ 0x6e, 0x11 },
1965
	{ 0x6f, 0x9f },			/* "9e for advance AWB" */
1966
	{ 0x6a, 0x40 },
1967 1968 1969
	{ OV7670_R01_BLUE, 0x40 },
	{ OV7670_R02_RED, 0x60 },
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1970 1971 1972 1973 1974 1975 1976 1977 1978
			| OV7670_COM8_AECSTEP
			| OV7670_COM8_BFILT
			| OV7670_COM8_AGC
			| OV7670_COM8_AEC
			| OV7670_COM8_AWB },

/* Matrix coefficients */
	{ 0x4f, 0x80 },
	{ 0x50, 0x80 },
1979
	{ 0x51, 0x00 },
1980 1981 1982 1983 1984
	{ 0x52, 0x22 },
	{ 0x53, 0x5e },
	{ 0x54, 0x80 },
	{ 0x58, 0x9e },

1985 1986
	{ OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
	{ OV7670_R3F_EDGE, 0x00 },
1987 1988
	{ 0x75, 0x05 },
	{ 0x76, 0xe1 },
1989
	{ 0x4c, 0x00 },
1990
	{ 0x77, 0x01 },
1991
	{ OV7670_R3D_COM13, OV7670_COM13_GAMMA
1992 1993 1994 1995
			  | OV7670_COM13_UVSAT
			  | 2},		/* was 3 */
	{ 0x4b, 0x09 },
	{ 0xc9, 0x60 },
1996
	{ OV7670_R41_COM16, 0x38 },
1997 1998 1999
	{ 0x56, 0x40 },

	{ 0x34, 0x11 },
2000
	{ OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
2001
	{ 0xa4, 0x88 },
2002
	{ 0x96, 0x00 },
2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126
	{ 0x97, 0x30 },
	{ 0x98, 0x20 },
	{ 0x99, 0x30 },
	{ 0x9a, 0x84 },
	{ 0x9b, 0x29 },
	{ 0x9c, 0x03 },
	{ 0x9d, 0x4c },
	{ 0x9e, 0x3f },
	{ 0x78, 0x04 },

/* Extra-weird stuff.  Some sort of multiplexor register */
	{ 0x79, 0x01 },
	{ 0xc8, 0xf0 },
	{ 0x79, 0x0f },
	{ 0xc8, 0x00 },
	{ 0x79, 0x10 },
	{ 0xc8, 0x7e },
	{ 0x79, 0x0a },
	{ 0xc8, 0x80 },
	{ 0x79, 0x0b },
	{ 0xc8, 0x01 },
	{ 0x79, 0x0c },
	{ 0xc8, 0x0f },
	{ 0x79, 0x0d },
	{ 0xc8, 0x20 },
	{ 0x79, 0x09 },
	{ 0xc8, 0x80 },
	{ 0x79, 0x02 },
	{ 0xc8, 0xc0 },
	{ 0x79, 0x03 },
	{ 0xc8, 0x40 },
	{ 0x79, 0x05 },
	{ 0xc8, 0x30 },
	{ 0x79, 0x26 },
};

static const struct ov_i2c_regvals norm_8610[] = {
	{ 0x12, 0x80 },
	{ 0x00, 0x00 },
	{ 0x01, 0x80 },
	{ 0x02, 0x80 },
	{ 0x03, 0xc0 },
	{ 0x04, 0x30 },
	{ 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
	{ 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
	{ 0x0a, 0x86 },
	{ 0x0b, 0xb0 },
	{ 0x0c, 0x20 },
	{ 0x0d, 0x20 },
	{ 0x11, 0x01 },
	{ 0x12, 0x25 },
	{ 0x13, 0x01 },
	{ 0x14, 0x04 },
	{ 0x15, 0x01 }, /* Lin and Win think different about UV order */
	{ 0x16, 0x03 },
	{ 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
	{ 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
	{ 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
	{ 0x1a, 0xf5 },
	{ 0x1b, 0x00 },
	{ 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
	{ 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
	{ 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
	{ 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
	{ 0x26, 0xa2 },
	{ 0x27, 0xea },
	{ 0x28, 0x00 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x80 },
	{ 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
	{ 0x2c, 0xac },
	{ 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
	{ 0x2e, 0x80 },
	{ 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
	{ 0x4c, 0x00 },
	{ 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
	{ 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
	{ 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
	{ 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
	{ 0x63, 0xff },
	{ 0x64, 0x53 }, /* new windrv 090403 says 0x57,
			 * maybe thats wrong */
	{ 0x65, 0x00 },
	{ 0x66, 0x55 },
	{ 0x67, 0xb0 },
	{ 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
	{ 0x69, 0x02 },
	{ 0x6a, 0x22 },
	{ 0x6b, 0x00 },
	{ 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
			 * deleting bit7 colors the first images red */
	{ 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
	{ 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
	{ 0x6f, 0x01 },
	{ 0x70, 0x8b },
	{ 0x71, 0x00 },
	{ 0x72, 0x14 },
	{ 0x73, 0x54 },
	{ 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
	{ 0x75, 0x0e },
	{ 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
	{ 0x77, 0xff },
	{ 0x78, 0x80 },
	{ 0x79, 0x80 },
	{ 0x7a, 0x80 },
	{ 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
	{ 0x7c, 0x00 },
	{ 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
	{ 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
	{ 0x7f, 0xfb },
	{ 0x80, 0x28 },
	{ 0x81, 0x00 },
	{ 0x82, 0x23 },
	{ 0x83, 0x0b },
	{ 0x84, 0x00 },
	{ 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
	{ 0x86, 0xc9 },
	{ 0x87, 0x00 },
	{ 0x88, 0x00 },
	{ 0x89, 0x01 },
	{ 0x12, 0x20 },
	{ 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
};

2127 2128 2129 2130 2131 2132 2133 2134
static unsigned char ov7670_abs_to_sm(unsigned char v)
{
	if (v > 127)
		return v & 0x7f;
	return (128 - v) | 0x80;
}

/* Write a OV519 register */
2135
static void reg_w(struct sd *sd, u16 index, u16 value)
2136
{
2137
	int ret, req = 0;
2138

2139 2140 2141
	if (sd->gspca_dev.usb_err < 0)
		return;

2142 2143 2144 2145 2146 2147
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		req = 2;
		break;
	case BRIDGE_OVFX2:
2148 2149 2150
		req = 0x0a;
		/* fall through */
	case BRIDGE_W9968CF:
2151 2152
		PDEBUG(D_USBO, "SET %02x %04x %04x",
				req, value, index);
2153 2154
		ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2155
			req,
2156
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2157
			value, index, NULL, 0, 500);
2158 2159 2160 2161
		goto leave;
	default:
		req = 1;
	}
2162

2163 2164
	PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
			req, index, value);
2165
	sd->gspca_dev.usb_buf[0] = value;
2166 2167
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2168
			req,
2169 2170
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			0, index,
2171
			sd->gspca_dev.usb_buf, 1, 500);
2172
leave:
2173
	if (ret < 0) {
2174
		err("reg_w %02x failed %d", index, ret);
2175 2176
		sd->gspca_dev.usb_err = ret;
		return;
2177
	}
2178 2179
}

2180
/* Read from a OV519 register, note not valid for the w9968cf!! */
2181
/* returns: negative is error, pos or zero is data */
2182
static int reg_r(struct sd *sd, u16 index)
2183 2184
{
	int ret;
2185 2186
	int req;

2187 2188 2189
	if (sd->gspca_dev.usb_err < 0)
		return -1;

2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		req = 3;
		break;
	case BRIDGE_OVFX2:
		req = 0x0b;
		break;
	default:
		req = 1;
	}
2201 2202 2203

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2204
			req,
2205
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2206
			0, index, sd->gspca_dev.usb_buf, 1, 500);
2207

2208
	if (ret >= 0) {
2209
		ret = sd->gspca_dev.usb_buf[0];
2210 2211
		PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
			req, index, ret);
2212
	} else {
2213
		err("reg_r %02x failed %d", index, ret);
2214 2215
		sd->gspca_dev.usb_err = ret;
	}
2216

2217 2218 2219 2220 2221
	return ret;
}

/* Read 8 values from a OV519 register */
static int reg_r8(struct sd *sd,
2222
		  u16 index)
2223 2224 2225
{
	int ret;

2226 2227 2228
	if (sd->gspca_dev.usb_err < 0)
		return -1;

2229 2230 2231 2232
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
			1,			/* REQ_IO */
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2233
			0, index, sd->gspca_dev.usb_buf, 8, 500);
2234

2235
	if (ret >= 0) {
2236
		ret = sd->gspca_dev.usb_buf[0];
2237
	} else {
2238
		err("reg_r8 %02x failed %d", index, ret);
2239 2240
		sd->gspca_dev.usb_err = ret;
	}
2241

2242 2243 2244 2245 2246 2247 2248 2249 2250
	return ret;
}

/*
 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
 * the same position as 1's in "mask" are cleared and set to "value". Bits
 * that are in the same position as 0's in "mask" are preserved, regardless
 * of their respective state in "value".
 */
2251
static void reg_w_mask(struct sd *sd,
2252 2253 2254
			u16 index,
			u8 value,
			u8 mask)
2255 2256
{
	int ret;
2257
	u8 oldval;
2258 2259 2260 2261 2262

	if (mask != 0xff) {
		value &= mask;			/* Enforce mask on value */
		ret = reg_r(sd, index);
		if (ret < 0)
2263
			return;
2264 2265 2266 2267

		oldval = ret & ~mask;		/* Clear the masked bits */
		value |= oldval;		/* Set the desired bits */
	}
2268
	reg_w(sd, index, value);
2269 2270
}

2271 2272 2273 2274
/*
 * Writes multiple (n) byte value to a single register. Only valid with certain
 * registers (0x30 and 0xc4 - 0xce).
 */
2275
static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2276 2277 2278
{
	int ret;

2279 2280 2281
	if (sd->gspca_dev.usb_err < 0)
		return;

2282
	*((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2283 2284 2285 2286 2287 2288 2289

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
			1 /* REG_IO */,
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			0, index,
			sd->gspca_dev.usb_buf, n, 500);
2290
	if (ret < 0) {
2291
		err("reg_w32 %02x failed %d", index, ret);
2292
		sd->gspca_dev.usb_err = ret;
2293
	}
2294 2295
}

2296
static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2297 2298 2299
{
	int rc, retries;

2300
	PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2301 2302 2303 2304

	/* Three byte write cycle */
	for (retries = 6; ; ) {
		/* Select camera register */
2305
		reg_w(sd, R51x_I2C_SADDR_3, reg);
2306 2307

		/* Write "value" to I2C data port of OV511 */
2308
		reg_w(sd, R51x_I2C_DATA, value);
2309 2310

		/* Initiate 3-byte write cycle */
2311
		reg_w(sd, R511_I2C_CTL, 0x01);
2312

2313
		do {
2314
			rc = reg_r(sd, R511_I2C_CTL);
2315
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2316 2317

		if (rc < 0)
2318
			return;
2319 2320 2321 2322 2323

		if ((rc & 2) == 0) /* Ack? */
			break;
		if (--retries < 0) {
			PDEBUG(D_USBO, "i2c write retries exhausted");
2324
			return;
2325 2326 2327 2328
		}
	}
}

2329
static int ov511_i2c_r(struct sd *sd, u8 reg)
2330 2331 2332 2333 2334 2335
{
	int rc, value, retries;

	/* Two byte write cycle */
	for (retries = 6; ; ) {
		/* Select camera register */
2336
		reg_w(sd, R51x_I2C_SADDR_2, reg);
2337 2338

		/* Initiate 2-byte write cycle */
2339
		reg_w(sd, R511_I2C_CTL, 0x03);
2340

2341
		do {
2342
			rc = reg_r(sd, R511_I2C_CTL);
2343
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362

		if (rc < 0)
			return rc;

		if ((rc & 2) == 0) /* Ack? */
			break;

		/* I2C abort */
		reg_w(sd, R511_I2C_CTL, 0x10);

		if (--retries < 0) {
			PDEBUG(D_USBI, "i2c write retries exhausted");
			return -1;
		}
	}

	/* Two byte read cycle */
	for (retries = 6; ; ) {
		/* Initiate 2-byte read cycle */
2363
		reg_w(sd, R511_I2C_CTL, 0x05);
2364

2365
		do {
2366
			rc = reg_r(sd, R511_I2C_CTL);
2367
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2368 2369 2370 2371 2372 2373 2374 2375

		if (rc < 0)
			return rc;

		if ((rc & 2) == 0) /* Ack? */
			break;

		/* I2C abort */
2376
		reg_w(sd, R511_I2C_CTL, 0x10);
2377 2378 2379 2380 2381 2382 2383 2384 2385

		if (--retries < 0) {
			PDEBUG(D_USBI, "i2c read retries exhausted");
			return -1;
		}
	}

	value = reg_r(sd, R51x_I2C_DATA);

2386
	PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2387 2388

	/* This is needed to make i2c_w() work */
2389
	reg_w(sd, R511_I2C_CTL, 0x05);
2390 2391 2392

	return value;
}
2393

2394 2395 2396 2397 2398
/*
 * The OV518 I2C I/O procedure is different, hence, this function.
 * This is normally only called from i2c_w(). Note that this function
 * always succeeds regardless of whether the sensor is present and working.
 */
2399
static void ov518_i2c_w(struct sd *sd,
2400 2401
		u8 reg,
		u8 value)
2402
{
2403
	PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2404 2405

	/* Select camera register */
2406
	reg_w(sd, R51x_I2C_SADDR_3, reg);
2407 2408

	/* Write "value" to I2C data port of OV511 */
2409
	reg_w(sd, R51x_I2C_DATA, value);
2410 2411

	/* Initiate 3-byte write cycle */
2412
	reg_w(sd, R518_I2C_CTL, 0x01);
2413 2414 2415

	/* wait for write complete */
	msleep(4);
2416
	reg_r8(sd, R518_I2C_CTL);
2417 2418 2419 2420 2421 2422 2423 2424 2425
}

/*
 * returns: negative is error, pos or zero is data
 *
 * The OV518 I2C I/O procedure is different, hence, this function.
 * This is normally only called from i2c_r(). Note that this function
 * always succeeds regardless of whether the sensor is present and working.
 */
2426
static int ov518_i2c_r(struct sd *sd, u8 reg)
2427
{
2428
	int value;
2429 2430

	/* Select camera register */
2431
	reg_w(sd, R51x_I2C_SADDR_2, reg);
2432 2433

	/* Initiate 2-byte write cycle */
2434
	reg_w(sd, R518_I2C_CTL, 0x03);
2435
	reg_r8(sd, R518_I2C_CTL);
2436 2437

	/* Initiate 2-byte read cycle */
2438
	reg_w(sd, R518_I2C_CTL, 0x05);
2439 2440
	reg_r8(sd, R518_I2C_CTL);

2441
	value = reg_r(sd, R51x_I2C_DATA);
2442
	PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2443 2444 2445
	return value;
}

2446
static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2447 2448 2449
{
	int ret;

2450 2451 2452
	if (sd->gspca_dev.usb_err < 0)
		return;

2453 2454 2455 2456
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
			0x02,
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2457
			(u16) value, (u16) reg, NULL, 0, 500);
2458

2459
	if (ret < 0) {
2460
		err("ovfx2_i2c_w %02x failed %d", reg, ret);
2461
		sd->gspca_dev.usb_err = ret;
2462
	}
2463

2464
	PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2465 2466
}

2467
static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2468 2469 2470
{
	int ret;

2471 2472 2473
	if (sd->gspca_dev.usb_err < 0)
		return -1;

2474 2475 2476 2477
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
			0x03,
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2478
			0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2479 2480 2481

	if (ret >= 0) {
		ret = sd->gspca_dev.usb_buf[0];
2482
		PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2483
	} else {
2484
		err("ovfx2_i2c_r %02x failed %d", reg, ret);
2485 2486
		sd->gspca_dev.usb_err = ret;
	}
2487 2488 2489 2490

	return ret;
}

2491
static void i2c_w(struct sd *sd, u8 reg, u8 value)
2492
{
2493
	if (sd->sensor_reg_cache[reg] == value)
2494
		return;
2495

2496 2497 2498
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2499
		ov511_i2c_w(sd, reg, value);
2500
		break;
2501 2502 2503
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
	case BRIDGE_OV519:
2504
		ov518_i2c_w(sd, reg, value);
2505
		break;
2506
	case BRIDGE_OVFX2:
2507
		ovfx2_i2c_w(sd, reg, value);
2508
		break;
2509
	case BRIDGE_W9968CF:
2510
		w9968cf_i2c_w(sd, reg, value);
2511
		break;
2512
	}
2513

2514
	if (sd->gspca_dev.usb_err >= 0) {
2515 2516 2517
		/* Up on sensor reset empty the register cache */
		if (reg == 0x12 && (value & 0x80))
			memset(sd->sensor_reg_cache, -1,
2518
				sizeof(sd->sensor_reg_cache));
2519 2520 2521
		else
			sd->sensor_reg_cache[reg] = value;
	}
2522 2523
}

2524
static int i2c_r(struct sd *sd, u8 reg)
2525
{
2526
	int ret = -1;
2527 2528 2529 2530

	if (sd->sensor_reg_cache[reg] != -1)
		return sd->sensor_reg_cache[reg];

2531 2532 2533
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2534 2535
		ret = ov511_i2c_r(sd, reg);
		break;
2536 2537 2538
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
	case BRIDGE_OV519:
2539 2540
		ret = ov518_i2c_r(sd, reg);
		break;
2541
	case BRIDGE_OVFX2:
2542 2543
		ret = ovfx2_i2c_r(sd, reg);
		break;
2544
	case BRIDGE_W9968CF:
2545 2546
		ret = w9968cf_i2c_r(sd, reg);
		break;
2547
	}
2548 2549 2550 2551 2552

	if (ret >= 0)
		sd->sensor_reg_cache[reg] = ret;

	return ret;
2553 2554
}

2555 2556 2557 2558 2559
/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
 * the same position as 1's in "mask" are cleared and set to "value". Bits
 * that are in the same position as 0's in "mask" are preserved, regardless
 * of their respective state in "value".
 */
2560
static void i2c_w_mask(struct sd *sd,
2561 2562 2563
			u8 reg,
			u8 value,
			u8 mask)
2564 2565
{
	int rc;
2566
	u8 oldval;
2567 2568 2569 2570

	value &= mask;			/* Enforce mask on value */
	rc = i2c_r(sd, reg);
	if (rc < 0)
2571
		return;
2572 2573
	oldval = rc & ~mask;		/* Clear the masked bits */
	value |= oldval;		/* Set the desired bits */
2574
	i2c_w(sd, reg, value);
2575 2576 2577 2578
}

/* Temporarily stops OV511 from functioning. Must do this before changing
 * registers while the camera is streaming */
2579
static inline void ov51x_stop(struct sd *sd)
2580 2581 2582
{
	PDEBUG(D_STREAM, "stopping");
	sd->stopped = 1;
2583 2584 2585
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2586 2587
		reg_w(sd, R51x_SYS_RESET, 0x3d);
		break;
2588 2589
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
2590 2591
		reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
		break;
2592
	case BRIDGE_OV519:
2593
		reg_w(sd, OV519_R51_RESET1, 0x0f);
2594 2595
		reg_w(sd, OV519_R51_RESET1, 0x00);
		reg_w(sd, 0x22, 0x00);		/* FRAR */
2596
		break;
2597
	case BRIDGE_OVFX2:
2598 2599
		reg_w_mask(sd, 0x0f, 0x00, 0x02);
		break;
2600
	case BRIDGE_W9968CF:
2601 2602
		reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
		break;
2603
	}
2604 2605 2606 2607
}

/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
 * actually stopped (for performance). */
2608
static inline void ov51x_restart(struct sd *sd)
2609 2610 2611
{
	PDEBUG(D_STREAM, "restarting");
	if (!sd->stopped)
2612
		return;
2613 2614 2615
	sd->stopped = 0;

	/* Reinitialize the stream */
2616 2617 2618
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2619 2620
		reg_w(sd, R51x_SYS_RESET, 0x00);
		break;
2621 2622
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
2623 2624 2625
		reg_w(sd, 0x2f, 0x80);
		reg_w(sd, R51x_SYS_RESET, 0x00);
		break;
2626
	case BRIDGE_OV519:
2627
		reg_w(sd, OV519_R51_RESET1, 0x0f);
2628
		reg_w(sd, OV519_R51_RESET1, 0x00);
2629
		reg_w(sd, 0x22, 0x1d);		/* FRAR */
2630
		break;
2631
	case BRIDGE_OVFX2:
2632 2633
		reg_w_mask(sd, 0x0f, 0x02, 0x02);
		break;
2634
	case BRIDGE_W9968CF:
2635 2636
		reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
		break;
2637
	}
2638 2639
}

2640
static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2641

2642 2643 2644
/* This does an initial reset of an OmniVision sensor and ensures that I2C
 * is synchronized. Returns <0 on failure.
 */
2645
static int init_ov_sensor(struct sd *sd, u8 slave)
2646
{
2647
	int i;
2648

2649
	ov51x_set_slave_ids(sd, slave);
2650

2651
	/* Reset the sensor */
2652
	i2c_w(sd, 0x12, 0x80);
2653 2654 2655 2656

	/* Wait for it to initialize */
	msleep(150);

2657
	for (i = 0; i < i2c_detect_tries; i++) {
2658 2659
		if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
		    i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2660 2661
			PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
			return 0;
2662 2663 2664
		}

		/* Reset the sensor */
2665 2666
		i2c_w(sd, 0x12, 0x80);

2667 2668
		/* Wait for it to initialize */
		msleep(150);
2669

2670 2671
		/* Dummy read to sync I2C */
		if (i2c_r(sd, 0x00) < 0)
2672
			return -1;
2673
	}
2674
	return -1;
2675 2676 2677 2678 2679 2680 2681
}

/* Set the read and write slave IDs. The "slave" argument is the write slave,
 * and the read slave will be set to (slave + 1).
 * This should not be called from outside the i2c I/O functions.
 * Sets I2C read and write slave IDs. Returns <0 for error
 */
2682
static void ov51x_set_slave_ids(struct sd *sd,
2683
				u8 slave)
2684
{
2685 2686
	switch (sd->bridge) {
	case BRIDGE_OVFX2:
2687 2688
		reg_w(sd, OVFX2_I2C_ADDR, slave);
		return;
2689 2690
	case BRIDGE_W9968CF:
		sd->sensor_addr = slave;
2691
		return;
2692
	}
2693

2694 2695
	reg_w(sd, R51x_I2C_W_SID, slave);
	reg_w(sd, R51x_I2C_R_SID, slave + 1);
2696 2697
}

2698
static void write_regvals(struct sd *sd,
2699
			 const struct ov_regvals *regvals,
2700 2701 2702
			 int n)
{
	while (--n >= 0) {
2703
		reg_w(sd, regvals->reg, regvals->val);
2704 2705 2706 2707
		regvals++;
	}
}

2708 2709 2710
static void write_i2c_regvals(struct sd *sd,
			const struct ov_i2c_regvals *regvals,
			int n)
2711 2712
{
	while (--n >= 0) {
2713
		i2c_w(sd, regvals->reg, regvals->val);
2714 2715 2716 2717 2718 2719 2720 2721 2722 2723
		regvals++;
	}
}

/****************************************************************************
 *
 * OV511 and sensor configuration
 *
 ***************************************************************************/

2724
/* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2725
static void ov_hires_configure(struct sd *sd)
2726 2727 2728 2729
{
	int high, low;

	if (sd->bridge != BRIDGE_OVFX2) {
2730
		err("error hires sensors only supported with ovfx2");
2731
		return;
2732 2733 2734 2735 2736 2737 2738 2739
	}

	PDEBUG(D_PROBE, "starting ov hires configuration");

	/* Detect sensor (sub)type */
	high = i2c_r(sd, 0x0a);
	low = i2c_r(sd, 0x0b);
	/* info("%x, %x", high, low); */
2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763
	switch (high) {
	case 0x96:
		switch (low) {
		case 0x40:
			PDEBUG(D_PROBE, "Sensor is a OV2610");
			sd->sensor = SEN_OV2610;
			return;
		case 0x41:
			PDEBUG(D_PROBE, "Sensor is a OV2610AE");
			sd->sensor = SEN_OV2610AE;
			return;
		case 0xb1:
			PDEBUG(D_PROBE, "Sensor is a OV9600");
			sd->sensor = SEN_OV9600;
			return;
		}
		break;
	case 0x36:
		if ((low & 0x0f) == 0x00) {
			PDEBUG(D_PROBE, "Sensor is a OV3610");
			sd->sensor = SEN_OV3610;
			return;
		}
		break;
2764
	}
2765
	err("Error unknown sensor type: %02x%02x", high, low);
2766 2767
}

2768 2769 2770
/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
 * the same register settings as the OV8610, since they are very similar.
 */
2771
static void ov8xx0_configure(struct sd *sd)
2772 2773 2774 2775 2776 2777 2778 2779 2780
{
	int rc;

	PDEBUG(D_PROBE, "starting ov8xx0 configuration");

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
2781
		return;
2782
	}
2783
	if ((rc & 3) == 1)
2784
		sd->sensor = SEN_OV8610;
2785
	else
2786
		err("Unknown image sensor version: %d", rc & 3);
2787 2788 2789 2790 2791
}

/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
 * the same register settings as the OV7610, since they are very similar.
 */
2792
static void ov7xx0_configure(struct sd *sd)
2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804
{
	int rc, high, low;

	PDEBUG(D_PROBE, "starting OV7xx0 configuration");

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);

	/* add OV7670 here
	 * it appears to be wrongly detected as a 7610 by default */
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
2805
		return;
2806 2807 2808 2809 2810 2811
	}
	if ((rc & 3) == 3) {
		/* quick hack to make OV7670s work */
		high = i2c_r(sd, 0x0a);
		low = i2c_r(sd, 0x0b);
		/* info("%x, %x", high, low); */
2812 2813
		if (high == 0x76 && (low & 0xf0) == 0x70) {
			PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2814 2815 2816 2817 2818 2819 2820
			sd->sensor = SEN_OV7670;
		} else {
			PDEBUG(D_PROBE, "Sensor is an OV7610");
			sd->sensor = SEN_OV7610;
		}
	} else if ((rc & 3) == 1) {
		/* I don't know what's different about the 76BE yet. */
2821
		if (i2c_r(sd, 0x15) & 1) {
2822
			PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2823
			sd->sensor = SEN_OV7620AE;
2824
		} else {
2825
			PDEBUG(D_PROBE, "Sensor is an OV76BE");
2826 2827
			sd->sensor = SEN_OV76BE;
		}
2828 2829 2830 2831 2832
	} else if ((rc & 3) == 0) {
		/* try to read product id registers */
		high = i2c_r(sd, 0x0a);
		if (high < 0) {
			PDEBUG(D_ERR, "Error detecting camera chip PID");
2833
			return;
2834 2835 2836 2837
		}
		low = i2c_r(sd, 0x0b);
		if (low < 0) {
			PDEBUG(D_ERR, "Error detecting camera chip VER");
2838
			return;
2839 2840
		}
		if (high == 0x76) {
2841 2842
			switch (low) {
			case 0x30:
2843 2844
				err("Sensor is an OV7630/OV7635");
				err("7630 is not supported by this driver");
2845
				return;
2846
			case 0x40:
2847 2848
				PDEBUG(D_PROBE, "Sensor is an OV7645");
				sd->sensor = SEN_OV7640; /* FIXME */
2849 2850
				break;
			case 0x45:
2851 2852
				PDEBUG(D_PROBE, "Sensor is an OV7645B");
				sd->sensor = SEN_OV7640; /* FIXME */
2853 2854
				break;
			case 0x48:
2855
				PDEBUG(D_PROBE, "Sensor is an OV7648");
2856
				sd->sensor = SEN_OV7648;
2857
				break;
2858 2859 2860 2861 2862
			case 0x60:
				PDEBUG(D_PROBE, "Sensor is a OV7660");
				sd->sensor = SEN_OV7660;
				sd->invert_led = 0;
				break;
2863 2864
			default:
				PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2865
				return;
2866 2867 2868 2869 2870 2871
			}
		} else {
			PDEBUG(D_PROBE, "Sensor is an OV7620");
			sd->sensor = SEN_OV7620;
		}
	} else {
2872
		err("Unknown image sensor version: %d", rc & 3);
2873 2874 2875 2876
	}
}

/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2877
static void ov6xx0_configure(struct sd *sd)
2878 2879
{
	int rc;
2880
	PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2881 2882 2883 2884 2885

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
2886
		return;
2887 2888 2889 2890 2891
	}

	/* Ugh. The first two bits are the version bits, but
	 * the entire register value must be used. I guess OVT
	 * underestimated how many variants they would make. */
2892 2893
	switch (rc) {
	case 0x00:
2894
		sd->sensor = SEN_OV6630;
2895 2896
		warn("WARNING: Sensor is an OV66308. Your camera may have");
		warn("been misdetected in previous driver versions.");
2897 2898
		break;
	case 0x01:
2899
		sd->sensor = SEN_OV6620;
2900
		PDEBUG(D_PROBE, "Sensor is an OV6620");
2901 2902
		break;
	case 0x02:
2903 2904
		sd->sensor = SEN_OV6630;
		PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2905 2906
		break;
	case 0x03:
2907
		sd->sensor = SEN_OV66308AF;
2908
		PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2909 2910
		break;
	case 0x90:
2911
		sd->sensor = SEN_OV6630;
2912 2913
		warn("WARNING: Sensor is an OV66307. Your camera may have");
		warn("been misdetected in previous driver versions.");
2914 2915
		break;
	default:
2916
		err("FATAL: Unknown sensor version: 0x%02x", rc);
2917
		return;
2918 2919 2920
	}

	/* Set sensor-specific vars */
2921
	sd->sif = 1;
2922 2923 2924 2925 2926
}

/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
static void ov51x_led_control(struct sd *sd, int on)
{
2927 2928 2929
	if (sd->invert_led)
		on = !on;

2930 2931 2932
	switch (sd->bridge) {
	/* OV511 has no LED control */
	case BRIDGE_OV511PLUS:
2933
		reg_w(sd, R511_SYS_LED_CTL, on);
2934 2935 2936
		break;
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
2937
		reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2938 2939
		break;
	case BRIDGE_OV519:
2940
		reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2941 2942
		break;
	}
2943 2944
}

2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957
static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (!sd->snapshot_needs_reset)
		return;

	/* Note it is important that we clear sd->snapshot_needs_reset,
	   before actually clearing the snapshot state in the bridge
	   otherwise we might race with the pkt_scan interrupt handler */
	sd->snapshot_needs_reset = 0;

	switch (sd->bridge) {
2958 2959 2960 2961 2962
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		reg_w(sd, R51x_SYS_SNAP, 0x02);
		reg_w(sd, R51x_SYS_SNAP, 0x00);
		break;
2963 2964 2965 2966 2967
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
		reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
		break;
2968 2969 2970 2971 2972 2973 2974
	case BRIDGE_OV519:
		reg_w(sd, R51x_SYS_RESET, 0x40);
		reg_w(sd, R51x_SYS_RESET, 0x00);
		break;
	}
}

2975
static void ov51x_upload_quan_tables(struct sd *sd)
2976
{
2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999
	const unsigned char yQuanTable511[] = {
		0, 1, 1, 2, 2, 3, 3, 4,
		1, 1, 1, 2, 2, 3, 4, 4,
		1, 1, 2, 2, 3, 4, 4, 4,
		2, 2, 2, 3, 4, 4, 4, 4,
		2, 2, 3, 4, 4, 5, 5, 5,
		3, 3, 4, 4, 5, 5, 5, 5,
		3, 4, 4, 4, 5, 5, 5, 5,
		4, 4, 4, 4, 5, 5, 5, 5
	};

	const unsigned char uvQuanTable511[] = {
		0, 2, 2, 3, 4, 4, 4, 4,
		2, 2, 2, 4, 4, 4, 4, 4,
		2, 2, 3, 4, 4, 4, 4, 4,
		3, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4
	};

	/* OV518 quantization tables are 8x4 (instead of 8x8) */
3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012
	const unsigned char yQuanTable518[] = {
		5, 4, 5, 6, 6, 7, 7, 7,
		5, 5, 5, 5, 6, 7, 7, 7,
		6, 6, 6, 6, 7, 7, 7, 8,
		7, 7, 6, 7, 7, 7, 8, 8
	};
	const unsigned char uvQuanTable518[] = {
		6, 6, 6, 7, 7, 7, 7, 7,
		6, 6, 6, 7, 7, 7, 7, 7,
		6, 6, 6, 7, 7, 7, 7, 8,
		7, 7, 7, 7, 7, 7, 8, 8
	};

3013
	const unsigned char *pYTable, *pUVTable;
3014
	unsigned char val0, val1;
3015
	int i, size, reg = R51x_COMP_LUT_BEGIN;
3016 3017 3018

	PDEBUG(D_PROBE, "Uploading quantization tables");

3019 3020 3021
	if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
		pYTable = yQuanTable511;
		pUVTable = uvQuanTable511;
3022
		size = 32;
3023 3024 3025
	} else {
		pYTable = yQuanTable518;
		pUVTable = uvQuanTable518;
3026
		size = 16;
3027 3028 3029
	}

	for (i = 0; i < size; i++) {
3030 3031 3032 3033 3034
		val0 = *pYTable++;
		val1 = *pYTable++;
		val0 &= 0x0f;
		val1 &= 0x0f;
		val0 |= val1 << 4;
3035
		reg_w(sd, reg, val0);
3036 3037 3038 3039 3040 3041

		val0 = *pUVTable++;
		val1 = *pUVTable++;
		val0 &= 0x0f;
		val1 &= 0x0f;
		val0 |= val1 << 4;
3042
		reg_w(sd, reg + size, val0);
3043 3044 3045 3046 3047

		reg++;
	}
}

3048
/* This initializes the OV511/OV511+ and the sensor */
3049
static void ov511_configure(struct gspca_dev *gspca_dev)
3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064
{
	struct sd *sd = (struct sd *) gspca_dev;

	/* For 511 and 511+ */
	const struct ov_regvals init_511[] = {
		{ R51x_SYS_RESET,	0x7f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x7f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x3f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x3d },
	};

	const struct ov_regvals norm_511[] = {
3065
		{ R511_DRAM_FLOW_CTL,	0x01 },
3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096
		{ R51x_SYS_SNAP,	0x00 },
		{ R51x_SYS_SNAP,	0x02 },
		{ R51x_SYS_SNAP,	0x00 },
		{ R511_FIFO_OPTS,	0x1f },
		{ R511_COMP_EN,		0x00 },
		{ R511_COMP_LUT_EN,	0x03 },
	};

	const struct ov_regvals norm_511_p[] = {
		{ R511_DRAM_FLOW_CTL,	0xff },
		{ R51x_SYS_SNAP,	0x00 },
		{ R51x_SYS_SNAP,	0x02 },
		{ R51x_SYS_SNAP,	0x00 },
		{ R511_FIFO_OPTS,	0xff },
		{ R511_COMP_EN,		0x00 },
		{ R511_COMP_LUT_EN,	0x03 },
	};

	const struct ov_regvals compress_511[] = {
		{ 0x70, 0x1f },
		{ 0x71, 0x05 },
		{ 0x72, 0x06 },
		{ 0x73, 0x06 },
		{ 0x74, 0x14 },
		{ 0x75, 0x03 },
		{ 0x76, 0x04 },
		{ 0x77, 0x04 },
	};

	PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));

3097
	write_regvals(sd, init_511, ARRAY_SIZE(init_511));
3098 3099 3100

	switch (sd->bridge) {
	case BRIDGE_OV511:
3101
		write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
3102 3103
		break;
	case BRIDGE_OV511PLUS:
3104
		write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3105 3106 3107 3108
		break;
	}

	/* Init compression */
3109
	write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3110

3111
	ov51x_upload_quan_tables(sd);
3112 3113
}

3114
/* This initializes the OV518/OV518+ and the sensor */
3115
static void ov518_configure(struct gspca_dev *gspca_dev)
3116 3117
{
	struct sd *sd = (struct sd *) gspca_dev;
3118 3119

	/* For 518 and 518+ */
3120
	const struct ov_regvals init_518[] = {
3121 3122 3123 3124 3125 3126 3127 3128 3129 3130
		{ R51x_SYS_RESET,	0x40 },
		{ R51x_SYS_INIT,	0xe1 },
		{ R51x_SYS_RESET,	0x3e },
		{ R51x_SYS_INIT,	0xe1 },
		{ R51x_SYS_RESET,	0x00 },
		{ R51x_SYS_INIT,	0xe1 },
		{ 0x46,			0x00 },
		{ 0x5d,			0x03 },
	};

3131
	const struct ov_regvals norm_518[] = {
3132 3133
		{ R51x_SYS_SNAP,	0x02 }, /* Reset */
		{ R51x_SYS_SNAP,	0x01 }, /* Enable */
3134
		{ 0x31,			0x0f },
3135 3136 3137 3138 3139 3140 3141 3142 3143
		{ 0x5d,			0x03 },
		{ 0x24,			0x9f },
		{ 0x25,			0x90 },
		{ 0x20,			0x00 },
		{ 0x51,			0x04 },
		{ 0x71,			0x19 },
		{ 0x2f,			0x80 },
	};

3144
	const struct ov_regvals norm_518_p[] = {
3145 3146
		{ R51x_SYS_SNAP,	0x02 }, /* Reset */
		{ R51x_SYS_SNAP,	0x01 }, /* Enable */
3147
		{ 0x31,			0x0f },
3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164
		{ 0x5d,			0x03 },
		{ 0x24,			0x9f },
		{ 0x25,			0x90 },
		{ 0x20,			0x60 },
		{ 0x51,			0x02 },
		{ 0x71,			0x19 },
		{ 0x40,			0xff },
		{ 0x41,			0x42 },
		{ 0x46,			0x00 },
		{ 0x33,			0x04 },
		{ 0x21,			0x19 },
		{ 0x3f,			0x10 },
		{ 0x2f,			0x80 },
	};

	/* First 5 bits of custom ID reg are a revision ID on OV518 */
	PDEBUG(D_PROBE, "Device revision %d",
3165
		0x1f & reg_r(sd, R51x_SYS_CUST_ID));
3166

3167
	write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3168 3169

	/* Set LED GPIO pin to output mode */
3170
	reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3171

3172 3173
	switch (sd->bridge) {
	case BRIDGE_OV518:
3174
		write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3175 3176
		break;
	case BRIDGE_OV518PLUS:
3177
		write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3178 3179 3180
		break;
	}

3181
	ov51x_upload_quan_tables(sd);
3182

3183
	reg_w(sd, 0x2f, 0x80);
3184 3185
}

3186
static void ov519_configure(struct sd *sd)
3187
{
3188
	static const struct ov_regvals init_519[] = {
3189
		{ 0x5a, 0x6d }, /* EnableSystem */
3190
		{ 0x53, 0x9b }, /* don't enable the microcontroller */
3191
		{ OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3192 3193 3194
		{ 0x5d, 0x03 },
		{ 0x49, 0x01 },
		{ 0x48, 0x00 },
3195 3196 3197
		/* Set LED pin to output mode. Bit 4 must be cleared or sensor
		 * detection will fail. This deserves further investigation. */
		{ OV519_GPIO_IO_CTRL0,   0xee },
3198 3199
		{ OV519_R51_RESET1, 0x0f },
		{ OV519_R51_RESET1, 0x00 },
3200
		{ 0x22, 0x00 },
3201 3202 3203
		/* windows reads 0x55 at this point*/
	};

3204
	write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3205 3206
}

3207
static void ovfx2_configure(struct sd *sd)
3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220
{
	static const struct ov_regvals init_fx2[] = {
		{ 0x00, 0x60 },
		{ 0x02, 0x01 },
		{ 0x0f, 0x1d },
		{ 0xe9, 0x82 },
		{ 0xea, 0xc7 },
		{ 0xeb, 0x10 },
		{ 0xec, 0xf6 },
	};

	sd->stopped = 1;

3221
	write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3222 3223
}

3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308
/* set the mode */
/* This function works for ov7660 only */
static void ov519_set_mode(struct sd *sd)
{
	static const struct ov_regvals bridge_ov7660[2][10] = {
		{{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
		 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
		 {0x25, 0x01}, {0x26, 0x00}},
		{{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
		 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
		 {0x25, 0x03}, {0x26, 0x00}}
	};
	static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
		{{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
		{{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
	};
	static const struct ov_i2c_regvals sensor_ov7660_2[] = {
		{OV7670_R17_HSTART, 0x13},
		{OV7670_R18_HSTOP, 0x01},
		{OV7670_R32_HREF, 0x92},
		{OV7670_R19_VSTART, 0x02},
		{OV7670_R1A_VSTOP, 0x7a},
		{OV7670_R03_VREF, 0x00},
/*		{0x33, 0x00}, */
/*		{0x34, 0x07}, */
/*		{0x36, 0x00}, */
/*		{0x6b, 0x0a}, */
	};

	write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
			ARRAY_SIZE(bridge_ov7660[0]));
	write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
			ARRAY_SIZE(sensor_ov7660[0]));
	write_i2c_regvals(sd, sensor_ov7660_2,
			ARRAY_SIZE(sensor_ov7660_2));
}

/* set the frame rate */
/* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
static void ov519_set_fr(struct sd *sd)
{
	int fr;
	u8 clock;
	/* frame rate table with indices:
	 *	- mode = 0: 320x240, 1: 640x480
	 *	- fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
	 *	- reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
	 */
	static const u8 fr_tb[2][6][3] = {
		{{0x04, 0xff, 0x00},
		 {0x04, 0x1f, 0x00},
		 {0x04, 0x1b, 0x00},
		 {0x04, 0x15, 0x00},
		 {0x04, 0x09, 0x00},
		 {0x04, 0x01, 0x00}},
		{{0x0c, 0xff, 0x00},
		 {0x0c, 0x1f, 0x00},
		 {0x0c, 0x1b, 0x00},
		 {0x04, 0xff, 0x01},
		 {0x04, 0x1f, 0x01},
		 {0x04, 0x1b, 0x01}},
	};

	if (frame_rate > 0)
		sd->frame_rate = frame_rate;
	if (sd->frame_rate >= 30)
		fr = 0;
	else if (sd->frame_rate >= 25)
		fr = 1;
	else if (sd->frame_rate >= 20)
		fr = 2;
	else if (sd->frame_rate >= 15)
		fr = 3;
	else if (sd->frame_rate >= 10)
		fr = 4;
	else
		fr = 5;
	reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
	reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
	clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
	if (sd->sensor == SEN_OV7660)
		clock |= 0x80;		/* enable double clock */
	ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
}

3309 3310 3311 3312 3313 3314 3315
static void setautogain(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

	i2c_w_mask(sd, 0x13, sd->ctrls[AUTOGAIN].val ? 0x05 : 0x00, 0x05);
}

3316 3317 3318 3319 3320
/* this function is called at probe time */
static int sd_config(struct gspca_dev *gspca_dev,
			const struct usb_device_id *id)
{
	struct sd *sd = (struct sd *) gspca_dev;
3321
	struct cam *cam = &gspca_dev->cam;
3322

3323
	sd->bridge = id->driver_info & BRIDGE_MASK;
3324
	sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3325 3326

	switch (sd->bridge) {
3327 3328
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
3329 3330
		cam->cam_mode = ov511_vga_mode;
		cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3331
		break;
3332 3333
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
3334 3335
		cam->cam_mode = ov518_vga_mode;
		cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3336 3337
		break;
	case BRIDGE_OV519:
3338 3339 3340
		cam->cam_mode = ov519_vga_mode;
		cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
		sd->invert_led = !sd->invert_led;
3341
		break;
3342
	case BRIDGE_OVFX2:
3343 3344
		cam->cam_mode = ov519_vga_mode;
		cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3345 3346 3347 3348
		cam->bulk_size = OVFX2_BULK_SIZE;
		cam->bulk_nurbs = MAX_NURBS;
		cam->bulk = 1;
		break;
3349
	case BRIDGE_W9968CF:
3350 3351
		cam->cam_mode = w9968cf_vga_mode;
		cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3352 3353
		cam->reverse_alts = 1;
		break;
3354 3355
	}

3356 3357
	gspca_dev->cam.ctrls = sd->ctrls;
	sd->quality = QUALITY_DEF;
3358
	sd->frame_rate = 15;
3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387

	return 0;
}

/* this function is called at probe and resume time */
static int sd_init(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	struct cam *cam = &gspca_dev->cam;

	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		ov511_configure(gspca_dev);
		break;
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		ov518_configure(gspca_dev);
		break;
	case BRIDGE_OV519:
		ov519_configure(sd);
		break;
	case BRIDGE_OVFX2:
		ovfx2_configure(sd);
		break;
	case BRIDGE_W9968CF:
		w9968cf_configure(sd);
		break;
	}
3388 3389 3390 3391

	/* The OV519 must be more aggressive about sensor detection since
	 * I2C write will never fail if the sensor is not present. We have
	 * to try to initialize the sensor to detect its presence */
3392
	sd->sensor = -1;
3393 3394 3395

	/* Test for 76xx */
	if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3396 3397
		ov7xx0_configure(sd);

3398 3399
	/* Test for 6xx0 */
	} else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3400 3401
		ov6xx0_configure(sd);

3402 3403
	/* Test for 8xx0 */
	} else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3404 3405
		ov8xx0_configure(sd);

3406 3407
	/* Test for 3xxx / 2xxx */
	} else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3408
		ov_hires_configure(sd);
3409
	} else {
3410
		err("Can't determine sensor slave IDs");
3411
		goto error;
3412 3413
	}

3414 3415 3416
	if (sd->sensor < 0)
		goto error;

3417 3418
	ov51x_led_control(sd, 0);	/* turn LED off */

3419
	switch (sd->bridge) {
3420 3421
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
3422
		if (sd->sif) {
3423 3424 3425 3426
			cam->cam_mode = ov511_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
		}
		break;
3427 3428
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
3429
		if (sd->sif) {
3430 3431 3432 3433 3434
			cam->cam_mode = ov518_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
		}
		break;
	case BRIDGE_OV519:
3435
		if (sd->sif) {
3436 3437 3438 3439
			cam->cam_mode = ov519_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
		}
		break;
3440
	case BRIDGE_OVFX2:
3441 3442 3443
		switch (sd->sensor) {
		case SEN_OV2610:
		case SEN_OV2610AE:
3444 3445
			cam->cam_mode = ovfx2_ov2610_mode;
			cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3446 3447
			break;
		case SEN_OV3610:
3448 3449
			cam->cam_mode = ovfx2_ov3610_mode;
			cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3450
			break;
3451 3452 3453 3454
		case SEN_OV9600:
			cam->cam_mode = ovfx2_ov9600_mode;
			cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
			break;
3455 3456 3457 3458 3459 3460
		default:
			if (sd->sif) {
				cam->cam_mode = ov519_sif_mode;
				cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
			}
			break;
3461 3462
		}
		break;
3463
	case BRIDGE_W9968CF:
3464
		if (sd->sif)
3465
			cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3466 3467

		/* w9968cf needs initialisation once the sensor is known */
3468
		w9968cf_init(sd);
3469
		break;
3470
	}
3471 3472

	gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
3473

3474 3475
	/* initialize the sensor */
	switch (sd->sensor) {
3476
	case SEN_OV2610:
3477 3478
		write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));

3479
		/* Enable autogain, autoexpo, awb, bandfilter */
3480
		i2c_w_mask(sd, 0x13, 0x27, 0x27);
3481
		break;
3482 3483 3484 3485 3486 3487
	case SEN_OV2610AE:
		write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));

		/* enable autoexpo */
		i2c_w_mask(sd, 0x13, 0x05, 0x05);
		break;
3488
	case SEN_OV3610:
3489 3490
		write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));

3491
		/* Enable autogain, autoexpo, awb, bandfilter */
3492
		i2c_w_mask(sd, 0x13, 0x27, 0x27);
3493
		break;
3494
	case SEN_OV6620:
3495
		write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3496 3497
		break;
	case SEN_OV6630:
3498
	case SEN_OV66308AF:
3499 3500
		sd->ctrls[CONTRAST].def = 200;
				 /* The default is too low for the ov6630 */
3501
		write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3502 3503 3504 3505
		break;
	default:
/*	case SEN_OV7610: */
/*	case SEN_OV76BE: */
3506 3507
		write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
		i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3508 3509
		break;
	case SEN_OV7620:
3510
	case SEN_OV7620AE:
3511
		write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3512 3513
		break;
	case SEN_OV7640:
3514
	case SEN_OV7648:
3515
		write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3516
		break;
3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3543
	case SEN_OV7660:
		i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
		msleep(14);
		reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
		write_regvals(sd, init_519_ov7660,
				ARRAY_SIZE(init_519_ov7660));
		write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
		sd->gspca_dev.curr_mode = 1;	/* 640x480 */
		ov519_set_mode(sd);
		ov519_set_fr(sd);
		sd->ctrls[COLORS].max = 4;	/* 0..4 */
		sd->ctrls[COLORS].val =
			sd->ctrls[COLORS].def = 2;
		setcolors(gspca_dev);
		sd->ctrls[CONTRAST].max = 6;	/* 0..6 */
		sd->ctrls[CONTRAST].val =
			sd->ctrls[CONTRAST].def = 3;
		setcontrast(gspca_dev);
		sd->ctrls[BRIGHTNESS].max = 6;	/* 0..6 */
		sd->ctrls[BRIGHTNESS].val =
			sd->ctrls[BRIGHTNESS].def = 3;
		setbrightness(gspca_dev);
		sd_reset_snapshot(gspca_dev);
		ov51x_restart(sd);
		ov51x_stop(sd);			/* not in win traces */
		ov51x_led_control(sd, 0);
		break;
3544
	case SEN_OV7670:
3545 3546
		sd->ctrls[FREQ].max = 3;	/* auto */
		sd->ctrls[FREQ].def = 3;
3547
		write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3548 3549
		break;
	case SEN_OV8610:
3550
		write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3551
		break;
3552 3553 3554 3555 3556 3557
	case SEN_OV9600:
		write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));

		/* enable autoexpo */
/*		i2c_w_mask(sd, 0x13, 0x05, 0x05); */
		break;
3558
	}
3559
	return gspca_dev->usb_err;
3560 3561 3562
error:
	PDEBUG(D_ERR, "OV519 Config failed");
	return -EINVAL;
3563 3564
}

3565 3566 3567 3568 3569 3570 3571
/* function called at start time before URB creation */
static int sd_isoc_init(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

	switch (sd->bridge) {
	case BRIDGE_OVFX2:
3572
		if (gspca_dev->width != 800)
3573 3574 3575 3576 3577 3578 3579 3580
			gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
		else
			gspca_dev->cam.bulk_size = 7 * 4096;
		break;
	}
	return 0;
}

3581 3582 3583 3584
/* Set up the OV511/OV511+ with the given image parameters.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
3585
static void ov511_mode_init_regs(struct sd *sd)
3586 3587 3588 3589 3590 3591 3592 3593 3594
{
	int hsegs, vsegs, packet_size, fps, needed;
	int interlaced = 0;
	struct usb_host_interface *alt;
	struct usb_interface *intf;

	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
	if (!alt) {
3595
		err("Couldn't get altsetting");
3596 3597
		sd->gspca_dev.usb_err = -EIO;
		return;
3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639
	}

	packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
	reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);

	reg_w(sd, R511_CAM_UV_EN, 0x01);
	reg_w(sd, R511_SNAP_UV_EN, 0x01);
	reg_w(sd, R511_SNAP_OPTS, 0x03);

	/* Here I'm assuming that snapshot size == image size.
	 * I hope that's always true. --claudio
	 */
	hsegs = (sd->gspca_dev.width >> 3) - 1;
	vsegs = (sd->gspca_dev.height >> 3) - 1;

	reg_w(sd, R511_CAM_PXCNT, hsegs);
	reg_w(sd, R511_CAM_LNCNT, vsegs);
	reg_w(sd, R511_CAM_PXDIV, 0x00);
	reg_w(sd, R511_CAM_LNDIV, 0x00);

	/* YUV420, low pass filter on */
	reg_w(sd, R511_CAM_OPTS, 0x03);

	/* Snapshot additions */
	reg_w(sd, R511_SNAP_PXCNT, hsegs);
	reg_w(sd, R511_SNAP_LNCNT, vsegs);
	reg_w(sd, R511_SNAP_PXDIV, 0x00);
	reg_w(sd, R511_SNAP_LNDIV, 0x00);

	/******** Set the framerate ********/
	if (frame_rate > 0)
		sd->frame_rate = frame_rate;

	switch (sd->sensor) {
	case SEN_OV6620:
		/* No framerate control, doesn't like higher rates yet */
		sd->clockdiv = 3;
		break;

	/* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
	   for more sensors we need to do this for them too */
	case SEN_OV7620:
3640
	case SEN_OV7620AE:
3641
	case SEN_OV7640:
3642
	case SEN_OV7648:
3643
	case SEN_OV76BE:
3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701
		if (sd->gspca_dev.width == 320)
			interlaced = 1;
		/* Fall through */
	case SEN_OV6630:
	case SEN_OV7610:
	case SEN_OV7670:
		switch (sd->frame_rate) {
		case 30:
		case 25:
			/* Not enough bandwidth to do 640x480 @ 30 fps */
			if (sd->gspca_dev.width != 640) {
				sd->clockdiv = 0;
				break;
			}
			/* Fall through for 640x480 case */
		default:
/*		case 20: */
/*		case 15: */
			sd->clockdiv = 1;
			break;
		case 10:
			sd->clockdiv = 2;
			break;
		case 5:
			sd->clockdiv = 5;
			break;
		}
		if (interlaced) {
			sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
			/* Higher then 10 does not work */
			if (sd->clockdiv > 10)
				sd->clockdiv = 10;
		}
		break;

	case SEN_OV8610:
		/* No framerate control ?? */
		sd->clockdiv = 0;
		break;
	}

	/* Check if we have enough bandwidth to disable compression */
	fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
	needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
	/* 1400 is a conservative estimate of the max nr of isoc packets/sec */
	if (needed > 1400 * packet_size) {
		/* Enable Y and UV quantization and compression */
		reg_w(sd, R511_COMP_EN, 0x07);
		reg_w(sd, R511_COMP_LUT_EN, 0x03);
	} else {
		reg_w(sd, R511_COMP_EN, 0x06);
		reg_w(sd, R511_COMP_LUT_EN, 0x00);
	}

	reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
	reg_w(sd, R51x_SYS_RESET, 0);
}

3702 3703 3704 3705 3706 3707 3708
/* Sets up the OV518/OV518+ with the given image parameters
 *
 * OV518 needs a completely different approach, until we can figure out what
 * the individual registers do. Also, only 15 FPS is supported now.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
3709
static void ov518_mode_init_regs(struct sd *sd)
3710
{
3711 3712 3713 3714 3715 3716 3717
	int hsegs, vsegs, packet_size;
	struct usb_host_interface *alt;
	struct usb_interface *intf;

	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
	if (!alt) {
3718
		err("Couldn't get altsetting");
3719 3720
		sd->gspca_dev.usb_err = -EIO;
		return;
3721 3722 3723 3724
	}

	packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
	ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 3759

	/******** Set the mode ********/
	reg_w(sd, 0x2b, 0);
	reg_w(sd, 0x2c, 0);
	reg_w(sd, 0x2d, 0);
	reg_w(sd, 0x2e, 0);
	reg_w(sd, 0x3b, 0);
	reg_w(sd, 0x3c, 0);
	reg_w(sd, 0x3d, 0);
	reg_w(sd, 0x3e, 0);

	if (sd->bridge == BRIDGE_OV518) {
		/* Set 8-bit (YVYU) input format */
		reg_w_mask(sd, 0x20, 0x08, 0x08);

		/* Set 12-bit (4:2:0) output format */
		reg_w_mask(sd, 0x28, 0x80, 0xf0);
		reg_w_mask(sd, 0x38, 0x80, 0xf0);
	} else {
		reg_w(sd, 0x28, 0x80);
		reg_w(sd, 0x38, 0x80);
	}

	hsegs = sd->gspca_dev.width / 16;
	vsegs = sd->gspca_dev.height / 4;

	reg_w(sd, 0x29, hsegs);
	reg_w(sd, 0x2a, vsegs);

	reg_w(sd, 0x39, hsegs);
	reg_w(sd, 0x3a, vsegs);

	/* Windows driver does this here; who knows why */
	reg_w(sd, 0x2f, 0x80);

3760
	/******** Set the framerate ********/
3761
	sd->clockdiv = 1;
3762 3763

	/* Mode independent, but framerate dependent, regs */
3764 3765
	/* 0x51: Clock divider; Only works on some cams which use 2 crystals */
	reg_w(sd, 0x51, 0x04);
3766 3767 3768
	reg_w(sd, 0x22, 0x18);
	reg_w(sd, 0x23, 0xff);

3769 3770
	if (sd->bridge == BRIDGE_OV518PLUS) {
		switch (sd->sensor) {
3771
		case SEN_OV7620AE:
3772 3773 3774 3775 3776 3777 3778 3779
			if (sd->gspca_dev.width == 320) {
				reg_w(sd, 0x20, 0x00);
				reg_w(sd, 0x21, 0x19);
			} else {
				reg_w(sd, 0x20, 0x60);
				reg_w(sd, 0x21, 0x1f);
			}
			break;
3780 3781 3782 3783
		case SEN_OV7620:
			reg_w(sd, 0x20, 0x00);
			reg_w(sd, 0x21, 0x19);
			break;
3784 3785 3786 3787
		default:
			reg_w(sd, 0x21, 0x19);
		}
	} else
3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824
		reg_w(sd, 0x71, 0x17);	/* Compression-related? */

	/* FIXME: Sensor-specific */
	/* Bit 5 is what matters here. Of course, it is "reserved" */
	i2c_w(sd, 0x54, 0x23);

	reg_w(sd, 0x2f, 0x80);

	if (sd->bridge == BRIDGE_OV518PLUS) {
		reg_w(sd, 0x24, 0x94);
		reg_w(sd, 0x25, 0x90);
		ov518_reg_w32(sd, 0xc4,    400, 2);	/* 190h   */
		ov518_reg_w32(sd, 0xc6,    540, 2);	/* 21ch   */
		ov518_reg_w32(sd, 0xc7,    540, 2);	/* 21ch   */
		ov518_reg_w32(sd, 0xc8,    108, 2);	/* 6ch    */
		ov518_reg_w32(sd, 0xca, 131098, 3);	/* 2001ah */
		ov518_reg_w32(sd, 0xcb,    532, 2);	/* 214h   */
		ov518_reg_w32(sd, 0xcc,   2400, 2);	/* 960h   */
		ov518_reg_w32(sd, 0xcd,     32, 2);	/* 20h    */
		ov518_reg_w32(sd, 0xce,    608, 2);	/* 260h   */
	} else {
		reg_w(sd, 0x24, 0x9f);
		reg_w(sd, 0x25, 0x90);
		ov518_reg_w32(sd, 0xc4,    400, 2);	/* 190h   */
		ov518_reg_w32(sd, 0xc6,    381, 2);	/* 17dh   */
		ov518_reg_w32(sd, 0xc7,    381, 2);	/* 17dh   */
		ov518_reg_w32(sd, 0xc8,    128, 2);	/* 80h    */
		ov518_reg_w32(sd, 0xca, 183331, 3);	/* 2cc23h */
		ov518_reg_w32(sd, 0xcb,    746, 2);	/* 2eah   */
		ov518_reg_w32(sd, 0xcc,   1750, 2);	/* 6d6h   */
		ov518_reg_w32(sd, 0xcd,     45, 2);	/* 2dh    */
		ov518_reg_w32(sd, 0xce,    851, 2);	/* 353h   */
	}

	reg_w(sd, 0x2f, 0x80);
}

3825 3826 3827 3828 3829 3830 3831
/* Sets up the OV519 with the given image parameters
 *
 * OV519 needs a completely different approach, until we can figure out what
 * the individual registers do.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
3832
static void ov519_mode_init_regs(struct sd *sd)
3833
{
3834
	static const struct ov_regvals mode_init_519_ov7670[] = {
3835 3836
		{ 0x5d,	0x03 }, /* Turn off suspend mode */
		{ 0x53,	0x9f }, /* was 9b in 1.65-1.08 */
3837
		{ OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3838 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856
		{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
		{ 0xa3,	0x18 },
		{ 0xa4,	0x04 },
		{ 0xa5,	0x28 },
		{ 0x37,	0x00 },	/* SetUsbInit */
		{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
		/* Enable both fields, YUV Input, disable defect comp (why?) */
		{ 0x20,	0x0c },
		{ 0x21,	0x38 },
		{ 0x22,	0x1d },
		{ 0x17,	0x50 }, /* undocumented */
		{ 0x37,	0x00 }, /* undocumented */
		{ 0x40,	0xff }, /* I2C timeout counter */
		{ 0x46,	0x00 }, /* I2C clock prescaler */
		{ 0x59,	0x04 },	/* new from windrv 090403 */
		{ 0xff,	0x00 }, /* undocumented */
		/* windows reads 0x55 at this point, why? */
	};

3857
	static const struct ov_regvals mode_init_519[] = {
3858 3859
		{ 0x5d,	0x03 }, /* Turn off suspend mode */
		{ 0x53,	0x9f }, /* was 9b in 1.65-1.08 */
3860
		{ OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878
		{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
		{ 0xa3,	0x18 },
		{ 0xa4,	0x04 },
		{ 0xa5,	0x28 },
		{ 0x37,	0x00 },	/* SetUsbInit */
		{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
		/* Enable both fields, YUV Input, disable defect comp (why?) */
		{ 0x22,	0x1d },
		{ 0x17,	0x50 }, /* undocumented */
		{ 0x37,	0x00 }, /* undocumented */
		{ 0x40,	0xff }, /* I2C timeout counter */
		{ 0x46,	0x00 }, /* I2C clock prescaler */
		{ 0x59,	0x04 },	/* new from windrv 090403 */
		{ 0xff,	0x00 }, /* undocumented */
		/* windows reads 0x55 at this point, why? */
	};

	/******** Set the mode ********/
3879 3880
	switch (sd->sensor) {
	default:
3881
		write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3882 3883
		if (sd->sensor == SEN_OV7640 ||
		    sd->sensor == SEN_OV7648) {
3884
			/* Select 8-bit input mode */
3885
			reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3886
		}
3887 3888 3889 3890
		break;
	case SEN_OV7660:
		return;		/* done by ov519_set_mode/fr() */
	case SEN_OV7670:
3891 3892
		write_regvals(sd, mode_init_519_ov7670,
				ARRAY_SIZE(mode_init_519_ov7670));
3893
		break;
3894 3895
	}

3896 3897
	reg_w(sd, OV519_R10_H_SIZE,	sd->gspca_dev.width >> 4);
	reg_w(sd, OV519_R11_V_SIZE,	sd->gspca_dev.height >> 3);
3898 3899 3900
	if (sd->sensor == SEN_OV7670 &&
	    sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
		reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3901 3902 3903
	else if (sd->sensor == SEN_OV7648 &&
	    sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
		reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3904 3905
	else
		reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3906 3907 3908 3909 3910
	reg_w(sd, OV519_R13_X_OFFSETH,	0x00);
	reg_w(sd, OV519_R14_Y_OFFSETL,	0x00);
	reg_w(sd, OV519_R15_Y_OFFSETH,	0x00);
	reg_w(sd, OV519_R16_DIVIDER,	0x00);
	reg_w(sd, OV519_R25_FORMAT,	0x03); /* YUV422 */
3911 3912 3913 3914 3915 3916 3917 3918
	reg_w(sd, 0x26,			0x00); /* Undocumented */

	/******** Set the framerate ********/
	if (frame_rate > 0)
		sd->frame_rate = frame_rate;

/* FIXME: These are only valid at the max resolution. */
	sd->clockdiv = 0;
3919 3920
	switch (sd->sensor) {
	case SEN_OV7640:
3921
	case SEN_OV7648:
3922
		switch (sd->frame_rate) {
3923 3924
		default:
/*		case 30: */
3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0xff);
			break;
		case 25:
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0x1f);
			break;
		case 20:
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0x1b);
			break;
3936
		case 15:
3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0xff);
			sd->clockdiv = 1;
			break;
		case 10:
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0x1f);
			sd->clockdiv = 1;
			break;
		case 5:
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0x1b);
			sd->clockdiv = 1;
			break;
		}
3952 3953
		break;
	case SEN_OV8610:
3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968
		switch (sd->frame_rate) {
		default:	/* 15 fps */
/*		case 15: */
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0xff);
			break;
		case 10:
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0x1f);
			break;
		case 5:
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0x1b);
			break;
		}
3969 3970
		break;
	case SEN_OV7670:		/* guesses, based on 7640 */
3971 3972
		PDEBUG(D_STREAM, "Setting framerate to %d fps",
				 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3973
		reg_w(sd, 0xa4, 0x10);
3974 3975 3976 3977 3978 3979 3980
		switch (sd->frame_rate) {
		case 30:
			reg_w(sd, 0x23, 0xff);
			break;
		case 20:
			reg_w(sd, 0x23, 0x1b);
			break;
3981 3982
		default:
/*		case 15: */
3983 3984 3985 3986
			reg_w(sd, 0x23, 0xff);
			sd->clockdiv = 1;
			break;
		}
3987
		break;
3988 3989 3990
	}
}

3991
static void mode_init_ov_sensor_regs(struct sd *sd)
3992
{
3993
	struct gspca_dev *gspca_dev;
3994
	int qvga, xstart, xend, ystart, yend;
3995
	u8 v;
3996 3997

	gspca_dev = &sd->gspca_dev;
3998
	qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3999 4000 4001

	/******** Mode (VGA/QVGA) and sensor specific regs ********/
	switch (sd->sensor) {
4002 4003 4004 4005 4006 4007 4008 4009
	case SEN_OV2610:
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
		i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
		i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
		i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4010
		return;
4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029
	case SEN_OV2610AE: {
		u8 v;

		/* frame rates:
		 *	10fps / 5 fps for 1600x1200
		 *	40fps / 20fps for 800x600
		 */
		v = 80;
		if (qvga) {
			if (sd->frame_rate < 25)
				v = 0x81;
		} else {
			if (sd->frame_rate < 10)
				v = 0x81;
		}
		i2c_w(sd, 0x11, v);
		i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
		return;
	    }
4030
	case SEN_OV3610:
4031 4032
		if (qvga) {
			xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
4033
			ystart = (776 - gspca_dev->height) / 2;
4034
		} else {
4035
			xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052
			ystart = (1544 - gspca_dev->height) / 2;
		}
		xend = xstart + gspca_dev->width;
		yend = ystart + gspca_dev->height;
		/* Writing to the COMH register resets the other windowing regs
		   to their default values, so we must do this first. */
		i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
		i2c_w_mask(sd, 0x32,
			   (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
			   0x3f);
		i2c_w_mask(sd, 0x03,
			   (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
			   0x0f);
		i2c_w(sd, 0x17, xstart >> 4);
		i2c_w(sd, 0x18, xend >> 4);
		i2c_w(sd, 0x19, ystart >> 3);
		i2c_w(sd, 0x1a, yend >> 3);
4053
		return;
4054 4055 4056
	case SEN_OV8610:
		/* For OV8610 qvga means qsvga */
		i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
4057 4058 4059 4060
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
		i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
4061 4062 4063
		break;
	case SEN_OV7610:
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4064
		i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4065 4066
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4067 4068
		break;
	case SEN_OV7620:
4069
	case SEN_OV7620AE:
4070
	case SEN_OV76BE:
4071 4072 4073 4074 4075
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
		i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
		i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4076
		i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
4077
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4078 4079 4080 4081
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		if (sd->sensor == SEN_OV76BE)
			i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4082 4083
		break;
	case SEN_OV7640:
4084
	case SEN_OV7648:
4085 4086
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4087 4088
		/* Setting this undocumented bit in qvga mode removes a very
		   annoying vertical shaking of the image */
4089
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4090
		/* Unknown */
4091
		i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4092
		/* Allow higher automatic gain (to allow higher framerates) */
4093
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4094
		i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
4095 4096 4097 4098 4099
		break;
	case SEN_OV7670:
		/* set COM7_FMT_VGA or COM7_FMT_QVGA
		 * do we need to set anything else?
		 *	HSTART etc are set in set_ov_sensor_window itself */
4100
		i2c_w_mask(sd, OV7670_R12_COM7,
4101 4102
			 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
			 OV7670_COM7_FMT_MASK);
4103
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4104
		i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119
				OV7670_COM8_AWB);
		if (qvga) {		/* QVGA from ov7670.c by
					 * Jonathan Corbet */
			xstart = 164;
			xend = 28;
			ystart = 14;
			yend = 494;
		} else {		/* VGA */
			xstart = 158;
			xend = 14;
			ystart = 10;
			yend = 490;
		}
		/* OV7670 hardware window registers are split across
		 * multiple locations */
4120 4121 4122
		i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
		i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
		v = i2c_r(sd, OV7670_R32_HREF);
4123 4124 4125
		v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
		msleep(10);	/* need to sleep between read and write to
				 * same reg! */
4126
		i2c_w(sd, OV7670_R32_HREF, v);
4127

4128 4129 4130
		i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
		i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
		v = i2c_r(sd, OV7670_R03_VREF);
4131 4132 4133
		v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
		msleep(10);	/* need to sleep between read and write to
				 * same reg! */
4134
		i2c_w(sd, OV7670_R03_VREF, v);
4135 4136
		break;
	case SEN_OV6620:
4137 4138 4139 4140
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		break;
4141
	case SEN_OV6630:
4142
	case SEN_OV66308AF:
4143
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4144
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4145
		break;
4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172
	case SEN_OV9600: {
		const struct ov_i2c_regvals *vals;
		static const struct ov_i2c_regvals sxga_15[] = {
			{0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
		};
		static const struct ov_i2c_regvals sxga_7_5[] = {
			{0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
		};
		static const struct ov_i2c_regvals vga_30[] = {
			{0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
		};
		static const struct ov_i2c_regvals vga_15[] = {
			{0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
		};

		/* frame rates:
		 *	15fps / 7.5 fps for 1280x1024
		 *	30fps / 15fps for 640x480
		 */
		i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
		if (qvga)
			vals = sd->frame_rate < 30 ? vga_15 : vga_30;
		else
			vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
		write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
		return;
	    }
4173
	default:
4174
		return;
4175 4176 4177
	}

	/******** Clock programming ********/
4178
	i2c_w(sd, 0x11, sd->clockdiv);
4179 4180
}

4181
/* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4182
static void sethvflip(struct gspca_dev *gspca_dev)
4183
{
4184 4185
	struct sd *sd = (struct sd *) gspca_dev;

4186
	if (sd->gspca_dev.streaming)
4187
		reg_w(sd, OV519_R51_RESET1, 0x0f);	/* block stream */
4188
	i2c_w_mask(sd, OV7670_R1E_MVFP,
4189 4190
		OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
			| OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
4191
		OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4192
	if (sd->gspca_dev.streaming)
4193
		reg_w(sd, OV519_R51_RESET1, 0x00);	/* restart stream */
4194 4195
}

4196
static void set_ov_sensor_window(struct sd *sd)
4197
{
4198
	struct gspca_dev *gspca_dev;
4199
	int qvga, crop;
4200 4201
	int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;

4202
	/* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4203 4204
	switch (sd->sensor) {
	case SEN_OV2610:
4205
	case SEN_OV2610AE:
4206 4207
	case SEN_OV3610:
	case SEN_OV7670:
4208
	case SEN_OV9600:
4209 4210
		mode_init_ov_sensor_regs(sd);
		return;
4211 4212 4213 4214
	case SEN_OV7660:
		ov519_set_mode(sd);
		ov519_set_fr(sd);
		return;
4215
	}
4216

4217
	gspca_dev = &sd->gspca_dev;
4218 4219
	qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
	crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4220

4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237
	/* The different sensor ICs handle setting up of window differently.
	 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
	switch (sd->sensor) {
	case SEN_OV8610:
		hwsbase = 0x1e;
		hwebase = 0x1e;
		vwsbase = 0x02;
		vwebase = 0x02;
		break;
	case SEN_OV7610:
	case SEN_OV76BE:
		hwsbase = 0x38;
		hwebase = 0x3a;
		vwsbase = vwebase = 0x05;
		break;
	case SEN_OV6620:
	case SEN_OV6630:
4238
	case SEN_OV66308AF:
4239 4240 4241 4242
		hwsbase = 0x38;
		hwebase = 0x3a;
		vwsbase = 0x05;
		vwebase = 0x06;
4243
		if (sd->sensor == SEN_OV66308AF && qvga)
4244
			/* HDG: this fixes U and V getting swapped */
4245
			hwsbase++;
4246 4247 4248 4249 4250 4251
		if (crop) {
			hwsbase += 8;
			hwebase += 8;
			vwsbase += 11;
			vwebase += 11;
		}
4252 4253
		break;
	case SEN_OV7620:
4254
	case SEN_OV7620AE:
4255 4256 4257 4258 4259
		hwsbase = 0x2f;		/* From 7620.SET (spec is wrong) */
		hwebase = 0x2f;
		vwsbase = vwebase = 0x05;
		break;
	case SEN_OV7640:
4260
	case SEN_OV7648:
4261 4262 4263 4264 4265
		hwsbase = 0x1a;
		hwebase = 0x1a;
		vwsbase = vwebase = 0x03;
		break;
	default:
4266
		return;
4267 4268 4269 4270 4271
	}

	switch (sd->sensor) {
	case SEN_OV6620:
	case SEN_OV6630:
4272
	case SEN_OV66308AF:
4273
		if (qvga) {		/* QCIF */
4274 4275 4276 4277 4278 4279 4280 4281 4282
			hwscale = 0;
			vwscale = 0;
		} else {		/* CIF */
			hwscale = 1;
			vwscale = 1;	/* The datasheet says 0;
					 * it's wrong */
		}
		break;
	case SEN_OV8610:
4283
		if (qvga) {		/* QSVGA */
4284 4285 4286 4287 4288 4289 4290 4291
			hwscale = 1;
			vwscale = 1;
		} else {		/* SVGA */
			hwscale = 2;
			vwscale = 2;
		}
		break;
	default:			/* SEN_OV7xx0 */
4292
		if (qvga) {		/* QVGA */
4293 4294 4295 4296 4297 4298 4299 4300
			hwscale = 1;
			vwscale = 0;
		} else {		/* VGA */
			hwscale = 2;
			vwscale = 1;
		}
	}

4301
	mode_init_ov_sensor_regs(sd);
4302

4303
	i2c_w(sd, 0x17, hwsbase);
4304
	i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4305
	i2c_w(sd, 0x19, vwsbase);
4306
	i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4307 4308 4309
}

/* -- start the camera -- */
4310
static int sd_start(struct gspca_dev *gspca_dev)
4311 4312 4313
{
	struct sd *sd = (struct sd *) gspca_dev;

4314 4315 4316 4317
	/* Default for most bridges, allow bridge_mode_init_regs to override */
	sd->sensor_width = sd->gspca_dev.width;
	sd->sensor_height = sd->gspca_dev.height;

4318
	switch (sd->bridge) {
4319 4320
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
4321
		ov511_mode_init_regs(sd);
4322
		break;
4323 4324
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
4325
		ov518_mode_init_regs(sd);
4326 4327
		break;
	case BRIDGE_OV519:
4328
		ov519_mode_init_regs(sd);
4329
		break;
4330
	/* case BRIDGE_OVFX2: nothing to do */
4331
	case BRIDGE_W9968CF:
4332
		w9968cf_mode_init_regs(sd);
4333
		break;
4334 4335
	}

4336
	set_ov_sensor_window(sd);
4337

4338 4339 4340 4341
	if (!(sd->gspca_dev.ctrl_dis & (1 << CONTRAST)))
		setcontrast(gspca_dev);
	if (!(sd->gspca_dev.ctrl_dis & (1 << BRIGHTNESS)))
		setbrightness(gspca_dev);
4342 4343
	if (!(sd->gspca_dev.ctrl_dis & (1 << EXPOSURE)))
		setexposure(gspca_dev);
4344 4345 4346 4347 4348 4349
	if (!(sd->gspca_dev.ctrl_dis & (1 << COLORS)))
		setcolors(gspca_dev);
	if (!(sd->gspca_dev.ctrl_dis & ((1 << HFLIP) | (1 << VFLIP))))
		sethvflip(gspca_dev);
	if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOBRIGHT)))
		setautobright(gspca_dev);
4350 4351
	if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOGAIN)))
		setautogain(gspca_dev);
4352 4353
	if (!(sd->gspca_dev.ctrl_dis & (1 << FREQ)))
		setfreq_i(sd);
4354

4355 4356 4357 4358 4359
	/* Force clear snapshot state in case the snapshot button was
	   pressed while we weren't streaming */
	sd->snapshot_needs_reset = 1;
	sd_reset_snapshot(gspca_dev);

4360 4361
	sd->first_frame = 3;

4362
	ov51x_restart(sd);
4363
	ov51x_led_control(sd, 1);
4364
	return gspca_dev->usb_err;
4365 4366 4367 4368
}

static void sd_stopN(struct gspca_dev *gspca_dev)
{
4369 4370 4371 4372
	struct sd *sd = (struct sd *) gspca_dev;

	ov51x_stop(sd);
	ov51x_led_control(sd, 0);
4373 4374
}

4375 4376 4377 4378
static void sd_stop0(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

4379 4380
	if (!sd->gspca_dev.present)
		return;
4381 4382
	if (sd->bridge == BRIDGE_W9968CF)
		w9968cf_stop0(sd);
4383

4384
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4385 4386 4387 4388 4389 4390 4391
	/* If the last button state is pressed, release it now! */
	if (sd->snapshot_pressed) {
		input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
		input_sync(gspca_dev->input_dev);
		sd->snapshot_pressed = 0;
	}
#endif
4392 4393
	if (sd->bridge == BRIDGE_OV519)
		reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4394 4395
}

4396 4397 4398 4399 4400
static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->snapshot_pressed != state) {
4401
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4402 4403 4404 4405 4406 4407 4408 4409
		input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
		input_sync(gspca_dev->input_dev);
#endif
		if (state)
			sd->snapshot_needs_reset = 1;

		sd->snapshot_pressed = state;
	} else {
4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420
		/* On the ov511 / ov519 we need to reset the button state
		   multiple times, as resetting does not work as long as the
		   button stays pressed */
		switch (sd->bridge) {
		case BRIDGE_OV511:
		case BRIDGE_OV511PLUS:
		case BRIDGE_OV519:
			if (state)
				sd->snapshot_needs_reset = 1;
			break;
		}
4421 4422 4423
	}
}

4424
static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4425 4426
			u8 *in,			/* isoc packet */
			int len)		/* iso packet length */
4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444
{
	struct sd *sd = (struct sd *) gspca_dev;

	/* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
	 * byte non-zero. The EOF packet has image width/height in the
	 * 10th and 11th bytes. The 9th byte is given as follows:
	 *
	 * bit 7: EOF
	 *     6: compression enabled
	 *     5: 422/420/400 modes
	 *     4: 422/420/400 modes
	 *     3: 1
	 *     2: snapshot button on
	 *     1: snapshot frame
	 *     0: even/odd field
	 */
	if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
	    (in[8] & 0x08)) {
4445
		ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456
		if (in[8] & 0x80) {
			/* Frame end */
			if ((in[9] + 1) * 8 != gspca_dev->width ||
			    (in[10] + 1) * 8 != gspca_dev->height) {
				PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
					" requested: %dx%d\n",
					(in[9] + 1) * 8, (in[10] + 1) * 8,
					gspca_dev->width, gspca_dev->height);
				gspca_dev->last_packet_type = DISCARD_PACKET;
				return;
			}
L
Lucas De Marchi 已提交
4457
			/* Add 11 byte footer to frame, might be useful */
4458
			gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4459 4460 4461
			return;
		} else {
			/* Frame start */
4462
			gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4463 4464 4465 4466 4467 4468 4469 4470
			sd->packet_nr = 0;
		}
	}

	/* Ignore the packet number */
	len--;

	/* intermediate packet */
4471
	gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4472 4473
}

4474
static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4475
			u8 *data,			/* isoc packet */
4476 4477
			int len)			/* iso packet length */
{
4478
	struct sd *sd = (struct sd *) gspca_dev;
4479 4480 4481 4482

	/* A false positive here is likely, until OVT gives me
	 * the definitive SOF/EOF format */
	if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4483
		ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4484 4485
		gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
		gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505
		sd->packet_nr = 0;
	}

	if (gspca_dev->last_packet_type == DISCARD_PACKET)
		return;

	/* Does this device use packet numbers ? */
	if (len & 7) {
		len--;
		if (sd->packet_nr == data[len])
			sd->packet_nr++;
		/* The last few packets of the frame (which are all 0's
		   except that they may contain part of the footer), are
		   numbered 0 */
		else if (sd->packet_nr == 0 || data[len]) {
			PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
				(int)data[len], (int)sd->packet_nr);
			gspca_dev->last_packet_type = DISCARD_PACKET;
			return;
		}
4506 4507 4508
	}

	/* intermediate packet */
4509
	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4510 4511 4512
}

static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4513
			u8 *data,			/* isoc packet */
4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530
			int len)			/* iso packet length */
{
	/* Header of ov519 is 16 bytes:
	 *     Byte     Value      Description
	 *	0	0xff	magic
	 *	1	0xff	magic
	 *	2	0xff	magic
	 *	3	0xXX	0x50 = SOF, 0x51 = EOF
	 *	9	0xXX	0x01 initial frame without data,
	 *			0x00 standard frame with image
	 *	14	Lo	in EOF: length of image data / 8
	 *	15	Hi
	 */

	if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
		switch (data[3]) {
		case 0x50:		/* start of frame */
4531 4532 4533
			/* Don't check the button state here, as the state
			   usually (always ?) changes at EOF and checking it
			   here leads to unnecessary snapshot state resets. */
4534 4535 4536 4537 4538
#define HDRSZ 16
			data += HDRSZ;
			len -= HDRSZ;
#undef HDRSZ
			if (data[0] == 0xff || data[1] == 0xd8)
4539
				gspca_frame_add(gspca_dev, FIRST_PACKET,
4540 4541 4542 4543 4544
						data, len);
			else
				gspca_dev->last_packet_type = DISCARD_PACKET;
			return;
		case 0x51:		/* end of frame */
4545
			ov51x_handle_button(gspca_dev, data[11] & 1);
4546 4547
			if (data[9] != 0)
				gspca_dev->last_packet_type = DISCARD_PACKET;
4548 4549
			gspca_frame_add(gspca_dev, LAST_PACKET,
					NULL, 0);
4550 4551 4552 4553 4554
			return;
		}
	}

	/* intermediate packet */
4555
	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4556 4557
}

4558
static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4559
			u8 *data,			/* isoc packet */
4560 4561
			int len)			/* iso packet length */
{
4562 4563 4564 4565
	struct sd *sd = (struct sd *) gspca_dev;

	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);

4566
	/* A short read signals EOF */
4567
	if (len < gspca_dev->cam.bulk_size) {
4568 4569 4570 4571
		/* If the frame is short, and it is one of the first ones
		   the sensor and bridge are still syncing, so drop it. */
		if (sd->first_frame) {
			sd->first_frame--;
4572 4573
			if (gspca_dev->image_len <
				  sd->gspca_dev.width * sd->gspca_dev.height)
4574 4575 4576
				gspca_dev->last_packet_type = DISCARD_PACKET;
		}
		gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4577
		gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4578 4579 4580
	}
}

4581
static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4582
			u8 *data,			/* isoc packet */
4583 4584 4585 4586 4587 4588 4589
			int len)			/* iso packet length */
{
	struct sd *sd = (struct sd *) gspca_dev;

	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
4590
		ov511_pkt_scan(gspca_dev, data, len);
4591 4592 4593
		break;
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
4594
		ov518_pkt_scan(gspca_dev, data, len);
4595 4596
		break;
	case BRIDGE_OV519:
4597
		ov519_pkt_scan(gspca_dev, data, len);
4598
		break;
4599
	case BRIDGE_OVFX2:
4600
		ovfx2_pkt_scan(gspca_dev, data, len);
4601
		break;
4602
	case BRIDGE_W9968CF:
4603
		w9968cf_pkt_scan(gspca_dev, data, len);
4604
		break;
4605 4606 4607
	}
}

4608 4609 4610 4611 4612 4613
/* -- management routines -- */

static void setbrightness(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;
4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629
	static const struct ov_i2c_regvals brit_7660[][7] = {
		{{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
			{0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
		{{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
			{0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
		{{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
			{0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
		{{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
			{0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
		{{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
			{0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
		{{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
			{0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
		{{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
			{0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
	};
4630

4631
	val = sd->ctrls[BRIGHTNESS].val;
4632 4633 4634 4635 4636 4637
	switch (sd->sensor) {
	case SEN_OV8610:
	case SEN_OV7610:
	case SEN_OV76BE:
	case SEN_OV6620:
	case SEN_OV6630:
4638
	case SEN_OV66308AF:
4639
	case SEN_OV7640:
4640
	case SEN_OV7648:
4641 4642 4643
		i2c_w(sd, OV7610_REG_BRT, val);
		break;
	case SEN_OV7620:
4644
	case SEN_OV7620AE:
4645
		/* 7620 doesn't like manual changes when in auto mode */
4646
		if (!sd->ctrls[AUTOBRIGHT].val)
4647 4648
			i2c_w(sd, OV7610_REG_BRT, val);
		break;
4649 4650 4651 4652
	case SEN_OV7660:
		write_i2c_regvals(sd, brit_7660[val],
				ARRAY_SIZE(brit_7660[0]));
		break;
4653
	case SEN_OV7670:
4654
/*win trace
4655 4656
 *		i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
		i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4657 4658 4659 4660 4661 4662 4663 4664
		break;
	}
}

static void setcontrast(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;
4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721 4722
	static const struct ov_i2c_regvals contrast_7660[][31] = {
		{{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
		 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
		 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
		 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
		 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
		 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
		 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
		 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
		{{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
		 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
		 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
		 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
		 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
		 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
		 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
		 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
		{{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
		 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
		 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
		 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
		 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
		 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
		 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
		 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
		{{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
		 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
		 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
		 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
		 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
		 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
		 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
		 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
		{{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
		 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
		 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
		 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
		 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
		 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
		 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
		 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
		{{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
		 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
		 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
		 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
		 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
		 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
		 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
		 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
		{{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
		 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
		 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
		 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
		 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
		 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
		 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
		 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
	};
4723

4724
	val = sd->ctrls[CONTRAST].val;
4725 4726 4727 4728 4729 4730
	switch (sd->sensor) {
	case SEN_OV7610:
	case SEN_OV6620:
		i2c_w(sd, OV7610_REG_CNT, val);
		break;
	case SEN_OV6630:
4731
	case SEN_OV66308AF:
4732
		i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4733
		break;
4734
	case SEN_OV8610: {
4735
		static const u8 ctab[] = {
4736 4737 4738 4739 4740 4741 4742
			0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
		};

		/* Use Y gamma control instead. Bit 0 enables it. */
		i2c_w(sd, 0x64, ctab[val >> 5]);
		break;
	    }
4743 4744
	case SEN_OV7620:
	case SEN_OV7620AE: {
4745
		static const u8 ctab[] = {
4746 4747 4748 4749 4750 4751 4752 4753
			0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
			0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
		};

		/* Use Y gamma control instead. Bit 0 enables it. */
		i2c_w(sd, 0x64, ctab[val >> 4]);
		break;
	    }
4754 4755 4756 4757
	case SEN_OV7660:
		write_i2c_regvals(sd, contrast_7660[val],
					ARRAY_SIZE(contrast_7660[0]));
		break;
4758 4759
	case SEN_OV7670:
		/* check that this isn't just the same as ov7610 */
4760
		i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4761 4762 4763 4764
		break;
	}
}

4765 4766 4767 4768 4769 4770 4771 4772
static void setexposure(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (!sd->ctrls[AUTOGAIN].val)
		i2c_w(sd, 0x10, sd->ctrls[EXPOSURE].val);
}

4773 4774 4775 4776
static void setcolors(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;
4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788
	static const struct ov_i2c_regvals colors_7660[][6] = {
		{{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
		 {0x53, 0x19}, {0x54, 0x23}},
		{{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
		 {0x53, 0x2c}, {0x54, 0x3e}},
		{{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
		 {0x53, 0x40}, {0x54, 0x59}},
		{{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
		 {0x53, 0x53}, {0x54, 0x73}},
		{{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
		 {0x53, 0x66}, {0x54, 0x8e}},
	};
4789

4790
	val = sd->ctrls[COLORS].val;
4791 4792 4793 4794 4795 4796
	switch (sd->sensor) {
	case SEN_OV8610:
	case SEN_OV7610:
	case SEN_OV76BE:
	case SEN_OV6620:
	case SEN_OV6630:
4797
	case SEN_OV66308AF:
4798 4799 4800
		i2c_w(sd, OV7610_REG_SAT, val);
		break;
	case SEN_OV7620:
4801
	case SEN_OV7620AE:
4802 4803 4804 4805 4806 4807 4808
		/* Use UV gamma control instead. Bits 0 & 7 are reserved. */
/*		rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
		if (rc < 0)
			goto out; */
		i2c_w(sd, OV7610_REG_SAT, val);
		break;
	case SEN_OV7640:
4809
	case SEN_OV7648:
4810 4811
		i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
		break;
4812 4813 4814 4815
	case SEN_OV7660:
		write_i2c_regvals(sd, colors_7660[val],
					ARRAY_SIZE(colors_7660[0]));
		break;
4816 4817 4818 4819 4820 4821 4822 4823
	case SEN_OV7670:
		/* supported later once I work out how to do it
		 * transparently fail now! */
		/* set REG_COM13 values for UV sat auto mode */
		break;
	}
}

4824
static void setautobright(struct gspca_dev *gspca_dev)
4825
{
4826 4827 4828
	struct sd *sd = (struct sd *) gspca_dev;

	i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4829 4830
}

4831 4832 4833 4834 4835 4836 4837 4838 4839 4840 4841 4842 4843 4844 4845 4846
static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
{
	struct sd *sd = (struct sd *) gspca_dev;

	sd->ctrls[AUTOGAIN].val = val;
	if (val) {
		gspca_dev->ctrl_inac |= (1 << EXPOSURE);
	} else {
		gspca_dev->ctrl_inac &= ~(1 << EXPOSURE);
		sd->ctrls[EXPOSURE].val = i2c_r(sd, 0x10);
	}
	if (gspca_dev->streaming)
		setautogain(gspca_dev);
	return gspca_dev->usb_err;
}

4847
static void setfreq_i(struct sd *sd)
4848
{
4849 4850
	if (sd->sensor == SEN_OV7660
	 || sd->sensor == SEN_OV7670) {
4851
		switch (sd->ctrls[FREQ].val) {
4852
		case 0: /* Banding filter disabled */
4853
			i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4854 4855
			break;
		case 1: /* 50 hz */
4856
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4857
				   OV7670_COM8_BFILT);
4858
			i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4859 4860
			break;
		case 2: /* 60 hz */
4861
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4862
				   OV7670_COM8_BFILT);
4863
			i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4864
			break;
4865 4866
		case 3: /* Auto hz - ov7670 only */
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4867
				   OV7670_COM8_BFILT);
4868
			i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4869 4870 4871 4872
				   0x18);
			break;
		}
	} else {
4873
		switch (sd->ctrls[FREQ].val) {
4874 4875 4876 4877 4878 4879 4880 4881 4882
		case 0: /* Banding filter disabled */
			i2c_w_mask(sd, 0x2d, 0x00, 0x04);
			i2c_w_mask(sd, 0x2a, 0x00, 0x80);
			break;
		case 1: /* 50 hz (filter on and framerate adj) */
			i2c_w_mask(sd, 0x2d, 0x04, 0x04);
			i2c_w_mask(sd, 0x2a, 0x80, 0x80);
			/* 20 fps -> 16.667 fps */
			if (sd->sensor == SEN_OV6620 ||
4883 4884
			    sd->sensor == SEN_OV6630 ||
			    sd->sensor == SEN_OV66308AF)
4885 4886 4887 4888 4889 4890 4891
				i2c_w(sd, 0x2b, 0x5e);
			else
				i2c_w(sd, 0x2b, 0xac);
			break;
		case 2: /* 60 hz (filter on, ...) */
			i2c_w_mask(sd, 0x2d, 0x04, 0x04);
			if (sd->sensor == SEN_OV6620 ||
4892 4893
			    sd->sensor == SEN_OV6630 ||
			    sd->sensor == SEN_OV66308AF) {
4894 4895 4896 4897 4898 4899 4900 4901 4902 4903 4904
				/* 20 fps -> 15 fps */
				i2c_w_mask(sd, 0x2a, 0x80, 0x80);
				i2c_w(sd, 0x2b, 0xa8);
			} else {
				/* no framerate adj. */
				i2c_w_mask(sd, 0x2a, 0x00, 0x80);
			}
			break;
		}
	}
}
4905
static void setfreq(struct gspca_dev *gspca_dev)
4906 4907 4908
{
	struct sd *sd = (struct sd *) gspca_dev;

4909
	setfreq_i(sd);
4910

4911 4912 4913
	/* Ugly but necessary */
	if (sd->bridge == BRIDGE_W9968CF)
		w9968cf_set_crop_window(sd);
4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944
}

static int sd_querymenu(struct gspca_dev *gspca_dev,
			struct v4l2_querymenu *menu)
{
	struct sd *sd = (struct sd *) gspca_dev;

	switch (menu->id) {
	case V4L2_CID_POWER_LINE_FREQUENCY:
		switch (menu->index) {
		case 0:		/* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
			strcpy((char *) menu->name, "NoFliker");
			return 0;
		case 1:		/* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
			strcpy((char *) menu->name, "50 Hz");
			return 0;
		case 2:		/* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
			strcpy((char *) menu->name, "60 Hz");
			return 0;
		case 3:
			if (sd->sensor != SEN_OV7670)
				return -EINVAL;

			strcpy((char *) menu->name, "Automatic");
			return 0;
		}
		break;
	}
	return -EINVAL;
}

4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983
static int sd_get_jcomp(struct gspca_dev *gspca_dev,
			struct v4l2_jpegcompression *jcomp)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->bridge != BRIDGE_W9968CF)
		return -EINVAL;

	memset(jcomp, 0, sizeof *jcomp);
	jcomp->quality = sd->quality;
	jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
			      V4L2_JPEG_MARKER_DRI;
	return 0;
}

static int sd_set_jcomp(struct gspca_dev *gspca_dev,
			struct v4l2_jpegcompression *jcomp)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->bridge != BRIDGE_W9968CF)
		return -EINVAL;

	if (gspca_dev->streaming)
		return -EBUSY;

	if (jcomp->quality < QUALITY_MIN)
		sd->quality = QUALITY_MIN;
	else if (jcomp->quality > QUALITY_MAX)
		sd->quality = QUALITY_MAX;
	else
		sd->quality = jcomp->quality;

	/* Return resulting jcomp params to app */
	sd_get_jcomp(gspca_dev, jcomp);

	return 0;
}

4984
/* sub-driver description */
4985
static const struct sd_desc sd_desc = {
4986 4987 4988 4989
	.name = MODULE_NAME,
	.ctrls = sd_ctrls,
	.nctrls = ARRAY_SIZE(sd_ctrls),
	.config = sd_config,
4990
	.init = sd_init,
4991
	.isoc_init = sd_isoc_init,
4992 4993
	.start = sd_start,
	.stopN = sd_stopN,
4994
	.stop0 = sd_stop0,
4995
	.pkt_scan = sd_pkt_scan,
4996
	.dq_callback = sd_reset_snapshot,
4997
	.querymenu = sd_querymenu,
4998 4999
	.get_jcomp = sd_get_jcomp,
	.set_jcomp = sd_set_jcomp,
5000
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
5001 5002
	.other_input = 1,
#endif
5003 5004 5005
};

/* -- module initialisation -- */
5006
static const struct usb_device_id device_table[] = {
5007
	{USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
5008 5009 5010 5011
	{USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
5012
	{USB_DEVICE(0x041e, 0x4064),
5013
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5014
	{USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
5015
	{USB_DEVICE(0x041e, 0x4068),
5016
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5017 5018
	{USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
5019
	{USB_DEVICE(0x054c, 0x0155),
5020
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5021
	{USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
5022 5023 5024
	{USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
	{USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
5025
	{USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
5026 5027
	{USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
5028
	{USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
5029
	{USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
5030
	{USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
5031 5032
	{USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
	{USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
5033
	{USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
5034
	{USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
5035 5036
	{}
};
5037

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MODULE_DEVICE_TABLE(usb, device_table);

/* -- device connect -- */
static int sd_probe(struct usb_interface *intf,
			const struct usb_device_id *id)
{
	return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
				THIS_MODULE);
}

static struct usb_driver sd_driver = {
	.name = MODULE_NAME,
	.id_table = device_table,
	.probe = sd_probe,
	.disconnect = gspca_disconnect,
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#ifdef CONFIG_PM
	.suspend = gspca_suspend,
	.resume = gspca_resume,
#endif
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};

/* -- module insert / remove -- */
static int __init sd_mod_init(void)
{
5062
	return usb_register(&sd_driver);
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}
static void __exit sd_mod_exit(void)
{
	usb_deregister(&sd_driver);
}

module_init(sd_mod_init);
module_exit(sd_mod_exit);

module_param(frame_rate, int, 0644);
MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");