ov519.c 115.9 KB
Newer Older
1 2 3 4
/**
 * OV519 driver
 *
 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5
 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6
 *
7 8 9 10 11
 * This module is adapted from the ov51x-jpeg package, which itself
 * was adapted from the ov511 driver.
 *
 * Original copyright for the ov511 driver is:
 *
12
 * Copyright (c) 1999-2006 Mark W. McClelland
13
 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 15 16 17
 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 19 20 21 22
 *
 * ov51x-jpeg original copyright is:
 *
 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 */
#define MODULE_NAME "ov519"

41
#include <linux/input.h>
42 43
#include "gspca.h"

44 45 46 47 48
/* The jpeg_hdr is used by w996Xcf only */
/* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
#define CONEX_CAM
#include "jpeg.h"

49 50 51 52 53 54 55 56 57 58 59
MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
MODULE_DESCRIPTION("OV519 USB Camera Driver");
MODULE_LICENSE("GPL");

/* global parameters */
static int frame_rate;

/* Number of times to retry a failed I2C transaction. Increase this if you
 * are getting "Failed to read sensor ID..." */
static int i2c_detect_tries = 10;

60 61 62 63 64 65 66 67 68 69 70 71
/* controls */
enum e_ctrl {
	BRIGHTNESS,
	CONTRAST,
	COLORS,
	HFLIP,
	VFLIP,
	AUTOBRIGHT,
	FREQ,
	NCTRL		/* number of controls */
};

72 73 74 75
/* ov519 device descriptor */
struct sd {
	struct gspca_dev gspca_dev;		/* !! must be the first item */

76 77
	struct gspca_ctrl ctrls[NCTRL];

78
	u8 packet_nr;
79

80 81 82 83 84 85
	char bridge;
#define BRIDGE_OV511		0
#define BRIDGE_OV511PLUS	1
#define BRIDGE_OV518		2
#define BRIDGE_OV518PLUS	3
#define BRIDGE_OV519		4
86
#define BRIDGE_OVFX2		5
87
#define BRIDGE_W9968CF		6
88 89 90 91
#define BRIDGE_MASK		7

	char invert_led;
#define BRIDGE_INVERT_LED	8
92

93 94 95
	char snapshot_pressed;
	char snapshot_needs_reset;

96
	/* Determined by sensor type */
97
	u8 sif;
98

99
	u8 quality;
100 101 102
#define QUALITY_MIN 50
#define QUALITY_MAX 70
#define QUALITY_DEF 50
103

104 105
	u8 stopped;		/* Streaming is temporarily paused */
	u8 first_frame;
106

107 108
	u8 frame_rate;		/* current Framerate */
	u8 clockdiv;		/* clockdiv override */
109

110
	s8 sensor;		/* Type of image sensor chip (SEN_*) */
111 112

	u8 sensor_addr;
113 114 115
	u16 sensor_width;
	u16 sensor_height;
	s16 sensor_reg_cache[256];
116

117
	u8 jpeg_hdr[JPEG_HDR_SZ];
118
};
119 120 121 122 123 124 125 126 127 128 129 130 131 132 133
enum sensors {
	SEN_OV2610,
	SEN_OV3610,
	SEN_OV6620,
	SEN_OV6630,
	SEN_OV66308AF,
	SEN_OV7610,
	SEN_OV7620,
	SEN_OV7620AE,
	SEN_OV7640,
	SEN_OV7648,
	SEN_OV7670,
	SEN_OV76BE,
	SEN_OV8610,
};
134

135 136 137 138 139
/* Note this is a bit of a hack, but the w9968cf driver needs the code for all
   the ov sensors which is already present here. When we have the time we
   really should move the sensor drivers to v4l2 sub drivers. */
#include "w996Xcf.c"

140
/* V4L2 controls supported by the driver */
141 142 143
static void setbrightness(struct gspca_dev *gspca_dev);
static void setcontrast(struct gspca_dev *gspca_dev);
static void setcolors(struct gspca_dev *gspca_dev);
144 145 146 147
static void sethvflip(struct gspca_dev *gspca_dev);
static void setautobright(struct gspca_dev *gspca_dev);
static void setfreq(struct gspca_dev *gspca_dev);
static void setfreq_i(struct sd *sd);
148

149
static const struct ctrl sd_ctrls[] = {
150
[BRIGHTNESS] = {
151 152 153 154 155 156 157
	    {
		.id      = V4L2_CID_BRIGHTNESS,
		.type    = V4L2_CTRL_TYPE_INTEGER,
		.name    = "Brightness",
		.minimum = 0,
		.maximum = 255,
		.step    = 1,
158
		.default_value = 127,
159
	    },
160
	    .set_control = setbrightness,
161
	},
162
[CONTRAST] = {
163 164 165 166 167 168 169
	    {
		.id      = V4L2_CID_CONTRAST,
		.type    = V4L2_CTRL_TYPE_INTEGER,
		.name    = "Contrast",
		.minimum = 0,
		.maximum = 255,
		.step    = 1,
170
		.default_value = 127,
171
	    },
172
	    .set_control = setcontrast,
173
	},
174
[COLORS] = {
175 176 177
	    {
		.id      = V4L2_CID_SATURATION,
		.type    = V4L2_CTRL_TYPE_INTEGER,
178
		.name    = "Color",
179 180 181
		.minimum = 0,
		.maximum = 255,
		.step    = 1,
182
		.default_value = 127,
183
	    },
184
	    .set_control = setcolors,
185
	},
186
/* The flip controls work with ov7670 only */
187
[HFLIP] = {
188 189 190 191 192 193 194
	    {
		.id      = V4L2_CID_HFLIP,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Mirror",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
195
		.default_value = 0,
196
	    },
197
	    .set_control = sethvflip,
198
	},
199
[VFLIP] = {
200 201 202 203 204 205 206
	    {
		.id      = V4L2_CID_VFLIP,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Vflip",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
207
		.default_value = 0,
208
	    },
209
	    .set_control = sethvflip,
210
	},
211
[AUTOBRIGHT] = {
212 213 214 215 216 217 218
	    {
		.id      = V4L2_CID_AUTOBRIGHTNESS,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Auto Brightness",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
219
		.default_value = 1,
220
	    },
221
	    .set_control = setautobright,
222
	},
223
[FREQ] = {
224 225 226 227 228
	    {
		.id	 = V4L2_CID_POWER_LINE_FREQUENCY,
		.type    = V4L2_CTRL_TYPE_MENU,
		.name    = "Light frequency filter",
		.minimum = 0,
229
		.maximum = 2,	/* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
230
		.step    = 1,
231
		.default_value = 0,
232
	    },
233
	    .set_control = setfreq,
234
	},
235 236
};

237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281
/* table of the disabled controls */
static const unsigned ctrl_dis[] = {
[SEN_OV2610] =		(1 << NCTRL) - 1,	/* no control */

[SEN_OV3610] =		(1 << NCTRL) - 1,	/* no control */

[SEN_OV6620] =		(1 << HFLIP) |
			(1 << VFLIP),

[SEN_OV6630] =		(1 << HFLIP) |
			(1 << VFLIP),

[SEN_OV66308AF] =	(1 << HFLIP) |
			(1 << VFLIP),

[SEN_OV7610] =		(1 << HFLIP) |
			(1 << VFLIP),

[SEN_OV7620] =		(1 << HFLIP) |
			(1 << VFLIP),

[SEN_OV7620AE] =	(1 << HFLIP) |
			(1 << VFLIP),

[SEN_OV7640] =		(1 << HFLIP) |
			(1 << VFLIP) |
			(1 << AUTOBRIGHT) |
			(1 << CONTRAST),

[SEN_OV7648] =		(1 << HFLIP) |
			(1 << VFLIP) |
			(1 << AUTOBRIGHT) |
			(1 << CONTRAST),

[SEN_OV7670] =		(1 << COLORS) |
			(1 << AUTOBRIGHT),

[SEN_OV76BE] =		(1 << HFLIP) |
			(1 << VFLIP),

[SEN_OV8610] =		(1 << HFLIP) |
			(1 << VFLIP) |
			(1 << FREQ),
};

282
static const struct v4l2_pix_format ov519_vga_mode[] = {
283 284
	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 320,
285
		.sizeimage = 320 * 240 * 3 / 8 + 590,
286 287 288 289 290 291 292
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
293
};
294
static const struct v4l2_pix_format ov519_sif_mode[] = {
295 296 297 298 299
	{160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 160,
		.sizeimage = 160 * 120 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
300 301
	{176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 176,
302
		.sizeimage = 176 * 144 * 3 / 8 + 590,
303 304
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
305 306 307 308 309
	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
310 311
	{352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 352,
312
		.sizeimage = 352 * 288 * 3 / 8 + 590,
313 314
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
315 316
};

317 318 319 320 321 322
/* Note some of the sizeimage values for the ov511 / ov518 may seem
   larger then necessary, however they need to be this big as the ov511 /
   ov518 always fills the entire isoc frame, using 0 padding bytes when
   it doesn't have any data. So with low framerates the amount of data
   transfered can become quite large (libv4l will remove all the 0 padding
   in userspace). */
323 324 325
static const struct v4l2_pix_format ov518_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 320,
326
		.sizeimage = 320 * 240 * 3,
327 328 329 330
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 640,
331
		.sizeimage = 640 * 480 * 2,
332 333 334 335
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
static const struct v4l2_pix_format ov518_sif_mode[] = {
336 337
	{160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 160,
338
		.sizeimage = 70000,
339 340
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
341 342
	{176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 176,
343
		.sizeimage = 70000,
344 345
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
346 347
	{320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 320,
348
		.sizeimage = 320 * 240 * 3,
349 350
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
351 352
	{352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 352,
353
		.sizeimage = 352 * 288 * 3,
354 355 356 357
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};

358 359 360 361 362 363 364 365 366 367 368 369 370 371 372
static const struct v4l2_pix_format ov511_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480 * 2,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
static const struct v4l2_pix_format ov511_sif_mode[] = {
	{160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 160,
373
		.sizeimage = 70000,
374 375 376 377
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
	{176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 176,
378
		.sizeimage = 70000,
379 380 381 382 383 384 385 386 387 388 389 390 391
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
	{352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 352,
		.sizeimage = 352 * 288 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
392

393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436
static const struct v4l2_pix_format ovfx2_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
};
static const struct v4l2_pix_format ovfx2_cif_mode[] = {
	{160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 160,
		.sizeimage = 160 * 120,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 3},
	{176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 176,
		.sizeimage = 176 * 144,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 2},
	{352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 352,
		.sizeimage = 352 * 288,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
};
static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
	{1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1600,
		.sizeimage = 1600 * 1200,
		.colorspace = V4L2_COLORSPACE_SRGB},
};
static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480,
437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 800,
		.sizeimage = 800 * 600,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1024,
		.sizeimage = 1024 * 768,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1600,
		.sizeimage = 1600 * 1200,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
	{2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 2048,
		.sizeimage = 2048 * 1536,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
459 460
};

461
/* Registers common to OV511 / OV518 */
462
#define R51x_FIFO_PSIZE			0x30	/* 2 bytes wide w/ OV518(+) */
463
#define R51x_SYS_RESET			0x50
464 465
	/* Reset type flags */
	#define	OV511_RESET_OMNICE	0x08
466
#define R51x_SYS_INIT			0x53
467
#define R51x_SYS_SNAP			0x52
468
#define R51x_SYS_CUST_ID		0x5f
469 470 471
#define R51x_COMP_LUT_BEGIN		0x80

/* OV511 Camera interface register numbers */
472 473 474 475 476 477 478 479 480 481 482
#define R511_CAM_DELAY			0x10
#define R511_CAM_EDGE			0x11
#define R511_CAM_PXCNT			0x12
#define R511_CAM_LNCNT			0x13
#define R511_CAM_PXDIV			0x14
#define R511_CAM_LNDIV			0x15
#define R511_CAM_UV_EN			0x16
#define R511_CAM_LINE_MODE		0x17
#define R511_CAM_OPTS			0x18

#define R511_SNAP_FRAME			0x19
483 484 485 486 487 488 489
#define R511_SNAP_PXCNT			0x1a
#define R511_SNAP_LNCNT			0x1b
#define R511_SNAP_PXDIV			0x1c
#define R511_SNAP_LNDIV			0x1d
#define R511_SNAP_UV_EN			0x1e
#define R511_SNAP_UV_EN			0x1e
#define R511_SNAP_OPTS			0x1f
490 491 492 493

#define R511_DRAM_FLOW_CTL		0x20
#define R511_FIFO_OPTS			0x31
#define R511_I2C_CTL			0x40
494
#define R511_SYS_LED_CTL		0x55	/* OV511+ only */
495 496
#define R511_COMP_EN			0x78
#define R511_COMP_LUT_EN		0x79
497 498 499 500 501

/* OV518 Camera interface register numbers */
#define R518_GPIO_OUT			0x56	/* OV518(+) only */
#define R518_GPIO_CTL			0x57	/* OV518(+) only */

502
/* OV519 Camera interface register numbers */
503 504 505 506 507 508 509 510 511
#define OV519_R10_H_SIZE		0x10
#define OV519_R11_V_SIZE		0x11
#define OV519_R12_X_OFFSETL		0x12
#define OV519_R13_X_OFFSETH		0x13
#define OV519_R14_Y_OFFSETL		0x14
#define OV519_R15_Y_OFFSETH		0x15
#define OV519_R16_DIVIDER		0x16
#define OV519_R20_DFR			0x20
#define OV519_R25_FORMAT		0x25
512 513

/* OV519 System Controller register numbers */
514 515
#define OV519_R51_RESET1		0x51
#define OV519_R54_EN_CLK1		0x54
516 517 518 519

#define OV519_GPIO_DATA_OUT0		0x71
#define OV519_GPIO_IO_CTRL0		0x72

520
/*#define OV511_ENDPOINT_ADDRESS 1	 * Isoc endpoint number */
521

522 523 524
/*
 * The FX2 chip does not give us a zero length read at end of frame.
 * It does, however, give a short read at the end of a frame, if
D
Daniel Mack 已提交
525
 * necessary, rather than run two frames together.
526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545
 *
 * By choosing the right bulk transfer size, we are guaranteed to always
 * get a short read for the last read of each frame.  Frame sizes are
 * always a composite number (width * height, or a multiple) so if we
 * choose a prime number, we are guaranteed that the last read of a
 * frame will be short.
 *
 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 * to figure out why.  [PMiller]
 *
 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 *
 * It isn't enough to know the number of bytes per frame, in case we
 * have data dropouts or buffer overruns (even though the FX2 double
 * buffers, there are some pretty strict real time constraints for
 * isochronous transfer for larger frame sizes).
 */
#define OVFX2_BULK_SIZE (13 * 4096)

546 547 548 549 550 551 552
/* I2C registers */
#define R51x_I2C_W_SID		0x41
#define R51x_I2C_SADDR_3	0x42
#define R51x_I2C_SADDR_2	0x43
#define R51x_I2C_R_SID		0x44
#define R51x_I2C_DATA		0x45
#define R518_I2C_CTL		0x47	/* OV518(+) only */
553
#define OVFX2_I2C_ADDR		0x00
554 555 556

/* I2C ADDRESSES */
#define OV7xx0_SID   0x42
557
#define OV_HIRES_SID 0x60		/* OV9xxx / OV2xxx / OV3xxx */
558 559 560 561 562
#define OV8xx0_SID   0xa0
#define OV6xx0_SID   0xc0

/* OV7610 registers */
#define OV7610_REG_GAIN		0x00	/* gain setting (5:0) */
563 564
#define OV7610_REG_BLUE		0x01	/* blue channel balance */
#define OV7610_REG_RED		0x02	/* red channel balance */
565 566 567 568 569 570 571 572 573 574
#define OV7610_REG_SAT		0x03	/* saturation */
#define OV8610_REG_HUE		0x04	/* 04 reserved */
#define OV7610_REG_CNT		0x05	/* Y contrast */
#define OV7610_REG_BRT		0x06	/* Y brightness */
#define OV7610_REG_COM_C	0x14	/* misc common regs */
#define OV7610_REG_ID_HIGH	0x1c	/* manufacturer ID MSB */
#define OV7610_REG_ID_LOW	0x1d	/* manufacturer ID LSB */
#define OV7610_REG_COM_I	0x29	/* misc settings */

/* OV7670 registers */
575 576 577 578 579 580 581 582 583 584 585 586 587
#define OV7670_R00_GAIN		0x00	/* Gain lower 8 bits (rest in vref) */
#define OV7670_R01_BLUE		0x01	/* blue gain */
#define OV7670_R02_RED		0x02	/* red gain */
#define OV7670_R03_VREF		0x03	/* Pieces of GAIN, VSTART, VSTOP */
#define OV7670_R04_COM1		0x04	/* Control 1 */
/*#define OV7670_R07_AECHH	0x07	 * AEC MS 5 bits */
#define OV7670_R0C_COM3		0x0c	/* Control 3 */
#define OV7670_R0D_COM4		0x0d	/* Control 4 */
#define OV7670_R0E_COM5		0x0e	/* All "reserved" */
#define OV7670_R0F_COM6		0x0f	/* Control 6 */
#define OV7670_R10_AECH		0x10	/* More bits of AEC value */
#define OV7670_R11_CLKRC	0x11	/* Clock control */
#define OV7670_R12_COM7		0x12	/* Control 7 */
588 589 590 591 592
#define   OV7670_COM7_FMT_VGA	 0x00
/*#define   OV7670_COM7_YUV	 0x00	 * YUV */
#define   OV7670_COM7_FMT_QVGA	 0x10	/* QVGA format */
#define   OV7670_COM7_FMT_MASK	 0x38
#define   OV7670_COM7_RESET	 0x80	/* Register reset */
593
#define OV7670_R13_COM8		0x13	/* Control 8 */
594 595 596 597 598 599
#define   OV7670_COM8_AEC	 0x01	/* Auto exposure enable */
#define   OV7670_COM8_AWB	 0x02	/* White balance enable */
#define   OV7670_COM8_AGC	 0x04	/* Auto gain enable */
#define   OV7670_COM8_BFILT	 0x20	/* Band filter enable */
#define   OV7670_COM8_AECSTEP	 0x40	/* Unlimited AEC step size */
#define   OV7670_COM8_FASTAEC	 0x80	/* Enable fast AGC/AEC */
600 601 602 603 604 605 606
#define OV7670_R14_COM9		0x14	/* Control 9 - gain ceiling */
#define OV7670_R15_COM10	0x15	/* Control 10 */
#define OV7670_R17_HSTART	0x17	/* Horiz start high bits */
#define OV7670_R18_HSTOP	0x18	/* Horiz stop high bits */
#define OV7670_R19_VSTART	0x19	/* Vert start high bits */
#define OV7670_R1A_VSTOP	0x1a	/* Vert stop high bits */
#define OV7670_R1E_MVFP		0x1e	/* Mirror / vflip */
607 608
#define   OV7670_MVFP_VFLIP	 0x10	/* vertical flip */
#define   OV7670_MVFP_MIRROR	 0x20	/* Mirror image */
609 610 611 612 613 614
#define OV7670_R24_AEW		0x24	/* AGC upper limit */
#define OV7670_R25_AEB		0x25	/* AGC lower limit */
#define OV7670_R26_VPT		0x26	/* AGC/AEC fast mode op region */
#define OV7670_R32_HREF		0x32	/* HREF pieces */
#define OV7670_R3A_TSLB		0x3a	/* lots of stuff */
#define OV7670_R3B_COM11	0x3b	/* Control 11 */
615 616
#define   OV7670_COM11_EXP	 0x02
#define   OV7670_COM11_HZAUTO	 0x10	/* Auto detect 50/60 Hz */
617 618
#define OV7670_R3C_COM12	0x3c	/* Control 12 */
#define OV7670_R3D_COM13	0x3d	/* Control 13 */
619 620
#define   OV7670_COM13_GAMMA	 0x80	/* Gamma enable */
#define   OV7670_COM13_UVSAT	 0x40	/* UV saturation auto adjustment */
621 622 623
#define OV7670_R3E_COM14	0x3e	/* Control 14 */
#define OV7670_R3F_EDGE		0x3f	/* Edge enhancement factor */
#define OV7670_R40_COM15	0x40	/* Control 15 */
624
/*#define   OV7670_COM15_R00FF	 0xc0	 *	00 to FF */
625
#define OV7670_R41_COM16	0x41	/* Control 16 */
626
#define   OV7670_COM16_AWBGAIN	 0x08	/* AWB gain enable */
627 628 629 630 631 632 633 634 635 636 637 638 639
#define OV7670_R55_BRIGHT	0x55	/* Brightness */
#define OV7670_R56_CONTRAS	0x56	/* Contrast control */
#define OV7670_R69_GFIX		0x69	/* Fix gain control */
/*#define OV7670_R8C_RGB444	0x8c	 * RGB 444 control */
#define OV7670_R9F_HAECC1	0x9f	/* Hist AEC/AGC control 1 */
#define OV7670_RA0_HAECC2	0xa0	/* Hist AEC/AGC control 2 */
#define OV7670_RA5_BD50MAX	0xa5	/* 50hz banding step limit */
#define OV7670_RA6_HAECC3	0xa6	/* Hist AEC/AGC control 3 */
#define OV7670_RA7_HAECC4	0xa7	/* Hist AEC/AGC control 4 */
#define OV7670_RA8_HAECC5	0xa8	/* Hist AEC/AGC control 5 */
#define OV7670_RA9_HAECC6	0xa9	/* Hist AEC/AGC control 6 */
#define OV7670_RAA_HAECC7	0xaa	/* Hist AEC/AGC control 7 */
#define OV7670_RAB_BD60MAX	0xab	/* 60hz banding step limit */
640

641
struct ov_regvals {
642 643
	u8 reg;
	u8 val;
644 645
};
struct ov_i2c_regvals {
646 647
	u8 reg;
	u8 val;
648 649
};

650
/* Settings for OV2610 camera chip */
651
static const struct ov_i2c_regvals norm_2610[] = {
652
	{ 0x12, 0x80 },	/* reset */
653 654
};

655
static const struct ov_i2c_regvals norm_3620b[] = {
656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696
	/*
	 * From the datasheet: "Note that after writing to register COMH
	 * (0x12) to change the sensor mode, registers related to the
	 * sensor’s cropping window will be reset back to their default
	 * values."
	 *
	 * "wait 4096 external clock ... to make sure the sensor is
	 * stable and ready to access registers" i.e. 160us at 24MHz
	 */
	{ 0x12, 0x80 }, /* COMH reset */
	{ 0x12, 0x00 }, /* QXGA, master */

	/*
	 * 11 CLKRC "Clock Rate Control"
	 * [7] internal frequency doublers: on
	 * [6] video port mode: master
	 * [5:0] clock divider: 1
	 */
	{ 0x11, 0x80 },

	/*
	 * 13 COMI "Common Control I"
	 *                  = 192 (0xC0) 11000000
	 *    COMI[7] "AEC speed selection"
	 *                  =   1 (0x01) 1....... "Faster AEC correction"
	 *    COMI[6] "AEC speed step selection"
	 *                  =   1 (0x01) .1...... "Big steps, fast"
	 *    COMI[5] "Banding filter on off"
	 *                  =   0 (0x00) ..0..... "Off"
	 *    COMI[4] "Banding filter option"
	 *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
	 *                                         the PLL is ON"
	 *    COMI[3] "Reserved"
	 *                  =   0 (0x00) ....0...
	 *    COMI[2] "AGC auto manual control selection"
	 *                  =   0 (0x00) .....0.. "Manual"
	 *    COMI[1] "AWB auto manual control selection"
	 *                  =   0 (0x00) ......0. "Manual"
	 *    COMI[0] "Exposure control"
	 *                  =   0 (0x00) .......0 "Manual"
	 */
697
	{ 0x13, 0xc0 },
698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752

	/*
	 * 09 COMC "Common Control C"
	 *                  =   8 (0x08) 00001000
	 *    COMC[7:5] "Reserved"
	 *                  =   0 (0x00) 000.....
	 *    COMC[4] "Sleep Mode Enable"
	 *                  =   0 (0x00) ...0.... "Normal mode"
	 *    COMC[3:2] "Sensor sampling reset timing selection"
	 *                  =   2 (0x02) ....10.. "Longer reset time"
	 *    COMC[1:0] "Output drive current select"
	 *                  =   0 (0x00) ......00 "Weakest"
	 */
	{ 0x09, 0x08 },

	/*
	 * 0C COMD "Common Control D"
	 *                  =   8 (0x08) 00001000
	 *    COMD[7] "Reserved"
	 *                  =   0 (0x00) 0.......
	 *    COMD[6] "Swap MSB and LSB at the output port"
	 *                  =   0 (0x00) .0...... "False"
	 *    COMD[5:3] "Reserved"
	 *                  =   1 (0x01) ..001...
	 *    COMD[2] "Output Average On Off"
	 *                  =   0 (0x00) .....0.. "Output Normal"
	 *    COMD[1] "Sensor precharge voltage selection"
	 *                  =   0 (0x00) ......0. "Selects internal
	 *                                         reference precharge
	 *                                         voltage"
	 *    COMD[0] "Snapshot option"
	 *                  =   0 (0x00) .......0 "Enable live video output
	 *                                         after snapshot sequence"
	 */
	{ 0x0c, 0x08 },

	/*
	 * 0D COME "Common Control E"
	 *                  = 161 (0xA1) 10100001
	 *    COME[7] "Output average option"
	 *                  =   1 (0x01) 1....... "Output average of 4 pixels"
	 *    COME[6] "Anti-blooming control"
	 *                  =   0 (0x00) .0...... "Off"
	 *    COME[5:3] "Reserved"
	 *                  =   4 (0x04) ..100...
	 *    COME[2] "Clock output power down pin status"
	 *                  =   0 (0x00) .....0.. "Tri-state data output pin
	 *                                         on power down"
	 *    COME[1] "Data output pin status selection at power down"
	 *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
	 *                                         HREF, and CHSYNC pins on
	 *                                         power down"
	 *    COME[0] "Auto zero circuit select"
	 *                  =   1 (0x01) .......1 "On"
	 */
753
	{ 0x0d, 0xa1 },
754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816

	/*
	 * 0E COMF "Common Control F"
	 *                  = 112 (0x70) 01110000
	 *    COMF[7] "System clock selection"
	 *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
	 *    COMF[6:4] "Reserved"
	 *                  =   7 (0x07) .111....
	 *    COMF[3] "Manual auto negative offset canceling selection"
	 *                  =   0 (0x00) ....0... "Auto detect negative
	 *                                         offset and cancel it"
	 *    COMF[2:0] "Reserved"
	 *                  =   0 (0x00) .....000
	 */
	{ 0x0e, 0x70 },

	/*
	 * 0F COMG "Common Control G"
	 *                  =  66 (0x42) 01000010
	 *    COMG[7] "Optical black output selection"
	 *                  =   0 (0x00) 0....... "Disable"
	 *    COMG[6] "Black level calibrate selection"
	 *                  =   1 (0x01) .1...... "Use optical black pixels
	 *                                         to calibrate"
	 *    COMG[5:4] "Reserved"
	 *                  =   0 (0x00) ..00....
	 *    COMG[3] "Channel offset adjustment"
	 *                  =   0 (0x00) ....0... "Disable offset adjustment"
	 *    COMG[2] "ADC black level calibration option"
	 *                  =   0 (0x00) .....0.. "Use B/G line and G/R
	 *                                         line to calibrate each
	 *                                         channel's black level"
	 *    COMG[1] "Reserved"
	 *                  =   1 (0x01) ......1.
	 *    COMG[0] "ADC black level calibration enable"
	 *                  =   0 (0x00) .......0 "Disable"
	 */
	{ 0x0f, 0x42 },

	/*
	 * 14 COMJ "Common Control J"
	 *                  = 198 (0xC6) 11000110
	 *    COMJ[7:6] "AGC gain ceiling"
	 *                  =   3 (0x03) 11...... "8x"
	 *    COMJ[5:4] "Reserved"
	 *                  =   0 (0x00) ..00....
	 *    COMJ[3] "Auto banding filter"
	 *                  =   0 (0x00) ....0... "Banding filter is always
	 *                                         on off depending on
	 *                                         COMI[5] setting"
	 *    COMJ[2] "VSYNC drop option"
	 *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
	 *                                         data is dropped"
	 *    COMJ[1] "Frame data drop"
	 *                  =   1 (0x01) ......1. "Drop frame data if
	 *                                         exposure is not within
	 *                                         tolerance.  In AEC mode,
	 *                                         data is normally dropped
	 *                                         when data is out of
	 *                                         range."
	 *    COMJ[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
817
	{ 0x14, 0xc6 },
818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922

	/*
	 * 15 COMK "Common Control K"
	 *                  =   2 (0x02) 00000010
	 *    COMK[7] "CHSYNC pin output swap"
	 *                  =   0 (0x00) 0....... "CHSYNC"
	 *    COMK[6] "HREF pin output swap"
	 *                  =   0 (0x00) .0...... "HREF"
	 *    COMK[5] "PCLK output selection"
	 *                  =   0 (0x00) ..0..... "PCLK always output"
	 *    COMK[4] "PCLK edge selection"
	 *                  =   0 (0x00) ...0.... "Data valid on falling edge"
	 *    COMK[3] "HREF output polarity"
	 *                  =   0 (0x00) ....0... "positive"
	 *    COMK[2] "Reserved"
	 *                  =   0 (0x00) .....0..
	 *    COMK[1] "VSYNC polarity"
	 *                  =   1 (0x01) ......1. "negative"
	 *    COMK[0] "HSYNC polarity"
	 *                  =   0 (0x00) .......0 "positive"
	 */
	{ 0x15, 0x02 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =   9 (0x09) 00001001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   0 (0x00) ...0.... "normal current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x09 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  80 (0x50) 01010000
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x34, 0x50 },

	/*
	 * 36 VCHG "Sensor Precharge Voltage Control"
	 *                  =   0 (0x00) 00000000
	 *    VCHG[7] "Reserved"
	 *                  =   0 (0x00) 0.......
	 *    VCHG[6:4] "Sensor precharge voltage control"
	 *                  =   0 (0x00) .000....
	 *    VCHG[3:0] "Sensor array common reference"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x36, 0x00 },

	/*
	 * 37 ADC "ADC Reference Control"
	 *                  =   4 (0x04) 00000100
	 *    ADC[7:4] "Reserved"
	 *                  =   0 (0x00) 0000....
	 *    ADC[3] "ADC input signal range"
	 *                  =   0 (0x00) ....0... "Input signal 1.0x"
	 *    ADC[2:0] "ADC range control"
	 *                  =   4 (0x04) .....100
	 */
	{ 0x37, 0x04 },

	/*
	 * 38 ACOM "Analog Common Ground"
	 *                  =  82 (0x52) 01010010
	 *    ACOM[7] "Analog gain control"
	 *                  =   0 (0x00) 0....... "Gain 1x"
	 *    ACOM[6] "Analog black level calibration"
	 *                  =   1 (0x01) .1...... "On"
	 *    ACOM[5:0] "Reserved"
	 *                  =  18 (0x12) ..010010
	 */
	{ 0x38, 0x52 },

	/*
	 * 3A FREFA "Internal Reference Adjustment"
	 *                  =   0 (0x00) 00000000
	 *    FREFA[7:0] "Range"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x3a, 0x00 },

	/*
	 * 3C FVOPT "Internal Reference Adjustment"
	 *                  =  31 (0x1F) 00011111
	 *    FVOPT[7:0] "Range"
	 *                  =  31 (0x1F) 00011111
	 */
923
	{ 0x3c, 0x1f },
924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971

	/*
	 * 44 Undocumented  =   0 (0x00) 00000000
	 *    44[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x44, 0x00 },

	/*
	 * 40 Undocumented  =   0 (0x00) 00000000
	 *    40[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x40, 0x00 },

	/*
	 * 41 Undocumented  =   0 (0x00) 00000000
	 *    41[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x41, 0x00 },

	/*
	 * 42 Undocumented  =   0 (0x00) 00000000
	 *    42[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x42, 0x00 },

	/*
	 * 43 Undocumented  =   0 (0x00) 00000000
	 *    43[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x43, 0x00 },

	/*
	 * 45 Undocumented  = 128 (0x80) 10000000
	 *    45[7:0] "It's a secret"
	 *                  = 128 (0x80) 10000000
	 */
	{ 0x45, 0x80 },

	/*
	 * 48 Undocumented  = 192 (0xC0) 11000000
	 *    48[7:0] "It's a secret"
	 *                  = 192 (0xC0) 11000000
	 */
972
	{ 0x48, 0xc0 },
973 974 975 976 977 978 979 980 981 982 983 984 985

	/*
	 * 49 Undocumented  =  25 (0x19) 00011001
	 *    49[7:0] "It's a secret"
	 *                  =  25 (0x19) 00011001
	 */
	{ 0x49, 0x19 },

	/*
	 * 4B Undocumented  = 128 (0x80) 10000000
	 *    4B[7:0] "It's a secret"
	 *                  = 128 (0x80) 10000000
	 */
986
	{ 0x4b, 0x80 },
987 988 989 990 991 992

	/*
	 * 4D Undocumented  = 196 (0xC4) 11000100
	 *    4D[7:0] "It's a secret"
	 *                  = 196 (0xC4) 11000100
	 */
993
	{ 0x4d, 0xc4 },
994 995 996

	/*
	 * 35 VREF "Reference Voltage Control"
997
	 *                  =  76 (0x4c) 01001100
998 999 1000 1001 1002 1003 1004
	 *    VREF[7:5] "Column high reference control"
	 *                  =   2 (0x02) 010..... "higher voltage"
	 *    VREF[4:2] "Column low reference control"
	 *                  =   3 (0x03) ...011.. "Highest voltage"
	 *    VREF[1:0] "Reserved"
	 *                  =   0 (0x00) ......00
	 */
1005
	{ 0x35, 0x4c },
1006 1007 1008 1009 1010 1011

	/*
	 * 3D Undocumented  =   0 (0x00) 00000000
	 *    3D[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
1012
	{ 0x3d, 0x00 },
1013 1014 1015 1016 1017 1018

	/*
	 * 3E Undocumented  =   0 (0x00) 00000000
	 *    3E[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
1019
	{ 0x3e, 0x00 },
1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058

	/*
	 * 3B FREFB "Internal Reference Adjustment"
	 *                  =  24 (0x18) 00011000
	 *    FREFB[7:0] "Range"
	 *                  =  24 (0x18) 00011000
	 */
	{ 0x3b, 0x18 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =  25 (0x19) 00011001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   1 (0x01) ...1.... "double current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x19 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  90 (0x5A) 01011010
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =  10 (0x0A) ....1010
	 */
1059
	{ 0x34, 0x5a },
1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124

	/*
	 * 3B FREFB "Internal Reference Adjustment"
	 *                  =   0 (0x00) 00000000
	 *    FREFB[7:0] "Range"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x3b, 0x00 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =   9 (0x09) 00001001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   0 (0x00) ...0.... "normal current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x09 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  80 (0x50) 01010000
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x34, 0x50 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =  64 (0x40) 01000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   4 (0x04) .100.... "XGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x40 },

	/*
	 * 17 HREFST "Horizontal window start"
	 *                  =  31 (0x1F) 00011111
	 *    HREFST[7:0] "Horizontal window start, 8 MSBs"
	 *                  =  31 (0x1F) 00011111
	 */
1125
	{ 0x17, 0x1f },
1126 1127 1128 1129 1130 1131 1132

	/*
	 * 18 HREFEND "Horizontal window end"
	 *                  =  95 (0x5F) 01011111
	 *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
	 *                  =  95 (0x5F) 01011111
	 */
1133
	{ 0x18, 0x5f },
1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172

	/*
	 * 19 VSTRT "Vertical window start"
	 *                  =   0 (0x00) 00000000
	 *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x19, 0x00 },

	/*
	 * 1A VEND "Vertical window end"
	 *                  =  96 (0x60) 01100000
	 *    VEND[7:0] "Vertical Window End, 8 MSBs"
	 *                  =  96 (0x60) 01100000
	 */
	{ 0x1a, 0x60 },

	/*
	 * 32 COMM "Common Control M"
	 *                  =  18 (0x12) 00010010
	 *    COMM[7:6] "Pixel clock divide option"
	 *                  =   0 (0x00) 00...... "/1"
	 *    COMM[5:3] "Horizontal window end position, 3 LSBs"
	 *                  =   2 (0x02) ..010...
	 *    COMM[2:0] "Horizontal window start position, 3 LSBs"
	 *                  =   2 (0x02) .....010
	 */
	{ 0x32, 0x12 },

	/*
	 * 03 COMA "Common Control A"
	 *                  =  74 (0x4A) 01001010
	 *    COMA[7:4] "AWB Update Threshold"
	 *                  =   4 (0x04) 0100....
	 *    COMA[3:2] "Vertical window end line control 2 LSBs"
	 *                  =   2 (0x02) ....10..
	 *    COMA[1:0] "Vertical window start line control 2 LSBs"
	 *                  =   2 (0x02) ......10
	 */
1173
	{ 0x03, 0x4a },
1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229

	/*
	 * 11 CLKRC "Clock Rate Control"
	 *                  = 128 (0x80) 10000000
	 *    CLKRC[7] "Internal frequency doublers on off seclection"
	 *                  =   1 (0x01) 1....... "On"
	 *    CLKRC[6] "Digital video master slave selection"
	 *                  =   0 (0x00) .0...... "Master mode, sensor
	 *                                         provides PCLK"
	 *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
	 *                  =   0 (0x00) ..000000
	 */
	{ 0x11, 0x80 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =   0 (0x00) 00000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   0 (0x00) .000.... "QXGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x00 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =  64 (0x40) 01000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   4 (0x04) .100.... "XGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x40 },

	/*
	 * 17 HREFST "Horizontal window start"
	 *                  =  31 (0x1F) 00011111
	 *    HREFST[7:0] "Horizontal window start, 8 MSBs"
	 *                  =  31 (0x1F) 00011111
	 */
1230
	{ 0x17, 0x1f },
1231 1232 1233 1234 1235 1236 1237

	/*
	 * 18 HREFEND "Horizontal window end"
	 *                  =  95 (0x5F) 01011111
	 *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
	 *                  =  95 (0x5F) 01011111
	 */
1238
	{ 0x18, 0x5f },
1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277

	/*
	 * 19 VSTRT "Vertical window start"
	 *                  =   0 (0x00) 00000000
	 *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x19, 0x00 },

	/*
	 * 1A VEND "Vertical window end"
	 *                  =  96 (0x60) 01100000
	 *    VEND[7:0] "Vertical Window End, 8 MSBs"
	 *                  =  96 (0x60) 01100000
	 */
	{ 0x1a, 0x60 },

	/*
	 * 32 COMM "Common Control M"
	 *                  =  18 (0x12) 00010010
	 *    COMM[7:6] "Pixel clock divide option"
	 *                  =   0 (0x00) 00...... "/1"
	 *    COMM[5:3] "Horizontal window end position, 3 LSBs"
	 *                  =   2 (0x02) ..010...
	 *    COMM[2:0] "Horizontal window start position, 3 LSBs"
	 *                  =   2 (0x02) .....010
	 */
	{ 0x32, 0x12 },

	/*
	 * 03 COMA "Common Control A"
	 *                  =  74 (0x4A) 01001010
	 *    COMA[7:4] "AWB Update Threshold"
	 *                  =   4 (0x04) 0100....
	 *    COMA[3:2] "Vertical window end line control 2 LSBs"
	 *                  =   2 (0x02) ....10..
	 *    COMA[1:0] "Vertical window start line control 2 LSBs"
	 *                  =   2 (0x02) ......10
	 */
1278
	{ 0x03, 0x4a },
1279 1280 1281 1282 1283 1284 1285 1286 1287

	/*
	 * 02 RED "Red Gain Control"
	 *                  = 175 (0xAF) 10101111
	 *    RED[7] "Action"
	 *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
	 *    RED[6:0] "Value"
	 *                  =  47 (0x2F) .0101111
	 */
1288
	{ 0x02, 0xaf },
1289 1290 1291 1292 1293 1294 1295

	/*
	 * 2D ADDVSL "VSYNC Pulse Width"
	 *                  = 210 (0xD2) 11010010
	 *    ADDVSL[7:0] "VSYNC pulse width, LSB"
	 *                  = 210 (0xD2) 11010010
	 */
1296
	{ 0x2d, 0xd2 },
1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318

	/*
	 * 00 GAIN          =  24 (0x18) 00011000
	 *    GAIN[7:6] "Reserved"
	 *                  =   0 (0x00) 00......
	 *    GAIN[5] "Double"
	 *                  =   0 (0x00) ..0..... "False"
	 *    GAIN[4] "Double"
	 *                  =   1 (0x01) ...1.... "True"
	 *    GAIN[3:0] "Range"
	 *                  =   8 (0x08) ....1000
	 */
	{ 0x00, 0x18 },

	/*
	 * 01 BLUE "Blue Gain Control"
	 *                  = 240 (0xF0) 11110000
	 *    BLUE[7] "Action"
	 *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
	 *    BLUE[6:0] "Value"
	 *                  = 112 (0x70) .1110000
	 */
1319
	{ 0x01, 0xf0 },
1320 1321 1322 1323 1324 1325 1326

	/*
	 * 10 AEC "Automatic Exposure Control"
	 *                  =  10 (0x0A) 00001010
	 *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
	 *                  =  10 (0x0A) 00001010
	 */
1327 1328 1329 1330 1331 1332 1333 1334
	{ 0x10, 0x0a },

	{ 0xe1, 0x67 },
	{ 0xe3, 0x03 },
	{ 0xe4, 0x26 },
	{ 0xe5, 0x3e },
	{ 0xf8, 0x01 },
	{ 0xff, 0x01 },
1335 1336
};

1337 1338 1339 1340 1341 1342
static const struct ov_i2c_regvals norm_6x20[] = {
	{ 0x12, 0x80 }, /* reset */
	{ 0x11, 0x01 },
	{ 0x03, 0x60 },
	{ 0x05, 0x7f }, /* For when autoadjust is off */
	{ 0x07, 0xa8 },
1343
	/* The ratio of 0x0c and 0x0d controls the white point */
1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
	{ 0x0f, 0x15 }, /* COMS */
	{ 0x10, 0x75 }, /* AEC Exposure time */
	{ 0x12, 0x24 }, /* Enable AGC */
	{ 0x14, 0x04 },
	/* 0x16: 0x06 helps frame stability with moving objects */
	{ 0x16, 0x06 },
/*	{ 0x20, 0x30 },  * Aperture correction enable */
	{ 0x26, 0xb2 }, /* BLC enable */
	/* 0x28: 0x05 Selects RGB format if RGB on */
	{ 0x28, 0x05 },
	{ 0x2a, 0x04 }, /* Disable framerate adjust */
/*	{ 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1358
	{ 0x2d, 0x85 },
1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390
	{ 0x33, 0xa0 }, /* Color Processing Parameter */
	{ 0x34, 0xd2 }, /* Max A/D range */
	{ 0x38, 0x8b },
	{ 0x39, 0x40 },

	{ 0x3c, 0x39 }, /* Enable AEC mode changing */
	{ 0x3c, 0x3c }, /* Change AEC mode */
	{ 0x3c, 0x24 }, /* Disable AEC mode changing */

	{ 0x3d, 0x80 },
	/* These next two registers (0x4a, 0x4b) are undocumented.
	 * They control the color balance */
	{ 0x4a, 0x80 },
	{ 0x4b, 0x80 },
	{ 0x4d, 0xd2 }, /* This reduces noise a bit */
	{ 0x4e, 0xc1 },
	{ 0x4f, 0x04 },
/* Do 50-53 have any effect? */
/* Toggle 0x12[2] off and on here? */
};

static const struct ov_i2c_regvals norm_6x30[] = {
	{ 0x12, 0x80 }, /* Reset */
	{ 0x00, 0x1f }, /* Gain */
	{ 0x01, 0x99 }, /* Blue gain */
	{ 0x02, 0x7c }, /* Red gain */
	{ 0x03, 0xc0 }, /* Saturation */
	{ 0x05, 0x0a }, /* Contrast */
	{ 0x06, 0x95 }, /* Brightness */
	{ 0x07, 0x2d }, /* Sharpness */
	{ 0x0c, 0x20 },
	{ 0x0d, 0x20 },
1391
	{ 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506
	{ 0x0f, 0x05 },
	{ 0x10, 0x9a },
	{ 0x11, 0x00 }, /* Pixel clock = fastest */
	{ 0x12, 0x24 }, /* Enable AGC and AWB */
	{ 0x13, 0x21 },
	{ 0x14, 0x80 },
	{ 0x15, 0x01 },
	{ 0x16, 0x03 },
	{ 0x17, 0x38 },
	{ 0x18, 0xea },
	{ 0x19, 0x04 },
	{ 0x1a, 0x93 },
	{ 0x1b, 0x00 },
	{ 0x1e, 0xc4 },
	{ 0x1f, 0x04 },
	{ 0x20, 0x20 },
	{ 0x21, 0x10 },
	{ 0x22, 0x88 },
	{ 0x23, 0xc0 }, /* Crystal circuit power level */
	{ 0x25, 0x9a }, /* Increase AEC black ratio */
	{ 0x26, 0xb2 }, /* BLC enable */
	{ 0x27, 0xa2 },
	{ 0x28, 0x00 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x84 }, /* 60 Hz power */
	{ 0x2b, 0xa8 }, /* 60 Hz power */
	{ 0x2c, 0xa0 },
	{ 0x2d, 0x95 }, /* Enable auto-brightness */
	{ 0x2e, 0x88 },
	{ 0x33, 0x26 },
	{ 0x34, 0x03 },
	{ 0x36, 0x8f },
	{ 0x37, 0x80 },
	{ 0x38, 0x83 },
	{ 0x39, 0x80 },
	{ 0x3a, 0x0f },
	{ 0x3b, 0x3c },
	{ 0x3c, 0x1a },
	{ 0x3d, 0x80 },
	{ 0x3e, 0x80 },
	{ 0x3f, 0x0e },
	{ 0x40, 0x00 }, /* White bal */
	{ 0x41, 0x00 }, /* White bal */
	{ 0x42, 0x80 },
	{ 0x43, 0x3f }, /* White bal */
	{ 0x44, 0x80 },
	{ 0x45, 0x20 },
	{ 0x46, 0x20 },
	{ 0x47, 0x80 },
	{ 0x48, 0x7f },
	{ 0x49, 0x00 },
	{ 0x4a, 0x00 },
	{ 0x4b, 0x80 },
	{ 0x4c, 0xd0 },
	{ 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
	{ 0x4e, 0x40 },
	{ 0x4f, 0x07 }, /* UV avg., col. killer: max */
	{ 0x50, 0xff },
	{ 0x54, 0x23 }, /* Max AGC gain: 18dB */
	{ 0x55, 0xff },
	{ 0x56, 0x12 },
	{ 0x57, 0x81 },
	{ 0x58, 0x75 },
	{ 0x59, 0x01 }, /* AGC dark current comp.: +1 */
	{ 0x5a, 0x2c },
	{ 0x5b, 0x0f }, /* AWB chrominance levels */
	{ 0x5c, 0x10 },
	{ 0x3d, 0x80 },
	{ 0x27, 0xa6 },
	{ 0x12, 0x20 }, /* Toggle AWB */
	{ 0x12, 0x24 },
};

/* Lawrence Glaister <lg@jfm.bc.ca> reports:
 *
 * Register 0x0f in the 7610 has the following effects:
 *
 * 0x85 (AEC method 1): Best overall, good contrast range
 * 0x45 (AEC method 2): Very overexposed
 * 0xa5 (spec sheet default): Ok, but the black level is
 *	shifted resulting in loss of contrast
 * 0x05 (old driver setting): very overexposed, too much
 *	contrast
 */
static const struct ov_i2c_regvals norm_7610[] = {
	{ 0x10, 0xff },
	{ 0x16, 0x06 },
	{ 0x28, 0x24 },
	{ 0x2b, 0xac },
	{ 0x12, 0x00 },
	{ 0x38, 0x81 },
	{ 0x28, 0x24 },	/* 0c */
	{ 0x0f, 0x85 },	/* lg's setting */
	{ 0x15, 0x01 },
	{ 0x20, 0x1c },
	{ 0x23, 0x2a },
	{ 0x24, 0x10 },
	{ 0x25, 0x8a },
	{ 0x26, 0xa2 },
	{ 0x27, 0xc2 },
	{ 0x2a, 0x04 },
	{ 0x2c, 0xfe },
	{ 0x2d, 0x93 },
	{ 0x30, 0x71 },
	{ 0x31, 0x60 },
	{ 0x32, 0x26 },
	{ 0x33, 0x20 },
	{ 0x34, 0x48 },
	{ 0x12, 0x24 },
	{ 0x11, 0x01 },
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
};

static const struct ov_i2c_regvals norm_7620[] = {
1507
	{ 0x12, 0x80 },		/* reset */
1508 1509 1510
	{ 0x00, 0x00 },		/* gain */
	{ 0x01, 0x80 },		/* blue gain */
	{ 0x02, 0x80 },		/* red gain */
1511
	{ 0x03, 0xc0 },		/* OV7670_R03_VREF */
1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533
	{ 0x06, 0x60 },
	{ 0x07, 0x00 },
	{ 0x0c, 0x24 },
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
	{ 0x11, 0x01 },
	{ 0x12, 0x24 },
	{ 0x13, 0x01 },
	{ 0x14, 0x84 },
	{ 0x15, 0x01 },
	{ 0x16, 0x03 },
	{ 0x17, 0x2f },
	{ 0x18, 0xcf },
	{ 0x19, 0x06 },
	{ 0x1a, 0xf5 },
	{ 0x1b, 0x00 },
	{ 0x20, 0x18 },
	{ 0x21, 0x80 },
	{ 0x22, 0x80 },
	{ 0x23, 0x00 },
	{ 0x26, 0xa2 },
	{ 0x27, 0xea },
1534
	{ 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581
	{ 0x29, 0x00 },
	{ 0x2a, 0x10 },
	{ 0x2b, 0x00 },
	{ 0x2c, 0x88 },
	{ 0x2d, 0x91 },
	{ 0x2e, 0x80 },
	{ 0x2f, 0x44 },
	{ 0x60, 0x27 },
	{ 0x61, 0x02 },
	{ 0x62, 0x5f },
	{ 0x63, 0xd5 },
	{ 0x64, 0x57 },
	{ 0x65, 0x83 },
	{ 0x66, 0x55 },
	{ 0x67, 0x92 },
	{ 0x68, 0xcf },
	{ 0x69, 0x76 },
	{ 0x6a, 0x22 },
	{ 0x6b, 0x00 },
	{ 0x6c, 0x02 },
	{ 0x6d, 0x44 },
	{ 0x6e, 0x80 },
	{ 0x6f, 0x1d },
	{ 0x70, 0x8b },
	{ 0x71, 0x00 },
	{ 0x72, 0x14 },
	{ 0x73, 0x54 },
	{ 0x74, 0x00 },
	{ 0x75, 0x8e },
	{ 0x76, 0x00 },
	{ 0x77, 0xff },
	{ 0x78, 0x80 },
	{ 0x79, 0x80 },
	{ 0x7a, 0x80 },
	{ 0x7b, 0xe2 },
	{ 0x7c, 0x00 },
};

/* 7640 and 7648. The defaults should be OK for most registers. */
static const struct ov_i2c_regvals norm_7640[] = {
	{ 0x12, 0x80 },
	{ 0x12, 0x14 },
};

/* 7670. Defaults taken from OmniVision provided data,
*  as provided by Jonathan Corbet of OLPC		*/
static const struct ov_i2c_regvals norm_7670[] = {
1582 1583 1584 1585
	{ OV7670_R12_COM7, OV7670_COM7_RESET },
	{ OV7670_R3A_TSLB, 0x04 },		/* OV */
	{ OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
	{ OV7670_R11_CLKRC, 0x01 },
1586 1587 1588 1589
/*
 * Set the hardware window.  These values from OV don't entirely
 * make sense - hstop is less than hstart.  But they work...
 */
1590 1591 1592 1593 1594 1595 1596 1597 1598
	{ OV7670_R17_HSTART, 0x13 },
	{ OV7670_R18_HSTOP, 0x01 },
	{ OV7670_R32_HREF, 0xb6 },
	{ OV7670_R19_VSTART, 0x02 },
	{ OV7670_R1A_VSTOP, 0x7a },
	{ OV7670_R03_VREF, 0x0a },

	{ OV7670_R0C_COM3, 0x00 },
	{ OV7670_R3E_COM14, 0x00 },
1599 1600 1601 1602 1603 1604
/* Mystery scaling numbers */
	{ 0x70, 0x3a },
	{ 0x71, 0x35 },
	{ 0x72, 0x11 },
	{ 0x73, 0xf0 },
	{ 0xa2, 0x02 },
1605
/*	{ OV7670_R15_COM10, 0x0 }, */
1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626

/* Gamma curve values */
	{ 0x7a, 0x20 },
	{ 0x7b, 0x10 },
	{ 0x7c, 0x1e },
	{ 0x7d, 0x35 },
	{ 0x7e, 0x5a },
	{ 0x7f, 0x69 },
	{ 0x80, 0x76 },
	{ 0x81, 0x80 },
	{ 0x82, 0x88 },
	{ 0x83, 0x8f },
	{ 0x84, 0x96 },
	{ 0x85, 0xa3 },
	{ 0x86, 0xaf },
	{ 0x87, 0xc4 },
	{ 0x88, 0xd7 },
	{ 0x89, 0xe8 },

/* AGC and AEC parameters.  Note we start by disabling those features,
   then turn them only after tweaking the values. */
1627
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1628 1629
			 | OV7670_COM8_AECSTEP
			 | OV7670_COM8_BFILT },
1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640
	{ OV7670_R00_GAIN, 0x00 },
	{ OV7670_R10_AECH, 0x00 },
	{ OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
	{ OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
	{ OV7670_RA5_BD50MAX, 0x05 },
	{ OV7670_RAB_BD60MAX, 0x07 },
	{ OV7670_R24_AEW, 0x95 },
	{ OV7670_R25_AEB, 0x33 },
	{ OV7670_R26_VPT, 0xe3 },
	{ OV7670_R9F_HAECC1, 0x78 },
	{ OV7670_RA0_HAECC2, 0x68 },
1641
	{ 0xa1, 0x03 }, /* magic */
1642 1643 1644 1645 1646 1647
	{ OV7670_RA6_HAECC3, 0xd8 },
	{ OV7670_RA7_HAECC4, 0xd8 },
	{ OV7670_RA8_HAECC5, 0xf0 },
	{ OV7670_RA9_HAECC6, 0x90 },
	{ OV7670_RAA_HAECC7, 0x94 },
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1648 1649 1650 1651 1652 1653
			| OV7670_COM8_AECSTEP
			| OV7670_COM8_BFILT
			| OV7670_COM8_AGC
			| OV7670_COM8_AEC },

/* Almost all of these are magic "reserved" values.  */
1654 1655
	{ OV7670_R0E_COM5, 0x61 },
	{ OV7670_R0F_COM6, 0x4b },
1656
	{ 0x16, 0x02 },
1657
	{ OV7670_R1E_MVFP, 0x07 },
1658 1659 1660 1661 1662 1663 1664 1665
	{ 0x21, 0x02 },
	{ 0x22, 0x91 },
	{ 0x29, 0x07 },
	{ 0x33, 0x0b },
	{ 0x35, 0x0b },
	{ 0x37, 0x1d },
	{ 0x38, 0x71 },
	{ 0x39, 0x2a },
1666
	{ OV7670_R3C_COM12, 0x78 },
1667 1668
	{ 0x4d, 0x40 },
	{ 0x4e, 0x20 },
1669
	{ OV7670_R69_GFIX, 0x00 },
1670 1671 1672
	{ 0x6b, 0x4a },
	{ 0x74, 0x10 },
	{ 0x8d, 0x4f },
1673 1674 1675 1676 1677 1678
	{ 0x8e, 0x00 },
	{ 0x8f, 0x00 },
	{ 0x90, 0x00 },
	{ 0x91, 0x00 },
	{ 0x96, 0x00 },
	{ 0x9a, 0x00 },
1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703
	{ 0xb0, 0x84 },
	{ 0xb1, 0x0c },
	{ 0xb2, 0x0e },
	{ 0xb3, 0x82 },
	{ 0xb8, 0x0a },

/* More reserved magic, some of which tweaks white balance */
	{ 0x43, 0x0a },
	{ 0x44, 0xf0 },
	{ 0x45, 0x34 },
	{ 0x46, 0x58 },
	{ 0x47, 0x28 },
	{ 0x48, 0x3a },
	{ 0x59, 0x88 },
	{ 0x5a, 0x88 },
	{ 0x5b, 0x44 },
	{ 0x5c, 0x67 },
	{ 0x5d, 0x49 },
	{ 0x5e, 0x0e },
	{ 0x6c, 0x0a },
	{ 0x6d, 0x55 },
	{ 0x6e, 0x11 },
	{ 0x6f, 0x9f },
					/* "9e for advance AWB" */
	{ 0x6a, 0x40 },
1704 1705 1706
	{ OV7670_R01_BLUE, 0x40 },
	{ OV7670_R02_RED, 0x60 },
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1707 1708 1709 1710 1711 1712 1713 1714 1715
			| OV7670_COM8_AECSTEP
			| OV7670_COM8_BFILT
			| OV7670_COM8_AGC
			| OV7670_COM8_AEC
			| OV7670_COM8_AWB },

/* Matrix coefficients */
	{ 0x4f, 0x80 },
	{ 0x50, 0x80 },
1716
	{ 0x51, 0x00 },
1717 1718 1719 1720 1721
	{ 0x52, 0x22 },
	{ 0x53, 0x5e },
	{ 0x54, 0x80 },
	{ 0x58, 0x9e },

1722 1723
	{ OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
	{ OV7670_R3F_EDGE, 0x00 },
1724 1725
	{ 0x75, 0x05 },
	{ 0x76, 0xe1 },
1726
	{ 0x4c, 0x00 },
1727
	{ 0x77, 0x01 },
1728
	{ OV7670_R3D_COM13, OV7670_COM13_GAMMA
1729 1730 1731 1732
			  | OV7670_COM13_UVSAT
			  | 2},		/* was 3 */
	{ 0x4b, 0x09 },
	{ 0xc9, 0x60 },
1733
	{ OV7670_R41_COM16, 0x38 },
1734 1735 1736
	{ 0x56, 0x40 },

	{ 0x34, 0x11 },
1737
	{ OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1738
	{ 0xa4, 0x88 },
1739
	{ 0x96, 0x00 },
1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863
	{ 0x97, 0x30 },
	{ 0x98, 0x20 },
	{ 0x99, 0x30 },
	{ 0x9a, 0x84 },
	{ 0x9b, 0x29 },
	{ 0x9c, 0x03 },
	{ 0x9d, 0x4c },
	{ 0x9e, 0x3f },
	{ 0x78, 0x04 },

/* Extra-weird stuff.  Some sort of multiplexor register */
	{ 0x79, 0x01 },
	{ 0xc8, 0xf0 },
	{ 0x79, 0x0f },
	{ 0xc8, 0x00 },
	{ 0x79, 0x10 },
	{ 0xc8, 0x7e },
	{ 0x79, 0x0a },
	{ 0xc8, 0x80 },
	{ 0x79, 0x0b },
	{ 0xc8, 0x01 },
	{ 0x79, 0x0c },
	{ 0xc8, 0x0f },
	{ 0x79, 0x0d },
	{ 0xc8, 0x20 },
	{ 0x79, 0x09 },
	{ 0xc8, 0x80 },
	{ 0x79, 0x02 },
	{ 0xc8, 0xc0 },
	{ 0x79, 0x03 },
	{ 0xc8, 0x40 },
	{ 0x79, 0x05 },
	{ 0xc8, 0x30 },
	{ 0x79, 0x26 },
};

static const struct ov_i2c_regvals norm_8610[] = {
	{ 0x12, 0x80 },
	{ 0x00, 0x00 },
	{ 0x01, 0x80 },
	{ 0x02, 0x80 },
	{ 0x03, 0xc0 },
	{ 0x04, 0x30 },
	{ 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
	{ 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
	{ 0x0a, 0x86 },
	{ 0x0b, 0xb0 },
	{ 0x0c, 0x20 },
	{ 0x0d, 0x20 },
	{ 0x11, 0x01 },
	{ 0x12, 0x25 },
	{ 0x13, 0x01 },
	{ 0x14, 0x04 },
	{ 0x15, 0x01 }, /* Lin and Win think different about UV order */
	{ 0x16, 0x03 },
	{ 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
	{ 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
	{ 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
	{ 0x1a, 0xf5 },
	{ 0x1b, 0x00 },
	{ 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
	{ 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
	{ 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
	{ 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
	{ 0x26, 0xa2 },
	{ 0x27, 0xea },
	{ 0x28, 0x00 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x80 },
	{ 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
	{ 0x2c, 0xac },
	{ 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
	{ 0x2e, 0x80 },
	{ 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
	{ 0x4c, 0x00 },
	{ 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
	{ 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
	{ 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
	{ 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
	{ 0x63, 0xff },
	{ 0x64, 0x53 }, /* new windrv 090403 says 0x57,
			 * maybe thats wrong */
	{ 0x65, 0x00 },
	{ 0x66, 0x55 },
	{ 0x67, 0xb0 },
	{ 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
	{ 0x69, 0x02 },
	{ 0x6a, 0x22 },
	{ 0x6b, 0x00 },
	{ 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
			 * deleting bit7 colors the first images red */
	{ 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
	{ 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
	{ 0x6f, 0x01 },
	{ 0x70, 0x8b },
	{ 0x71, 0x00 },
	{ 0x72, 0x14 },
	{ 0x73, 0x54 },
	{ 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
	{ 0x75, 0x0e },
	{ 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
	{ 0x77, 0xff },
	{ 0x78, 0x80 },
	{ 0x79, 0x80 },
	{ 0x7a, 0x80 },
	{ 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
	{ 0x7c, 0x00 },
	{ 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
	{ 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
	{ 0x7f, 0xfb },
	{ 0x80, 0x28 },
	{ 0x81, 0x00 },
	{ 0x82, 0x23 },
	{ 0x83, 0x0b },
	{ 0x84, 0x00 },
	{ 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
	{ 0x86, 0xc9 },
	{ 0x87, 0x00 },
	{ 0x88, 0x00 },
	{ 0x89, 0x01 },
	{ 0x12, 0x20 },
	{ 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
};

1864 1865 1866 1867 1868 1869 1870 1871
static unsigned char ov7670_abs_to_sm(unsigned char v)
{
	if (v > 127)
		return v & 0x7f;
	return (128 - v) | 0x80;
}

/* Write a OV519 register */
1872
static void reg_w(struct sd *sd, u16 index, u16 value)
1873
{
1874
	int ret, req = 0;
1875

1876 1877 1878
	if (sd->gspca_dev.usb_err < 0)
		return;

1879 1880 1881 1882 1883 1884
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		req = 2;
		break;
	case BRIDGE_OVFX2:
1885 1886 1887
		req = 0x0a;
		/* fall through */
	case BRIDGE_W9968CF:
1888 1889
		ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1890
			req,
1891
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1892
			value, index, NULL, 0, 500);
1893 1894 1895 1896
		goto leave;
	default:
		req = 1;
	}
1897

1898
	sd->gspca_dev.usb_buf[0] = value;
1899 1900
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1901
			req,
1902 1903
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			0, index,
1904
			sd->gspca_dev.usb_buf, 1, 500);
1905
leave:
1906
	if (ret < 0) {
1907
		err("Write reg 0x%04x -> [0x%02x] failed",
1908
		       value, index);
1909 1910
		sd->gspca_dev.usb_err = ret;
		return;
1911 1912 1913
	}

	PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1914 1915
}

1916
/* Read from a OV519 register, note not valid for the w9968cf!! */
1917
/* returns: negative is error, pos or zero is data */
1918
static int reg_r(struct sd *sd, u16 index)
1919 1920
{
	int ret;
1921 1922
	int req;

1923 1924 1925
	if (sd->gspca_dev.usb_err < 0)
		return -1;

1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		req = 3;
		break;
	case BRIDGE_OVFX2:
		req = 0x0b;
		break;
	default:
		req = 1;
	}
1937 1938 1939

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1940
			req,
1941
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1942
			0, index, sd->gspca_dev.usb_buf, 1, 500);
1943

1944
	if (ret >= 0) {
1945
		ret = sd->gspca_dev.usb_buf[0];
1946
		PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1947
	} else {
1948
		err("Read reg [0x%02x] failed", index);
1949 1950
		sd->gspca_dev.usb_err = ret;
	}
1951

1952 1953 1954 1955 1956
	return ret;
}

/* Read 8 values from a OV519 register */
static int reg_r8(struct sd *sd,
1957
		  u16 index)
1958 1959 1960
{
	int ret;

1961 1962 1963
	if (sd->gspca_dev.usb_err < 0)
		return -1;

1964 1965 1966 1967
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
			1,			/* REQ_IO */
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1968
			0, index, sd->gspca_dev.usb_buf, 8, 500);
1969

1970
	if (ret >= 0) {
1971
		ret = sd->gspca_dev.usb_buf[0];
1972
	} else {
1973
		err("Read reg 8 [0x%02x] failed", index);
1974 1975
		sd->gspca_dev.usb_err = ret;
	}
1976

1977 1978 1979 1980 1981 1982 1983 1984 1985
	return ret;
}

/*
 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
 * the same position as 1's in "mask" are cleared and set to "value". Bits
 * that are in the same position as 0's in "mask" are preserved, regardless
 * of their respective state in "value".
 */
1986
static void reg_w_mask(struct sd *sd,
1987 1988 1989
			u16 index,
			u8 value,
			u8 mask)
1990 1991
{
	int ret;
1992
	u8 oldval;
1993 1994 1995 1996 1997

	if (mask != 0xff) {
		value &= mask;			/* Enforce mask on value */
		ret = reg_r(sd, index);
		if (ret < 0)
1998
			return;
1999 2000 2001 2002

		oldval = ret & ~mask;		/* Clear the masked bits */
		value |= oldval;		/* Set the desired bits */
	}
2003
	reg_w(sd, index, value);
2004 2005
}

2006 2007 2008 2009
/*
 * Writes multiple (n) byte value to a single register. Only valid with certain
 * registers (0x30 and 0xc4 - 0xce).
 */
2010
static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2011 2012 2013
{
	int ret;

2014 2015 2016
	if (sd->gspca_dev.usb_err < 0)
		return;

2017
	*((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2018 2019 2020 2021 2022 2023 2024

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
			1 /* REG_IO */,
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			0, index,
			sd->gspca_dev.usb_buf, n, 500);
2025
	if (ret < 0) {
2026
		err("Write reg32 [%02x] %08x failed", index, value);
2027
		sd->gspca_dev.usb_err = ret;
2028
	}
2029 2030
}

2031
static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2032 2033 2034 2035 2036 2037 2038 2039
{
	int rc, retries;

	PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);

	/* Three byte write cycle */
	for (retries = 6; ; ) {
		/* Select camera register */
2040
		reg_w(sd, R51x_I2C_SADDR_3, reg);
2041 2042

		/* Write "value" to I2C data port of OV511 */
2043
		reg_w(sd, R51x_I2C_DATA, value);
2044 2045

		/* Initiate 3-byte write cycle */
2046
		reg_w(sd, R511_I2C_CTL, 0x01);
2047

2048
		do {
2049
			rc = reg_r(sd, R511_I2C_CTL);
2050
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2051 2052

		if (rc < 0)
2053
			return;
2054 2055 2056 2057 2058

		if ((rc & 2) == 0) /* Ack? */
			break;
		if (--retries < 0) {
			PDEBUG(D_USBO, "i2c write retries exhausted");
2059
			return;
2060 2061 2062 2063
		}
	}
}

2064
static int ov511_i2c_r(struct sd *sd, u8 reg)
2065 2066 2067 2068 2069 2070
{
	int rc, value, retries;

	/* Two byte write cycle */
	for (retries = 6; ; ) {
		/* Select camera register */
2071
		reg_w(sd, R51x_I2C_SADDR_2, reg);
2072 2073

		/* Initiate 2-byte write cycle */
2074
		reg_w(sd, R511_I2C_CTL, 0x03);
2075

2076
		do {
2077
			rc = reg_r(sd, R511_I2C_CTL);
2078
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097

		if (rc < 0)
			return rc;

		if ((rc & 2) == 0) /* Ack? */
			break;

		/* I2C abort */
		reg_w(sd, R511_I2C_CTL, 0x10);

		if (--retries < 0) {
			PDEBUG(D_USBI, "i2c write retries exhausted");
			return -1;
		}
	}

	/* Two byte read cycle */
	for (retries = 6; ; ) {
		/* Initiate 2-byte read cycle */
2098
		reg_w(sd, R511_I2C_CTL, 0x05);
2099

2100
		do {
2101
			rc = reg_r(sd, R511_I2C_CTL);
2102
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2103 2104 2105 2106 2107 2108 2109 2110

		if (rc < 0)
			return rc;

		if ((rc & 2) == 0) /* Ack? */
			break;

		/* I2C abort */
2111
		reg_w(sd, R511_I2C_CTL, 0x10);
2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123

		if (--retries < 0) {
			PDEBUG(D_USBI, "i2c read retries exhausted");
			return -1;
		}
	}

	value = reg_r(sd, R51x_I2C_DATA);

	PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);

	/* This is needed to make i2c_w() work */
2124
	reg_w(sd, R511_I2C_CTL, 0x05);
2125 2126 2127

	return value;
}
2128

2129 2130 2131 2132 2133
/*
 * The OV518 I2C I/O procedure is different, hence, this function.
 * This is normally only called from i2c_w(). Note that this function
 * always succeeds regardless of whether the sensor is present and working.
 */
2134
static void ov518_i2c_w(struct sd *sd,
2135 2136
		u8 reg,
		u8 value)
2137 2138 2139 2140
{
	PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);

	/* Select camera register */
2141
	reg_w(sd, R51x_I2C_SADDR_3, reg);
2142 2143

	/* Write "value" to I2C data port of OV511 */
2144
	reg_w(sd, R51x_I2C_DATA, value);
2145 2146

	/* Initiate 3-byte write cycle */
2147
	reg_w(sd, R518_I2C_CTL, 0x01);
2148 2149 2150

	/* wait for write complete */
	msleep(4);
2151
	reg_r8(sd, R518_I2C_CTL);
2152 2153 2154 2155 2156 2157 2158 2159 2160
}

/*
 * returns: negative is error, pos or zero is data
 *
 * The OV518 I2C I/O procedure is different, hence, this function.
 * This is normally only called from i2c_r(). Note that this function
 * always succeeds regardless of whether the sensor is present and working.
 */
2161
static int ov518_i2c_r(struct sd *sd, u8 reg)
2162
{
2163
	int value;
2164 2165

	/* Select camera register */
2166
	reg_w(sd, R51x_I2C_SADDR_2, reg);
2167 2168

	/* Initiate 2-byte write cycle */
2169
	reg_w(sd, R518_I2C_CTL, 0x03);
2170 2171

	/* Initiate 2-byte read cycle */
2172
	reg_w(sd, R518_I2C_CTL, 0x05);
2173 2174 2175 2176 2177
	value = reg_r(sd, R51x_I2C_DATA);
	PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
	return value;
}

2178
static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2179 2180 2181
{
	int ret;

2182 2183 2184
	if (sd->gspca_dev.usb_err < 0)
		return;

2185 2186 2187 2188
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
			0x02,
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2189
			(u16) value, (u16) reg, NULL, 0, 500);
2190

2191
	if (ret < 0) {
2192
		err("i2c 0x%02x -> [0x%02x] failed", value, reg);
2193
		sd->gspca_dev.usb_err = ret;
2194
	}
2195

2196
	PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2197 2198
}

2199
static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2200 2201 2202
{
	int ret;

2203 2204 2205
	if (sd->gspca_dev.usb_err < 0)
		return -1;

2206 2207 2208 2209
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
			0x03,
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2210
			0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2211 2212 2213 2214

	if (ret >= 0) {
		ret = sd->gspca_dev.usb_buf[0];
		PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2215
	} else {
2216
		err("i2c read [0x%02x] failed", reg);
2217 2218
		sd->gspca_dev.usb_err = ret;
	}
2219 2220 2221 2222

	return ret;
}

2223
static void i2c_w(struct sd *sd, u8 reg, u8 value)
2224
{
2225
	if (sd->sensor_reg_cache[reg] == value)
2226
		return;
2227

2228 2229 2230
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2231
		ov511_i2c_w(sd, reg, value);
2232
		break;
2233 2234 2235
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
	case BRIDGE_OV519:
2236
		ov518_i2c_w(sd, reg, value);
2237
		break;
2238
	case BRIDGE_OVFX2:
2239
		ovfx2_i2c_w(sd, reg, value);
2240
		break;
2241
	case BRIDGE_W9968CF:
2242
		w9968cf_i2c_w(sd, reg, value);
2243
		break;
2244
	}
2245

2246
	if (sd->gspca_dev.usb_err >= 0) {
2247 2248 2249
		/* Up on sensor reset empty the register cache */
		if (reg == 0x12 && (value & 0x80))
			memset(sd->sensor_reg_cache, -1,
2250
				sizeof(sd->sensor_reg_cache));
2251 2252 2253
		else
			sd->sensor_reg_cache[reg] = value;
	}
2254 2255
}

2256
static int i2c_r(struct sd *sd, u8 reg)
2257
{
2258
	int ret = -1;
2259 2260 2261 2262

	if (sd->sensor_reg_cache[reg] != -1)
		return sd->sensor_reg_cache[reg];

2263 2264 2265
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2266 2267
		ret = ov511_i2c_r(sd, reg);
		break;
2268 2269 2270
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
	case BRIDGE_OV519:
2271 2272
		ret = ov518_i2c_r(sd, reg);
		break;
2273
	case BRIDGE_OVFX2:
2274 2275
		ret = ovfx2_i2c_r(sd, reg);
		break;
2276
	case BRIDGE_W9968CF:
2277 2278
		ret = w9968cf_i2c_r(sd, reg);
		break;
2279
	}
2280 2281 2282 2283 2284

	if (ret >= 0)
		sd->sensor_reg_cache[reg] = ret;

	return ret;
2285 2286
}

2287 2288 2289 2290 2291
/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
 * the same position as 1's in "mask" are cleared and set to "value". Bits
 * that are in the same position as 0's in "mask" are preserved, regardless
 * of their respective state in "value".
 */
2292
static void i2c_w_mask(struct sd *sd,
2293 2294 2295
			u8 reg,
			u8 value,
			u8 mask)
2296 2297
{
	int rc;
2298
	u8 oldval;
2299 2300 2301 2302

	value &= mask;			/* Enforce mask on value */
	rc = i2c_r(sd, reg);
	if (rc < 0)
2303
		return;
2304 2305
	oldval = rc & ~mask;		/* Clear the masked bits */
	value |= oldval;		/* Set the desired bits */
2306
	i2c_w(sd, reg, value);
2307 2308 2309 2310
}

/* Temporarily stops OV511 from functioning. Must do this before changing
 * registers while the camera is streaming */
2311
static inline void ov51x_stop(struct sd *sd)
2312 2313 2314
{
	PDEBUG(D_STREAM, "stopping");
	sd->stopped = 1;
2315 2316 2317
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2318 2319
		reg_w(sd, R51x_SYS_RESET, 0x3d);
		break;
2320 2321
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
2322 2323
		reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
		break;
2324
	case BRIDGE_OV519:
2325 2326
		reg_w(sd, OV519_R51_RESET1, 0x0f);
		break;
2327
	case BRIDGE_OVFX2:
2328 2329
		reg_w_mask(sd, 0x0f, 0x00, 0x02);
		break;
2330
	case BRIDGE_W9968CF:
2331 2332
		reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
		break;
2333
	}
2334 2335 2336 2337
}

/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
 * actually stopped (for performance). */
2338
static inline void ov51x_restart(struct sd *sd)
2339 2340 2341
{
	PDEBUG(D_STREAM, "restarting");
	if (!sd->stopped)
2342
		return;
2343 2344 2345
	sd->stopped = 0;

	/* Reinitialize the stream */
2346 2347 2348
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2349 2350
		reg_w(sd, R51x_SYS_RESET, 0x00);
		break;
2351 2352
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
2353 2354 2355
		reg_w(sd, 0x2f, 0x80);
		reg_w(sd, R51x_SYS_RESET, 0x00);
		break;
2356
	case BRIDGE_OV519:
2357 2358
		reg_w(sd, OV519_R51_RESET1, 0x00);
		break;
2359
	case BRIDGE_OVFX2:
2360 2361
		reg_w_mask(sd, 0x0f, 0x02, 0x02);
		break;
2362
	case BRIDGE_W9968CF:
2363 2364
		reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
		break;
2365
	}
2366 2367
}

2368
static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2369

2370 2371 2372
/* This does an initial reset of an OmniVision sensor and ensures that I2C
 * is synchronized. Returns <0 on failure.
 */
2373
static int init_ov_sensor(struct sd *sd, u8 slave)
2374
{
2375
	int i;
2376

2377
	ov51x_set_slave_ids(sd, slave);
2378

2379
	/* Reset the sensor */
2380
	i2c_w(sd, 0x12, 0x80);
2381 2382 2383 2384

	/* Wait for it to initialize */
	msleep(150);

2385
	for (i = 0; i < i2c_detect_tries; i++) {
2386 2387
		if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
		    i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2388 2389
			PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
			return 0;
2390 2391 2392
		}

		/* Reset the sensor */
2393 2394
		i2c_w(sd, 0x12, 0x80);

2395 2396
		/* Wait for it to initialize */
		msleep(150);
2397

2398 2399
		/* Dummy read to sync I2C */
		if (i2c_r(sd, 0x00) < 0)
2400
			return -1;
2401
	}
2402
	return -1;
2403 2404 2405 2406 2407 2408 2409
}

/* Set the read and write slave IDs. The "slave" argument is the write slave,
 * and the read slave will be set to (slave + 1).
 * This should not be called from outside the i2c I/O functions.
 * Sets I2C read and write slave IDs. Returns <0 for error
 */
2410
static void ov51x_set_slave_ids(struct sd *sd,
2411
				u8 slave)
2412
{
2413 2414
	switch (sd->bridge) {
	case BRIDGE_OVFX2:
2415 2416
		reg_w(sd, OVFX2_I2C_ADDR, slave);
		return;
2417 2418
	case BRIDGE_W9968CF:
		sd->sensor_addr = slave;
2419
		return;
2420
	}
2421

2422 2423
	reg_w(sd, R51x_I2C_W_SID, slave);
	reg_w(sd, R51x_I2C_R_SID, slave + 1);
2424 2425
}

2426
static void write_regvals(struct sd *sd,
2427
			 const struct ov_regvals *regvals,
2428 2429 2430
			 int n)
{
	while (--n >= 0) {
2431
		reg_w(sd, regvals->reg, regvals->val);
2432 2433 2434 2435
		regvals++;
	}
}

2436 2437 2438
static void write_i2c_regvals(struct sd *sd,
			const struct ov_i2c_regvals *regvals,
			int n)
2439 2440
{
	while (--n >= 0) {
2441
		i2c_w(sd, regvals->reg, regvals->val);
2442 2443 2444 2445 2446 2447 2448 2449 2450 2451
		regvals++;
	}
}

/****************************************************************************
 *
 * OV511 and sensor configuration
 *
 ***************************************************************************/

2452
/* This initializes the OV2x10 / OV3610 / OV3620 */
2453
static void ov_hires_configure(struct sd *sd)
2454 2455 2456 2457
{
	int high, low;

	if (sd->bridge != BRIDGE_OVFX2) {
2458
		err("error hires sensors only supported with ovfx2");
2459
		return;
2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474
	}

	PDEBUG(D_PROBE, "starting ov hires configuration");

	/* Detect sensor (sub)type */
	high = i2c_r(sd, 0x0a);
	low = i2c_r(sd, 0x0b);
	/* info("%x, %x", high, low); */
	if (high == 0x96 && low == 0x40) {
		PDEBUG(D_PROBE, "Sensor is an OV2610");
		sd->sensor = SEN_OV2610;
	} else if (high == 0x36 && (low & 0x0f) == 0x00) {
		PDEBUG(D_PROBE, "Sensor is an OV3610");
		sd->sensor = SEN_OV3610;
	} else {
2475
		err("Error unknown sensor type: 0x%02x%02x",
2476
			high, low);
2477 2478 2479
	}
}

2480 2481 2482
/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
 * the same register settings as the OV8610, since they are very similar.
 */
2483
static void ov8xx0_configure(struct sd *sd)
2484 2485 2486 2487 2488 2489 2490 2491 2492
{
	int rc;

	PDEBUG(D_PROBE, "starting ov8xx0 configuration");

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
2493
		return;
2494
	}
2495
	if ((rc & 3) == 1)
2496
		sd->sensor = SEN_OV8610;
2497
	else
2498
		err("Unknown image sensor version: %d", rc & 3);
2499 2500 2501 2502 2503
}

/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
 * the same register settings as the OV7610, since they are very similar.
 */
2504
static void ov7xx0_configure(struct sd *sd)
2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516
{
	int rc, high, low;

	PDEBUG(D_PROBE, "starting OV7xx0 configuration");

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);

	/* add OV7670 here
	 * it appears to be wrongly detected as a 7610 by default */
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
2517
		return;
2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532
	}
	if ((rc & 3) == 3) {
		/* quick hack to make OV7670s work */
		high = i2c_r(sd, 0x0a);
		low = i2c_r(sd, 0x0b);
		/* info("%x, %x", high, low); */
		if (high == 0x76 && low == 0x73) {
			PDEBUG(D_PROBE, "Sensor is an OV7670");
			sd->sensor = SEN_OV7670;
		} else {
			PDEBUG(D_PROBE, "Sensor is an OV7610");
			sd->sensor = SEN_OV7610;
		}
	} else if ((rc & 3) == 1) {
		/* I don't know what's different about the 76BE yet. */
2533
		if (i2c_r(sd, 0x15) & 1) {
2534
			PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2535
			sd->sensor = SEN_OV7620AE;
2536
		} else {
2537
			PDEBUG(D_PROBE, "Sensor is an OV76BE");
2538 2539
			sd->sensor = SEN_OV76BE;
		}
2540 2541 2542 2543 2544
	} else if ((rc & 3) == 0) {
		/* try to read product id registers */
		high = i2c_r(sd, 0x0a);
		if (high < 0) {
			PDEBUG(D_ERR, "Error detecting camera chip PID");
2545
			return;
2546 2547 2548 2549
		}
		low = i2c_r(sd, 0x0b);
		if (low < 0) {
			PDEBUG(D_ERR, "Error detecting camera chip VER");
2550
			return;
2551 2552
		}
		if (high == 0x76) {
2553 2554
			switch (low) {
			case 0x30:
2555 2556
				err("Sensor is an OV7630/OV7635");
				err("7630 is not supported by this driver");
2557
				return;
2558
			case 0x40:
2559 2560
				PDEBUG(D_PROBE, "Sensor is an OV7645");
				sd->sensor = SEN_OV7640; /* FIXME */
2561 2562
				break;
			case 0x45:
2563 2564
				PDEBUG(D_PROBE, "Sensor is an OV7645B");
				sd->sensor = SEN_OV7640; /* FIXME */
2565 2566
				break;
			case 0x48:
2567
				PDEBUG(D_PROBE, "Sensor is an OV7648");
2568
				sd->sensor = SEN_OV7648;
2569 2570 2571
				break;
			default:
				PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2572
				return;
2573 2574 2575 2576 2577 2578
			}
		} else {
			PDEBUG(D_PROBE, "Sensor is an OV7620");
			sd->sensor = SEN_OV7620;
		}
	} else {
2579
		err("Unknown image sensor version: %d", rc & 3);
2580 2581 2582 2583
	}
}

/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2584
static void ov6xx0_configure(struct sd *sd)
2585 2586
{
	int rc;
2587
	PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2588 2589 2590 2591 2592

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
2593
		return;
2594 2595 2596 2597 2598
	}

	/* Ugh. The first two bits are the version bits, but
	 * the entire register value must be used. I guess OVT
	 * underestimated how many variants they would make. */
2599 2600
	switch (rc) {
	case 0x00:
2601
		sd->sensor = SEN_OV6630;
2602 2603
		warn("WARNING: Sensor is an OV66308. Your camera may have");
		warn("been misdetected in previous driver versions.");
2604 2605
		break;
	case 0x01:
2606
		sd->sensor = SEN_OV6620;
2607
		PDEBUG(D_PROBE, "Sensor is an OV6620");
2608 2609
		break;
	case 0x02:
2610 2611
		sd->sensor = SEN_OV6630;
		PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2612 2613
		break;
	case 0x03:
2614
		sd->sensor = SEN_OV66308AF;
2615
		PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2616 2617
		break;
	case 0x90:
2618
		sd->sensor = SEN_OV6630;
2619 2620
		warn("WARNING: Sensor is an OV66307. Your camera may have");
		warn("been misdetected in previous driver versions.");
2621 2622
		break;
	default:
2623
		err("FATAL: Unknown sensor version: 0x%02x", rc);
2624
		return;
2625 2626 2627
	}

	/* Set sensor-specific vars */
2628
	sd->sif = 1;
2629 2630 2631 2632 2633
}

/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
static void ov51x_led_control(struct sd *sd, int on)
{
2634 2635 2636
	if (sd->invert_led)
		on = !on;

2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649
	switch (sd->bridge) {
	/* OV511 has no LED control */
	case BRIDGE_OV511PLUS:
		reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
		break;
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
		break;
	case BRIDGE_OV519:
		reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1);	/* 0 / 1 */
		break;
	}
2650 2651
}

2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664
static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (!sd->snapshot_needs_reset)
		return;

	/* Note it is important that we clear sd->snapshot_needs_reset,
	   before actually clearing the snapshot state in the bridge
	   otherwise we might race with the pkt_scan interrupt handler */
	sd->snapshot_needs_reset = 0;

	switch (sd->bridge) {
2665 2666 2667 2668 2669
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		reg_w(sd, R51x_SYS_SNAP, 0x02);
		reg_w(sd, R51x_SYS_SNAP, 0x00);
		break;
2670 2671 2672 2673 2674
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
		reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
		break;
2675 2676 2677 2678 2679 2680 2681
	case BRIDGE_OV519:
		reg_w(sd, R51x_SYS_RESET, 0x40);
		reg_w(sd, R51x_SYS_RESET, 0x00);
		break;
	}
}

2682
static void ov51x_upload_quan_tables(struct sd *sd)
2683
{
2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706
	const unsigned char yQuanTable511[] = {
		0, 1, 1, 2, 2, 3, 3, 4,
		1, 1, 1, 2, 2, 3, 4, 4,
		1, 1, 2, 2, 3, 4, 4, 4,
		2, 2, 2, 3, 4, 4, 4, 4,
		2, 2, 3, 4, 4, 5, 5, 5,
		3, 3, 4, 4, 5, 5, 5, 5,
		3, 4, 4, 4, 5, 5, 5, 5,
		4, 4, 4, 4, 5, 5, 5, 5
	};

	const unsigned char uvQuanTable511[] = {
		0, 2, 2, 3, 4, 4, 4, 4,
		2, 2, 2, 4, 4, 4, 4, 4,
		2, 2, 3, 4, 4, 4, 4, 4,
		3, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4
	};

	/* OV518 quantization tables are 8x4 (instead of 8x8) */
2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719
	const unsigned char yQuanTable518[] = {
		5, 4, 5, 6, 6, 7, 7, 7,
		5, 5, 5, 5, 6, 7, 7, 7,
		6, 6, 6, 6, 7, 7, 7, 8,
		7, 7, 6, 7, 7, 7, 8, 8
	};
	const unsigned char uvQuanTable518[] = {
		6, 6, 6, 7, 7, 7, 7, 7,
		6, 6, 6, 7, 7, 7, 7, 7,
		6, 6, 6, 7, 7, 7, 7, 8,
		7, 7, 7, 7, 7, 7, 8, 8
	};

2720
	const unsigned char *pYTable, *pUVTable;
2721
	unsigned char val0, val1;
2722
	int i, size, reg = R51x_COMP_LUT_BEGIN;
2723 2724 2725

	PDEBUG(D_PROBE, "Uploading quantization tables");

2726 2727 2728
	if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
		pYTable = yQuanTable511;
		pUVTable = uvQuanTable511;
2729
		size = 32;
2730 2731 2732
	} else {
		pYTable = yQuanTable518;
		pUVTable = uvQuanTable518;
2733
		size = 16;
2734 2735 2736
	}

	for (i = 0; i < size; i++) {
2737 2738 2739 2740 2741
		val0 = *pYTable++;
		val1 = *pYTable++;
		val0 &= 0x0f;
		val1 &= 0x0f;
		val0 |= val1 << 4;
2742
		reg_w(sd, reg, val0);
2743 2744 2745 2746 2747 2748

		val0 = *pUVTable++;
		val1 = *pUVTable++;
		val0 &= 0x0f;
		val1 &= 0x0f;
		val0 |= val1 << 4;
2749
		reg_w(sd, reg + size, val0);
2750 2751 2752 2753 2754

		reg++;
	}
}

2755
/* This initializes the OV511/OV511+ and the sensor */
2756
static void ov511_configure(struct gspca_dev *gspca_dev)
2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771
{
	struct sd *sd = (struct sd *) gspca_dev;

	/* For 511 and 511+ */
	const struct ov_regvals init_511[] = {
		{ R51x_SYS_RESET,	0x7f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x7f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x3f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x3d },
	};

	const struct ov_regvals norm_511[] = {
2772
		{ R511_DRAM_FLOW_CTL,	0x01 },
2773 2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803
		{ R51x_SYS_SNAP,	0x00 },
		{ R51x_SYS_SNAP,	0x02 },
		{ R51x_SYS_SNAP,	0x00 },
		{ R511_FIFO_OPTS,	0x1f },
		{ R511_COMP_EN,		0x00 },
		{ R511_COMP_LUT_EN,	0x03 },
	};

	const struct ov_regvals norm_511_p[] = {
		{ R511_DRAM_FLOW_CTL,	0xff },
		{ R51x_SYS_SNAP,	0x00 },
		{ R51x_SYS_SNAP,	0x02 },
		{ R51x_SYS_SNAP,	0x00 },
		{ R511_FIFO_OPTS,	0xff },
		{ R511_COMP_EN,		0x00 },
		{ R511_COMP_LUT_EN,	0x03 },
	};

	const struct ov_regvals compress_511[] = {
		{ 0x70, 0x1f },
		{ 0x71, 0x05 },
		{ 0x72, 0x06 },
		{ 0x73, 0x06 },
		{ 0x74, 0x14 },
		{ 0x75, 0x03 },
		{ 0x76, 0x04 },
		{ 0x77, 0x04 },
	};

	PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));

2804
	write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2805 2806 2807

	switch (sd->bridge) {
	case BRIDGE_OV511:
2808
		write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2809 2810
		break;
	case BRIDGE_OV511PLUS:
2811
		write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2812 2813 2814 2815
		break;
	}

	/* Init compression */
2816
	write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2817

2818
	ov51x_upload_quan_tables(sd);
2819 2820
}

2821
/* This initializes the OV518/OV518+ and the sensor */
2822
static void ov518_configure(struct gspca_dev *gspca_dev)
2823 2824
{
	struct sd *sd = (struct sd *) gspca_dev;
2825 2826

	/* For 518 and 518+ */
2827
	const struct ov_regvals init_518[] = {
2828 2829 2830 2831 2832 2833 2834 2835 2836 2837
		{ R51x_SYS_RESET,	0x40 },
		{ R51x_SYS_INIT,	0xe1 },
		{ R51x_SYS_RESET,	0x3e },
		{ R51x_SYS_INIT,	0xe1 },
		{ R51x_SYS_RESET,	0x00 },
		{ R51x_SYS_INIT,	0xe1 },
		{ 0x46,			0x00 },
		{ 0x5d,			0x03 },
	};

2838
	const struct ov_regvals norm_518[] = {
2839 2840
		{ R51x_SYS_SNAP,	0x02 }, /* Reset */
		{ R51x_SYS_SNAP,	0x01 }, /* Enable */
2841
		{ 0x31,			0x0f },
2842 2843 2844 2845 2846 2847 2848 2849 2850
		{ 0x5d,			0x03 },
		{ 0x24,			0x9f },
		{ 0x25,			0x90 },
		{ 0x20,			0x00 },
		{ 0x51,			0x04 },
		{ 0x71,			0x19 },
		{ 0x2f,			0x80 },
	};

2851
	const struct ov_regvals norm_518_p[] = {
2852 2853
		{ R51x_SYS_SNAP,	0x02 }, /* Reset */
		{ R51x_SYS_SNAP,	0x01 }, /* Enable */
2854
		{ 0x31,			0x0f },
2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871
		{ 0x5d,			0x03 },
		{ 0x24,			0x9f },
		{ 0x25,			0x90 },
		{ 0x20,			0x60 },
		{ 0x51,			0x02 },
		{ 0x71,			0x19 },
		{ 0x40,			0xff },
		{ 0x41,			0x42 },
		{ 0x46,			0x00 },
		{ 0x33,			0x04 },
		{ 0x21,			0x19 },
		{ 0x3f,			0x10 },
		{ 0x2f,			0x80 },
	};

	/* First 5 bits of custom ID reg are a revision ID on OV518 */
	PDEBUG(D_PROBE, "Device revision %d",
2872
		0x1f & reg_r(sd, R51x_SYS_CUST_ID));
2873

2874
	write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2875 2876

	/* Set LED GPIO pin to output mode */
2877
	reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2878

2879 2880
	switch (sd->bridge) {
	case BRIDGE_OV518:
2881
		write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2882 2883
		break;
	case BRIDGE_OV518PLUS:
2884
		write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2885 2886 2887
		break;
	}

2888
	ov51x_upload_quan_tables(sd);
2889

2890
	reg_w(sd, 0x2f, 0x80);
2891 2892
}

2893
static void ov519_configure(struct sd *sd)
2894
{
2895
	static const struct ov_regvals init_519[] = {
2896 2897
		{ 0x5a, 0x6d }, /* EnableSystem */
		{ 0x53, 0x9b },
2898
		{ OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
2899 2900 2901
		{ 0x5d, 0x03 },
		{ 0x49, 0x01 },
		{ 0x48, 0x00 },
2902 2903 2904
		/* Set LED pin to output mode. Bit 4 must be cleared or sensor
		 * detection will fail. This deserves further investigation. */
		{ OV519_GPIO_IO_CTRL0,   0xee },
2905 2906
		{ OV519_R51_RESET1, 0x0f },
		{ OV519_R51_RESET1, 0x00 },
2907
		{ 0x22, 0x00 },
2908 2909 2910
		/* windows reads 0x55 at this point*/
	};

2911
	write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2912 2913
}

2914
static void ovfx2_configure(struct sd *sd)
2915 2916 2917 2918 2919 2920 2921 2922 2923 2924 2925 2926 2927
{
	static const struct ov_regvals init_fx2[] = {
		{ 0x00, 0x60 },
		{ 0x02, 0x01 },
		{ 0x0f, 0x1d },
		{ 0xe9, 0x82 },
		{ 0xea, 0xc7 },
		{ 0xeb, 0x10 },
		{ 0xec, 0xf6 },
	};

	sd->stopped = 1;

2928
	write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
2929 2930
}

2931 2932 2933 2934 2935
/* this function is called at probe time */
static int sd_config(struct gspca_dev *gspca_dev,
			const struct usb_device_id *id)
{
	struct sd *sd = (struct sd *) gspca_dev;
2936
	struct cam *cam = &gspca_dev->cam;
2937

2938 2939
	sd->bridge = id->driver_info & BRIDGE_MASK;
	sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
2940 2941

	switch (sd->bridge) {
2942 2943
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2944
		ov511_configure(gspca_dev);
2945
		break;
2946 2947
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
2948
		ov518_configure(gspca_dev);
2949 2950
		break;
	case BRIDGE_OV519:
2951
		ov519_configure(sd);
2952
		break;
2953
	case BRIDGE_OVFX2:
2954
		ovfx2_configure(sd);
2955 2956 2957 2958
		cam->bulk_size = OVFX2_BULK_SIZE;
		cam->bulk_nurbs = MAX_NURBS;
		cam->bulk = 1;
		break;
2959
	case BRIDGE_W9968CF:
2960
		w9968cf_configure(sd);
2961 2962
		cam->reverse_alts = 1;
		break;
2963 2964
	}

2965 2966 2967 2968 2969
	ov51x_led_control(sd, 0);	/* turn LED off */

	/* The OV519 must be more aggressive about sensor detection since
	 * I2C write will never fail if the sensor is not present. We have
	 * to try to initialize the sensor to detect its presence */
2970
	sd->sensor = -1;
2971 2972 2973

	/* Test for 76xx */
	if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
2974 2975
		ov7xx0_configure(sd);

2976 2977
	/* Test for 6xx0 */
	} else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
2978 2979
		ov6xx0_configure(sd);

2980 2981
	/* Test for 8xx0 */
	} else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
2982 2983
		ov8xx0_configure(sd);

2984 2985
	/* Test for 3xxx / 2xxx */
	} else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
2986
		ov_hires_configure(sd);
2987
	} else {
2988
		err("Can't determine sensor slave IDs");
2989
		goto error;
2990 2991
	}

2992 2993 2994
	if (sd->sensor < 0)
		goto error;

2995
	switch (sd->bridge) {
2996 2997 2998 2999 3000 3001 3002 3003 3004 3005
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		if (!sd->sif) {
			cam->cam_mode = ov511_vga_mode;
			cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
		} else {
			cam->cam_mode = ov511_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
		}
		break;
3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		if (!sd->sif) {
			cam->cam_mode = ov518_vga_mode;
			cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
		} else {
			cam->cam_mode = ov518_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
		}
		break;
	case BRIDGE_OV519:
		if (!sd->sif) {
			cam->cam_mode = ov519_vga_mode;
			cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
		} else {
			cam->cam_mode = ov519_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
		}
		break;
3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039
	case BRIDGE_OVFX2:
		if (sd->sensor == SEN_OV2610) {
			cam->cam_mode = ovfx2_ov2610_mode;
			cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
		} else if (sd->sensor == SEN_OV3610) {
			cam->cam_mode = ovfx2_ov3610_mode;
			cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
		} else if (!sd->sif) {
			cam->cam_mode = ov519_vga_mode;
			cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
		} else {
			cam->cam_mode = ov519_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
		}
		break;
3040 3041 3042
	case BRIDGE_W9968CF:
		cam->cam_mode = w9968cf_vga_mode;
		cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3043 3044
		if (sd->sif)
			cam->nmodes--;
3045 3046

		/* w9968cf needs initialisation once the sensor is known */
3047
		w9968cf_init(sd);
3048
		break;
3049
	}
3050
	gspca_dev->cam.ctrls = sd->ctrls;
3051
	sd->quality = QUALITY_DEF;
3052 3053

	gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
3054

3055
	return gspca_dev->usb_err;
3056 3057
error:
	PDEBUG(D_ERR, "OV519 Config failed");
3058
	return -EINVAL;
3059 3060
}

3061 3062
/* this function is called at probe and resume time */
static int sd_init(struct gspca_dev *gspca_dev)
3063
{
3064 3065 3066 3067
	struct sd *sd = (struct sd *) gspca_dev;

	/* initialize the sensor */
	switch (sd->sensor) {
3068
	case SEN_OV2610:
3069 3070
		write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));

3071
		/* Enable autogain, autoexpo, awb, bandfilter */
3072
		i2c_w_mask(sd, 0x13, 0x27, 0x27);
3073 3074
		break;
	case SEN_OV3610:
3075 3076
		write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));

3077
		/* Enable autogain, autoexpo, awb, bandfilter */
3078
		i2c_w_mask(sd, 0x13, 0x27, 0x27);
3079
		break;
3080
	case SEN_OV6620:
3081
		write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3082 3083
		break;
	case SEN_OV6630:
3084
	case SEN_OV66308AF:
3085 3086
		sd->ctrls[CONTRAST].def = 200;
				 /* The default is too low for the ov6630 */
3087
		write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3088 3089 3090 3091
		break;
	default:
/*	case SEN_OV7610: */
/*	case SEN_OV76BE: */
3092 3093
		write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
		i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3094 3095
		break;
	case SEN_OV7620:
3096
	case SEN_OV7620AE:
3097
		write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3098 3099
		break;
	case SEN_OV7640:
3100
	case SEN_OV7648:
3101
		write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3102 3103
		break;
	case SEN_OV7670:
3104 3105
		sd->ctrls[FREQ].max = 3;	/* auto */
		sd->ctrls[FREQ].def = 3;
3106
		write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3107 3108
		break;
	case SEN_OV8610:
3109
		write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3110 3111
		break;
	}
3112
	return gspca_dev->usb_err;
3113 3114
}

3115 3116 3117 3118
/* Set up the OV511/OV511+ with the given image parameters.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
3119
static void ov511_mode_init_regs(struct sd *sd)
3120 3121 3122 3123 3124 3125 3126 3127 3128
{
	int hsegs, vsegs, packet_size, fps, needed;
	int interlaced = 0;
	struct usb_host_interface *alt;
	struct usb_interface *intf;

	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
	if (!alt) {
3129
		err("Couldn't get altsetting");
3130 3131
		sd->gspca_dev.usb_err = -EIO;
		return;
3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173
	}

	packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
	reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);

	reg_w(sd, R511_CAM_UV_EN, 0x01);
	reg_w(sd, R511_SNAP_UV_EN, 0x01);
	reg_w(sd, R511_SNAP_OPTS, 0x03);

	/* Here I'm assuming that snapshot size == image size.
	 * I hope that's always true. --claudio
	 */
	hsegs = (sd->gspca_dev.width >> 3) - 1;
	vsegs = (sd->gspca_dev.height >> 3) - 1;

	reg_w(sd, R511_CAM_PXCNT, hsegs);
	reg_w(sd, R511_CAM_LNCNT, vsegs);
	reg_w(sd, R511_CAM_PXDIV, 0x00);
	reg_w(sd, R511_CAM_LNDIV, 0x00);

	/* YUV420, low pass filter on */
	reg_w(sd, R511_CAM_OPTS, 0x03);

	/* Snapshot additions */
	reg_w(sd, R511_SNAP_PXCNT, hsegs);
	reg_w(sd, R511_SNAP_LNCNT, vsegs);
	reg_w(sd, R511_SNAP_PXDIV, 0x00);
	reg_w(sd, R511_SNAP_LNDIV, 0x00);

	/******** Set the framerate ********/
	if (frame_rate > 0)
		sd->frame_rate = frame_rate;

	switch (sd->sensor) {
	case SEN_OV6620:
		/* No framerate control, doesn't like higher rates yet */
		sd->clockdiv = 3;
		break;

	/* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
	   for more sensors we need to do this for them too */
	case SEN_OV7620:
3174
	case SEN_OV7620AE:
3175
	case SEN_OV7640:
3176
	case SEN_OV7648:
3177
	case SEN_OV76BE:
3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235
		if (sd->gspca_dev.width == 320)
			interlaced = 1;
		/* Fall through */
	case SEN_OV6630:
	case SEN_OV7610:
	case SEN_OV7670:
		switch (sd->frame_rate) {
		case 30:
		case 25:
			/* Not enough bandwidth to do 640x480 @ 30 fps */
			if (sd->gspca_dev.width != 640) {
				sd->clockdiv = 0;
				break;
			}
			/* Fall through for 640x480 case */
		default:
/*		case 20: */
/*		case 15: */
			sd->clockdiv = 1;
			break;
		case 10:
			sd->clockdiv = 2;
			break;
		case 5:
			sd->clockdiv = 5;
			break;
		}
		if (interlaced) {
			sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
			/* Higher then 10 does not work */
			if (sd->clockdiv > 10)
				sd->clockdiv = 10;
		}
		break;

	case SEN_OV8610:
		/* No framerate control ?? */
		sd->clockdiv = 0;
		break;
	}

	/* Check if we have enough bandwidth to disable compression */
	fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
	needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
	/* 1400 is a conservative estimate of the max nr of isoc packets/sec */
	if (needed > 1400 * packet_size) {
		/* Enable Y and UV quantization and compression */
		reg_w(sd, R511_COMP_EN, 0x07);
		reg_w(sd, R511_COMP_LUT_EN, 0x03);
	} else {
		reg_w(sd, R511_COMP_EN, 0x06);
		reg_w(sd, R511_COMP_LUT_EN, 0x00);
	}

	reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
	reg_w(sd, R51x_SYS_RESET, 0);
}

3236 3237 3238 3239 3240 3241 3242
/* Sets up the OV518/OV518+ with the given image parameters
 *
 * OV518 needs a completely different approach, until we can figure out what
 * the individual registers do. Also, only 15 FPS is supported now.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
3243
static void ov518_mode_init_regs(struct sd *sd)
3244
{
3245 3246 3247 3248 3249 3250 3251
	int hsegs, vsegs, packet_size;
	struct usb_host_interface *alt;
	struct usb_interface *intf;

	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
	if (!alt) {
3252
		err("Couldn't get altsetting");
3253 3254
		sd->gspca_dev.usb_err = -EIO;
		return;
3255 3256 3257 3258
	}

	packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
	ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293

	/******** Set the mode ********/
	reg_w(sd, 0x2b, 0);
	reg_w(sd, 0x2c, 0);
	reg_w(sd, 0x2d, 0);
	reg_w(sd, 0x2e, 0);
	reg_w(sd, 0x3b, 0);
	reg_w(sd, 0x3c, 0);
	reg_w(sd, 0x3d, 0);
	reg_w(sd, 0x3e, 0);

	if (sd->bridge == BRIDGE_OV518) {
		/* Set 8-bit (YVYU) input format */
		reg_w_mask(sd, 0x20, 0x08, 0x08);

		/* Set 12-bit (4:2:0) output format */
		reg_w_mask(sd, 0x28, 0x80, 0xf0);
		reg_w_mask(sd, 0x38, 0x80, 0xf0);
	} else {
		reg_w(sd, 0x28, 0x80);
		reg_w(sd, 0x38, 0x80);
	}

	hsegs = sd->gspca_dev.width / 16;
	vsegs = sd->gspca_dev.height / 4;

	reg_w(sd, 0x29, hsegs);
	reg_w(sd, 0x2a, vsegs);

	reg_w(sd, 0x39, hsegs);
	reg_w(sd, 0x3a, vsegs);

	/* Windows driver does this here; who knows why */
	reg_w(sd, 0x2f, 0x80);

3294
	/******** Set the framerate ********/
3295
	sd->clockdiv = 1;
3296 3297

	/* Mode independent, but framerate dependent, regs */
3298 3299
	/* 0x51: Clock divider; Only works on some cams which use 2 crystals */
	reg_w(sd, 0x51, 0x04);
3300 3301 3302
	reg_w(sd, 0x22, 0x18);
	reg_w(sd, 0x23, 0xff);

3303 3304
	if (sd->bridge == BRIDGE_OV518PLUS) {
		switch (sd->sensor) {
3305
		case SEN_OV7620AE:
3306 3307 3308 3309 3310 3311 3312 3313
			if (sd->gspca_dev.width == 320) {
				reg_w(sd, 0x20, 0x00);
				reg_w(sd, 0x21, 0x19);
			} else {
				reg_w(sd, 0x20, 0x60);
				reg_w(sd, 0x21, 0x1f);
			}
			break;
3314 3315 3316 3317
		case SEN_OV7620:
			reg_w(sd, 0x20, 0x00);
			reg_w(sd, 0x21, 0x19);
			break;
3318 3319 3320 3321
		default:
			reg_w(sd, 0x21, 0x19);
		}
	} else
3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358
		reg_w(sd, 0x71, 0x17);	/* Compression-related? */

	/* FIXME: Sensor-specific */
	/* Bit 5 is what matters here. Of course, it is "reserved" */
	i2c_w(sd, 0x54, 0x23);

	reg_w(sd, 0x2f, 0x80);

	if (sd->bridge == BRIDGE_OV518PLUS) {
		reg_w(sd, 0x24, 0x94);
		reg_w(sd, 0x25, 0x90);
		ov518_reg_w32(sd, 0xc4,    400, 2);	/* 190h   */
		ov518_reg_w32(sd, 0xc6,    540, 2);	/* 21ch   */
		ov518_reg_w32(sd, 0xc7,    540, 2);	/* 21ch   */
		ov518_reg_w32(sd, 0xc8,    108, 2);	/* 6ch    */
		ov518_reg_w32(sd, 0xca, 131098, 3);	/* 2001ah */
		ov518_reg_w32(sd, 0xcb,    532, 2);	/* 214h   */
		ov518_reg_w32(sd, 0xcc,   2400, 2);	/* 960h   */
		ov518_reg_w32(sd, 0xcd,     32, 2);	/* 20h    */
		ov518_reg_w32(sd, 0xce,    608, 2);	/* 260h   */
	} else {
		reg_w(sd, 0x24, 0x9f);
		reg_w(sd, 0x25, 0x90);
		ov518_reg_w32(sd, 0xc4,    400, 2);	/* 190h   */
		ov518_reg_w32(sd, 0xc6,    381, 2);	/* 17dh   */
		ov518_reg_w32(sd, 0xc7,    381, 2);	/* 17dh   */
		ov518_reg_w32(sd, 0xc8,    128, 2);	/* 80h    */
		ov518_reg_w32(sd, 0xca, 183331, 3);	/* 2cc23h */
		ov518_reg_w32(sd, 0xcb,    746, 2);	/* 2eah   */
		ov518_reg_w32(sd, 0xcc,   1750, 2);	/* 6d6h   */
		ov518_reg_w32(sd, 0xcd,     45, 2);	/* 2dh    */
		ov518_reg_w32(sd, 0xce,    851, 2);	/* 353h   */
	}

	reg_w(sd, 0x2f, 0x80);
}

3359 3360 3361 3362 3363 3364 3365
/* Sets up the OV519 with the given image parameters
 *
 * OV519 needs a completely different approach, until we can figure out what
 * the individual registers do.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
3366
static void ov519_mode_init_regs(struct sd *sd)
3367
{
3368
	static const struct ov_regvals mode_init_519_ov7670[] = {
3369 3370
		{ 0x5d,	0x03 }, /* Turn off suspend mode */
		{ 0x53,	0x9f }, /* was 9b in 1.65-1.08 */
3371
		{ OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390
		{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
		{ 0xa3,	0x18 },
		{ 0xa4,	0x04 },
		{ 0xa5,	0x28 },
		{ 0x37,	0x00 },	/* SetUsbInit */
		{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
		/* Enable both fields, YUV Input, disable defect comp (why?) */
		{ 0x20,	0x0c },
		{ 0x21,	0x38 },
		{ 0x22,	0x1d },
		{ 0x17,	0x50 }, /* undocumented */
		{ 0x37,	0x00 }, /* undocumented */
		{ 0x40,	0xff }, /* I2C timeout counter */
		{ 0x46,	0x00 }, /* I2C clock prescaler */
		{ 0x59,	0x04 },	/* new from windrv 090403 */
		{ 0xff,	0x00 }, /* undocumented */
		/* windows reads 0x55 at this point, why? */
	};

3391
	static const struct ov_regvals mode_init_519[] = {
3392 3393
		{ 0x5d,	0x03 }, /* Turn off suspend mode */
		{ 0x53,	0x9f }, /* was 9b in 1.65-1.08 */
3394
		{ OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413
		{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
		{ 0xa3,	0x18 },
		{ 0xa4,	0x04 },
		{ 0xa5,	0x28 },
		{ 0x37,	0x00 },	/* SetUsbInit */
		{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
		/* Enable both fields, YUV Input, disable defect comp (why?) */
		{ 0x22,	0x1d },
		{ 0x17,	0x50 }, /* undocumented */
		{ 0x37,	0x00 }, /* undocumented */
		{ 0x40,	0xff }, /* I2C timeout counter */
		{ 0x46,	0x00 }, /* I2C clock prescaler */
		{ 0x59,	0x04 },	/* new from windrv 090403 */
		{ 0xff,	0x00 }, /* undocumented */
		/* windows reads 0x55 at this point, why? */
	};

	/******** Set the mode ********/
	if (sd->sensor != SEN_OV7670) {
3414
		write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3415 3416
		if (sd->sensor == SEN_OV7640 ||
		    sd->sensor == SEN_OV7648) {
3417
			/* Select 8-bit input mode */
3418
			reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3419
		}
3420
	} else {
3421 3422
		write_regvals(sd, mode_init_519_ov7670,
				ARRAY_SIZE(mode_init_519_ov7670));
3423 3424
	}

3425 3426
	reg_w(sd, OV519_R10_H_SIZE,	sd->gspca_dev.width >> 4);
	reg_w(sd, OV519_R11_V_SIZE,	sd->gspca_dev.height >> 3);
3427 3428 3429
	if (sd->sensor == SEN_OV7670 &&
	    sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
		reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3430 3431 3432
	else if (sd->sensor == SEN_OV7648 &&
	    sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
		reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3433 3434
	else
		reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3435 3436 3437 3438 3439
	reg_w(sd, OV519_R13_X_OFFSETH,	0x00);
	reg_w(sd, OV519_R14_Y_OFFSETL,	0x00);
	reg_w(sd, OV519_R15_Y_OFFSETH,	0x00);
	reg_w(sd, OV519_R16_DIVIDER,	0x00);
	reg_w(sd, OV519_R25_FORMAT,	0x03); /* YUV422 */
3440 3441 3442 3443 3444 3445 3446 3447
	reg_w(sd, 0x26,			0x00); /* Undocumented */

	/******** Set the framerate ********/
	if (frame_rate > 0)
		sd->frame_rate = frame_rate;

/* FIXME: These are only valid at the max resolution. */
	sd->clockdiv = 0;
3448 3449
	switch (sd->sensor) {
	case SEN_OV7640:
3450
	case SEN_OV7648:
3451
		switch (sd->frame_rate) {
3452 3453
		default:
/*		case 30: */
3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0xff);
			break;
		case 25:
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0x1f);
			break;
		case 20:
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0x1b);
			break;
3465
		case 15:
3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0xff);
			sd->clockdiv = 1;
			break;
		case 10:
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0x1f);
			sd->clockdiv = 1;
			break;
		case 5:
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0x1b);
			sd->clockdiv = 1;
			break;
		}
3481 3482
		break;
	case SEN_OV8610:
3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497
		switch (sd->frame_rate) {
		default:	/* 15 fps */
/*		case 15: */
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0xff);
			break;
		case 10:
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0x1f);
			break;
		case 5:
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0x1b);
			break;
		}
3498 3499
		break;
	case SEN_OV7670:		/* guesses, based on 7640 */
3500 3501
		PDEBUG(D_STREAM, "Setting framerate to %d fps",
				 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3502
		reg_w(sd, 0xa4, 0x10);
3503 3504 3505 3506 3507 3508 3509
		switch (sd->frame_rate) {
		case 30:
			reg_w(sd, 0x23, 0xff);
			break;
		case 20:
			reg_w(sd, 0x23, 0x1b);
			break;
3510 3511
		default:
/*		case 15: */
3512 3513 3514 3515
			reg_w(sd, 0x23, 0xff);
			sd->clockdiv = 1;
			break;
		}
3516
		break;
3517 3518 3519
	}
}

3520
static void mode_init_ov_sensor_regs(struct sd *sd)
3521
{
3522
	struct gspca_dev *gspca_dev;
3523
	int qvga, xstart, xend, ystart, yend;
3524
	u8 v;
3525 3526

	gspca_dev = &sd->gspca_dev;
3527
	qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3528 3529 3530

	/******** Mode (VGA/QVGA) and sensor specific regs ********/
	switch (sd->sensor) {
3531 3532 3533 3534 3535 3536 3537 3538
	case SEN_OV2610:
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
		i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
		i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
		i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3539
		return;
3540
	case SEN_OV3610:
3541 3542
		if (qvga) {
			xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3543
			ystart = (776 - gspca_dev->height) / 2;
3544
		} else {
3545
			xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562
			ystart = (1544 - gspca_dev->height) / 2;
		}
		xend = xstart + gspca_dev->width;
		yend = ystart + gspca_dev->height;
		/* Writing to the COMH register resets the other windowing regs
		   to their default values, so we must do this first. */
		i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
		i2c_w_mask(sd, 0x32,
			   (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
			   0x3f);
		i2c_w_mask(sd, 0x03,
			   (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
			   0x0f);
		i2c_w(sd, 0x17, xstart >> 4);
		i2c_w(sd, 0x18, xend >> 4);
		i2c_w(sd, 0x19, ystart >> 3);
		i2c_w(sd, 0x1a, yend >> 3);
3563
		return;
3564 3565 3566
	case SEN_OV8610:
		/* For OV8610 qvga means qsvga */
		i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3567 3568 3569 3570
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
		i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3571 3572 3573
		break;
	case SEN_OV7610:
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3574
		i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3575 3576
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3577 3578
		break;
	case SEN_OV7620:
3579
	case SEN_OV7620AE:
3580
	case SEN_OV76BE:
3581 3582 3583 3584 3585
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
		i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
		i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3586
		i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3587
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3588 3589 3590 3591
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		if (sd->sensor == SEN_OV76BE)
			i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3592 3593
		break;
	case SEN_OV7640:
3594
	case SEN_OV7648:
3595 3596
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3597 3598
		/* Setting this undocumented bit in qvga mode removes a very
		   annoying vertical shaking of the image */
3599
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3600
		/* Unknown */
3601
		i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3602
		/* Allow higher automatic gain (to allow higher framerates) */
3603
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3604
		i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3605 3606 3607 3608 3609
		break;
	case SEN_OV7670:
		/* set COM7_FMT_VGA or COM7_FMT_QVGA
		 * do we need to set anything else?
		 *	HSTART etc are set in set_ov_sensor_window itself */
3610
		i2c_w_mask(sd, OV7670_R12_COM7,
3611 3612
			 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
			 OV7670_COM7_FMT_MASK);
3613
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3614
		i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629
				OV7670_COM8_AWB);
		if (qvga) {		/* QVGA from ov7670.c by
					 * Jonathan Corbet */
			xstart = 164;
			xend = 28;
			ystart = 14;
			yend = 494;
		} else {		/* VGA */
			xstart = 158;
			xend = 14;
			ystart = 10;
			yend = 490;
		}
		/* OV7670 hardware window registers are split across
		 * multiple locations */
3630 3631 3632
		i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
		i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
		v = i2c_r(sd, OV7670_R32_HREF);
3633 3634 3635
		v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
		msleep(10);	/* need to sleep between read and write to
				 * same reg! */
3636
		i2c_w(sd, OV7670_R32_HREF, v);
3637

3638 3639 3640
		i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
		i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
		v = i2c_r(sd, OV7670_R03_VREF);
3641 3642 3643
		v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
		msleep(10);	/* need to sleep between read and write to
				 * same reg! */
3644
		i2c_w(sd, OV7670_R03_VREF, v);
3645 3646
		break;
	case SEN_OV6620:
3647 3648 3649 3650
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		break;
3651
	case SEN_OV6630:
3652
	case SEN_OV66308AF:
3653
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3654
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3655 3656
		break;
	default:
3657
		return;
3658 3659 3660
	}

	/******** Clock programming ********/
3661
	i2c_w(sd, 0x11, sd->clockdiv);
3662 3663
}

3664
static void sethvflip(struct gspca_dev *gspca_dev)
3665
{
3666 3667
	struct sd *sd = (struct sd *) gspca_dev;

3668 3669
	if (sd->sensor != SEN_OV7670)
		return;
3670 3671
	if (sd->gspca_dev.streaming)
		ov51x_stop(sd);
3672
	i2c_w_mask(sd, OV7670_R1E_MVFP,
3673 3674
		OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
			| OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
3675
		OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3676 3677 3678 3679
	if (sd->gspca_dev.streaming)
		ov51x_restart(sd);
}

3680
static void set_ov_sensor_window(struct sd *sd)
3681
{
3682
	struct gspca_dev *gspca_dev;
3683
	int qvga, crop;
3684 3685
	int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;

3686
	/* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3687
	if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3688 3689 3690 3691
	    sd->sensor == SEN_OV7670) {
		mode_init_ov_sensor_regs(sd);
		return;
	}
3692
	gspca_dev = &sd->gspca_dev;
3693 3694
	qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
	crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
3695

3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712
	/* The different sensor ICs handle setting up of window differently.
	 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
	switch (sd->sensor) {
	case SEN_OV8610:
		hwsbase = 0x1e;
		hwebase = 0x1e;
		vwsbase = 0x02;
		vwebase = 0x02;
		break;
	case SEN_OV7610:
	case SEN_OV76BE:
		hwsbase = 0x38;
		hwebase = 0x3a;
		vwsbase = vwebase = 0x05;
		break;
	case SEN_OV6620:
	case SEN_OV6630:
3713
	case SEN_OV66308AF:
3714 3715 3716 3717
		hwsbase = 0x38;
		hwebase = 0x3a;
		vwsbase = 0x05;
		vwebase = 0x06;
3718
		if (sd->sensor == SEN_OV66308AF && qvga)
3719
			/* HDG: this fixes U and V getting swapped */
3720
			hwsbase++;
3721 3722 3723 3724 3725 3726
		if (crop) {
			hwsbase += 8;
			hwebase += 8;
			vwsbase += 11;
			vwebase += 11;
		}
3727 3728
		break;
	case SEN_OV7620:
3729
	case SEN_OV7620AE:
3730 3731 3732 3733 3734
		hwsbase = 0x2f;		/* From 7620.SET (spec is wrong) */
		hwebase = 0x2f;
		vwsbase = vwebase = 0x05;
		break;
	case SEN_OV7640:
3735
	case SEN_OV7648:
3736 3737 3738 3739 3740
		hwsbase = 0x1a;
		hwebase = 0x1a;
		vwsbase = vwebase = 0x03;
		break;
	default:
3741
		return;
3742 3743 3744 3745 3746
	}

	switch (sd->sensor) {
	case SEN_OV6620:
	case SEN_OV6630:
3747
	case SEN_OV66308AF:
3748
		if (qvga) {		/* QCIF */
3749 3750 3751 3752 3753 3754 3755 3756 3757
			hwscale = 0;
			vwscale = 0;
		} else {		/* CIF */
			hwscale = 1;
			vwscale = 1;	/* The datasheet says 0;
					 * it's wrong */
		}
		break;
	case SEN_OV8610:
3758
		if (qvga) {		/* QSVGA */
3759 3760 3761 3762 3763 3764 3765 3766
			hwscale = 1;
			vwscale = 1;
		} else {		/* SVGA */
			hwscale = 2;
			vwscale = 2;
		}
		break;
	default:			/* SEN_OV7xx0 */
3767
		if (qvga) {		/* QVGA */
3768 3769 3770 3771 3772 3773 3774 3775
			hwscale = 1;
			vwscale = 0;
		} else {		/* VGA */
			hwscale = 2;
			vwscale = 1;
		}
	}

3776
	mode_init_ov_sensor_regs(sd);
3777

3778
	i2c_w(sd, 0x17, hwsbase);
3779
	i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3780
	i2c_w(sd, 0x19, vwsbase);
3781
	i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3782 3783 3784
}

/* -- start the camera -- */
3785
static int sd_start(struct gspca_dev *gspca_dev)
3786 3787 3788
{
	struct sd *sd = (struct sd *) gspca_dev;

3789 3790 3791 3792
	/* Default for most bridges, allow bridge_mode_init_regs to override */
	sd->sensor_width = sd->gspca_dev.width;
	sd->sensor_height = sd->gspca_dev.height;

3793
	switch (sd->bridge) {
3794 3795
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
3796
		ov511_mode_init_regs(sd);
3797
		break;
3798 3799
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
3800
		ov518_mode_init_regs(sd);
3801 3802
		break;
	case BRIDGE_OV519:
3803
		ov519_mode_init_regs(sd);
3804
		break;
3805
	/* case BRIDGE_OVFX2: nothing to do */
3806
	case BRIDGE_W9968CF:
3807
		w9968cf_mode_init_regs(sd);
3808
		break;
3809 3810
	}

3811
	set_ov_sensor_window(sd);
3812

3813 3814 3815
	setcontrast(gspca_dev);
	setbrightness(gspca_dev);
	setcolors(gspca_dev);
3816 3817 3818
	sethvflip(gspca_dev);
	setautobright(gspca_dev);
	setfreq_i(sd);
3819

3820 3821 3822 3823 3824
	/* Force clear snapshot state in case the snapshot button was
	   pressed while we weren't streaming */
	sd->snapshot_needs_reset = 1;
	sd_reset_snapshot(gspca_dev);

3825 3826
	sd->first_frame = 3;

3827
	ov51x_restart(sd);
3828
	ov51x_led_control(sd, 1);
3829
	return gspca_dev->usb_err;
3830 3831 3832 3833
}

static void sd_stopN(struct gspca_dev *gspca_dev)
{
3834 3835 3836 3837
	struct sd *sd = (struct sd *) gspca_dev;

	ov51x_stop(sd);
	ov51x_led_control(sd, 0);
3838 3839
}

3840 3841 3842 3843
static void sd_stop0(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

3844 3845
	if (!sd->gspca_dev.present)
		return;
3846 3847
	if (sd->bridge == BRIDGE_W9968CF)
		w9968cf_stop0(sd);
3848

3849
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
3850 3851 3852 3853 3854 3855 3856
	/* If the last button state is pressed, release it now! */
	if (sd->snapshot_pressed) {
		input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
		input_sync(gspca_dev->input_dev);
		sd->snapshot_pressed = 0;
	}
#endif
3857 3858
}

3859 3860 3861 3862 3863
static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->snapshot_pressed != state) {
3864
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
3865 3866 3867 3868 3869 3870 3871 3872
		input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
		input_sync(gspca_dev->input_dev);
#endif
		if (state)
			sd->snapshot_needs_reset = 1;

		sd->snapshot_pressed = state;
	} else {
3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883
		/* On the ov511 / ov519 we need to reset the button state
		   multiple times, as resetting does not work as long as the
		   button stays pressed */
		switch (sd->bridge) {
		case BRIDGE_OV511:
		case BRIDGE_OV511PLUS:
		case BRIDGE_OV519:
			if (state)
				sd->snapshot_needs_reset = 1;
			break;
		}
3884 3885 3886
	}
}

3887
static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3888 3889
			u8 *in,			/* isoc packet */
			int len)		/* iso packet length */
3890 3891 3892 3893 3894 3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907
{
	struct sd *sd = (struct sd *) gspca_dev;

	/* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
	 * byte non-zero. The EOF packet has image width/height in the
	 * 10th and 11th bytes. The 9th byte is given as follows:
	 *
	 * bit 7: EOF
	 *     6: compression enabled
	 *     5: 422/420/400 modes
	 *     4: 422/420/400 modes
	 *     3: 1
	 *     2: snapshot button on
	 *     1: snapshot frame
	 *     0: even/odd field
	 */
	if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
	    (in[8] & 0x08)) {
3908
		ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 3919 3920
		if (in[8] & 0x80) {
			/* Frame end */
			if ((in[9] + 1) * 8 != gspca_dev->width ||
			    (in[10] + 1) * 8 != gspca_dev->height) {
				PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
					" requested: %dx%d\n",
					(in[9] + 1) * 8, (in[10] + 1) * 8,
					gspca_dev->width, gspca_dev->height);
				gspca_dev->last_packet_type = DISCARD_PACKET;
				return;
			}
			/* Add 11 byte footer to frame, might be usefull */
3921
			gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
3922 3923 3924
			return;
		} else {
			/* Frame start */
3925
			gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
3926 3927 3928 3929 3930 3931 3932 3933
			sd->packet_nr = 0;
		}
	}

	/* Ignore the packet number */
	len--;

	/* intermediate packet */
3934
	gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
3935 3936
}

3937
static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
3938
			u8 *data,			/* isoc packet */
3939 3940
			int len)			/* iso packet length */
{
3941
	struct sd *sd = (struct sd *) gspca_dev;
3942 3943 3944 3945

	/* A false positive here is likely, until OVT gives me
	 * the definitive SOF/EOF format */
	if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
3946
		ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
3947 3948
		gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
		gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
3949 3950 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968
		sd->packet_nr = 0;
	}

	if (gspca_dev->last_packet_type == DISCARD_PACKET)
		return;

	/* Does this device use packet numbers ? */
	if (len & 7) {
		len--;
		if (sd->packet_nr == data[len])
			sd->packet_nr++;
		/* The last few packets of the frame (which are all 0's
		   except that they may contain part of the footer), are
		   numbered 0 */
		else if (sd->packet_nr == 0 || data[len]) {
			PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
				(int)data[len], (int)sd->packet_nr);
			gspca_dev->last_packet_type = DISCARD_PACKET;
			return;
		}
3969 3970 3971
	}

	/* intermediate packet */
3972
	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
3973 3974 3975
}

static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
3976
			u8 *data,			/* isoc packet */
3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993
			int len)			/* iso packet length */
{
	/* Header of ov519 is 16 bytes:
	 *     Byte     Value      Description
	 *	0	0xff	magic
	 *	1	0xff	magic
	 *	2	0xff	magic
	 *	3	0xXX	0x50 = SOF, 0x51 = EOF
	 *	9	0xXX	0x01 initial frame without data,
	 *			0x00 standard frame with image
	 *	14	Lo	in EOF: length of image data / 8
	 *	15	Hi
	 */

	if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
		switch (data[3]) {
		case 0x50:		/* start of frame */
3994 3995 3996
			/* Don't check the button state here, as the state
			   usually (always ?) changes at EOF and checking it
			   here leads to unnecessary snapshot state resets. */
3997 3998 3999 4000 4001
#define HDRSZ 16
			data += HDRSZ;
			len -= HDRSZ;
#undef HDRSZ
			if (data[0] == 0xff || data[1] == 0xd8)
4002
				gspca_frame_add(gspca_dev, FIRST_PACKET,
4003 4004 4005 4006 4007
						data, len);
			else
				gspca_dev->last_packet_type = DISCARD_PACKET;
			return;
		case 0x51:		/* end of frame */
4008
			ov51x_handle_button(gspca_dev, data[11] & 1);
4009 4010
			if (data[9] != 0)
				gspca_dev->last_packet_type = DISCARD_PACKET;
4011 4012
			gspca_frame_add(gspca_dev, LAST_PACKET,
					NULL, 0);
4013 4014 4015 4016 4017
			return;
		}
	}

	/* intermediate packet */
4018
	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4019 4020
}

4021
static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4022
			u8 *data,			/* isoc packet */
4023 4024
			int len)			/* iso packet length */
{
4025 4026 4027 4028
	struct sd *sd = (struct sd *) gspca_dev;

	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);

4029 4030
	/* A short read signals EOF */
	if (len < OVFX2_BULK_SIZE) {
4031 4032 4033 4034
		/* If the frame is short, and it is one of the first ones
		   the sensor and bridge are still syncing, so drop it. */
		if (sd->first_frame) {
			sd->first_frame--;
4035 4036
			if (gspca_dev->image_len <
				  sd->gspca_dev.width * sd->gspca_dev.height)
4037 4038 4039
				gspca_dev->last_packet_type = DISCARD_PACKET;
		}
		gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4040
		gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4041 4042 4043
	}
}

4044
static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4045
			u8 *data,			/* isoc packet */
4046 4047 4048 4049 4050 4051 4052
			int len)			/* iso packet length */
{
	struct sd *sd = (struct sd *) gspca_dev;

	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
4053
		ov511_pkt_scan(gspca_dev, data, len);
4054 4055 4056
		break;
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
4057
		ov518_pkt_scan(gspca_dev, data, len);
4058 4059
		break;
	case BRIDGE_OV519:
4060
		ov519_pkt_scan(gspca_dev, data, len);
4061
		break;
4062
	case BRIDGE_OVFX2:
4063
		ovfx2_pkt_scan(gspca_dev, data, len);
4064
		break;
4065
	case BRIDGE_W9968CF:
4066
		w9968cf_pkt_scan(gspca_dev, data, len);
4067
		break;
4068 4069 4070
	}
}

4071 4072 4073 4074 4075 4076 4077
/* -- management routines -- */

static void setbrightness(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;

4078
	val = sd->ctrls[BRIGHTNESS].val;
4079 4080 4081 4082 4083 4084
	switch (sd->sensor) {
	case SEN_OV8610:
	case SEN_OV7610:
	case SEN_OV76BE:
	case SEN_OV6620:
	case SEN_OV6630:
4085
	case SEN_OV66308AF:
4086
	case SEN_OV7640:
4087
	case SEN_OV7648:
4088 4089 4090
		i2c_w(sd, OV7610_REG_BRT, val);
		break;
	case SEN_OV7620:
4091
	case SEN_OV7620AE:
4092
		/* 7620 doesn't like manual changes when in auto mode */
4093
		if (!sd->ctrls[AUTOBRIGHT].val)
4094 4095 4096
			i2c_w(sd, OV7610_REG_BRT, val);
		break;
	case SEN_OV7670:
4097
/*win trace
4098 4099
 *		i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
		i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4100 4101 4102 4103 4104 4105 4106 4107 4108
		break;
	}
}

static void setcontrast(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;

4109
	val = sd->ctrls[CONTRAST].val;
4110 4111 4112 4113 4114 4115
	switch (sd->sensor) {
	case SEN_OV7610:
	case SEN_OV6620:
		i2c_w(sd, OV7610_REG_CNT, val);
		break;
	case SEN_OV6630:
4116
	case SEN_OV66308AF:
4117
		i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4118
		break;
4119
	case SEN_OV8610: {
4120
		static const u8 ctab[] = {
4121 4122 4123 4124 4125 4126 4127
			0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
		};

		/* Use Y gamma control instead. Bit 0 enables it. */
		i2c_w(sd, 0x64, ctab[val >> 5]);
		break;
	    }
4128 4129
	case SEN_OV7620:
	case SEN_OV7620AE: {
4130
		static const u8 ctab[] = {
4131 4132 4133 4134 4135 4136 4137 4138 4139 4140
			0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
			0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
		};

		/* Use Y gamma control instead. Bit 0 enables it. */
		i2c_w(sd, 0x64, ctab[val >> 4]);
		break;
	    }
	case SEN_OV7670:
		/* check that this isn't just the same as ov7610 */
4141
		i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4142 4143 4144 4145 4146 4147 4148 4149 4150
		break;
	}
}

static void setcolors(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;

4151
	val = sd->ctrls[COLORS].val;
4152 4153 4154 4155 4156 4157
	switch (sd->sensor) {
	case SEN_OV8610:
	case SEN_OV7610:
	case SEN_OV76BE:
	case SEN_OV6620:
	case SEN_OV6630:
4158
	case SEN_OV66308AF:
4159 4160 4161
		i2c_w(sd, OV7610_REG_SAT, val);
		break;
	case SEN_OV7620:
4162
	case SEN_OV7620AE:
4163 4164 4165 4166 4167 4168 4169
		/* Use UV gamma control instead. Bits 0 & 7 are reserved. */
/*		rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
		if (rc < 0)
			goto out; */
		i2c_w(sd, OV7610_REG_SAT, val);
		break;
	case SEN_OV7640:
4170
	case SEN_OV7648:
4171 4172 4173 4174 4175 4176 4177 4178 4179 4180
		i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
		break;
	case SEN_OV7670:
		/* supported later once I work out how to do it
		 * transparently fail now! */
		/* set REG_COM13 values for UV sat auto mode */
		break;
	}
}

4181
static void setautobright(struct gspca_dev *gspca_dev)
4182
{
4183 4184
	struct sd *sd = (struct sd *) gspca_dev;

4185 4186
	if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 ||
	    sd->sensor == SEN_OV7670 ||
4187
	    sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4188 4189
		return;

4190
	i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4191 4192
}

4193
static void setfreq_i(struct sd *sd)
4194
{
4195 4196 4197
	if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
		return;

4198
	if (sd->sensor == SEN_OV7670) {
4199
		switch (sd->ctrls[FREQ].val) {
4200
		case 0: /* Banding filter disabled */
4201
			i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4202 4203
			break;
		case 1: /* 50 hz */
4204
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4205
				   OV7670_COM8_BFILT);
4206
			i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4207 4208
			break;
		case 2: /* 60 hz */
4209
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4210
				   OV7670_COM8_BFILT);
4211
			i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4212
			break;
4213 4214
		case 3: /* Auto hz - ov7670 only */
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4215
				   OV7670_COM8_BFILT);
4216
			i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4217 4218 4219 4220
				   0x18);
			break;
		}
	} else {
4221
		switch (sd->ctrls[FREQ].val) {
4222 4223 4224 4225 4226 4227 4228 4229 4230
		case 0: /* Banding filter disabled */
			i2c_w_mask(sd, 0x2d, 0x00, 0x04);
			i2c_w_mask(sd, 0x2a, 0x00, 0x80);
			break;
		case 1: /* 50 hz (filter on and framerate adj) */
			i2c_w_mask(sd, 0x2d, 0x04, 0x04);
			i2c_w_mask(sd, 0x2a, 0x80, 0x80);
			/* 20 fps -> 16.667 fps */
			if (sd->sensor == SEN_OV6620 ||
4231 4232
			    sd->sensor == SEN_OV6630 ||
			    sd->sensor == SEN_OV66308AF)
4233 4234 4235 4236 4237 4238 4239
				i2c_w(sd, 0x2b, 0x5e);
			else
				i2c_w(sd, 0x2b, 0xac);
			break;
		case 2: /* 60 hz (filter on, ...) */
			i2c_w_mask(sd, 0x2d, 0x04, 0x04);
			if (sd->sensor == SEN_OV6620 ||
4240 4241
			    sd->sensor == SEN_OV6630 ||
			    sd->sensor == SEN_OV66308AF) {
4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252
				/* 20 fps -> 15 fps */
				i2c_w_mask(sd, 0x2a, 0x80, 0x80);
				i2c_w(sd, 0x2b, 0xa8);
			} else {
				/* no framerate adj. */
				i2c_w_mask(sd, 0x2a, 0x00, 0x80);
			}
			break;
		}
	}
}
4253
static void setfreq(struct gspca_dev *gspca_dev)
4254 4255 4256
{
	struct sd *sd = (struct sd *) gspca_dev;

4257
	setfreq_i(sd);
4258

4259 4260 4261
	/* Ugly but necessary */
	if (sd->bridge == BRIDGE_W9968CF)
		w9968cf_set_crop_window(sd);
4262 4263 4264 4265 4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292
}

static int sd_querymenu(struct gspca_dev *gspca_dev,
			struct v4l2_querymenu *menu)
{
	struct sd *sd = (struct sd *) gspca_dev;

	switch (menu->id) {
	case V4L2_CID_POWER_LINE_FREQUENCY:
		switch (menu->index) {
		case 0:		/* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
			strcpy((char *) menu->name, "NoFliker");
			return 0;
		case 1:		/* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
			strcpy((char *) menu->name, "50 Hz");
			return 0;
		case 2:		/* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
			strcpy((char *) menu->name, "60 Hz");
			return 0;
		case 3:
			if (sd->sensor != SEN_OV7670)
				return -EINVAL;

			strcpy((char *) menu->name, "Automatic");
			return 0;
		}
		break;
	}
	return -EINVAL;
}

4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330 4331
static int sd_get_jcomp(struct gspca_dev *gspca_dev,
			struct v4l2_jpegcompression *jcomp)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->bridge != BRIDGE_W9968CF)
		return -EINVAL;

	memset(jcomp, 0, sizeof *jcomp);
	jcomp->quality = sd->quality;
	jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
			      V4L2_JPEG_MARKER_DRI;
	return 0;
}

static int sd_set_jcomp(struct gspca_dev *gspca_dev,
			struct v4l2_jpegcompression *jcomp)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->bridge != BRIDGE_W9968CF)
		return -EINVAL;

	if (gspca_dev->streaming)
		return -EBUSY;

	if (jcomp->quality < QUALITY_MIN)
		sd->quality = QUALITY_MIN;
	else if (jcomp->quality > QUALITY_MAX)
		sd->quality = QUALITY_MAX;
	else
		sd->quality = jcomp->quality;

	/* Return resulting jcomp params to app */
	sd_get_jcomp(gspca_dev, jcomp);

	return 0;
}

4332
/* sub-driver description */
4333
static const struct sd_desc sd_desc = {
4334 4335 4336 4337
	.name = MODULE_NAME,
	.ctrls = sd_ctrls,
	.nctrls = ARRAY_SIZE(sd_ctrls),
	.config = sd_config,
4338
	.init = sd_init,
4339 4340
	.start = sd_start,
	.stopN = sd_stopN,
4341
	.stop0 = sd_stop0,
4342
	.pkt_scan = sd_pkt_scan,
4343
	.dq_callback = sd_reset_snapshot,
4344
	.querymenu = sd_querymenu,
4345 4346
	.get_jcomp = sd_get_jcomp,
	.set_jcomp = sd_set_jcomp,
4347
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4348 4349
	.other_input = 1,
#endif
4350 4351 4352
};

/* -- module initialisation -- */
4353
static const __devinitdata struct usb_device_id device_table[] = {
4354
	{USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4355 4356 4357 4358
	{USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4359
	{USB_DEVICE(0x041e, 0x4064),
4360
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4361
	{USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4362
	{USB_DEVICE(0x041e, 0x4068),
4363
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4364 4365
	{USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4366
	{USB_DEVICE(0x054c, 0x0155),
4367
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4368
	{USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4369 4370 4371
	{USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
	{USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4372
	{USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4373 4374
	{USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4375
	{USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4376
	{USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4377
	{USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4378 4379
	{USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
	{USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4380
	{USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4381
	{USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
4382 4383
	{}
};
4384

4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399
MODULE_DEVICE_TABLE(usb, device_table);

/* -- device connect -- */
static int sd_probe(struct usb_interface *intf,
			const struct usb_device_id *id)
{
	return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
				THIS_MODULE);
}

static struct usb_driver sd_driver = {
	.name = MODULE_NAME,
	.id_table = device_table,
	.probe = sd_probe,
	.disconnect = gspca_disconnect,
4400 4401 4402 4403
#ifdef CONFIG_PM
	.suspend = gspca_suspend,
	.resume = gspca_resume,
#endif
4404 4405 4406 4407 4408
};

/* -- module insert / remove -- */
static int __init sd_mod_init(void)
{
4409
	return usb_register(&sd_driver);
4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420
}
static void __exit sd_mod_exit(void)
{
	usb_deregister(&sd_driver);
}

module_init(sd_mod_init);
module_exit(sd_mod_exit);

module_param(frame_rate, int, 0644);
MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");