ov519.c 117.7 KB
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/**
 * OV519 driver
 *
 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
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 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
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 *
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 * This module is adapted from the ov51x-jpeg package, which itself
 * was adapted from the ov511 driver.
 *
 * Original copyright for the ov511 driver is:
 *
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 * Copyright (c) 1999-2006 Mark W. McClelland
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 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
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 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
 * Changes by Claudio Matsuoka <claudio@conectiva.com>
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 *
 * ov51x-jpeg original copyright is:
 *
 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
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 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 */
#define MODULE_NAME "ov519"

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#include <linux/input.h>
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#include "gspca.h"

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/* The jpeg_hdr is used by w996Xcf only */
/* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
#define CONEX_CAM
#include "jpeg.h"

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MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
MODULE_DESCRIPTION("OV519 USB Camera Driver");
MODULE_LICENSE("GPL");

/* global parameters */
static int frame_rate;

/* Number of times to retry a failed I2C transaction. Increase this if you
 * are getting "Failed to read sensor ID..." */
static int i2c_detect_tries = 10;

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/* controls */
enum e_ctrl {
	BRIGHTNESS,
	CONTRAST,
	COLORS,
	HFLIP,
	VFLIP,
	AUTOBRIGHT,
	FREQ,
	NCTRL		/* number of controls */
};

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/* ov519 device descriptor */
struct sd {
	struct gspca_dev gspca_dev;		/* !! must be the first item */

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	struct gspca_ctrl ctrls[NCTRL];

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	u8 packet_nr;
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	char bridge;
#define BRIDGE_OV511		0
#define BRIDGE_OV511PLUS	1
#define BRIDGE_OV518		2
#define BRIDGE_OV518PLUS	3
#define BRIDGE_OV519		4
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#define BRIDGE_OVFX2		5
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#define BRIDGE_W9968CF		6
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#define BRIDGE_MASK		7

	char invert_led;
#define BRIDGE_INVERT_LED	8
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	char snapshot_pressed;
	char snapshot_needs_reset;

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	/* Determined by sensor type */
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	u8 sif;
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	u8 quality;
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#define QUALITY_MIN 50
#define QUALITY_MAX 70
#define QUALITY_DEF 50
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	u8 stopped;		/* Streaming is temporarily paused */
	u8 first_frame;
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	u8 frame_rate;		/* current Framerate */
	u8 clockdiv;		/* clockdiv override */
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	s8 sensor;		/* Type of image sensor chip (SEN_*) */
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	u8 sensor_addr;
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	u16 sensor_width;
	u16 sensor_height;
	s16 sensor_reg_cache[256];
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	u8 jpeg_hdr[JPEG_HDR_SZ];
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};
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enum sensors {
	SEN_OV2610,
	SEN_OV3610,
	SEN_OV6620,
	SEN_OV6630,
	SEN_OV66308AF,
	SEN_OV7610,
	SEN_OV7620,
	SEN_OV7620AE,
	SEN_OV7640,
	SEN_OV7648,
	SEN_OV7670,
	SEN_OV76BE,
	SEN_OV8610,
};
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/* Note this is a bit of a hack, but the w9968cf driver needs the code for all
   the ov sensors which is already present here. When we have the time we
   really should move the sensor drivers to v4l2 sub drivers. */
#include "w996Xcf.c"

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/* V4L2 controls supported by the driver */
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static void setbrightness(struct gspca_dev *gspca_dev);
static void setcontrast(struct gspca_dev *gspca_dev);
static void setcolors(struct gspca_dev *gspca_dev);
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static void sethvflip(struct gspca_dev *gspca_dev);
static void setautobright(struct gspca_dev *gspca_dev);
static void setfreq(struct gspca_dev *gspca_dev);
static void setfreq_i(struct sd *sd);
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static const struct ctrl sd_ctrls[] = {
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[BRIGHTNESS] = {
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	    {
		.id      = V4L2_CID_BRIGHTNESS,
		.type    = V4L2_CTRL_TYPE_INTEGER,
		.name    = "Brightness",
		.minimum = 0,
		.maximum = 255,
		.step    = 1,
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		.default_value = 127,
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	    },
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	    .set_control = setbrightness,
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	},
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[CONTRAST] = {
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	    {
		.id      = V4L2_CID_CONTRAST,
		.type    = V4L2_CTRL_TYPE_INTEGER,
		.name    = "Contrast",
		.minimum = 0,
		.maximum = 255,
		.step    = 1,
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		.default_value = 127,
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	    },
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	    .set_control = setcontrast,
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	},
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[COLORS] = {
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	    {
		.id      = V4L2_CID_SATURATION,
		.type    = V4L2_CTRL_TYPE_INTEGER,
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		.name    = "Color",
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		.minimum = 0,
		.maximum = 255,
		.step    = 1,
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		.default_value = 127,
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	    },
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	    .set_control = setcolors,
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	},
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/* The flip controls work with ov7670 only */
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[HFLIP] = {
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	    {
		.id      = V4L2_CID_HFLIP,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Mirror",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
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		.default_value = 0,
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	    },
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	    .set_control = sethvflip,
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	},
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[VFLIP] = {
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	    {
		.id      = V4L2_CID_VFLIP,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Vflip",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
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		.default_value = 0,
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	    },
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	    .set_control = sethvflip,
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	},
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[AUTOBRIGHT] = {
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	    {
		.id      = V4L2_CID_AUTOBRIGHTNESS,
		.type    = V4L2_CTRL_TYPE_BOOLEAN,
		.name    = "Auto Brightness",
		.minimum = 0,
		.maximum = 1,
		.step    = 1,
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		.default_value = 1,
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	    },
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	    .set_control = setautobright,
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	},
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[FREQ] = {
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	    {
		.id	 = V4L2_CID_POWER_LINE_FREQUENCY,
		.type    = V4L2_CTRL_TYPE_MENU,
		.name    = "Light frequency filter",
		.minimum = 0,
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		.maximum = 2,	/* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
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		.step    = 1,
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		.default_value = 0,
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	    },
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	    .set_control = setfreq,
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	},
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};

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static const struct v4l2_pix_format ov519_vga_mode[] = {
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	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 320,
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		.sizeimage = 320 * 240 * 3 / 8 + 590,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
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};
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static const struct v4l2_pix_format ov519_sif_mode[] = {
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	{160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 160,
		.sizeimage = 160 * 120 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
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	{176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 176,
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		.sizeimage = 176 * 144 * 3 / 8 + 590,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
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	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3 / 8 + 590,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
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	{352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
		.bytesperline = 352,
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		.sizeimage = 352 * 288 * 3 / 8 + 590,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
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};

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/* Note some of the sizeimage values for the ov511 / ov518 may seem
   larger then necessary, however they need to be this big as the ov511 /
   ov518 always fills the entire isoc frame, using 0 padding bytes when
   it doesn't have any data. So with low framerates the amount of data
   transfered can become quite large (libv4l will remove all the 0 padding
   in userspace). */
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static const struct v4l2_pix_format ov518_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 320,
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		.sizeimage = 320 * 240 * 3,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 640,
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		.sizeimage = 640 * 480 * 2,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
static const struct v4l2_pix_format ov518_sif_mode[] = {
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	{160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 160,
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		.sizeimage = 70000,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
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	{176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 176,
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		.sizeimage = 70000,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
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	{320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 320,
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		.sizeimage = 320 * 240 * 3,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
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	{352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
		.bytesperline = 352,
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		.sizeimage = 352 * 288 * 3,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};

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static const struct v4l2_pix_format ov511_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480 * 2,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
static const struct v4l2_pix_format ov511_sif_mode[] = {
	{160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 160,
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		.sizeimage = 70000,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 3},
	{176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 176,
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		.sizeimage = 70000,
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		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 1},
	{320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 2},
	{352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
		.bytesperline = 352,
		.sizeimage = 352 * 288 * 3,
		.colorspace = V4L2_COLORSPACE_JPEG,
		.priv = 0},
};
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static const struct v4l2_pix_format ovfx2_vga_mode[] = {
	{320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
};
static const struct v4l2_pix_format ovfx2_cif_mode[] = {
	{160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 160,
		.sizeimage = 160 * 120,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 3},
	{176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 176,
		.sizeimage = 176 * 144,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 320,
		.sizeimage = 320 * 240,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 2},
	{352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 352,
		.sizeimage = 352 * 288,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
};
static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
	{1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1600,
		.sizeimage = 1600 * 1200,
		.colorspace = V4L2_COLORSPACE_SRGB},
};
static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
	{640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 640,
		.sizeimage = 640 * 480,
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		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 800,
		.sizeimage = 800 * 600,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1024,
		.sizeimage = 1024 * 768,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 1},
	{1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 1600,
		.sizeimage = 1600 * 1200,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
	{2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
		.bytesperline = 2048,
		.sizeimage = 2048 * 1536,
		.colorspace = V4L2_COLORSPACE_SRGB,
		.priv = 0},
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};

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/* Registers common to OV511 / OV518 */
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#define R51x_FIFO_PSIZE			0x30	/* 2 bytes wide w/ OV518(+) */
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#define R51x_SYS_RESET			0x50
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	/* Reset type flags */
	#define	OV511_RESET_OMNICE	0x08
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#define R51x_SYS_INIT			0x53
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#define R51x_SYS_SNAP			0x52
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#define R51x_SYS_CUST_ID		0x5f
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#define R51x_COMP_LUT_BEGIN		0x80

/* OV511 Camera interface register numbers */
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#define R511_CAM_DELAY			0x10
#define R511_CAM_EDGE			0x11
#define R511_CAM_PXCNT			0x12
#define R511_CAM_LNCNT			0x13
#define R511_CAM_PXDIV			0x14
#define R511_CAM_LNDIV			0x15
#define R511_CAM_UV_EN			0x16
#define R511_CAM_LINE_MODE		0x17
#define R511_CAM_OPTS			0x18

#define R511_SNAP_FRAME			0x19
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#define R511_SNAP_PXCNT			0x1a
#define R511_SNAP_LNCNT			0x1b
#define R511_SNAP_PXDIV			0x1c
#define R511_SNAP_LNDIV			0x1d
#define R511_SNAP_UV_EN			0x1e
#define R511_SNAP_UV_EN			0x1e
#define R511_SNAP_OPTS			0x1f
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#define R511_DRAM_FLOW_CTL		0x20
#define R511_FIFO_OPTS			0x31
#define R511_I2C_CTL			0x40
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#define R511_SYS_LED_CTL		0x55	/* OV511+ only */
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#define R511_COMP_EN			0x78
#define R511_COMP_LUT_EN		0x79
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/* OV518 Camera interface register numbers */
#define R518_GPIO_OUT			0x56	/* OV518(+) only */
#define R518_GPIO_CTL			0x57	/* OV518(+) only */

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/* OV519 Camera interface register numbers */
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#define OV519_R10_H_SIZE		0x10
#define OV519_R11_V_SIZE		0x11
#define OV519_R12_X_OFFSETL		0x12
#define OV519_R13_X_OFFSETH		0x13
#define OV519_R14_Y_OFFSETL		0x14
#define OV519_R15_Y_OFFSETH		0x15
#define OV519_R16_DIVIDER		0x16
#define OV519_R20_DFR			0x20
#define OV519_R25_FORMAT		0x25
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/* OV519 System Controller register numbers */
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#define OV519_R51_RESET1		0x51
#define OV519_R54_EN_CLK1		0x54
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#define OV519_GPIO_DATA_OUT0		0x71
#define OV519_GPIO_IO_CTRL0		0x72

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/*#define OV511_ENDPOINT_ADDRESS 1	 * Isoc endpoint number */
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/*
 * The FX2 chip does not give us a zero length read at end of frame.
 * It does, however, give a short read at the end of a frame, if
D
Daniel Mack 已提交
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 * necessary, rather than run two frames together.
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 *
 * By choosing the right bulk transfer size, we are guaranteed to always
 * get a short read for the last read of each frame.  Frame sizes are
 * always a composite number (width * height, or a multiple) so if we
 * choose a prime number, we are guaranteed that the last read of a
 * frame will be short.
 *
 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 * to figure out why.  [PMiller]
 *
 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 *
 * It isn't enough to know the number of bytes per frame, in case we
 * have data dropouts or buffer overruns (even though the FX2 double
 * buffers, there are some pretty strict real time constraints for
 * isochronous transfer for larger frame sizes).
 */
#define OVFX2_BULK_SIZE (13 * 4096)

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/* I2C registers */
#define R51x_I2C_W_SID		0x41
#define R51x_I2C_SADDR_3	0x42
#define R51x_I2C_SADDR_2	0x43
#define R51x_I2C_R_SID		0x44
#define R51x_I2C_DATA		0x45
#define R518_I2C_CTL		0x47	/* OV518(+) only */
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#define OVFX2_I2C_ADDR		0x00
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/* I2C ADDRESSES */
#define OV7xx0_SID   0x42
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#define OV_HIRES_SID 0x60		/* OV9xxx / OV2xxx / OV3xxx */
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#define OV8xx0_SID   0xa0
#define OV6xx0_SID   0xc0

/* OV7610 registers */
#define OV7610_REG_GAIN		0x00	/* gain setting (5:0) */
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#define OV7610_REG_BLUE		0x01	/* blue channel balance */
#define OV7610_REG_RED		0x02	/* red channel balance */
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#define OV7610_REG_SAT		0x03	/* saturation */
#define OV8610_REG_HUE		0x04	/* 04 reserved */
#define OV7610_REG_CNT		0x05	/* Y contrast */
#define OV7610_REG_BRT		0x06	/* Y brightness */
#define OV7610_REG_COM_C	0x14	/* misc common regs */
#define OV7610_REG_ID_HIGH	0x1c	/* manufacturer ID MSB */
#define OV7610_REG_ID_LOW	0x1d	/* manufacturer ID LSB */
#define OV7610_REG_COM_I	0x29	/* misc settings */

/* OV7670 registers */
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#define OV7670_R00_GAIN		0x00	/* Gain lower 8 bits (rest in vref) */
#define OV7670_R01_BLUE		0x01	/* blue gain */
#define OV7670_R02_RED		0x02	/* red gain */
#define OV7670_R03_VREF		0x03	/* Pieces of GAIN, VSTART, VSTOP */
#define OV7670_R04_COM1		0x04	/* Control 1 */
/*#define OV7670_R07_AECHH	0x07	 * AEC MS 5 bits */
#define OV7670_R0C_COM3		0x0c	/* Control 3 */
#define OV7670_R0D_COM4		0x0d	/* Control 4 */
#define OV7670_R0E_COM5		0x0e	/* All "reserved" */
#define OV7670_R0F_COM6		0x0f	/* Control 6 */
#define OV7670_R10_AECH		0x10	/* More bits of AEC value */
#define OV7670_R11_CLKRC	0x11	/* Clock control */
#define OV7670_R12_COM7		0x12	/* Control 7 */
543 544 545 546 547
#define   OV7670_COM7_FMT_VGA	 0x00
/*#define   OV7670_COM7_YUV	 0x00	 * YUV */
#define   OV7670_COM7_FMT_QVGA	 0x10	/* QVGA format */
#define   OV7670_COM7_FMT_MASK	 0x38
#define   OV7670_COM7_RESET	 0x80	/* Register reset */
548
#define OV7670_R13_COM8		0x13	/* Control 8 */
549 550 551 552 553 554
#define   OV7670_COM8_AEC	 0x01	/* Auto exposure enable */
#define   OV7670_COM8_AWB	 0x02	/* White balance enable */
#define   OV7670_COM8_AGC	 0x04	/* Auto gain enable */
#define   OV7670_COM8_BFILT	 0x20	/* Band filter enable */
#define   OV7670_COM8_AECSTEP	 0x40	/* Unlimited AEC step size */
#define   OV7670_COM8_FASTAEC	 0x80	/* Enable fast AGC/AEC */
555 556 557 558 559 560 561
#define OV7670_R14_COM9		0x14	/* Control 9 - gain ceiling */
#define OV7670_R15_COM10	0x15	/* Control 10 */
#define OV7670_R17_HSTART	0x17	/* Horiz start high bits */
#define OV7670_R18_HSTOP	0x18	/* Horiz stop high bits */
#define OV7670_R19_VSTART	0x19	/* Vert start high bits */
#define OV7670_R1A_VSTOP	0x1a	/* Vert stop high bits */
#define OV7670_R1E_MVFP		0x1e	/* Mirror / vflip */
562 563
#define   OV7670_MVFP_VFLIP	 0x10	/* vertical flip */
#define   OV7670_MVFP_MIRROR	 0x20	/* Mirror image */
564 565 566 567 568 569
#define OV7670_R24_AEW		0x24	/* AGC upper limit */
#define OV7670_R25_AEB		0x25	/* AGC lower limit */
#define OV7670_R26_VPT		0x26	/* AGC/AEC fast mode op region */
#define OV7670_R32_HREF		0x32	/* HREF pieces */
#define OV7670_R3A_TSLB		0x3a	/* lots of stuff */
#define OV7670_R3B_COM11	0x3b	/* Control 11 */
570 571
#define   OV7670_COM11_EXP	 0x02
#define   OV7670_COM11_HZAUTO	 0x10	/* Auto detect 50/60 Hz */
572 573
#define OV7670_R3C_COM12	0x3c	/* Control 12 */
#define OV7670_R3D_COM13	0x3d	/* Control 13 */
574 575
#define   OV7670_COM13_GAMMA	 0x80	/* Gamma enable */
#define   OV7670_COM13_UVSAT	 0x40	/* UV saturation auto adjustment */
576 577 578
#define OV7670_R3E_COM14	0x3e	/* Control 14 */
#define OV7670_R3F_EDGE		0x3f	/* Edge enhancement factor */
#define OV7670_R40_COM15	0x40	/* Control 15 */
579
/*#define   OV7670_COM15_R00FF	 0xc0	 *	00 to FF */
580
#define OV7670_R41_COM16	0x41	/* Control 16 */
581
#define   OV7670_COM16_AWBGAIN	 0x08	/* AWB gain enable */
582 583 584 585 586 587 588 589 590 591 592 593 594
#define OV7670_R55_BRIGHT	0x55	/* Brightness */
#define OV7670_R56_CONTRAS	0x56	/* Contrast control */
#define OV7670_R69_GFIX		0x69	/* Fix gain control */
/*#define OV7670_R8C_RGB444	0x8c	 * RGB 444 control */
#define OV7670_R9F_HAECC1	0x9f	/* Hist AEC/AGC control 1 */
#define OV7670_RA0_HAECC2	0xa0	/* Hist AEC/AGC control 2 */
#define OV7670_RA5_BD50MAX	0xa5	/* 50hz banding step limit */
#define OV7670_RA6_HAECC3	0xa6	/* Hist AEC/AGC control 3 */
#define OV7670_RA7_HAECC4	0xa7	/* Hist AEC/AGC control 4 */
#define OV7670_RA8_HAECC5	0xa8	/* Hist AEC/AGC control 5 */
#define OV7670_RA9_HAECC6	0xa9	/* Hist AEC/AGC control 6 */
#define OV7670_RAA_HAECC7	0xaa	/* Hist AEC/AGC control 7 */
#define OV7670_RAB_BD60MAX	0xab	/* 60hz banding step limit */
595

596
struct ov_regvals {
597 598
	u8 reg;
	u8 val;
599 600
};
struct ov_i2c_regvals {
601 602
	u8 reg;
	u8 val;
603 604
};

605
/* Settings for OV2610 camera chip */
606
static const struct ov_i2c_regvals norm_2610[] = {
607
	{ 0x12, 0x80 },	/* reset */
608 609
};

610
static const struct ov_i2c_regvals norm_3620b[] = {
611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651
	/*
	 * From the datasheet: "Note that after writing to register COMH
	 * (0x12) to change the sensor mode, registers related to the
	 * sensor’s cropping window will be reset back to their default
	 * values."
	 *
	 * "wait 4096 external clock ... to make sure the sensor is
	 * stable and ready to access registers" i.e. 160us at 24MHz
	 */
	{ 0x12, 0x80 }, /* COMH reset */
	{ 0x12, 0x00 }, /* QXGA, master */

	/*
	 * 11 CLKRC "Clock Rate Control"
	 * [7] internal frequency doublers: on
	 * [6] video port mode: master
	 * [5:0] clock divider: 1
	 */
	{ 0x11, 0x80 },

	/*
	 * 13 COMI "Common Control I"
	 *                  = 192 (0xC0) 11000000
	 *    COMI[7] "AEC speed selection"
	 *                  =   1 (0x01) 1....... "Faster AEC correction"
	 *    COMI[6] "AEC speed step selection"
	 *                  =   1 (0x01) .1...... "Big steps, fast"
	 *    COMI[5] "Banding filter on off"
	 *                  =   0 (0x00) ..0..... "Off"
	 *    COMI[4] "Banding filter option"
	 *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
	 *                                         the PLL is ON"
	 *    COMI[3] "Reserved"
	 *                  =   0 (0x00) ....0...
	 *    COMI[2] "AGC auto manual control selection"
	 *                  =   0 (0x00) .....0.. "Manual"
	 *    COMI[1] "AWB auto manual control selection"
	 *                  =   0 (0x00) ......0. "Manual"
	 *    COMI[0] "Exposure control"
	 *                  =   0 (0x00) .......0 "Manual"
	 */
652
	{ 0x13, 0xc0 },
653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707

	/*
	 * 09 COMC "Common Control C"
	 *                  =   8 (0x08) 00001000
	 *    COMC[7:5] "Reserved"
	 *                  =   0 (0x00) 000.....
	 *    COMC[4] "Sleep Mode Enable"
	 *                  =   0 (0x00) ...0.... "Normal mode"
	 *    COMC[3:2] "Sensor sampling reset timing selection"
	 *                  =   2 (0x02) ....10.. "Longer reset time"
	 *    COMC[1:0] "Output drive current select"
	 *                  =   0 (0x00) ......00 "Weakest"
	 */
	{ 0x09, 0x08 },

	/*
	 * 0C COMD "Common Control D"
	 *                  =   8 (0x08) 00001000
	 *    COMD[7] "Reserved"
	 *                  =   0 (0x00) 0.......
	 *    COMD[6] "Swap MSB and LSB at the output port"
	 *                  =   0 (0x00) .0...... "False"
	 *    COMD[5:3] "Reserved"
	 *                  =   1 (0x01) ..001...
	 *    COMD[2] "Output Average On Off"
	 *                  =   0 (0x00) .....0.. "Output Normal"
	 *    COMD[1] "Sensor precharge voltage selection"
	 *                  =   0 (0x00) ......0. "Selects internal
	 *                                         reference precharge
	 *                                         voltage"
	 *    COMD[0] "Snapshot option"
	 *                  =   0 (0x00) .......0 "Enable live video output
	 *                                         after snapshot sequence"
	 */
	{ 0x0c, 0x08 },

	/*
	 * 0D COME "Common Control E"
	 *                  = 161 (0xA1) 10100001
	 *    COME[7] "Output average option"
	 *                  =   1 (0x01) 1....... "Output average of 4 pixels"
	 *    COME[6] "Anti-blooming control"
	 *                  =   0 (0x00) .0...... "Off"
	 *    COME[5:3] "Reserved"
	 *                  =   4 (0x04) ..100...
	 *    COME[2] "Clock output power down pin status"
	 *                  =   0 (0x00) .....0.. "Tri-state data output pin
	 *                                         on power down"
	 *    COME[1] "Data output pin status selection at power down"
	 *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
	 *                                         HREF, and CHSYNC pins on
	 *                                         power down"
	 *    COME[0] "Auto zero circuit select"
	 *                  =   1 (0x01) .......1 "On"
	 */
708
	{ 0x0d, 0xa1 },
709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771

	/*
	 * 0E COMF "Common Control F"
	 *                  = 112 (0x70) 01110000
	 *    COMF[7] "System clock selection"
	 *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
	 *    COMF[6:4] "Reserved"
	 *                  =   7 (0x07) .111....
	 *    COMF[3] "Manual auto negative offset canceling selection"
	 *                  =   0 (0x00) ....0... "Auto detect negative
	 *                                         offset and cancel it"
	 *    COMF[2:0] "Reserved"
	 *                  =   0 (0x00) .....000
	 */
	{ 0x0e, 0x70 },

	/*
	 * 0F COMG "Common Control G"
	 *                  =  66 (0x42) 01000010
	 *    COMG[7] "Optical black output selection"
	 *                  =   0 (0x00) 0....... "Disable"
	 *    COMG[6] "Black level calibrate selection"
	 *                  =   1 (0x01) .1...... "Use optical black pixels
	 *                                         to calibrate"
	 *    COMG[5:4] "Reserved"
	 *                  =   0 (0x00) ..00....
	 *    COMG[3] "Channel offset adjustment"
	 *                  =   0 (0x00) ....0... "Disable offset adjustment"
	 *    COMG[2] "ADC black level calibration option"
	 *                  =   0 (0x00) .....0.. "Use B/G line and G/R
	 *                                         line to calibrate each
	 *                                         channel's black level"
	 *    COMG[1] "Reserved"
	 *                  =   1 (0x01) ......1.
	 *    COMG[0] "ADC black level calibration enable"
	 *                  =   0 (0x00) .......0 "Disable"
	 */
	{ 0x0f, 0x42 },

	/*
	 * 14 COMJ "Common Control J"
	 *                  = 198 (0xC6) 11000110
	 *    COMJ[7:6] "AGC gain ceiling"
	 *                  =   3 (0x03) 11...... "8x"
	 *    COMJ[5:4] "Reserved"
	 *                  =   0 (0x00) ..00....
	 *    COMJ[3] "Auto banding filter"
	 *                  =   0 (0x00) ....0... "Banding filter is always
	 *                                         on off depending on
	 *                                         COMI[5] setting"
	 *    COMJ[2] "VSYNC drop option"
	 *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
	 *                                         data is dropped"
	 *    COMJ[1] "Frame data drop"
	 *                  =   1 (0x01) ......1. "Drop frame data if
	 *                                         exposure is not within
	 *                                         tolerance.  In AEC mode,
	 *                                         data is normally dropped
	 *                                         when data is out of
	 *                                         range."
	 *    COMJ[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
772
	{ 0x14, 0xc6 },
773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877

	/*
	 * 15 COMK "Common Control K"
	 *                  =   2 (0x02) 00000010
	 *    COMK[7] "CHSYNC pin output swap"
	 *                  =   0 (0x00) 0....... "CHSYNC"
	 *    COMK[6] "HREF pin output swap"
	 *                  =   0 (0x00) .0...... "HREF"
	 *    COMK[5] "PCLK output selection"
	 *                  =   0 (0x00) ..0..... "PCLK always output"
	 *    COMK[4] "PCLK edge selection"
	 *                  =   0 (0x00) ...0.... "Data valid on falling edge"
	 *    COMK[3] "HREF output polarity"
	 *                  =   0 (0x00) ....0... "positive"
	 *    COMK[2] "Reserved"
	 *                  =   0 (0x00) .....0..
	 *    COMK[1] "VSYNC polarity"
	 *                  =   1 (0x01) ......1. "negative"
	 *    COMK[0] "HSYNC polarity"
	 *                  =   0 (0x00) .......0 "positive"
	 */
	{ 0x15, 0x02 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =   9 (0x09) 00001001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   0 (0x00) ...0.... "normal current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x09 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  80 (0x50) 01010000
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x34, 0x50 },

	/*
	 * 36 VCHG "Sensor Precharge Voltage Control"
	 *                  =   0 (0x00) 00000000
	 *    VCHG[7] "Reserved"
	 *                  =   0 (0x00) 0.......
	 *    VCHG[6:4] "Sensor precharge voltage control"
	 *                  =   0 (0x00) .000....
	 *    VCHG[3:0] "Sensor array common reference"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x36, 0x00 },

	/*
	 * 37 ADC "ADC Reference Control"
	 *                  =   4 (0x04) 00000100
	 *    ADC[7:4] "Reserved"
	 *                  =   0 (0x00) 0000....
	 *    ADC[3] "ADC input signal range"
	 *                  =   0 (0x00) ....0... "Input signal 1.0x"
	 *    ADC[2:0] "ADC range control"
	 *                  =   4 (0x04) .....100
	 */
	{ 0x37, 0x04 },

	/*
	 * 38 ACOM "Analog Common Ground"
	 *                  =  82 (0x52) 01010010
	 *    ACOM[7] "Analog gain control"
	 *                  =   0 (0x00) 0....... "Gain 1x"
	 *    ACOM[6] "Analog black level calibration"
	 *                  =   1 (0x01) .1...... "On"
	 *    ACOM[5:0] "Reserved"
	 *                  =  18 (0x12) ..010010
	 */
	{ 0x38, 0x52 },

	/*
	 * 3A FREFA "Internal Reference Adjustment"
	 *                  =   0 (0x00) 00000000
	 *    FREFA[7:0] "Range"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x3a, 0x00 },

	/*
	 * 3C FVOPT "Internal Reference Adjustment"
	 *                  =  31 (0x1F) 00011111
	 *    FVOPT[7:0] "Range"
	 *                  =  31 (0x1F) 00011111
	 */
878
	{ 0x3c, 0x1f },
879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926

	/*
	 * 44 Undocumented  =   0 (0x00) 00000000
	 *    44[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x44, 0x00 },

	/*
	 * 40 Undocumented  =   0 (0x00) 00000000
	 *    40[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x40, 0x00 },

	/*
	 * 41 Undocumented  =   0 (0x00) 00000000
	 *    41[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x41, 0x00 },

	/*
	 * 42 Undocumented  =   0 (0x00) 00000000
	 *    42[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x42, 0x00 },

	/*
	 * 43 Undocumented  =   0 (0x00) 00000000
	 *    43[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x43, 0x00 },

	/*
	 * 45 Undocumented  = 128 (0x80) 10000000
	 *    45[7:0] "It's a secret"
	 *                  = 128 (0x80) 10000000
	 */
	{ 0x45, 0x80 },

	/*
	 * 48 Undocumented  = 192 (0xC0) 11000000
	 *    48[7:0] "It's a secret"
	 *                  = 192 (0xC0) 11000000
	 */
927
	{ 0x48, 0xc0 },
928 929 930 931 932 933 934 935 936 937 938 939 940

	/*
	 * 49 Undocumented  =  25 (0x19) 00011001
	 *    49[7:0] "It's a secret"
	 *                  =  25 (0x19) 00011001
	 */
	{ 0x49, 0x19 },

	/*
	 * 4B Undocumented  = 128 (0x80) 10000000
	 *    4B[7:0] "It's a secret"
	 *                  = 128 (0x80) 10000000
	 */
941
	{ 0x4b, 0x80 },
942 943 944 945 946 947

	/*
	 * 4D Undocumented  = 196 (0xC4) 11000100
	 *    4D[7:0] "It's a secret"
	 *                  = 196 (0xC4) 11000100
	 */
948
	{ 0x4d, 0xc4 },
949 950 951

	/*
	 * 35 VREF "Reference Voltage Control"
952
	 *                  =  76 (0x4c) 01001100
953 954 955 956 957 958 959
	 *    VREF[7:5] "Column high reference control"
	 *                  =   2 (0x02) 010..... "higher voltage"
	 *    VREF[4:2] "Column low reference control"
	 *                  =   3 (0x03) ...011.. "Highest voltage"
	 *    VREF[1:0] "Reserved"
	 *                  =   0 (0x00) ......00
	 */
960
	{ 0x35, 0x4c },
961 962 963 964 965 966

	/*
	 * 3D Undocumented  =   0 (0x00) 00000000
	 *    3D[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
967
	{ 0x3d, 0x00 },
968 969 970 971 972 973

	/*
	 * 3E Undocumented  =   0 (0x00) 00000000
	 *    3E[7:0] "It's a secret"
	 *                  =   0 (0x00) 00000000
	 */
974
	{ 0x3e, 0x00 },
975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013

	/*
	 * 3B FREFB "Internal Reference Adjustment"
	 *                  =  24 (0x18) 00011000
	 *    FREFB[7:0] "Range"
	 *                  =  24 (0x18) 00011000
	 */
	{ 0x3b, 0x18 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =  25 (0x19) 00011001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   1 (0x01) ...1.... "double current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x19 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  90 (0x5A) 01011010
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =  10 (0x0A) ....1010
	 */
1014
	{ 0x34, 0x5a },
1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079

	/*
	 * 3B FREFB "Internal Reference Adjustment"
	 *                  =   0 (0x00) 00000000
	 *    FREFB[7:0] "Range"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x3b, 0x00 },

	/*
	 * 33 CHLF "Current Control"
	 *                  =   9 (0x09) 00001001
	 *    CHLF[7:6] "Sensor current control"
	 *                  =   0 (0x00) 00......
	 *    CHLF[5] "Sensor current range control"
	 *                  =   0 (0x00) ..0..... "normal range"
	 *    CHLF[4] "Sensor current"
	 *                  =   0 (0x00) ...0.... "normal current"
	 *    CHLF[3] "Sensor buffer current control"
	 *                  =   1 (0x01) ....1... "half current"
	 *    CHLF[2] "Column buffer current control"
	 *                  =   0 (0x00) .....0.. "normal current"
	 *    CHLF[1] "Analog DSP current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 *    CHLF[1] "ADC current control"
	 *                  =   0 (0x00) ......0. "normal current"
	 */
	{ 0x33, 0x09 },

	/*
	 * 34 VBLM "Blooming Control"
	 *                  =  80 (0x50) 01010000
	 *    VBLM[7] "Hard soft reset switch"
	 *                  =   0 (0x00) 0....... "Hard reset"
	 *    VBLM[6:4] "Blooming voltage selection"
	 *                  =   5 (0x05) .101....
	 *    VBLM[3:0] "Sensor current control"
	 *                  =   0 (0x00) ....0000
	 */
	{ 0x34, 0x50 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =  64 (0x40) 01000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   4 (0x04) .100.... "XGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x40 },

	/*
	 * 17 HREFST "Horizontal window start"
	 *                  =  31 (0x1F) 00011111
	 *    HREFST[7:0] "Horizontal window start, 8 MSBs"
	 *                  =  31 (0x1F) 00011111
	 */
1080
	{ 0x17, 0x1f },
1081 1082 1083 1084 1085 1086 1087

	/*
	 * 18 HREFEND "Horizontal window end"
	 *                  =  95 (0x5F) 01011111
	 *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
	 *                  =  95 (0x5F) 01011111
	 */
1088
	{ 0x18, 0x5f },
1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127

	/*
	 * 19 VSTRT "Vertical window start"
	 *                  =   0 (0x00) 00000000
	 *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x19, 0x00 },

	/*
	 * 1A VEND "Vertical window end"
	 *                  =  96 (0x60) 01100000
	 *    VEND[7:0] "Vertical Window End, 8 MSBs"
	 *                  =  96 (0x60) 01100000
	 */
	{ 0x1a, 0x60 },

	/*
	 * 32 COMM "Common Control M"
	 *                  =  18 (0x12) 00010010
	 *    COMM[7:6] "Pixel clock divide option"
	 *                  =   0 (0x00) 00...... "/1"
	 *    COMM[5:3] "Horizontal window end position, 3 LSBs"
	 *                  =   2 (0x02) ..010...
	 *    COMM[2:0] "Horizontal window start position, 3 LSBs"
	 *                  =   2 (0x02) .....010
	 */
	{ 0x32, 0x12 },

	/*
	 * 03 COMA "Common Control A"
	 *                  =  74 (0x4A) 01001010
	 *    COMA[7:4] "AWB Update Threshold"
	 *                  =   4 (0x04) 0100....
	 *    COMA[3:2] "Vertical window end line control 2 LSBs"
	 *                  =   2 (0x02) ....10..
	 *    COMA[1:0] "Vertical window start line control 2 LSBs"
	 *                  =   2 (0x02) ......10
	 */
1128
	{ 0x03, 0x4a },
1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184

	/*
	 * 11 CLKRC "Clock Rate Control"
	 *                  = 128 (0x80) 10000000
	 *    CLKRC[7] "Internal frequency doublers on off seclection"
	 *                  =   1 (0x01) 1....... "On"
	 *    CLKRC[6] "Digital video master slave selection"
	 *                  =   0 (0x00) .0...... "Master mode, sensor
	 *                                         provides PCLK"
	 *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
	 *                  =   0 (0x00) ..000000
	 */
	{ 0x11, 0x80 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =   0 (0x00) 00000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   0 (0x00) .000.... "QXGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x00 },

	/*
	 * 12 COMH "Common Control H"
	 *                  =  64 (0x40) 01000000
	 *    COMH[7] "SRST"
	 *                  =   0 (0x00) 0....... "No-op"
	 *    COMH[6:4] "Resolution selection"
	 *                  =   4 (0x04) .100.... "XGA"
	 *    COMH[3] "Master slave selection"
	 *                  =   0 (0x00) ....0... "Master mode"
	 *    COMH[2] "Internal B/R channel option"
	 *                  =   0 (0x00) .....0.. "B/R use same channel"
	 *    COMH[1] "Color bar test pattern"
	 *                  =   0 (0x00) ......0. "Off"
	 *    COMH[0] "Reserved"
	 *                  =   0 (0x00) .......0
	 */
	{ 0x12, 0x40 },

	/*
	 * 17 HREFST "Horizontal window start"
	 *                  =  31 (0x1F) 00011111
	 *    HREFST[7:0] "Horizontal window start, 8 MSBs"
	 *                  =  31 (0x1F) 00011111
	 */
1185
	{ 0x17, 0x1f },
1186 1187 1188 1189 1190 1191 1192

	/*
	 * 18 HREFEND "Horizontal window end"
	 *                  =  95 (0x5F) 01011111
	 *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
	 *                  =  95 (0x5F) 01011111
	 */
1193
	{ 0x18, 0x5f },
1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232

	/*
	 * 19 VSTRT "Vertical window start"
	 *                  =   0 (0x00) 00000000
	 *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
	 *                  =   0 (0x00) 00000000
	 */
	{ 0x19, 0x00 },

	/*
	 * 1A VEND "Vertical window end"
	 *                  =  96 (0x60) 01100000
	 *    VEND[7:0] "Vertical Window End, 8 MSBs"
	 *                  =  96 (0x60) 01100000
	 */
	{ 0x1a, 0x60 },

	/*
	 * 32 COMM "Common Control M"
	 *                  =  18 (0x12) 00010010
	 *    COMM[7:6] "Pixel clock divide option"
	 *                  =   0 (0x00) 00...... "/1"
	 *    COMM[5:3] "Horizontal window end position, 3 LSBs"
	 *                  =   2 (0x02) ..010...
	 *    COMM[2:0] "Horizontal window start position, 3 LSBs"
	 *                  =   2 (0x02) .....010
	 */
	{ 0x32, 0x12 },

	/*
	 * 03 COMA "Common Control A"
	 *                  =  74 (0x4A) 01001010
	 *    COMA[7:4] "AWB Update Threshold"
	 *                  =   4 (0x04) 0100....
	 *    COMA[3:2] "Vertical window end line control 2 LSBs"
	 *                  =   2 (0x02) ....10..
	 *    COMA[1:0] "Vertical window start line control 2 LSBs"
	 *                  =   2 (0x02) ......10
	 */
1233
	{ 0x03, 0x4a },
1234 1235 1236 1237 1238 1239 1240 1241 1242

	/*
	 * 02 RED "Red Gain Control"
	 *                  = 175 (0xAF) 10101111
	 *    RED[7] "Action"
	 *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
	 *    RED[6:0] "Value"
	 *                  =  47 (0x2F) .0101111
	 */
1243
	{ 0x02, 0xaf },
1244 1245 1246 1247 1248 1249 1250

	/*
	 * 2D ADDVSL "VSYNC Pulse Width"
	 *                  = 210 (0xD2) 11010010
	 *    ADDVSL[7:0] "VSYNC pulse width, LSB"
	 *                  = 210 (0xD2) 11010010
	 */
1251
	{ 0x2d, 0xd2 },
1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273

	/*
	 * 00 GAIN          =  24 (0x18) 00011000
	 *    GAIN[7:6] "Reserved"
	 *                  =   0 (0x00) 00......
	 *    GAIN[5] "Double"
	 *                  =   0 (0x00) ..0..... "False"
	 *    GAIN[4] "Double"
	 *                  =   1 (0x01) ...1.... "True"
	 *    GAIN[3:0] "Range"
	 *                  =   8 (0x08) ....1000
	 */
	{ 0x00, 0x18 },

	/*
	 * 01 BLUE "Blue Gain Control"
	 *                  = 240 (0xF0) 11110000
	 *    BLUE[7] "Action"
	 *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
	 *    BLUE[6:0] "Value"
	 *                  = 112 (0x70) .1110000
	 */
1274
	{ 0x01, 0xf0 },
1275 1276 1277 1278 1279 1280 1281

	/*
	 * 10 AEC "Automatic Exposure Control"
	 *                  =  10 (0x0A) 00001010
	 *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
	 *                  =  10 (0x0A) 00001010
	 */
1282 1283 1284 1285 1286 1287 1288 1289
	{ 0x10, 0x0a },

	{ 0xe1, 0x67 },
	{ 0xe3, 0x03 },
	{ 0xe4, 0x26 },
	{ 0xe5, 0x3e },
	{ 0xf8, 0x01 },
	{ 0xff, 0x01 },
1290 1291
};

1292 1293 1294 1295 1296 1297
static const struct ov_i2c_regvals norm_6x20[] = {
	{ 0x12, 0x80 }, /* reset */
	{ 0x11, 0x01 },
	{ 0x03, 0x60 },
	{ 0x05, 0x7f }, /* For when autoadjust is off */
	{ 0x07, 0xa8 },
1298
	/* The ratio of 0x0c and 0x0d controls the white point */
1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
	{ 0x0f, 0x15 }, /* COMS */
	{ 0x10, 0x75 }, /* AEC Exposure time */
	{ 0x12, 0x24 }, /* Enable AGC */
	{ 0x14, 0x04 },
	/* 0x16: 0x06 helps frame stability with moving objects */
	{ 0x16, 0x06 },
/*	{ 0x20, 0x30 },  * Aperture correction enable */
	{ 0x26, 0xb2 }, /* BLC enable */
	/* 0x28: 0x05 Selects RGB format if RGB on */
	{ 0x28, 0x05 },
	{ 0x2a, 0x04 }, /* Disable framerate adjust */
/*	{ 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1313
	{ 0x2d, 0x85 },
1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345
	{ 0x33, 0xa0 }, /* Color Processing Parameter */
	{ 0x34, 0xd2 }, /* Max A/D range */
	{ 0x38, 0x8b },
	{ 0x39, 0x40 },

	{ 0x3c, 0x39 }, /* Enable AEC mode changing */
	{ 0x3c, 0x3c }, /* Change AEC mode */
	{ 0x3c, 0x24 }, /* Disable AEC mode changing */

	{ 0x3d, 0x80 },
	/* These next two registers (0x4a, 0x4b) are undocumented.
	 * They control the color balance */
	{ 0x4a, 0x80 },
	{ 0x4b, 0x80 },
	{ 0x4d, 0xd2 }, /* This reduces noise a bit */
	{ 0x4e, 0xc1 },
	{ 0x4f, 0x04 },
/* Do 50-53 have any effect? */
/* Toggle 0x12[2] off and on here? */
};

static const struct ov_i2c_regvals norm_6x30[] = {
	{ 0x12, 0x80 }, /* Reset */
	{ 0x00, 0x1f }, /* Gain */
	{ 0x01, 0x99 }, /* Blue gain */
	{ 0x02, 0x7c }, /* Red gain */
	{ 0x03, 0xc0 }, /* Saturation */
	{ 0x05, 0x0a }, /* Contrast */
	{ 0x06, 0x95 }, /* Brightness */
	{ 0x07, 0x2d }, /* Sharpness */
	{ 0x0c, 0x20 },
	{ 0x0d, 0x20 },
1346
	{ 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461
	{ 0x0f, 0x05 },
	{ 0x10, 0x9a },
	{ 0x11, 0x00 }, /* Pixel clock = fastest */
	{ 0x12, 0x24 }, /* Enable AGC and AWB */
	{ 0x13, 0x21 },
	{ 0x14, 0x80 },
	{ 0x15, 0x01 },
	{ 0x16, 0x03 },
	{ 0x17, 0x38 },
	{ 0x18, 0xea },
	{ 0x19, 0x04 },
	{ 0x1a, 0x93 },
	{ 0x1b, 0x00 },
	{ 0x1e, 0xc4 },
	{ 0x1f, 0x04 },
	{ 0x20, 0x20 },
	{ 0x21, 0x10 },
	{ 0x22, 0x88 },
	{ 0x23, 0xc0 }, /* Crystal circuit power level */
	{ 0x25, 0x9a }, /* Increase AEC black ratio */
	{ 0x26, 0xb2 }, /* BLC enable */
	{ 0x27, 0xa2 },
	{ 0x28, 0x00 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x84 }, /* 60 Hz power */
	{ 0x2b, 0xa8 }, /* 60 Hz power */
	{ 0x2c, 0xa0 },
	{ 0x2d, 0x95 }, /* Enable auto-brightness */
	{ 0x2e, 0x88 },
	{ 0x33, 0x26 },
	{ 0x34, 0x03 },
	{ 0x36, 0x8f },
	{ 0x37, 0x80 },
	{ 0x38, 0x83 },
	{ 0x39, 0x80 },
	{ 0x3a, 0x0f },
	{ 0x3b, 0x3c },
	{ 0x3c, 0x1a },
	{ 0x3d, 0x80 },
	{ 0x3e, 0x80 },
	{ 0x3f, 0x0e },
	{ 0x40, 0x00 }, /* White bal */
	{ 0x41, 0x00 }, /* White bal */
	{ 0x42, 0x80 },
	{ 0x43, 0x3f }, /* White bal */
	{ 0x44, 0x80 },
	{ 0x45, 0x20 },
	{ 0x46, 0x20 },
	{ 0x47, 0x80 },
	{ 0x48, 0x7f },
	{ 0x49, 0x00 },
	{ 0x4a, 0x00 },
	{ 0x4b, 0x80 },
	{ 0x4c, 0xd0 },
	{ 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
	{ 0x4e, 0x40 },
	{ 0x4f, 0x07 }, /* UV avg., col. killer: max */
	{ 0x50, 0xff },
	{ 0x54, 0x23 }, /* Max AGC gain: 18dB */
	{ 0x55, 0xff },
	{ 0x56, 0x12 },
	{ 0x57, 0x81 },
	{ 0x58, 0x75 },
	{ 0x59, 0x01 }, /* AGC dark current comp.: +1 */
	{ 0x5a, 0x2c },
	{ 0x5b, 0x0f }, /* AWB chrominance levels */
	{ 0x5c, 0x10 },
	{ 0x3d, 0x80 },
	{ 0x27, 0xa6 },
	{ 0x12, 0x20 }, /* Toggle AWB */
	{ 0x12, 0x24 },
};

/* Lawrence Glaister <lg@jfm.bc.ca> reports:
 *
 * Register 0x0f in the 7610 has the following effects:
 *
 * 0x85 (AEC method 1): Best overall, good contrast range
 * 0x45 (AEC method 2): Very overexposed
 * 0xa5 (spec sheet default): Ok, but the black level is
 *	shifted resulting in loss of contrast
 * 0x05 (old driver setting): very overexposed, too much
 *	contrast
 */
static const struct ov_i2c_regvals norm_7610[] = {
	{ 0x10, 0xff },
	{ 0x16, 0x06 },
	{ 0x28, 0x24 },
	{ 0x2b, 0xac },
	{ 0x12, 0x00 },
	{ 0x38, 0x81 },
	{ 0x28, 0x24 },	/* 0c */
	{ 0x0f, 0x85 },	/* lg's setting */
	{ 0x15, 0x01 },
	{ 0x20, 0x1c },
	{ 0x23, 0x2a },
	{ 0x24, 0x10 },
	{ 0x25, 0x8a },
	{ 0x26, 0xa2 },
	{ 0x27, 0xc2 },
	{ 0x2a, 0x04 },
	{ 0x2c, 0xfe },
	{ 0x2d, 0x93 },
	{ 0x30, 0x71 },
	{ 0x31, 0x60 },
	{ 0x32, 0x26 },
	{ 0x33, 0x20 },
	{ 0x34, 0x48 },
	{ 0x12, 0x24 },
	{ 0x11, 0x01 },
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
};

static const struct ov_i2c_regvals norm_7620[] = {
1462
	{ 0x12, 0x80 },		/* reset */
1463 1464 1465
	{ 0x00, 0x00 },		/* gain */
	{ 0x01, 0x80 },		/* blue gain */
	{ 0x02, 0x80 },		/* red gain */
1466
	{ 0x03, 0xc0 },		/* OV7670_R03_VREF */
1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488
	{ 0x06, 0x60 },
	{ 0x07, 0x00 },
	{ 0x0c, 0x24 },
	{ 0x0c, 0x24 },
	{ 0x0d, 0x24 },
	{ 0x11, 0x01 },
	{ 0x12, 0x24 },
	{ 0x13, 0x01 },
	{ 0x14, 0x84 },
	{ 0x15, 0x01 },
	{ 0x16, 0x03 },
	{ 0x17, 0x2f },
	{ 0x18, 0xcf },
	{ 0x19, 0x06 },
	{ 0x1a, 0xf5 },
	{ 0x1b, 0x00 },
	{ 0x20, 0x18 },
	{ 0x21, 0x80 },
	{ 0x22, 0x80 },
	{ 0x23, 0x00 },
	{ 0x26, 0xa2 },
	{ 0x27, 0xea },
1489
	{ 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536
	{ 0x29, 0x00 },
	{ 0x2a, 0x10 },
	{ 0x2b, 0x00 },
	{ 0x2c, 0x88 },
	{ 0x2d, 0x91 },
	{ 0x2e, 0x80 },
	{ 0x2f, 0x44 },
	{ 0x60, 0x27 },
	{ 0x61, 0x02 },
	{ 0x62, 0x5f },
	{ 0x63, 0xd5 },
	{ 0x64, 0x57 },
	{ 0x65, 0x83 },
	{ 0x66, 0x55 },
	{ 0x67, 0x92 },
	{ 0x68, 0xcf },
	{ 0x69, 0x76 },
	{ 0x6a, 0x22 },
	{ 0x6b, 0x00 },
	{ 0x6c, 0x02 },
	{ 0x6d, 0x44 },
	{ 0x6e, 0x80 },
	{ 0x6f, 0x1d },
	{ 0x70, 0x8b },
	{ 0x71, 0x00 },
	{ 0x72, 0x14 },
	{ 0x73, 0x54 },
	{ 0x74, 0x00 },
	{ 0x75, 0x8e },
	{ 0x76, 0x00 },
	{ 0x77, 0xff },
	{ 0x78, 0x80 },
	{ 0x79, 0x80 },
	{ 0x7a, 0x80 },
	{ 0x7b, 0xe2 },
	{ 0x7c, 0x00 },
};

/* 7640 and 7648. The defaults should be OK for most registers. */
static const struct ov_i2c_regvals norm_7640[] = {
	{ 0x12, 0x80 },
	{ 0x12, 0x14 },
};

/* 7670. Defaults taken from OmniVision provided data,
*  as provided by Jonathan Corbet of OLPC		*/
static const struct ov_i2c_regvals norm_7670[] = {
1537 1538 1539 1540
	{ OV7670_R12_COM7, OV7670_COM7_RESET },
	{ OV7670_R3A_TSLB, 0x04 },		/* OV */
	{ OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
	{ OV7670_R11_CLKRC, 0x01 },
1541 1542 1543 1544
/*
 * Set the hardware window.  These values from OV don't entirely
 * make sense - hstop is less than hstart.  But they work...
 */
1545 1546 1547 1548 1549 1550 1551 1552 1553
	{ OV7670_R17_HSTART, 0x13 },
	{ OV7670_R18_HSTOP, 0x01 },
	{ OV7670_R32_HREF, 0xb6 },
	{ OV7670_R19_VSTART, 0x02 },
	{ OV7670_R1A_VSTOP, 0x7a },
	{ OV7670_R03_VREF, 0x0a },

	{ OV7670_R0C_COM3, 0x00 },
	{ OV7670_R3E_COM14, 0x00 },
1554 1555 1556 1557 1558 1559
/* Mystery scaling numbers */
	{ 0x70, 0x3a },
	{ 0x71, 0x35 },
	{ 0x72, 0x11 },
	{ 0x73, 0xf0 },
	{ 0xa2, 0x02 },
1560
/*	{ OV7670_R15_COM10, 0x0 }, */
1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581

/* Gamma curve values */
	{ 0x7a, 0x20 },
	{ 0x7b, 0x10 },
	{ 0x7c, 0x1e },
	{ 0x7d, 0x35 },
	{ 0x7e, 0x5a },
	{ 0x7f, 0x69 },
	{ 0x80, 0x76 },
	{ 0x81, 0x80 },
	{ 0x82, 0x88 },
	{ 0x83, 0x8f },
	{ 0x84, 0x96 },
	{ 0x85, 0xa3 },
	{ 0x86, 0xaf },
	{ 0x87, 0xc4 },
	{ 0x88, 0xd7 },
	{ 0x89, 0xe8 },

/* AGC and AEC parameters.  Note we start by disabling those features,
   then turn them only after tweaking the values. */
1582
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1583 1584
			 | OV7670_COM8_AECSTEP
			 | OV7670_COM8_BFILT },
1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595
	{ OV7670_R00_GAIN, 0x00 },
	{ OV7670_R10_AECH, 0x00 },
	{ OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
	{ OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
	{ OV7670_RA5_BD50MAX, 0x05 },
	{ OV7670_RAB_BD60MAX, 0x07 },
	{ OV7670_R24_AEW, 0x95 },
	{ OV7670_R25_AEB, 0x33 },
	{ OV7670_R26_VPT, 0xe3 },
	{ OV7670_R9F_HAECC1, 0x78 },
	{ OV7670_RA0_HAECC2, 0x68 },
1596
	{ 0xa1, 0x03 }, /* magic */
1597 1598 1599 1600 1601 1602
	{ OV7670_RA6_HAECC3, 0xd8 },
	{ OV7670_RA7_HAECC4, 0xd8 },
	{ OV7670_RA8_HAECC5, 0xf0 },
	{ OV7670_RA9_HAECC6, 0x90 },
	{ OV7670_RAA_HAECC7, 0x94 },
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1603 1604 1605 1606 1607 1608
			| OV7670_COM8_AECSTEP
			| OV7670_COM8_BFILT
			| OV7670_COM8_AGC
			| OV7670_COM8_AEC },

/* Almost all of these are magic "reserved" values.  */
1609 1610
	{ OV7670_R0E_COM5, 0x61 },
	{ OV7670_R0F_COM6, 0x4b },
1611
	{ 0x16, 0x02 },
1612
	{ OV7670_R1E_MVFP, 0x07 },
1613 1614 1615 1616 1617 1618 1619 1620
	{ 0x21, 0x02 },
	{ 0x22, 0x91 },
	{ 0x29, 0x07 },
	{ 0x33, 0x0b },
	{ 0x35, 0x0b },
	{ 0x37, 0x1d },
	{ 0x38, 0x71 },
	{ 0x39, 0x2a },
1621
	{ OV7670_R3C_COM12, 0x78 },
1622 1623
	{ 0x4d, 0x40 },
	{ 0x4e, 0x20 },
1624
	{ OV7670_R69_GFIX, 0x00 },
1625 1626 1627
	{ 0x6b, 0x4a },
	{ 0x74, 0x10 },
	{ 0x8d, 0x4f },
1628 1629 1630 1631 1632 1633
	{ 0x8e, 0x00 },
	{ 0x8f, 0x00 },
	{ 0x90, 0x00 },
	{ 0x91, 0x00 },
	{ 0x96, 0x00 },
	{ 0x9a, 0x00 },
1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658
	{ 0xb0, 0x84 },
	{ 0xb1, 0x0c },
	{ 0xb2, 0x0e },
	{ 0xb3, 0x82 },
	{ 0xb8, 0x0a },

/* More reserved magic, some of which tweaks white balance */
	{ 0x43, 0x0a },
	{ 0x44, 0xf0 },
	{ 0x45, 0x34 },
	{ 0x46, 0x58 },
	{ 0x47, 0x28 },
	{ 0x48, 0x3a },
	{ 0x59, 0x88 },
	{ 0x5a, 0x88 },
	{ 0x5b, 0x44 },
	{ 0x5c, 0x67 },
	{ 0x5d, 0x49 },
	{ 0x5e, 0x0e },
	{ 0x6c, 0x0a },
	{ 0x6d, 0x55 },
	{ 0x6e, 0x11 },
	{ 0x6f, 0x9f },
					/* "9e for advance AWB" */
	{ 0x6a, 0x40 },
1659 1660 1661
	{ OV7670_R01_BLUE, 0x40 },
	{ OV7670_R02_RED, 0x60 },
	{ OV7670_R13_COM8, OV7670_COM8_FASTAEC
1662 1663 1664 1665 1666 1667 1668 1669 1670
			| OV7670_COM8_AECSTEP
			| OV7670_COM8_BFILT
			| OV7670_COM8_AGC
			| OV7670_COM8_AEC
			| OV7670_COM8_AWB },

/* Matrix coefficients */
	{ 0x4f, 0x80 },
	{ 0x50, 0x80 },
1671
	{ 0x51, 0x00 },
1672 1673 1674 1675 1676
	{ 0x52, 0x22 },
	{ 0x53, 0x5e },
	{ 0x54, 0x80 },
	{ 0x58, 0x9e },

1677 1678
	{ OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
	{ OV7670_R3F_EDGE, 0x00 },
1679 1680
	{ 0x75, 0x05 },
	{ 0x76, 0xe1 },
1681
	{ 0x4c, 0x00 },
1682
	{ 0x77, 0x01 },
1683
	{ OV7670_R3D_COM13, OV7670_COM13_GAMMA
1684 1685 1686 1687
			  | OV7670_COM13_UVSAT
			  | 2},		/* was 3 */
	{ 0x4b, 0x09 },
	{ 0xc9, 0x60 },
1688
	{ OV7670_R41_COM16, 0x38 },
1689 1690 1691
	{ 0x56, 0x40 },

	{ 0x34, 0x11 },
1692
	{ OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1693
	{ 0xa4, 0x88 },
1694
	{ 0x96, 0x00 },
1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818
	{ 0x97, 0x30 },
	{ 0x98, 0x20 },
	{ 0x99, 0x30 },
	{ 0x9a, 0x84 },
	{ 0x9b, 0x29 },
	{ 0x9c, 0x03 },
	{ 0x9d, 0x4c },
	{ 0x9e, 0x3f },
	{ 0x78, 0x04 },

/* Extra-weird stuff.  Some sort of multiplexor register */
	{ 0x79, 0x01 },
	{ 0xc8, 0xf0 },
	{ 0x79, 0x0f },
	{ 0xc8, 0x00 },
	{ 0x79, 0x10 },
	{ 0xc8, 0x7e },
	{ 0x79, 0x0a },
	{ 0xc8, 0x80 },
	{ 0x79, 0x0b },
	{ 0xc8, 0x01 },
	{ 0x79, 0x0c },
	{ 0xc8, 0x0f },
	{ 0x79, 0x0d },
	{ 0xc8, 0x20 },
	{ 0x79, 0x09 },
	{ 0xc8, 0x80 },
	{ 0x79, 0x02 },
	{ 0xc8, 0xc0 },
	{ 0x79, 0x03 },
	{ 0xc8, 0x40 },
	{ 0x79, 0x05 },
	{ 0xc8, 0x30 },
	{ 0x79, 0x26 },
};

static const struct ov_i2c_regvals norm_8610[] = {
	{ 0x12, 0x80 },
	{ 0x00, 0x00 },
	{ 0x01, 0x80 },
	{ 0x02, 0x80 },
	{ 0x03, 0xc0 },
	{ 0x04, 0x30 },
	{ 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
	{ 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
	{ 0x0a, 0x86 },
	{ 0x0b, 0xb0 },
	{ 0x0c, 0x20 },
	{ 0x0d, 0x20 },
	{ 0x11, 0x01 },
	{ 0x12, 0x25 },
	{ 0x13, 0x01 },
	{ 0x14, 0x04 },
	{ 0x15, 0x01 }, /* Lin and Win think different about UV order */
	{ 0x16, 0x03 },
	{ 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
	{ 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
	{ 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
	{ 0x1a, 0xf5 },
	{ 0x1b, 0x00 },
	{ 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
	{ 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
	{ 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
	{ 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
	{ 0x26, 0xa2 },
	{ 0x27, 0xea },
	{ 0x28, 0x00 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x80 },
	{ 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
	{ 0x2c, 0xac },
	{ 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
	{ 0x2e, 0x80 },
	{ 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
	{ 0x4c, 0x00 },
	{ 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
	{ 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
	{ 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
	{ 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
	{ 0x63, 0xff },
	{ 0x64, 0x53 }, /* new windrv 090403 says 0x57,
			 * maybe thats wrong */
	{ 0x65, 0x00 },
	{ 0x66, 0x55 },
	{ 0x67, 0xb0 },
	{ 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
	{ 0x69, 0x02 },
	{ 0x6a, 0x22 },
	{ 0x6b, 0x00 },
	{ 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
			 * deleting bit7 colors the first images red */
	{ 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
	{ 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
	{ 0x6f, 0x01 },
	{ 0x70, 0x8b },
	{ 0x71, 0x00 },
	{ 0x72, 0x14 },
	{ 0x73, 0x54 },
	{ 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
	{ 0x75, 0x0e },
	{ 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
	{ 0x77, 0xff },
	{ 0x78, 0x80 },
	{ 0x79, 0x80 },
	{ 0x7a, 0x80 },
	{ 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
	{ 0x7c, 0x00 },
	{ 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
	{ 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
	{ 0x7f, 0xfb },
	{ 0x80, 0x28 },
	{ 0x81, 0x00 },
	{ 0x82, 0x23 },
	{ 0x83, 0x0b },
	{ 0x84, 0x00 },
	{ 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
	{ 0x86, 0xc9 },
	{ 0x87, 0x00 },
	{ 0x88, 0x00 },
	{ 0x89, 0x01 },
	{ 0x12, 0x20 },
	{ 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
};

1819 1820 1821 1822 1823 1824 1825 1826
static unsigned char ov7670_abs_to_sm(unsigned char v)
{
	if (v > 127)
		return v & 0x7f;
	return (128 - v) | 0x80;
}

/* Write a OV519 register */
1827
static int reg_w(struct sd *sd, u16 index, u16 value)
1828
{
1829
	int ret, req = 0;
1830 1831 1832 1833 1834 1835 1836

	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		req = 2;
		break;
	case BRIDGE_OVFX2:
1837 1838 1839
		req = 0x0a;
		/* fall through */
	case BRIDGE_W9968CF:
1840 1841
		ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1842
			req,
1843
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1844
			value, index, NULL, 0, 500);
1845 1846 1847 1848
		goto leave;
	default:
		req = 1;
	}
1849

1850
	sd->gspca_dev.usb_buf[0] = value;
1851 1852
	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1853
			req,
1854 1855
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			0, index,
1856
			sd->gspca_dev.usb_buf, 1, 500);
1857
leave:
1858
	if (ret < 0) {
1859
		err("Write reg 0x%04x -> [0x%02x] failed",
1860 1861 1862 1863 1864 1865
		       value, index);
		return ret;
	}

	PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
	return 0;
1866 1867
}

1868
/* Read from a OV519 register, note not valid for the w9968cf!! */
1869
/* returns: negative is error, pos or zero is data */
1870
static int reg_r(struct sd *sd, u16 index)
1871 1872
{
	int ret;
1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885
	int req;

	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		req = 3;
		break;
	case BRIDGE_OVFX2:
		req = 0x0b;
		break;
	default:
		req = 1;
	}
1886 1887 1888

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1889
			req,
1890
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1891
			0, index, sd->gspca_dev.usb_buf, 1, 500);
1892

1893
	if (ret >= 0) {
1894
		ret = sd->gspca_dev.usb_buf[0];
1895 1896
		PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
	} else
1897
		err("Read reg [0x%02x] failed", index);
1898

1899 1900 1901 1902 1903
	return ret;
}

/* Read 8 values from a OV519 register */
static int reg_r8(struct sd *sd,
1904
		  u16 index)
1905 1906 1907 1908 1909 1910 1911
{
	int ret;

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
			1,			/* REQ_IO */
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1912
			0, index, sd->gspca_dev.usb_buf, 8, 500);
1913 1914

	if (ret >= 0)
1915
		ret = sd->gspca_dev.usb_buf[0];
1916
	else
1917
		err("Read reg 8 [0x%02x] failed", index);
1918

1919 1920 1921 1922 1923 1924 1925 1926 1927 1928
	return ret;
}

/*
 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
 * the same position as 1's in "mask" are cleared and set to "value". Bits
 * that are in the same position as 0's in "mask" are preserved, regardless
 * of their respective state in "value".
 */
static int reg_w_mask(struct sd *sd,
1929 1930 1931
			u16 index,
			u8 value,
			u8 mask)
1932 1933
{
	int ret;
1934
	u8 oldval;
1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947

	if (mask != 0xff) {
		value &= mask;			/* Enforce mask on value */
		ret = reg_r(sd, index);
		if (ret < 0)
			return ret;

		oldval = ret & ~mask;		/* Clear the masked bits */
		value |= oldval;		/* Set the desired bits */
	}
	return reg_w(sd, index, value);
}

1948 1949 1950 1951
/*
 * Writes multiple (n) byte value to a single register. Only valid with certain
 * registers (0x30 and 0xc4 - 0xce).
 */
1952
static int ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
1953 1954 1955
{
	int ret;

1956
	*((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1957 1958 1959 1960 1961 1962 1963

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
			1 /* REG_IO */,
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			0, index,
			sd->gspca_dev.usb_buf, n, 500);
1964
	if (ret < 0) {
1965
		err("Write reg32 [%02x] %08x failed", index, value);
1966 1967 1968 1969
		return ret;
	}

	return 0;
1970 1971
}

1972
static int ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994
{
	int rc, retries;

	PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);

	/* Three byte write cycle */
	for (retries = 6; ; ) {
		/* Select camera register */
		rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
		if (rc < 0)
			return rc;

		/* Write "value" to I2C data port of OV511 */
		rc = reg_w(sd, R51x_I2C_DATA, value);
		if (rc < 0)
			return rc;

		/* Initiate 3-byte write cycle */
		rc = reg_w(sd, R511_I2C_CTL, 0x01);
		if (rc < 0)
			return rc;

1995
		do {
1996
			rc = reg_r(sd, R511_I2C_CTL);
1997
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012

		if (rc < 0)
			return rc;

		if ((rc & 2) == 0) /* Ack? */
			break;
		if (--retries < 0) {
			PDEBUG(D_USBO, "i2c write retries exhausted");
			return -1;
		}
	}

	return 0;
}

2013
static int ov511_i2c_r(struct sd *sd, u8 reg)
2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028
{
	int rc, value, retries;

	/* Two byte write cycle */
	for (retries = 6; ; ) {
		/* Select camera register */
		rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
		if (rc < 0)
			return rc;

		/* Initiate 2-byte write cycle */
		rc = reg_w(sd, R511_I2C_CTL, 0x03);
		if (rc < 0)
			return rc;

2029
		do {
2030
			rc = reg_r(sd, R511_I2C_CTL);
2031
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054

		if (rc < 0)
			return rc;

		if ((rc & 2) == 0) /* Ack? */
			break;

		/* I2C abort */
		reg_w(sd, R511_I2C_CTL, 0x10);

		if (--retries < 0) {
			PDEBUG(D_USBI, "i2c write retries exhausted");
			return -1;
		}
	}

	/* Two byte read cycle */
	for (retries = 6; ; ) {
		/* Initiate 2-byte read cycle */
		rc = reg_w(sd, R511_I2C_CTL, 0x05);
		if (rc < 0)
			return rc;

2055
		do {
2056
			rc = reg_r(sd, R511_I2C_CTL);
2057
		} while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086

		if (rc < 0)
			return rc;

		if ((rc & 2) == 0) /* Ack? */
			break;

		/* I2C abort */
		rc = reg_w(sd, R511_I2C_CTL, 0x10);
		if (rc < 0)
			return rc;

		if (--retries < 0) {
			PDEBUG(D_USBI, "i2c read retries exhausted");
			return -1;
		}
	}

	value = reg_r(sd, R51x_I2C_DATA);

	PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);

	/* This is needed to make i2c_w() work */
	rc = reg_w(sd, R511_I2C_CTL, 0x05);
	if (rc < 0)
		return rc;

	return value;
}
2087

2088 2089 2090 2091 2092
/*
 * The OV518 I2C I/O procedure is different, hence, this function.
 * This is normally only called from i2c_w(). Note that this function
 * always succeeds regardless of whether the sensor is present and working.
 */
2093
static int ov518_i2c_w(struct sd *sd,
2094 2095
		u8 reg,
		u8 value)
2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112
{
	int rc;

	PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);

	/* Select camera register */
	rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
	if (rc < 0)
		return rc;

	/* Write "value" to I2C data port of OV511 */
	rc = reg_w(sd, R51x_I2C_DATA, value);
	if (rc < 0)
		return rc;

	/* Initiate 3-byte write cycle */
	rc = reg_w(sd, R518_I2C_CTL, 0x01);
2113 2114
	if (rc < 0)
		return rc;
2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127

	/* wait for write complete */
	msleep(4);
	return reg_r8(sd, R518_I2C_CTL);
}

/*
 * returns: negative is error, pos or zero is data
 *
 * The OV518 I2C I/O procedure is different, hence, this function.
 * This is normally only called from i2c_r(). Note that this function
 * always succeeds regardless of whether the sensor is present and working.
 */
2128
static int ov518_i2c_r(struct sd *sd, u8 reg)
2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150
{
	int rc, value;

	/* Select camera register */
	rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
	if (rc < 0)
		return rc;

	/* Initiate 2-byte write cycle */
	rc = reg_w(sd, R518_I2C_CTL, 0x03);
	if (rc < 0)
		return rc;

	/* Initiate 2-byte read cycle */
	rc = reg_w(sd, R518_I2C_CTL, 0x05);
	if (rc < 0)
		return rc;
	value = reg_r(sd, R51x_I2C_DATA);
	PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
	return value;
}

2151
static int ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2152 2153 2154 2155 2156 2157 2158
{
	int ret;

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_sndctrlpipe(sd->gspca_dev.dev, 0),
			0x02,
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2159
			(u16) value, (u16) reg, NULL, 0, 500);
2160

2161
	if (ret < 0) {
2162
		err("i2c 0x%02x -> [0x%02x] failed", value, reg);
2163 2164
		return ret;
	}
2165

2166 2167
	PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
	return 0;
2168 2169
}

2170
static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2171 2172 2173 2174 2175 2176 2177
{
	int ret;

	ret = usb_control_msg(sd->gspca_dev.dev,
			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
			0x03,
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2178
			0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2179 2180 2181 2182 2183

	if (ret >= 0) {
		ret = sd->gspca_dev.usb_buf[0];
		PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
	} else
2184
		err("i2c read [0x%02x] failed", reg);
2185 2186 2187 2188

	return ret;
}

2189
static int i2c_w(struct sd *sd, u8 reg, u8 value)
2190
{
2191 2192 2193 2194 2195
	int ret = -1;

	if (sd->sensor_reg_cache[reg] == value)
		return 0;

2196 2197 2198
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2199 2200
		ret = ov511_i2c_w(sd, reg, value);
		break;
2201 2202 2203
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
	case BRIDGE_OV519:
2204 2205
		ret = ov518_i2c_w(sd, reg, value);
		break;
2206
	case BRIDGE_OVFX2:
2207 2208
		ret = ovfx2_i2c_w(sd, reg, value);
		break;
2209
	case BRIDGE_W9968CF:
2210 2211
		ret = w9968cf_i2c_w(sd, reg, value);
		break;
2212
	}
2213 2214 2215 2216 2217

	if (ret >= 0) {
		/* Up on sensor reset empty the register cache */
		if (reg == 0x12 && (value & 0x80))
			memset(sd->sensor_reg_cache, -1,
2218
				sizeof(sd->sensor_reg_cache));
2219 2220 2221 2222 2223
		else
			sd->sensor_reg_cache[reg] = value;
	}

	return ret;
2224 2225
}

2226
static int i2c_r(struct sd *sd, u8 reg)
2227
{
2228
	int ret = -1;
2229 2230 2231 2232

	if (sd->sensor_reg_cache[reg] != -1)
		return sd->sensor_reg_cache[reg];

2233 2234 2235
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
2236 2237
		ret = ov511_i2c_r(sd, reg);
		break;
2238 2239 2240
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
	case BRIDGE_OV519:
2241 2242
		ret = ov518_i2c_r(sd, reg);
		break;
2243
	case BRIDGE_OVFX2:
2244 2245
		ret = ovfx2_i2c_r(sd, reg);
		break;
2246
	case BRIDGE_W9968CF:
2247 2248
		ret = w9968cf_i2c_r(sd, reg);
		break;
2249
	}
2250 2251 2252 2253 2254

	if (ret >= 0)
		sd->sensor_reg_cache[reg] = ret;

	return ret;
2255 2256
}

2257 2258 2259 2260 2261 2262
/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
 * the same position as 1's in "mask" are cleared and set to "value". Bits
 * that are in the same position as 0's in "mask" are preserved, regardless
 * of their respective state in "value".
 */
static int i2c_w_mask(struct sd *sd,
2263 2264 2265
			u8 reg,
			u8 value,
			u8 mask)
2266 2267
{
	int rc;
2268
	u8 oldval;
2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284

	value &= mask;			/* Enforce mask on value */
	rc = i2c_r(sd, reg);
	if (rc < 0)
		return rc;
	oldval = rc & ~mask;		/* Clear the masked bits */
	value |= oldval;		/* Set the desired bits */
	return i2c_w(sd, reg, value);
}

/* Temporarily stops OV511 from functioning. Must do this before changing
 * registers while the camera is streaming */
static inline int ov51x_stop(struct sd *sd)
{
	PDEBUG(D_STREAM, "stopping");
	sd->stopped = 1;
2285 2286 2287 2288 2289 2290 2291 2292
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		return reg_w(sd, R51x_SYS_RESET, 0x3d);
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
	case BRIDGE_OV519:
2293
		return reg_w(sd, OV519_R51_RESET1, 0x0f);
2294 2295
	case BRIDGE_OVFX2:
		return reg_w_mask(sd, 0x0f, 0x00, 0x02);
2296
	case BRIDGE_W9968CF:
2297
		return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2298 2299 2300
	}

	return 0;
2301 2302 2303 2304 2305 2306
}

/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
 * actually stopped (for performance). */
static inline int ov51x_restart(struct sd *sd)
{
2307 2308
	int rc;

2309 2310 2311 2312 2313 2314
	PDEBUG(D_STREAM, "restarting");
	if (!sd->stopped)
		return 0;
	sd->stopped = 0;

	/* Reinitialize the stream */
2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325
	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		return reg_w(sd, R51x_SYS_RESET, 0x00);
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		rc = reg_w(sd, 0x2f, 0x80);
		if (rc < 0)
			return rc;
		return reg_w(sd, R51x_SYS_RESET, 0x00);
	case BRIDGE_OV519:
2326
		return reg_w(sd, OV519_R51_RESET1, 0x00);
2327 2328
	case BRIDGE_OVFX2:
		return reg_w_mask(sd, 0x0f, 0x02, 0x02);
2329 2330
	case BRIDGE_W9968CF:
		return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2331 2332 2333
	}

	return 0;
2334 2335
}

2336
static int ov51x_set_slave_ids(struct sd *sd, u8 slave);
2337

2338 2339 2340
/* This does an initial reset of an OmniVision sensor and ensures that I2C
 * is synchronized. Returns <0 on failure.
 */
2341
static int init_ov_sensor(struct sd *sd, u8 slave)
2342
{
2343
	int i;
2344

2345 2346 2347
	if (ov51x_set_slave_ids(sd, slave) < 0)
		return -EIO;

2348 2349 2350 2351 2352 2353 2354
	/* Reset the sensor */
	if (i2c_w(sd, 0x12, 0x80) < 0)
		return -EIO;

	/* Wait for it to initialize */
	msleep(150);

2355
	for (i = 0; i < i2c_detect_tries; i++) {
2356 2357
		if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
		    i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2358 2359
			PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
			return 0;
2360 2361 2362 2363 2364 2365 2366
		}

		/* Reset the sensor */
		if (i2c_w(sd, 0x12, 0x80) < 0)
			return -EIO;
		/* Wait for it to initialize */
		msleep(150);
2367

2368 2369 2370 2371
		/* Dummy read to sync I2C */
		if (i2c_r(sd, 0x00) < 0)
			return -EIO;
	}
2372
	return -EIO;
2373 2374 2375 2376 2377 2378 2379 2380
}

/* Set the read and write slave IDs. The "slave" argument is the write slave,
 * and the read slave will be set to (slave + 1).
 * This should not be called from outside the i2c I/O functions.
 * Sets I2C read and write slave IDs. Returns <0 for error
 */
static int ov51x_set_slave_ids(struct sd *sd,
2381
				u8 slave)
2382 2383 2384
{
	int rc;

2385 2386
	switch (sd->bridge) {
	case BRIDGE_OVFX2:
2387
		return reg_w(sd, OVFX2_I2C_ADDR, slave);
2388 2389 2390 2391
	case BRIDGE_W9968CF:
		sd->sensor_addr = slave;
		return 0;
	}
2392

2393 2394 2395 2396 2397 2398 2399
	rc = reg_w(sd, R51x_I2C_W_SID, slave);
	if (rc < 0)
		return rc;
	return reg_w(sd, R51x_I2C_R_SID, slave + 1);
}

static int write_regvals(struct sd *sd,
2400
			 const struct ov_regvals *regvals,
2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414
			 int n)
{
	int rc;

	while (--n >= 0) {
		rc = reg_w(sd, regvals->reg, regvals->val);
		if (rc < 0)
			return rc;
		regvals++;
	}
	return 0;
}

static int write_i2c_regvals(struct sd *sd,
2415
			     const struct ov_i2c_regvals *regvals,
2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434
			     int n)
{
	int rc;

	while (--n >= 0) {
		rc = i2c_w(sd, regvals->reg, regvals->val);
		if (rc < 0)
			return rc;
		regvals++;
	}
	return 0;
}

/****************************************************************************
 *
 * OV511 and sensor configuration
 *
 ***************************************************************************/

2435 2436 2437 2438 2439 2440
/* This initializes the OV2x10 / OV3610 / OV3620 */
static int ov_hires_configure(struct sd *sd)
{
	int high, low;

	if (sd->bridge != BRIDGE_OVFX2) {
2441
		err("error hires sensors only supported with ovfx2");
2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457
		return -1;
	}

	PDEBUG(D_PROBE, "starting ov hires configuration");

	/* Detect sensor (sub)type */
	high = i2c_r(sd, 0x0a);
	low = i2c_r(sd, 0x0b);
	/* info("%x, %x", high, low); */
	if (high == 0x96 && low == 0x40) {
		PDEBUG(D_PROBE, "Sensor is an OV2610");
		sd->sensor = SEN_OV2610;
	} else if (high == 0x36 && (low & 0x0f) == 0x00) {
		PDEBUG(D_PROBE, "Sensor is an OV3610");
		sd->sensor = SEN_OV3610;
	} else {
2458
		err("Error unknown sensor type: 0x%02x%02x",
2459
			high, low);
2460 2461 2462 2463 2464 2465 2466 2467
		return -1;
	}

	/* Set sensor-specific vars */
	return 0;
}


2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485
/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
 * the same register settings as the OV8610, since they are very similar.
 */
static int ov8xx0_configure(struct sd *sd)
{
	int rc;

	PDEBUG(D_PROBE, "starting ov8xx0 configuration");

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
		return -1;
	}
	if ((rc & 3) == 1) {
		sd->sensor = SEN_OV8610;
	} else {
2486
		err("Unknown image sensor version: %d", rc & 3);
2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525
		return -1;
	}

	/* Set sensor-specific vars */
	return 0;
}

/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
 * the same register settings as the OV7610, since they are very similar.
 */
static int ov7xx0_configure(struct sd *sd)
{
	int rc, high, low;

	PDEBUG(D_PROBE, "starting OV7xx0 configuration");

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);

	/* add OV7670 here
	 * it appears to be wrongly detected as a 7610 by default */
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
		return -1;
	}
	if ((rc & 3) == 3) {
		/* quick hack to make OV7670s work */
		high = i2c_r(sd, 0x0a);
		low = i2c_r(sd, 0x0b);
		/* info("%x, %x", high, low); */
		if (high == 0x76 && low == 0x73) {
			PDEBUG(D_PROBE, "Sensor is an OV7670");
			sd->sensor = SEN_OV7670;
		} else {
			PDEBUG(D_PROBE, "Sensor is an OV7610");
			sd->sensor = SEN_OV7610;
		}
	} else if ((rc & 3) == 1) {
		/* I don't know what's different about the 76BE yet. */
2526
		if (i2c_r(sd, 0x15) & 1) {
2527
			PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2528
			sd->sensor = SEN_OV7620AE;
2529
		} else {
2530
			PDEBUG(D_PROBE, "Sensor is an OV76BE");
2531 2532
			sd->sensor = SEN_OV76BE;
		}
2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545
	} else if ((rc & 3) == 0) {
		/* try to read product id registers */
		high = i2c_r(sd, 0x0a);
		if (high < 0) {
			PDEBUG(D_ERR, "Error detecting camera chip PID");
			return high;
		}
		low = i2c_r(sd, 0x0b);
		if (low < 0) {
			PDEBUG(D_ERR, "Error detecting camera chip VER");
			return low;
		}
		if (high == 0x76) {
2546 2547
			switch (low) {
			case 0x30:
2548 2549
				err("Sensor is an OV7630/OV7635");
				err("7630 is not supported by this driver");
2550
				return -1;
2551
			case 0x40:
2552 2553
				PDEBUG(D_PROBE, "Sensor is an OV7645");
				sd->sensor = SEN_OV7640; /* FIXME */
2554 2555
				break;
			case 0x45:
2556 2557
				PDEBUG(D_PROBE, "Sensor is an OV7645B");
				sd->sensor = SEN_OV7640; /* FIXME */
2558 2559
				break;
			case 0x48:
2560
				PDEBUG(D_PROBE, "Sensor is an OV7648");
2561
				sd->sensor = SEN_OV7648;
2562 2563 2564
				break;
			default:
				PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2565 2566 2567 2568 2569 2570 2571
				return -1;
			}
		} else {
			PDEBUG(D_PROBE, "Sensor is an OV7620");
			sd->sensor = SEN_OV7620;
		}
	} else {
2572
		err("Unknown image sensor version: %d", rc & 3);
2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583
		return -1;
	}

	/* Set sensor-specific vars */
	return 0;
}

/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
static int ov6xx0_configure(struct sd *sd)
{
	int rc;
2584
	PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595

	/* Detect sensor (sub)type */
	rc = i2c_r(sd, OV7610_REG_COM_I);
	if (rc < 0) {
		PDEBUG(D_ERR, "Error detecting sensor type");
		return -1;
	}

	/* Ugh. The first two bits are the version bits, but
	 * the entire register value must be used. I guess OVT
	 * underestimated how many variants they would make. */
2596 2597
	switch (rc) {
	case 0x00:
2598
		sd->sensor = SEN_OV6630;
2599 2600
		warn("WARNING: Sensor is an OV66308. Your camera may have");
		warn("been misdetected in previous driver versions.");
2601 2602
		break;
	case 0x01:
2603
		sd->sensor = SEN_OV6620;
2604
		PDEBUG(D_PROBE, "Sensor is an OV6620");
2605 2606
		break;
	case 0x02:
2607 2608
		sd->sensor = SEN_OV6630;
		PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2609 2610
		break;
	case 0x03:
2611
		sd->sensor = SEN_OV66308AF;
2612
		PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2613 2614
		break;
	case 0x90:
2615
		sd->sensor = SEN_OV6630;
2616 2617
		warn("WARNING: Sensor is an OV66307. Your camera may have");
		warn("been misdetected in previous driver versions.");
2618 2619
		break;
	default:
2620
		err("FATAL: Unknown sensor version: 0x%02x", rc);
2621 2622 2623 2624
		return -1;
	}

	/* Set sensor-specific vars */
2625
	sd->sif = 1;
2626 2627 2628 2629 2630 2631 2632

	return 0;
}

/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
static void ov51x_led_control(struct sd *sd, int on)
{
2633 2634 2635
	if (sd->invert_led)
		on = !on;

2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648
	switch (sd->bridge) {
	/* OV511 has no LED control */
	case BRIDGE_OV511PLUS:
		reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
		break;
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
		break;
	case BRIDGE_OV519:
		reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1);	/* 0 / 1 */
		break;
	}
2649 2650
}

2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663
static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (!sd->snapshot_needs_reset)
		return;

	/* Note it is important that we clear sd->snapshot_needs_reset,
	   before actually clearing the snapshot state in the bridge
	   otherwise we might race with the pkt_scan interrupt handler */
	sd->snapshot_needs_reset = 0;

	switch (sd->bridge) {
2664 2665 2666 2667 2668
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		reg_w(sd, R51x_SYS_SNAP, 0x02);
		reg_w(sd, R51x_SYS_SNAP, 0x00);
		break;
2669 2670 2671 2672 2673
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
		reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
		break;
2674 2675 2676 2677 2678 2679 2680
	case BRIDGE_OV519:
		reg_w(sd, R51x_SYS_RESET, 0x40);
		reg_w(sd, R51x_SYS_RESET, 0x00);
		break;
	}
}

2681
static int ov51x_upload_quan_tables(struct sd *sd)
2682
{
2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705
	const unsigned char yQuanTable511[] = {
		0, 1, 1, 2, 2, 3, 3, 4,
		1, 1, 1, 2, 2, 3, 4, 4,
		1, 1, 2, 2, 3, 4, 4, 4,
		2, 2, 2, 3, 4, 4, 4, 4,
		2, 2, 3, 4, 4, 5, 5, 5,
		3, 3, 4, 4, 5, 5, 5, 5,
		3, 4, 4, 4, 5, 5, 5, 5,
		4, 4, 4, 4, 5, 5, 5, 5
	};

	const unsigned char uvQuanTable511[] = {
		0, 2, 2, 3, 4, 4, 4, 4,
		2, 2, 2, 4, 4, 4, 4, 4,
		2, 2, 3, 4, 4, 4, 4, 4,
		3, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4,
		4, 4, 4, 4, 4, 4, 4, 4
	};

	/* OV518 quantization tables are 8x4 (instead of 8x8) */
2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718
	const unsigned char yQuanTable518[] = {
		5, 4, 5, 6, 6, 7, 7, 7,
		5, 5, 5, 5, 6, 7, 7, 7,
		6, 6, 6, 6, 7, 7, 7, 8,
		7, 7, 6, 7, 7, 7, 8, 8
	};
	const unsigned char uvQuanTable518[] = {
		6, 6, 6, 7, 7, 7, 7, 7,
		6, 6, 6, 7, 7, 7, 7, 7,
		6, 6, 6, 7, 7, 7, 7, 8,
		7, 7, 7, 7, 7, 7, 8, 8
	};

2719
	const unsigned char *pYTable, *pUVTable;
2720
	unsigned char val0, val1;
2721
	int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
2722 2723 2724

	PDEBUG(D_PROBE, "Uploading quantization tables");

2725 2726 2727
	if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
		pYTable = yQuanTable511;
		pUVTable = uvQuanTable511;
2728
		size = 32;
2729 2730 2731
	} else {
		pYTable = yQuanTable518;
		pUVTable = uvQuanTable518;
2732
		size = 16;
2733 2734 2735
	}

	for (i = 0; i < size; i++) {
2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749
		val0 = *pYTable++;
		val1 = *pYTable++;
		val0 &= 0x0f;
		val1 &= 0x0f;
		val0 |= val1 << 4;
		rc = reg_w(sd, reg, val0);
		if (rc < 0)
			return rc;

		val0 = *pUVTable++;
		val1 = *pUVTable++;
		val0 &= 0x0f;
		val1 &= 0x0f;
		val0 |= val1 << 4;
2750
		rc = reg_w(sd, reg + size, val0);
2751 2752 2753 2754 2755 2756 2757 2758 2759
		if (rc < 0)
			return rc;

		reg++;
	}

	return 0;
}

2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777
/* This initializes the OV511/OV511+ and the sensor */
static int ov511_configure(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int rc;

	/* For 511 and 511+ */
	const struct ov_regvals init_511[] = {
		{ R51x_SYS_RESET,	0x7f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x7f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x3f },
		{ R51x_SYS_INIT,	0x01 },
		{ R51x_SYS_RESET,	0x3d },
	};

	const struct ov_regvals norm_511[] = {
2778
		{ R511_DRAM_FLOW_CTL,	0x01 },
2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840
		{ R51x_SYS_SNAP,	0x00 },
		{ R51x_SYS_SNAP,	0x02 },
		{ R51x_SYS_SNAP,	0x00 },
		{ R511_FIFO_OPTS,	0x1f },
		{ R511_COMP_EN,		0x00 },
		{ R511_COMP_LUT_EN,	0x03 },
	};

	const struct ov_regvals norm_511_p[] = {
		{ R511_DRAM_FLOW_CTL,	0xff },
		{ R51x_SYS_SNAP,	0x00 },
		{ R51x_SYS_SNAP,	0x02 },
		{ R51x_SYS_SNAP,	0x00 },
		{ R511_FIFO_OPTS,	0xff },
		{ R511_COMP_EN,		0x00 },
		{ R511_COMP_LUT_EN,	0x03 },
	};

	const struct ov_regvals compress_511[] = {
		{ 0x70, 0x1f },
		{ 0x71, 0x05 },
		{ 0x72, 0x06 },
		{ 0x73, 0x06 },
		{ 0x74, 0x14 },
		{ 0x75, 0x03 },
		{ 0x76, 0x04 },
		{ 0x77, 0x04 },
	};

	PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));

	rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
	if (rc < 0)
		return rc;

	switch (sd->bridge) {
	case BRIDGE_OV511:
		rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
		if (rc < 0)
			return rc;
		break;
	case BRIDGE_OV511PLUS:
		rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
		if (rc < 0)
			return rc;
		break;
	}

	/* Init compression */
	rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
	if (rc < 0)
		return rc;

	rc = ov51x_upload_quan_tables(sd);
	if (rc < 0) {
		PDEBUG(D_ERR, "Error uploading quantization tables");
		return rc;
	}

	return 0;
}

2841 2842
/* This initializes the OV518/OV518+ and the sensor */
static int ov518_configure(struct gspca_dev *gspca_dev)
2843 2844
{
	struct sd *sd = (struct sd *) gspca_dev;
2845 2846 2847
	int rc;

	/* For 518 and 518+ */
2848
	const struct ov_regvals init_518[] = {
2849 2850 2851 2852 2853 2854 2855 2856 2857 2858
		{ R51x_SYS_RESET,	0x40 },
		{ R51x_SYS_INIT,	0xe1 },
		{ R51x_SYS_RESET,	0x3e },
		{ R51x_SYS_INIT,	0xe1 },
		{ R51x_SYS_RESET,	0x00 },
		{ R51x_SYS_INIT,	0xe1 },
		{ 0x46,			0x00 },
		{ 0x5d,			0x03 },
	};

2859
	const struct ov_regvals norm_518[] = {
2860 2861
		{ R51x_SYS_SNAP,	0x02 }, /* Reset */
		{ R51x_SYS_SNAP,	0x01 }, /* Enable */
2862
		{ 0x31,			0x0f },
2863 2864 2865 2866 2867 2868 2869 2870 2871
		{ 0x5d,			0x03 },
		{ 0x24,			0x9f },
		{ 0x25,			0x90 },
		{ 0x20,			0x00 },
		{ 0x51,			0x04 },
		{ 0x71,			0x19 },
		{ 0x2f,			0x80 },
	};

2872
	const struct ov_regvals norm_518_p[] = {
2873 2874
		{ R51x_SYS_SNAP,	0x02 }, /* Reset */
		{ R51x_SYS_SNAP,	0x01 }, /* Enable */
2875
		{ 0x31,			0x0f },
2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892
		{ 0x5d,			0x03 },
		{ 0x24,			0x9f },
		{ 0x25,			0x90 },
		{ 0x20,			0x60 },
		{ 0x51,			0x02 },
		{ 0x71,			0x19 },
		{ 0x40,			0xff },
		{ 0x41,			0x42 },
		{ 0x46,			0x00 },
		{ 0x33,			0x04 },
		{ 0x21,			0x19 },
		{ 0x3f,			0x10 },
		{ 0x2f,			0x80 },
	};

	/* First 5 bits of custom ID reg are a revision ID on OV518 */
	PDEBUG(D_PROBE, "Device revision %d",
2893
		0x1f & reg_r(sd, R51x_SYS_CUST_ID));
2894 2895 2896 2897 2898 2899 2900 2901 2902

	rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
	if (rc < 0)
		return rc;

	/* Set LED GPIO pin to output mode */
	rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
	if (rc < 0)
		return rc;
2903

2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915 2916
	switch (sd->bridge) {
	case BRIDGE_OV518:
		rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
		if (rc < 0)
			return rc;
		break;
	case BRIDGE_OV518PLUS:
		rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
		if (rc < 0)
			return rc;
		break;
	}

2917
	rc = ov51x_upload_quan_tables(sd);
2918 2919 2920 2921 2922 2923 2924 2925 2926 2927 2928 2929 2930 2931
	if (rc < 0) {
		PDEBUG(D_ERR, "Error uploading quantization tables");
		return rc;
	}

	rc = reg_w(sd, 0x2f, 0x80);
	if (rc < 0)
		return rc;

	return 0;
}

static int ov519_configure(struct sd *sd)
{
2932
	static const struct ov_regvals init_519[] = {
2933 2934
		{ 0x5a, 0x6d }, /* EnableSystem */
		{ 0x53, 0x9b },
2935
		{ OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
2936 2937 2938
		{ 0x5d, 0x03 },
		{ 0x49, 0x01 },
		{ 0x48, 0x00 },
2939 2940 2941
		/* Set LED pin to output mode. Bit 4 must be cleared or sensor
		 * detection will fail. This deserves further investigation. */
		{ OV519_GPIO_IO_CTRL0,   0xee },
2942 2943
		{ OV519_R51_RESET1, 0x0f },
		{ OV519_R51_RESET1, 0x00 },
2944
		{ 0x22, 0x00 },
2945 2946 2947
		/* windows reads 0x55 at this point*/
	};

2948 2949 2950
	return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
}

2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967
static int ovfx2_configure(struct sd *sd)
{
	static const struct ov_regvals init_fx2[] = {
		{ 0x00, 0x60 },
		{ 0x02, 0x01 },
		{ 0x0f, 0x1d },
		{ 0xe9, 0x82 },
		{ 0xea, 0xc7 },
		{ 0xeb, 0x10 },
		{ 0xec, 0xf6 },
	};

	sd->stopped = 1;

	return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
}

2968 2969 2970 2971 2972
/* this function is called at probe time */
static int sd_config(struct gspca_dev *gspca_dev,
			const struct usb_device_id *id)
{
	struct sd *sd = (struct sd *) gspca_dev;
2973
	struct cam *cam = &gspca_dev->cam;
2974 2975
	int ret = 0;

2976 2977
	sd->bridge = id->driver_info & BRIDGE_MASK;
	sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
2978 2979

	switch (sd->bridge) {
2980 2981 2982 2983
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		ret = ov511_configure(gspca_dev);
		break;
2984 2985 2986 2987 2988 2989 2990
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		ret = ov518_configure(gspca_dev);
		break;
	case BRIDGE_OV519:
		ret = ov519_configure(sd);
		break;
2991 2992 2993 2994 2995 2996
	case BRIDGE_OVFX2:
		ret = ovfx2_configure(sd);
		cam->bulk_size = OVFX2_BULK_SIZE;
		cam->bulk_nurbs = MAX_NURBS;
		cam->bulk = 1;
		break;
2997 2998 2999 3000
	case BRIDGE_W9968CF:
		ret = w9968cf_configure(sd);
		cam->reverse_alts = 1;
		break;
3001 3002 3003
	}

	if (ret)
3004
		goto error;
3005

3006 3007 3008 3009 3010
	ov51x_led_control(sd, 0);	/* turn LED off */

	/* The OV519 must be more aggressive about sensor detection since
	 * I2C write will never fail if the sensor is not present. We have
	 * to try to initialize the sensor to detect its presence */
3011
	sd->sensor = -1;
3012 3013 3014

	/* Test for 76xx */
	if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3015 3016 3017 3018
		if (ov7xx0_configure(sd) < 0) {
			PDEBUG(D_ERR, "Failed to configure OV7xx0");
			goto error;
		}
3019 3020 3021 3022 3023 3024 3025 3026 3027 3028
	/* Test for 6xx0 */
	} else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
		if (ov6xx0_configure(sd) < 0) {
			PDEBUG(D_ERR, "Failed to configure OV6xx0");
			goto error;
		}
	/* Test for 8xx0 */
	} else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
		if (ov8xx0_configure(sd) < 0) {
			PDEBUG(D_ERR, "Failed to configure OV8xx0");
3029 3030
			goto error;
		}
3031 3032 3033 3034 3035 3036
	/* Test for 3xxx / 2xxx */
	} else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
		if (ov_hires_configure(sd) < 0) {
			PDEBUG(D_ERR, "Failed to configure high res OV");
			goto error;
		}
3037
	} else {
3038
		err("Can't determine sensor slave IDs");
3039
		goto error;
3040 3041
	}

3042 3043 3044
	if (sd->sensor < 0)
		goto error;

3045
	switch (sd->bridge) {
3046 3047 3048 3049 3050 3051 3052 3053 3054 3055
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		if (!sd->sif) {
			cam->cam_mode = ov511_vga_mode;
			cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
		} else {
			cam->cam_mode = ov511_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
		}
		break;
3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		if (!sd->sif) {
			cam->cam_mode = ov518_vga_mode;
			cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
		} else {
			cam->cam_mode = ov518_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
		}
		break;
	case BRIDGE_OV519:
		if (!sd->sif) {
			cam->cam_mode = ov519_vga_mode;
			cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
		} else {
			cam->cam_mode = ov519_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
		}
		break;
3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089
	case BRIDGE_OVFX2:
		if (sd->sensor == SEN_OV2610) {
			cam->cam_mode = ovfx2_ov2610_mode;
			cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
		} else if (sd->sensor == SEN_OV3610) {
			cam->cam_mode = ovfx2_ov3610_mode;
			cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
		} else if (!sd->sif) {
			cam->cam_mode = ov519_vga_mode;
			cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
		} else {
			cam->cam_mode = ov519_sif_mode;
			cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
		}
		break;
3090 3091 3092
	case BRIDGE_W9968CF:
		cam->cam_mode = w9968cf_vga_mode;
		cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3093 3094
		if (sd->sif)
			cam->nmodes--;
3095 3096 3097 3098 3099

		/* w9968cf needs initialisation once the sensor is known */
		if (w9968cf_init(sd) < 0)
			goto error;
		break;
3100
	}
3101 3102 3103
	gspca_dev->cam.ctrls = sd->ctrls;
	if (sd->sensor == SEN_OV7670)
		gspca_dev->ctrl_dis = 1 << COLORS;
3104
	else
3105
		gspca_dev->ctrl_dis = (1 << HFLIP) | (1 << VFLIP);
3106
	sd->quality = QUALITY_DEF;
3107
	if (sd->sensor == SEN_OV7640 ||
3108
	    sd->sensor == SEN_OV7648)
3109
		gspca_dev->ctrl_dis |= (1 << AUTOBRIGHT) | (1 << CONTRAST);
3110
	if (sd->sensor == SEN_OV7670)
3111
		gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT;
3112 3113
	/* OV8610 Frequency filter control should work but needs testing */
	if (sd->sensor == SEN_OV8610)
3114
		gspca_dev->ctrl_dis |= 1 << FREQ;
3115 3116
	/* No controls for the OV2610/OV3610 */
	if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3117
		gspca_dev->ctrl_dis |= (1 << NCTRL) - 1;
3118

3119 3120 3121
	return 0;
error:
	PDEBUG(D_ERR, "OV519 Config failed");
3122
	return -EINVAL;
3123 3124
}

3125 3126
/* this function is called at probe and resume time */
static int sd_init(struct gspca_dev *gspca_dev)
3127
{
3128 3129 3130 3131
	struct sd *sd = (struct sd *) gspca_dev;

	/* initialize the sensor */
	switch (sd->sensor) {
3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143 3144 3145
	case SEN_OV2610:
		if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
			return -EIO;
		/* Enable autogain, autoexpo, awb, bandfilter */
		if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
			return -EIO;
		break;
	case SEN_OV3610:
		if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
			return -EIO;
		/* Enable autogain, autoexpo, awb, bandfilter */
		if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
			return -EIO;
		break;
3146 3147 3148 3149 3150
	case SEN_OV6620:
		if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
			return -EIO;
		break;
	case SEN_OV6630:
3151
	case SEN_OV66308AF:
3152 3153
		sd->ctrls[CONTRAST].def = 200;
				 /* The default is too low for the ov6630 */
3154 3155 3156 3157 3158 3159 3160 3161
		if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
			return -EIO;
		break;
	default:
/*	case SEN_OV7610: */
/*	case SEN_OV76BE: */
		if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
			return -EIO;
3162 3163
		if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
			return -EIO;
3164 3165
		break;
	case SEN_OV7620:
3166
	case SEN_OV7620AE:
3167 3168 3169 3170
		if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
			return -EIO;
		break;
	case SEN_OV7640:
3171
	case SEN_OV7648:
3172 3173 3174 3175
		if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
			return -EIO;
		break;
	case SEN_OV7670:
3176 3177
		sd->ctrls[FREQ].max = 3;	/* auto */
		sd->ctrls[FREQ].def = 3;
3178 3179 3180 3181 3182 3183 3184 3185
		if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
			return -EIO;
		break;
	case SEN_OV8610:
		if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
			return -EIO;
		break;
	}
3186 3187 3188
	return 0;
}

3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202
/* Set up the OV511/OV511+ with the given image parameters.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
static int ov511_mode_init_regs(struct sd *sd)
{
	int hsegs, vsegs, packet_size, fps, needed;
	int interlaced = 0;
	struct usb_host_interface *alt;
	struct usb_interface *intf;

	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
	if (!alt) {
3203
		err("Couldn't get altsetting");
3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246
		return -EIO;
	}

	packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
	reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);

	reg_w(sd, R511_CAM_UV_EN, 0x01);
	reg_w(sd, R511_SNAP_UV_EN, 0x01);
	reg_w(sd, R511_SNAP_OPTS, 0x03);

	/* Here I'm assuming that snapshot size == image size.
	 * I hope that's always true. --claudio
	 */
	hsegs = (sd->gspca_dev.width >> 3) - 1;
	vsegs = (sd->gspca_dev.height >> 3) - 1;

	reg_w(sd, R511_CAM_PXCNT, hsegs);
	reg_w(sd, R511_CAM_LNCNT, vsegs);
	reg_w(sd, R511_CAM_PXDIV, 0x00);
	reg_w(sd, R511_CAM_LNDIV, 0x00);

	/* YUV420, low pass filter on */
	reg_w(sd, R511_CAM_OPTS, 0x03);

	/* Snapshot additions */
	reg_w(sd, R511_SNAP_PXCNT, hsegs);
	reg_w(sd, R511_SNAP_LNCNT, vsegs);
	reg_w(sd, R511_SNAP_PXDIV, 0x00);
	reg_w(sd, R511_SNAP_LNDIV, 0x00);

	/******** Set the framerate ********/
	if (frame_rate > 0)
		sd->frame_rate = frame_rate;

	switch (sd->sensor) {
	case SEN_OV6620:
		/* No framerate control, doesn't like higher rates yet */
		sd->clockdiv = 3;
		break;

	/* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
	   for more sensors we need to do this for them too */
	case SEN_OV7620:
3247
	case SEN_OV7620AE:
3248
	case SEN_OV7640:
3249
	case SEN_OV7648:
3250
	case SEN_OV76BE:
3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310
		if (sd->gspca_dev.width == 320)
			interlaced = 1;
		/* Fall through */
	case SEN_OV6630:
	case SEN_OV7610:
	case SEN_OV7670:
		switch (sd->frame_rate) {
		case 30:
		case 25:
			/* Not enough bandwidth to do 640x480 @ 30 fps */
			if (sd->gspca_dev.width != 640) {
				sd->clockdiv = 0;
				break;
			}
			/* Fall through for 640x480 case */
		default:
/*		case 20: */
/*		case 15: */
			sd->clockdiv = 1;
			break;
		case 10:
			sd->clockdiv = 2;
			break;
		case 5:
			sd->clockdiv = 5;
			break;
		}
		if (interlaced) {
			sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
			/* Higher then 10 does not work */
			if (sd->clockdiv > 10)
				sd->clockdiv = 10;
		}
		break;

	case SEN_OV8610:
		/* No framerate control ?? */
		sd->clockdiv = 0;
		break;
	}

	/* Check if we have enough bandwidth to disable compression */
	fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
	needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
	/* 1400 is a conservative estimate of the max nr of isoc packets/sec */
	if (needed > 1400 * packet_size) {
		/* Enable Y and UV quantization and compression */
		reg_w(sd, R511_COMP_EN, 0x07);
		reg_w(sd, R511_COMP_LUT_EN, 0x03);
	} else {
		reg_w(sd, R511_COMP_EN, 0x06);
		reg_w(sd, R511_COMP_LUT_EN, 0x00);
	}

	reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
	reg_w(sd, R51x_SYS_RESET, 0);

	return 0;
}

3311 3312 3313 3314 3315 3316 3317 3318 3319
/* Sets up the OV518/OV518+ with the given image parameters
 *
 * OV518 needs a completely different approach, until we can figure out what
 * the individual registers do. Also, only 15 FPS is supported now.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
static int ov518_mode_init_regs(struct sd *sd)
{
3320 3321 3322 3323 3324 3325 3326
	int hsegs, vsegs, packet_size;
	struct usb_host_interface *alt;
	struct usb_interface *intf;

	intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
	alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
	if (!alt) {
3327
		err("Couldn't get altsetting");
3328 3329 3330 3331 3332
		return -EIO;
	}

	packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
	ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367

	/******** Set the mode ********/
	reg_w(sd, 0x2b, 0);
	reg_w(sd, 0x2c, 0);
	reg_w(sd, 0x2d, 0);
	reg_w(sd, 0x2e, 0);
	reg_w(sd, 0x3b, 0);
	reg_w(sd, 0x3c, 0);
	reg_w(sd, 0x3d, 0);
	reg_w(sd, 0x3e, 0);

	if (sd->bridge == BRIDGE_OV518) {
		/* Set 8-bit (YVYU) input format */
		reg_w_mask(sd, 0x20, 0x08, 0x08);

		/* Set 12-bit (4:2:0) output format */
		reg_w_mask(sd, 0x28, 0x80, 0xf0);
		reg_w_mask(sd, 0x38, 0x80, 0xf0);
	} else {
		reg_w(sd, 0x28, 0x80);
		reg_w(sd, 0x38, 0x80);
	}

	hsegs = sd->gspca_dev.width / 16;
	vsegs = sd->gspca_dev.height / 4;

	reg_w(sd, 0x29, hsegs);
	reg_w(sd, 0x2a, vsegs);

	reg_w(sd, 0x39, hsegs);
	reg_w(sd, 0x3a, vsegs);

	/* Windows driver does this here; who knows why */
	reg_w(sd, 0x2f, 0x80);

3368
	/******** Set the framerate ********/
3369
	sd->clockdiv = 1;
3370 3371

	/* Mode independent, but framerate dependent, regs */
3372 3373
	/* 0x51: Clock divider; Only works on some cams which use 2 crystals */
	reg_w(sd, 0x51, 0x04);
3374 3375 3376
	reg_w(sd, 0x22, 0x18);
	reg_w(sd, 0x23, 0xff);

3377 3378
	if (sd->bridge == BRIDGE_OV518PLUS) {
		switch (sd->sensor) {
3379
		case SEN_OV7620AE:
3380 3381 3382 3383 3384 3385 3386 3387
			if (sd->gspca_dev.width == 320) {
				reg_w(sd, 0x20, 0x00);
				reg_w(sd, 0x21, 0x19);
			} else {
				reg_w(sd, 0x20, 0x60);
				reg_w(sd, 0x21, 0x1f);
			}
			break;
3388 3389 3390 3391
		case SEN_OV7620:
			reg_w(sd, 0x20, 0x00);
			reg_w(sd, 0x21, 0x19);
			break;
3392 3393 3394 3395
		default:
			reg_w(sd, 0x21, 0x19);
		}
	} else
3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434
		reg_w(sd, 0x71, 0x17);	/* Compression-related? */

	/* FIXME: Sensor-specific */
	/* Bit 5 is what matters here. Of course, it is "reserved" */
	i2c_w(sd, 0x54, 0x23);

	reg_w(sd, 0x2f, 0x80);

	if (sd->bridge == BRIDGE_OV518PLUS) {
		reg_w(sd, 0x24, 0x94);
		reg_w(sd, 0x25, 0x90);
		ov518_reg_w32(sd, 0xc4,    400, 2);	/* 190h   */
		ov518_reg_w32(sd, 0xc6,    540, 2);	/* 21ch   */
		ov518_reg_w32(sd, 0xc7,    540, 2);	/* 21ch   */
		ov518_reg_w32(sd, 0xc8,    108, 2);	/* 6ch    */
		ov518_reg_w32(sd, 0xca, 131098, 3);	/* 2001ah */
		ov518_reg_w32(sd, 0xcb,    532, 2);	/* 214h   */
		ov518_reg_w32(sd, 0xcc,   2400, 2);	/* 960h   */
		ov518_reg_w32(sd, 0xcd,     32, 2);	/* 20h    */
		ov518_reg_w32(sd, 0xce,    608, 2);	/* 260h   */
	} else {
		reg_w(sd, 0x24, 0x9f);
		reg_w(sd, 0x25, 0x90);
		ov518_reg_w32(sd, 0xc4,    400, 2);	/* 190h   */
		ov518_reg_w32(sd, 0xc6,    381, 2);	/* 17dh   */
		ov518_reg_w32(sd, 0xc7,    381, 2);	/* 17dh   */
		ov518_reg_w32(sd, 0xc8,    128, 2);	/* 80h    */
		ov518_reg_w32(sd, 0xca, 183331, 3);	/* 2cc23h */
		ov518_reg_w32(sd, 0xcb,    746, 2);	/* 2eah   */
		ov518_reg_w32(sd, 0xcc,   1750, 2);	/* 6d6h   */
		ov518_reg_w32(sd, 0xcd,     45, 2);	/* 2dh    */
		ov518_reg_w32(sd, 0xce,    851, 2);	/* 353h   */
	}

	reg_w(sd, 0x2f, 0x80);

	return 0;
}

3435 3436 3437 3438 3439 3440 3441
/* Sets up the OV519 with the given image parameters
 *
 * OV519 needs a completely different approach, until we can figure out what
 * the individual registers do.
 *
 * Do not put any sensor-specific code in here (including I2C I/O functions)
 */
3442
static int ov519_mode_init_regs(struct sd *sd)
3443
{
3444
	static const struct ov_regvals mode_init_519_ov7670[] = {
3445 3446
		{ 0x5d,	0x03 }, /* Turn off suspend mode */
		{ 0x53,	0x9f }, /* was 9b in 1.65-1.08 */
3447
		{ OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466
		{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
		{ 0xa3,	0x18 },
		{ 0xa4,	0x04 },
		{ 0xa5,	0x28 },
		{ 0x37,	0x00 },	/* SetUsbInit */
		{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
		/* Enable both fields, YUV Input, disable defect comp (why?) */
		{ 0x20,	0x0c },
		{ 0x21,	0x38 },
		{ 0x22,	0x1d },
		{ 0x17,	0x50 }, /* undocumented */
		{ 0x37,	0x00 }, /* undocumented */
		{ 0x40,	0xff }, /* I2C timeout counter */
		{ 0x46,	0x00 }, /* I2C clock prescaler */
		{ 0x59,	0x04 },	/* new from windrv 090403 */
		{ 0xff,	0x00 }, /* undocumented */
		/* windows reads 0x55 at this point, why? */
	};

3467
	static const struct ov_regvals mode_init_519[] = {
3468 3469
		{ 0x5d,	0x03 }, /* Turn off suspend mode */
		{ 0x53,	0x9f }, /* was 9b in 1.65-1.08 */
3470
		{ OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490
		{ 0xa2,	0x20 }, /* a2-a5 are undocumented */
		{ 0xa3,	0x18 },
		{ 0xa4,	0x04 },
		{ 0xa5,	0x28 },
		{ 0x37,	0x00 },	/* SetUsbInit */
		{ 0x55,	0x02 }, /* 4.096 Mhz audio clock */
		/* Enable both fields, YUV Input, disable defect comp (why?) */
		{ 0x22,	0x1d },
		{ 0x17,	0x50 }, /* undocumented */
		{ 0x37,	0x00 }, /* undocumented */
		{ 0x40,	0xff }, /* I2C timeout counter */
		{ 0x46,	0x00 }, /* I2C clock prescaler */
		{ 0x59,	0x04 },	/* new from windrv 090403 */
		{ 0xff,	0x00 }, /* undocumented */
		/* windows reads 0x55 at this point, why? */
	};

	/******** Set the mode ********/
	if (sd->sensor != SEN_OV7670) {
		if (write_regvals(sd, mode_init_519,
3491
				  ARRAY_SIZE(mode_init_519)))
3492
			return -EIO;
3493 3494
		if (sd->sensor == SEN_OV7640 ||
		    sd->sensor == SEN_OV7648) {
3495
			/* Select 8-bit input mode */
3496
			reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3497
		}
3498 3499
	} else {
		if (write_regvals(sd, mode_init_519_ov7670,
3500
				  ARRAY_SIZE(mode_init_519_ov7670)))
3501 3502 3503
			return -EIO;
	}

3504 3505
	reg_w(sd, OV519_R10_H_SIZE,	sd->gspca_dev.width >> 4);
	reg_w(sd, OV519_R11_V_SIZE,	sd->gspca_dev.height >> 3);
3506 3507 3508
	if (sd->sensor == SEN_OV7670 &&
	    sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
		reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3509 3510 3511
	else if (sd->sensor == SEN_OV7648 &&
	    sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
		reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3512 3513
	else
		reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3514 3515 3516 3517 3518
	reg_w(sd, OV519_R13_X_OFFSETH,	0x00);
	reg_w(sd, OV519_R14_Y_OFFSETL,	0x00);
	reg_w(sd, OV519_R15_Y_OFFSETH,	0x00);
	reg_w(sd, OV519_R16_DIVIDER,	0x00);
	reg_w(sd, OV519_R25_FORMAT,	0x03); /* YUV422 */
3519 3520 3521 3522 3523 3524 3525 3526
	reg_w(sd, 0x26,			0x00); /* Undocumented */

	/******** Set the framerate ********/
	if (frame_rate > 0)
		sd->frame_rate = frame_rate;

/* FIXME: These are only valid at the max resolution. */
	sd->clockdiv = 0;
3527 3528
	switch (sd->sensor) {
	case SEN_OV7640:
3529
	case SEN_OV7648:
3530
		switch (sd->frame_rate) {
3531 3532
		default:
/*		case 30: */
3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3543
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0xff);
			break;
		case 25:
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0x1f);
			break;
		case 20:
			reg_w(sd, 0xa4, 0x0c);
			reg_w(sd, 0x23, 0x1b);
			break;
3544
		case 15:
3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0xff);
			sd->clockdiv = 1;
			break;
		case 10:
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0x1f);
			sd->clockdiv = 1;
			break;
		case 5:
			reg_w(sd, 0xa4, 0x04);
			reg_w(sd, 0x23, 0x1b);
			sd->clockdiv = 1;
			break;
		}
3560 3561
		break;
	case SEN_OV8610:
3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576
		switch (sd->frame_rate) {
		default:	/* 15 fps */
/*		case 15: */
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0xff);
			break;
		case 10:
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0x1f);
			break;
		case 5:
			reg_w(sd, 0xa4, 0x06);
			reg_w(sd, 0x23, 0x1b);
			break;
		}
3577 3578
		break;
	case SEN_OV7670:		/* guesses, based on 7640 */
3579 3580
		PDEBUG(D_STREAM, "Setting framerate to %d fps",
				 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3581
		reg_w(sd, 0xa4, 0x10);
3582 3583 3584 3585 3586 3587 3588
		switch (sd->frame_rate) {
		case 30:
			reg_w(sd, 0x23, 0xff);
			break;
		case 20:
			reg_w(sd, 0x23, 0x1b);
			break;
3589 3590
		default:
/*		case 15: */
3591 3592 3593 3594
			reg_w(sd, 0x23, 0xff);
			sd->clockdiv = 1;
			break;
		}
3595
		break;
3596 3597 3598 3599
	}
	return 0;
}

3600
static int mode_init_ov_sensor_regs(struct sd *sd)
3601
{
3602
	struct gspca_dev *gspca_dev;
3603
	int qvga, xstart, xend, ystart, yend;
3604
	u8 v;
3605 3606

	gspca_dev = &sd->gspca_dev;
3607
	qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3608 3609 3610

	/******** Mode (VGA/QVGA) and sensor specific regs ********/
	switch (sd->sensor) {
3611 3612 3613 3614 3615 3616 3617 3618 3619
	case SEN_OV2610:
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
		i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
		i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
		i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
		return 0;
3620
	case SEN_OV3610:
3621 3622
		if (qvga) {
			xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3623
			ystart = (776 - gspca_dev->height) / 2;
3624
		} else {
3625
			xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643
			ystart = (1544 - gspca_dev->height) / 2;
		}
		xend = xstart + gspca_dev->width;
		yend = ystart + gspca_dev->height;
		/* Writing to the COMH register resets the other windowing regs
		   to their default values, so we must do this first. */
		i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
		i2c_w_mask(sd, 0x32,
			   (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
			   0x3f);
		i2c_w_mask(sd, 0x03,
			   (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
			   0x0f);
		i2c_w(sd, 0x17, xstart >> 4);
		i2c_w(sd, 0x18, xend >> 4);
		i2c_w(sd, 0x19, ystart >> 3);
		i2c_w(sd, 0x1a, yend >> 3);
		return 0;
3644 3645 3646
	case SEN_OV8610:
		/* For OV8610 qvga means qsvga */
		i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3647 3648 3649 3650
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
		i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3651 3652 3653
		break;
	case SEN_OV7610:
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3654
		i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3655 3656
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3657 3658
		break;
	case SEN_OV7620:
3659
	case SEN_OV7620AE:
3660
	case SEN_OV76BE:
3661 3662 3663 3664 3665
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
		i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
		i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3666
		i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3667
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3668 3669 3670 3671
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		if (sd->sensor == SEN_OV76BE)
			i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3672 3673
		break;
	case SEN_OV7640:
3674
	case SEN_OV7648:
3675 3676
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3677 3678
		/* Setting this undocumented bit in qvga mode removes a very
		   annoying vertical shaking of the image */
3679
		i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3680
		/* Unknown */
3681
		i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3682
		/* Allow higher automatic gain (to allow higher framerates) */
3683
		i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3684
		i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3685 3686 3687 3688 3689
		break;
	case SEN_OV7670:
		/* set COM7_FMT_VGA or COM7_FMT_QVGA
		 * do we need to set anything else?
		 *	HSTART etc are set in set_ov_sensor_window itself */
3690
		i2c_w_mask(sd, OV7670_R12_COM7,
3691 3692
			 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
			 OV7670_COM7_FMT_MASK);
3693
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3694
		i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709
				OV7670_COM8_AWB);
		if (qvga) {		/* QVGA from ov7670.c by
					 * Jonathan Corbet */
			xstart = 164;
			xend = 28;
			ystart = 14;
			yend = 494;
		} else {		/* VGA */
			xstart = 158;
			xend = 14;
			ystart = 10;
			yend = 490;
		}
		/* OV7670 hardware window registers are split across
		 * multiple locations */
3710 3711 3712
		i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
		i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
		v = i2c_r(sd, OV7670_R32_HREF);
3713 3714 3715
		v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
		msleep(10);	/* need to sleep between read and write to
				 * same reg! */
3716
		i2c_w(sd, OV7670_R32_HREF, v);
3717

3718 3719 3720
		i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
		i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
		v = i2c_r(sd, OV7670_R03_VREF);
3721 3722 3723
		v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
		msleep(10);	/* need to sleep between read and write to
				 * same reg! */
3724
		i2c_w(sd, OV7670_R03_VREF, v);
3725 3726
		break;
	case SEN_OV6620:
3727 3728 3729 3730
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
		i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
		break;
3731
	case SEN_OV6630:
3732
	case SEN_OV66308AF:
3733
		i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3734
		i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3735 3736 3737 3738 3739 3740
		break;
	default:
		return -EINVAL;
	}

	/******** Clock programming ********/
3741
	i2c_w(sd, 0x11, sd->clockdiv);
3742 3743 3744 3745

	return 0;
}

3746
static void sethvflip(struct gspca_dev *gspca_dev)
3747
{
3748 3749
	struct sd *sd = (struct sd *) gspca_dev;

3750 3751
	if (sd->sensor != SEN_OV7670)
		return;
3752 3753
	if (sd->gspca_dev.streaming)
		ov51x_stop(sd);
3754
	i2c_w_mask(sd, OV7670_R1E_MVFP,
3755 3756
		OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
			| OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
3757
		OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3758 3759 3760 3761
	if (sd->gspca_dev.streaming)
		ov51x_restart(sd);
}

3762
static int set_ov_sensor_window(struct sd *sd)
3763
{
3764
	struct gspca_dev *gspca_dev;
3765
	int qvga, crop;
3766
	int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3767
	int ret;
3768

3769
	/* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3770 3771
	if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
	    sd->sensor == SEN_OV7670)
3772 3773
		return mode_init_ov_sensor_regs(sd);

3774
	gspca_dev = &sd->gspca_dev;
3775 3776
	qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
	crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
3777

3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793 3794
	/* The different sensor ICs handle setting up of window differently.
	 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
	switch (sd->sensor) {
	case SEN_OV8610:
		hwsbase = 0x1e;
		hwebase = 0x1e;
		vwsbase = 0x02;
		vwebase = 0x02;
		break;
	case SEN_OV7610:
	case SEN_OV76BE:
		hwsbase = 0x38;
		hwebase = 0x3a;
		vwsbase = vwebase = 0x05;
		break;
	case SEN_OV6620:
	case SEN_OV6630:
3795
	case SEN_OV66308AF:
3796 3797 3798 3799
		hwsbase = 0x38;
		hwebase = 0x3a;
		vwsbase = 0x05;
		vwebase = 0x06;
3800
		if (sd->sensor == SEN_OV66308AF && qvga)
3801
			/* HDG: this fixes U and V getting swapped */
3802
			hwsbase++;
3803 3804 3805 3806 3807 3808
		if (crop) {
			hwsbase += 8;
			hwebase += 8;
			vwsbase += 11;
			vwebase += 11;
		}
3809 3810
		break;
	case SEN_OV7620:
3811
	case SEN_OV7620AE:
3812 3813 3814 3815 3816
		hwsbase = 0x2f;		/* From 7620.SET (spec is wrong) */
		hwebase = 0x2f;
		vwsbase = vwebase = 0x05;
		break;
	case SEN_OV7640:
3817
	case SEN_OV7648:
3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828
		hwsbase = 0x1a;
		hwebase = 0x1a;
		vwsbase = vwebase = 0x03;
		break;
	default:
		return -EINVAL;
	}

	switch (sd->sensor) {
	case SEN_OV6620:
	case SEN_OV6630:
3829
	case SEN_OV66308AF:
3830
		if (qvga) {		/* QCIF */
3831 3832 3833 3834 3835 3836 3837 3838 3839
			hwscale = 0;
			vwscale = 0;
		} else {		/* CIF */
			hwscale = 1;
			vwscale = 1;	/* The datasheet says 0;
					 * it's wrong */
		}
		break;
	case SEN_OV8610:
3840
		if (qvga) {		/* QSVGA */
3841 3842 3843 3844 3845 3846 3847 3848
			hwscale = 1;
			vwscale = 1;
		} else {		/* SVGA */
			hwscale = 2;
			vwscale = 2;
		}
		break;
	default:			/* SEN_OV7xx0 */
3849
		if (qvga) {		/* QVGA */
3850 3851 3852 3853 3854 3855 3856 3857
			hwscale = 1;
			vwscale = 0;
		} else {		/* VGA */
			hwscale = 2;
			vwscale = 1;
		}
	}

3858
	ret = mode_init_ov_sensor_regs(sd);
3859 3860 3861
	if (ret < 0)
		return ret;

3862
	i2c_w(sd, 0x17, hwsbase);
3863
	i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3864
	i2c_w(sd, 0x19, vwsbase);
3865
	i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3866 3867 3868 3869 3870

	return 0;
}

/* -- start the camera -- */
3871
static int sd_start(struct gspca_dev *gspca_dev)
3872 3873
{
	struct sd *sd = (struct sd *) gspca_dev;
3874
	int ret = 0;
3875

3876 3877 3878 3879
	/* Default for most bridges, allow bridge_mode_init_regs to override */
	sd->sensor_width = sd->gspca_dev.width;
	sd->sensor_height = sd->gspca_dev.height;

3880
	switch (sd->bridge) {
3881 3882 3883 3884
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
		ret = ov511_mode_init_regs(sd);
		break;
3885 3886 3887 3888 3889 3890 3891
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
		ret = ov518_mode_init_regs(sd);
		break;
	case BRIDGE_OV519:
		ret = ov519_mode_init_regs(sd);
		break;
3892
	/* case BRIDGE_OVFX2: nothing to do */
3893 3894 3895
	case BRIDGE_W9968CF:
		ret = w9968cf_mode_init_regs(sd);
		break;
3896
	}
3897 3898
	if (ret < 0)
		goto out;
3899

3900
	ret = set_ov_sensor_window(sd);
3901 3902 3903
	if (ret < 0)
		goto out;

3904 3905 3906
	setcontrast(gspca_dev);
	setbrightness(gspca_dev);
	setcolors(gspca_dev);
3907 3908 3909
	sethvflip(gspca_dev);
	setautobright(gspca_dev);
	setfreq_i(sd);
3910

3911 3912 3913 3914 3915
	/* Force clear snapshot state in case the snapshot button was
	   pressed while we weren't streaming */
	sd->snapshot_needs_reset = 1;
	sd_reset_snapshot(gspca_dev);

3916 3917
	sd->first_frame = 3;

3918
	ret = ov51x_restart(sd);
3919 3920 3921
	if (ret < 0)
		goto out;
	ov51x_led_control(sd, 1);
3922
	return 0;
3923 3924
out:
	PDEBUG(D_ERR, "camera start error:%d", ret);
3925
	return ret;
3926 3927 3928 3929
}

static void sd_stopN(struct gspca_dev *gspca_dev)
{
3930 3931 3932 3933
	struct sd *sd = (struct sd *) gspca_dev;

	ov51x_stop(sd);
	ov51x_led_control(sd, 0);
3934 3935
}

3936 3937 3938 3939
static void sd_stop0(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;

3940 3941
	if (!sd->gspca_dev.present)
		return;
3942 3943
	if (sd->bridge == BRIDGE_W9968CF)
		w9968cf_stop0(sd);
3944

3945
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
3946 3947 3948 3949 3950 3951 3952
	/* If the last button state is pressed, release it now! */
	if (sd->snapshot_pressed) {
		input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
		input_sync(gspca_dev->input_dev);
		sd->snapshot_pressed = 0;
	}
#endif
3953 3954
}

3955 3956 3957 3958 3959
static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->snapshot_pressed != state) {
3960
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
3961 3962 3963 3964 3965 3966 3967 3968
		input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
		input_sync(gspca_dev->input_dev);
#endif
		if (state)
			sd->snapshot_needs_reset = 1;

		sd->snapshot_pressed = state;
	} else {
3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979
		/* On the ov511 / ov519 we need to reset the button state
		   multiple times, as resetting does not work as long as the
		   button stays pressed */
		switch (sd->bridge) {
		case BRIDGE_OV511:
		case BRIDGE_OV511PLUS:
		case BRIDGE_OV519:
			if (state)
				sd->snapshot_needs_reset = 1;
			break;
		}
3980 3981 3982
	}
}

3983
static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3984 3985
			u8 *in,			/* isoc packet */
			int len)		/* iso packet length */
3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003
{
	struct sd *sd = (struct sd *) gspca_dev;

	/* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
	 * byte non-zero. The EOF packet has image width/height in the
	 * 10th and 11th bytes. The 9th byte is given as follows:
	 *
	 * bit 7: EOF
	 *     6: compression enabled
	 *     5: 422/420/400 modes
	 *     4: 422/420/400 modes
	 *     3: 1
	 *     2: snapshot button on
	 *     1: snapshot frame
	 *     0: even/odd field
	 */
	if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
	    (in[8] & 0x08)) {
4004
		ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4005 4006 4007 4008 4009 4010 4011 4012 4013 4014 4015 4016
		if (in[8] & 0x80) {
			/* Frame end */
			if ((in[9] + 1) * 8 != gspca_dev->width ||
			    (in[10] + 1) * 8 != gspca_dev->height) {
				PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
					" requested: %dx%d\n",
					(in[9] + 1) * 8, (in[10] + 1) * 8,
					gspca_dev->width, gspca_dev->height);
				gspca_dev->last_packet_type = DISCARD_PACKET;
				return;
			}
			/* Add 11 byte footer to frame, might be usefull */
4017
			gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4018 4019 4020
			return;
		} else {
			/* Frame start */
4021
			gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4022 4023 4024 4025 4026 4027 4028 4029
			sd->packet_nr = 0;
		}
	}

	/* Ignore the packet number */
	len--;

	/* intermediate packet */
4030
	gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4031 4032
}

4033
static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4034
			u8 *data,			/* isoc packet */
4035 4036
			int len)			/* iso packet length */
{
4037
	struct sd *sd = (struct sd *) gspca_dev;
4038 4039 4040 4041

	/* A false positive here is likely, until OVT gives me
	 * the definitive SOF/EOF format */
	if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4042
		ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4043 4044
		gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
		gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062 4063 4064
		sd->packet_nr = 0;
	}

	if (gspca_dev->last_packet_type == DISCARD_PACKET)
		return;

	/* Does this device use packet numbers ? */
	if (len & 7) {
		len--;
		if (sd->packet_nr == data[len])
			sd->packet_nr++;
		/* The last few packets of the frame (which are all 0's
		   except that they may contain part of the footer), are
		   numbered 0 */
		else if (sd->packet_nr == 0 || data[len]) {
			PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
				(int)data[len], (int)sd->packet_nr);
			gspca_dev->last_packet_type = DISCARD_PACKET;
			return;
		}
4065 4066 4067
	}

	/* intermediate packet */
4068
	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4069 4070 4071
}

static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4072
			u8 *data,			/* isoc packet */
4073 4074 4075 4076 4077 4078 4079 4080 4081 4082 4083 4084 4085 4086 4087 4088 4089
			int len)			/* iso packet length */
{
	/* Header of ov519 is 16 bytes:
	 *     Byte     Value      Description
	 *	0	0xff	magic
	 *	1	0xff	magic
	 *	2	0xff	magic
	 *	3	0xXX	0x50 = SOF, 0x51 = EOF
	 *	9	0xXX	0x01 initial frame without data,
	 *			0x00 standard frame with image
	 *	14	Lo	in EOF: length of image data / 8
	 *	15	Hi
	 */

	if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
		switch (data[3]) {
		case 0x50:		/* start of frame */
4090 4091 4092
			/* Don't check the button state here, as the state
			   usually (always ?) changes at EOF and checking it
			   here leads to unnecessary snapshot state resets. */
4093 4094 4095 4096 4097
#define HDRSZ 16
			data += HDRSZ;
			len -= HDRSZ;
#undef HDRSZ
			if (data[0] == 0xff || data[1] == 0xd8)
4098
				gspca_frame_add(gspca_dev, FIRST_PACKET,
4099 4100 4101 4102 4103
						data, len);
			else
				gspca_dev->last_packet_type = DISCARD_PACKET;
			return;
		case 0x51:		/* end of frame */
4104
			ov51x_handle_button(gspca_dev, data[11] & 1);
4105 4106
			if (data[9] != 0)
				gspca_dev->last_packet_type = DISCARD_PACKET;
4107 4108
			gspca_frame_add(gspca_dev, LAST_PACKET,
					NULL, 0);
4109 4110 4111 4112 4113
			return;
		}
	}

	/* intermediate packet */
4114
	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4115 4116
}

4117
static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4118
			u8 *data,			/* isoc packet */
4119 4120
			int len)			/* iso packet length */
{
4121 4122 4123 4124
	struct sd *sd = (struct sd *) gspca_dev;

	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);

4125 4126
	/* A short read signals EOF */
	if (len < OVFX2_BULK_SIZE) {
4127 4128 4129 4130
		/* If the frame is short, and it is one of the first ones
		   the sensor and bridge are still syncing, so drop it. */
		if (sd->first_frame) {
			sd->first_frame--;
4131 4132
			if (gspca_dev->image_len <
				  sd->gspca_dev.width * sd->gspca_dev.height)
4133 4134 4135
				gspca_dev->last_packet_type = DISCARD_PACKET;
		}
		gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4136
		gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4137 4138 4139
	}
}

4140
static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4141
			u8 *data,			/* isoc packet */
4142 4143 4144 4145 4146 4147 4148
			int len)			/* iso packet length */
{
	struct sd *sd = (struct sd *) gspca_dev;

	switch (sd->bridge) {
	case BRIDGE_OV511:
	case BRIDGE_OV511PLUS:
4149
		ov511_pkt_scan(gspca_dev, data, len);
4150 4151 4152
		break;
	case BRIDGE_OV518:
	case BRIDGE_OV518PLUS:
4153
		ov518_pkt_scan(gspca_dev, data, len);
4154 4155
		break;
	case BRIDGE_OV519:
4156
		ov519_pkt_scan(gspca_dev, data, len);
4157
		break;
4158
	case BRIDGE_OVFX2:
4159
		ovfx2_pkt_scan(gspca_dev, data, len);
4160
		break;
4161
	case BRIDGE_W9968CF:
4162
		w9968cf_pkt_scan(gspca_dev, data, len);
4163
		break;
4164 4165 4166
	}
}

4167 4168 4169 4170 4171 4172 4173
/* -- management routines -- */

static void setbrightness(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;

4174
	val = sd->ctrls[BRIGHTNESS].val;
4175 4176 4177 4178 4179 4180
	switch (sd->sensor) {
	case SEN_OV8610:
	case SEN_OV7610:
	case SEN_OV76BE:
	case SEN_OV6620:
	case SEN_OV6630:
4181
	case SEN_OV66308AF:
4182
	case SEN_OV7640:
4183
	case SEN_OV7648:
4184 4185 4186
		i2c_w(sd, OV7610_REG_BRT, val);
		break;
	case SEN_OV7620:
4187
	case SEN_OV7620AE:
4188
		/* 7620 doesn't like manual changes when in auto mode */
4189
		if (!sd->ctrls[AUTOBRIGHT].val)
4190 4191 4192
			i2c_w(sd, OV7610_REG_BRT, val);
		break;
	case SEN_OV7670:
4193
/*win trace
4194 4195
 *		i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
		i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4196 4197 4198 4199 4200 4201 4202 4203 4204
		break;
	}
}

static void setcontrast(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;

4205
	val = sd->ctrls[CONTRAST].val;
4206 4207 4208 4209 4210 4211
	switch (sd->sensor) {
	case SEN_OV7610:
	case SEN_OV6620:
		i2c_w(sd, OV7610_REG_CNT, val);
		break;
	case SEN_OV6630:
4212
	case SEN_OV66308AF:
4213
		i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4214
		break;
4215
	case SEN_OV8610: {
4216
		static const u8 ctab[] = {
4217 4218 4219 4220 4221 4222 4223
			0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
		};

		/* Use Y gamma control instead. Bit 0 enables it. */
		i2c_w(sd, 0x64, ctab[val >> 5]);
		break;
	    }
4224 4225
	case SEN_OV7620:
	case SEN_OV7620AE: {
4226
		static const u8 ctab[] = {
4227 4228 4229 4230 4231 4232 4233 4234 4235 4236
			0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
			0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
		};

		/* Use Y gamma control instead. Bit 0 enables it. */
		i2c_w(sd, 0x64, ctab[val >> 4]);
		break;
	    }
	case SEN_OV7670:
		/* check that this isn't just the same as ov7610 */
4237
		i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4238 4239 4240 4241 4242 4243 4244 4245 4246
		break;
	}
}

static void setcolors(struct gspca_dev *gspca_dev)
{
	struct sd *sd = (struct sd *) gspca_dev;
	int val;

4247
	val = sd->ctrls[COLORS].val;
4248 4249 4250 4251 4252 4253
	switch (sd->sensor) {
	case SEN_OV8610:
	case SEN_OV7610:
	case SEN_OV76BE:
	case SEN_OV6620:
	case SEN_OV6630:
4254
	case SEN_OV66308AF:
4255 4256 4257
		i2c_w(sd, OV7610_REG_SAT, val);
		break;
	case SEN_OV7620:
4258
	case SEN_OV7620AE:
4259 4260 4261 4262 4263 4264 4265
		/* Use UV gamma control instead. Bits 0 & 7 are reserved. */
/*		rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
		if (rc < 0)
			goto out; */
		i2c_w(sd, OV7610_REG_SAT, val);
		break;
	case SEN_OV7640:
4266
	case SEN_OV7648:
4267 4268 4269 4270 4271 4272 4273 4274 4275 4276
		i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
		break;
	case SEN_OV7670:
		/* supported later once I work out how to do it
		 * transparently fail now! */
		/* set REG_COM13 values for UV sat auto mode */
		break;
	}
}

4277
static void setautobright(struct gspca_dev *gspca_dev)
4278
{
4279 4280
	struct sd *sd = (struct sd *) gspca_dev;

4281 4282
	if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 ||
	    sd->sensor == SEN_OV7670 ||
4283
	    sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4284 4285
		return;

4286
	i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4287 4288
}

4289
static void setfreq_i(struct sd *sd)
4290
{
4291 4292 4293
	if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
		return;

4294
	if (sd->sensor == SEN_OV7670) {
4295
		switch (sd->ctrls[FREQ].val) {
4296
		case 0: /* Banding filter disabled */
4297
			i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4298 4299
			break;
		case 1: /* 50 hz */
4300
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4301
				   OV7670_COM8_BFILT);
4302
			i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4303 4304
			break;
		case 2: /* 60 hz */
4305
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4306
				   OV7670_COM8_BFILT);
4307
			i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4308
			break;
4309 4310
		case 3: /* Auto hz - ov7670 only */
			i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4311
				   OV7670_COM8_BFILT);
4312
			i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4313 4314 4315 4316
				   0x18);
			break;
		}
	} else {
4317
		switch (sd->ctrls[FREQ].val) {
4318 4319 4320 4321 4322 4323 4324 4325 4326
		case 0: /* Banding filter disabled */
			i2c_w_mask(sd, 0x2d, 0x00, 0x04);
			i2c_w_mask(sd, 0x2a, 0x00, 0x80);
			break;
		case 1: /* 50 hz (filter on and framerate adj) */
			i2c_w_mask(sd, 0x2d, 0x04, 0x04);
			i2c_w_mask(sd, 0x2a, 0x80, 0x80);
			/* 20 fps -> 16.667 fps */
			if (sd->sensor == SEN_OV6620 ||
4327 4328
			    sd->sensor == SEN_OV6630 ||
			    sd->sensor == SEN_OV66308AF)
4329 4330 4331 4332 4333 4334 4335
				i2c_w(sd, 0x2b, 0x5e);
			else
				i2c_w(sd, 0x2b, 0xac);
			break;
		case 2: /* 60 hz (filter on, ...) */
			i2c_w_mask(sd, 0x2d, 0x04, 0x04);
			if (sd->sensor == SEN_OV6620 ||
4336 4337
			    sd->sensor == SEN_OV6630 ||
			    sd->sensor == SEN_OV66308AF) {
4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348
				/* 20 fps -> 15 fps */
				i2c_w_mask(sd, 0x2a, 0x80, 0x80);
				i2c_w(sd, 0x2b, 0xa8);
			} else {
				/* no framerate adj. */
				i2c_w_mask(sd, 0x2a, 0x00, 0x80);
			}
			break;
		}
	}
}
4349
static void setfreq(struct gspca_dev *gspca_dev)
4350 4351 4352
{
	struct sd *sd = (struct sd *) gspca_dev;

4353
	setfreq_i(sd);
4354

4355 4356 4357
	/* Ugly but necessary */
	if (sd->bridge == BRIDGE_W9968CF)
		w9968cf_set_crop_window(sd);
4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388
}

static int sd_querymenu(struct gspca_dev *gspca_dev,
			struct v4l2_querymenu *menu)
{
	struct sd *sd = (struct sd *) gspca_dev;

	switch (menu->id) {
	case V4L2_CID_POWER_LINE_FREQUENCY:
		switch (menu->index) {
		case 0:		/* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
			strcpy((char *) menu->name, "NoFliker");
			return 0;
		case 1:		/* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
			strcpy((char *) menu->name, "50 Hz");
			return 0;
		case 2:		/* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
			strcpy((char *) menu->name, "60 Hz");
			return 0;
		case 3:
			if (sd->sensor != SEN_OV7670)
				return -EINVAL;

			strcpy((char *) menu->name, "Automatic");
			return 0;
		}
		break;
	}
	return -EINVAL;
}

4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427
static int sd_get_jcomp(struct gspca_dev *gspca_dev,
			struct v4l2_jpegcompression *jcomp)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->bridge != BRIDGE_W9968CF)
		return -EINVAL;

	memset(jcomp, 0, sizeof *jcomp);
	jcomp->quality = sd->quality;
	jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
			      V4L2_JPEG_MARKER_DRI;
	return 0;
}

static int sd_set_jcomp(struct gspca_dev *gspca_dev,
			struct v4l2_jpegcompression *jcomp)
{
	struct sd *sd = (struct sd *) gspca_dev;

	if (sd->bridge != BRIDGE_W9968CF)
		return -EINVAL;

	if (gspca_dev->streaming)
		return -EBUSY;

	if (jcomp->quality < QUALITY_MIN)
		sd->quality = QUALITY_MIN;
	else if (jcomp->quality > QUALITY_MAX)
		sd->quality = QUALITY_MAX;
	else
		sd->quality = jcomp->quality;

	/* Return resulting jcomp params to app */
	sd_get_jcomp(gspca_dev, jcomp);

	return 0;
}

4428
/* sub-driver description */
4429
static const struct sd_desc sd_desc = {
4430 4431 4432 4433
	.name = MODULE_NAME,
	.ctrls = sd_ctrls,
	.nctrls = ARRAY_SIZE(sd_ctrls),
	.config = sd_config,
4434
	.init = sd_init,
4435 4436
	.start = sd_start,
	.stopN = sd_stopN,
4437
	.stop0 = sd_stop0,
4438
	.pkt_scan = sd_pkt_scan,
4439
	.dq_callback = sd_reset_snapshot,
4440
	.querymenu = sd_querymenu,
4441 4442
	.get_jcomp = sd_get_jcomp,
	.set_jcomp = sd_set_jcomp,
4443
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4444 4445
	.other_input = 1,
#endif
4446 4447 4448
};

/* -- module initialisation -- */
4449
static const __devinitdata struct usb_device_id device_table[] = {
4450
	{USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4451 4452 4453 4454
	{USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4455
	{USB_DEVICE(0x041e, 0x4064),
4456
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4457
	{USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4458
	{USB_DEVICE(0x041e, 0x4068),
4459
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4460 4461
	{USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4462
	{USB_DEVICE(0x054c, 0x0155),
4463
		.driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4464
	{USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4465 4466 4467
	{USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
	{USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4468
	{USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4469 4470
	{USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
	{USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4471
	{USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4472
	{USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4473
	{USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4474 4475
	{USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
	{USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4476
	{USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4477
	{USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
4478 4479
	{}
};
4480

4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495
MODULE_DEVICE_TABLE(usb, device_table);

/* -- device connect -- */
static int sd_probe(struct usb_interface *intf,
			const struct usb_device_id *id)
{
	return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
				THIS_MODULE);
}

static struct usb_driver sd_driver = {
	.name = MODULE_NAME,
	.id_table = device_table,
	.probe = sd_probe,
	.disconnect = gspca_disconnect,
4496 4497 4498 4499
#ifdef CONFIG_PM
	.suspend = gspca_suspend,
	.resume = gspca_resume,
#endif
4500 4501 4502 4503 4504
};

/* -- module insert / remove -- */
static int __init sd_mod_init(void)
{
4505
	return usb_register(&sd_driver);
4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516
}
static void __exit sd_mod_exit(void)
{
	usb_deregister(&sd_driver);
}

module_init(sd_mod_init);
module_exit(sd_mod_exit);

module_param(frame_rate, int, 0644);
MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");