ufshcd.c 237.4 KB
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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 * Universal Flash Storage Host controller driver Core
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 * Copyright (C) 2011-2013 Samsung India Software Operations
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 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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 *
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 * Authors:
 *	Santosh Yaraganavi <santosh.sy@samsung.com>
 *	Vinayak Holikatti <h.vinayak@samsung.com>
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 */

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#include <linux/async.h>
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#include <linux/devfreq.h>
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#include <linux/nls.h>
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#include <linux/of.h>
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#include <linux/bitfield.h>
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#include <linux/blk-pm.h>
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#include "ufshcd.h"
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#include "ufs_quirks.h"
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#include "unipro.h"
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#include "ufs-sysfs.h"
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#include "ufs_bsg.h"
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#include "ufshcd-crypto.h"
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#include <asm/unaligned.h>
#include <linux/blkdev.h>
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#define CREATE_TRACE_POINTS
#include <trace/events/ufs.h>

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#define UFSHCD_ENABLE_INTRS	(UTP_TRANSFER_REQ_COMPL |\
				 UTP_TASK_REQ_COMPL |\
				 UFSHCD_ERROR_MASK)
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/* UIC command timeout, unit: ms */
#define UIC_CMD_TIMEOUT	500
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/* NOP OUT retries waiting for NOP IN response */
#define NOP_OUT_RETRIES    10
/* Timeout after 30 msecs if NOP OUT hangs without response */
#define NOP_OUT_TIMEOUT    30 /* msecs */

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/* Query request retries */
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#define QUERY_REQ_RETRIES 3
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/* Query request timeout */
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#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
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/* Task management command timeout */
#define TM_CMD_TIMEOUT	100 /* msecs */

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/* maximum number of retries for a general UIC command  */
#define UFS_UIC_COMMAND_RETRIES 3

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/* maximum number of link-startup retries */
#define DME_LINKSTARTUP_RETRIES 3

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/* Maximum retries for Hibern8 enter */
#define UIC_HIBERN8_ENTER_RETRIES 3

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/* maximum number of reset retries before giving up */
#define MAX_HOST_RESET_RETRIES 5

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/* Expose the flag value from utp_upiu_query.value */
#define MASK_QUERY_UPIU_FLAG_LOC 0xFF

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/* Interrupt aggregation default timeout, unit: 40us */
#define INT_AGGR_DEF_TO	0x02

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/* default delay of autosuspend: 2000 ms */
#define RPM_AUTOSUSPEND_DELAY_MS 2000

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/* Default delay of RPM device flush delayed work */
#define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000

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/* Default value of wait time before gating device ref clock */
#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */

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#define ufshcd_toggle_vreg(_dev, _vreg, _on)				\
	({                                                              \
		int _ret;                                               \
		if (_on)                                                \
			_ret = ufshcd_enable_vreg(_dev, _vreg);         \
		else                                                    \
			_ret = ufshcd_disable_vreg(_dev, _vreg);        \
		_ret;                                                   \
	})

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#define ufshcd_hex_dump(prefix_str, buf, len) do {                       \
	size_t __len = (len);                                            \
	print_hex_dump(KERN_ERR, prefix_str,                             \
		       __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
		       16, 4, buf, __len, false);                        \
} while (0)

int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
		     const char *prefix)
{
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	u32 *regs;
	size_t pos;

	if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
		return -EINVAL;
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	regs = kzalloc(len, GFP_ATOMIC);
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	if (!regs)
		return -ENOMEM;

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	for (pos = 0; pos < len; pos += 4)
		regs[pos / 4] = ufshcd_readl(hba, offset + pos);

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	ufshcd_hex_dump(prefix, regs, len);
	kfree(regs);

	return 0;
}
EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
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enum {
	UFSHCD_MAX_CHANNEL	= 0,
	UFSHCD_MAX_ID		= 1,
	UFSHCD_CMD_PER_LUN	= 32,
	UFSHCD_CAN_QUEUE	= 32,
};

/* UFSHCD states */
enum {
	UFSHCD_STATE_RESET,
	UFSHCD_STATE_ERROR,
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	UFSHCD_STATE_OPERATIONAL,
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	UFSHCD_STATE_EH_SCHEDULED,
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};

/* UFSHCD error handling flags */
enum {
	UFSHCD_EH_IN_PROGRESS = (1 << 0),
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};

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/* UFSHCD UIC layer error flags */
enum {
	UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
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	UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
	UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
	UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
	UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
	UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
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};

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#define ufshcd_set_eh_in_progress(h) \
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	((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
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#define ufshcd_eh_in_progress(h) \
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	((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
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#define ufshcd_clear_eh_in_progress(h) \
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	((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
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struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
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	{UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
	{UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
	{UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
	{UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
	{UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
	{UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
};

static inline enum ufs_dev_pwr_mode
ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
{
	return ufs_pm_lvl_states[lvl].dev_state;
}

static inline enum uic_link_state
ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
{
	return ufs_pm_lvl_states[lvl].link_state;
}

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static inline enum ufs_pm_level
ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
					enum uic_link_state link_state)
{
	enum ufs_pm_level lvl;

	for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
		if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
			(ufs_pm_lvl_states[lvl].link_state == link_state))
			return lvl;
	}

	/* if no match found, return the level 0 */
	return UFS_PM_LVL_0;
}

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static struct ufs_dev_fix ufs_fixups[] = {
	/* UFS cards deviations table */
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	UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
		UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
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	UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
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		UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
		UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
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		UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
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	UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
		UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
	UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
		UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
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	UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
		UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
	UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
		UFS_DEVICE_QUIRK_PA_TACTIVATE),
	UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
		UFS_DEVICE_QUIRK_PA_TACTIVATE),
	END_FIX
};

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static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
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static void ufshcd_async_scan(void *data, async_cookie_t cookie);
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static int ufshcd_reset_and_restore(struct ufs_hba *hba);
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static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
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static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
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static void ufshcd_hba_exit(struct ufs_hba *hba);
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static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
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static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
				 bool skip_ref_clk);
static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
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static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
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static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
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static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
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static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
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static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
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static irqreturn_t ufshcd_intr(int irq, void *__hba);
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static int ufshcd_change_power_mode(struct ufs_hba *hba,
			     struct ufs_pa_layer_attr *pwr_mode);
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static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba);
static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba);
static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable);
static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);

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static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
{
	return tag >= 0 && tag < hba->nutrs;
}
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static inline void ufshcd_enable_irq(struct ufs_hba *hba)
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{
	if (!hba->is_irq_enabled) {
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		enable_irq(hba->irq);
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		hba->is_irq_enabled = true;
	}
}

static inline void ufshcd_disable_irq(struct ufs_hba *hba)
{
	if (hba->is_irq_enabled) {
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		disable_irq(hba->irq);
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		hba->is_irq_enabled = false;
	}
}
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static inline void ufshcd_wb_config(struct ufs_hba *hba)
{
	int ret;

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	if (!ufshcd_is_wb_allowed(hba))
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		return;

	ret = ufshcd_wb_ctrl(hba, true);
	if (ret)
		dev_err(hba->dev, "%s: Enable WB failed: %d\n", __func__, ret);
	else
		dev_info(hba->dev, "%s: Write Booster Configured\n", __func__);
	ret = ufshcd_wb_toggle_flush_during_h8(hba, true);
	if (ret)
		dev_err(hba->dev, "%s: En WB flush during H8: failed: %d\n",
			__func__, ret);
	ufshcd_wb_toggle_flush(hba, true);
}

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static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
{
	if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
		scsi_unblock_requests(hba->host);
}

static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
{
	if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
		scsi_block_requests(hba->host);
}

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static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
		const char *str)
{
	struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;

	trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
}

static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
		const char *str)
{
	struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;

	trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
}

static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
		const char *str)
{
	int off = (int)tag - hba->nutrs;
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	struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
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	trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
			&descp->input_param1);
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}

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static void ufshcd_add_uic_command_trace(struct ufs_hba *hba,
					 struct uic_command *ucmd,
					 const char *str)
{
	u32 cmd;

	if (!trace_ufshcd_uic_command_enabled())
		return;

	if (!strcmp(str, "send"))
		cmd = ucmd->command;
	else
		cmd = ufshcd_readl(hba, REG_UIC_COMMAND);

	trace_ufshcd_uic_command(dev_name(hba->dev), str, cmd,
				 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1),
				 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2),
				 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3));
}

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static void ufshcd_add_command_trace(struct ufs_hba *hba,
		unsigned int tag, const char *str)
{
	sector_t lba = -1;
	u8 opcode = 0;
	u32 intr, doorbell;
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	struct ufshcd_lrb *lrbp = &hba->lrb[tag];
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	struct scsi_cmnd *cmd = lrbp->cmd;
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	int transfer_len = -1;

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	if (!trace_ufshcd_command_enabled()) {
		/* trace UPIU W/O tracing command */
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		if (cmd)
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			ufshcd_add_cmd_upiu_trace(hba, tag, str);
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		return;
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	}
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	if (cmd) { /* data phase exists */
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		/* trace UPIU also */
		ufshcd_add_cmd_upiu_trace(hba, tag, str);
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		opcode = cmd->cmnd[0];
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		if ((opcode == READ_10) || (opcode == WRITE_10)) {
			/*
			 * Currently we only fully trace read(10) and write(10)
			 * commands
			 */
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			if (cmd->request && cmd->request->bio)
				lba = cmd->request->bio->bi_iter.bi_sector;
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			transfer_len = be32_to_cpu(
				lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
		}
	}

	intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
	doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
	trace_ufshcd_command(dev_name(hba->dev), str, tag,
				doorbell, transfer_len, intr, lba, opcode);
}

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static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
{
	struct ufs_clk_info *clki;
	struct list_head *head = &hba->clk_list_head;

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	if (list_empty(head))
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		return;

	list_for_each_entry(clki, head, list) {
		if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
				clki->max_freq)
			dev_err(hba->dev, "clk: %s, rate: %u\n",
					clki->name, clki->curr_freq);
	}
}

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static void ufshcd_print_err_hist(struct ufs_hba *hba,
				  struct ufs_err_reg_hist *err_hist,
				  char *err_name)
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{
	int i;
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	bool found = false;
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	for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
		int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
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		if (err_hist->tstamp[p] == 0)
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			continue;
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		dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
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			err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
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		found = true;
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	}
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	if (!found)
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		dev_err(hba->dev, "No record of %s\n", err_name);
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}

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static void ufshcd_print_host_regs(struct ufs_hba *hba)
{
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	ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
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	dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
		hba->ufs_version, hba->capabilities);
	dev_err(hba->dev,
		"hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
		(u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
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	dev_err(hba->dev,
		"last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
		ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
		hba->ufs_stats.hibern8_exit_cnt);

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	ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
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	ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
			      "auto_hibern8_err");
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	ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
			      "link_startup_fail");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
			      "suspend_fail");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
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	ufshcd_print_clk_freqs(hba);

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	ufshcd_vops_dbg_register_dump(hba);
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}

static
void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
{
	struct ufshcd_lrb *lrbp;
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	int prdt_length;
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	int tag;

	for_each_set_bit(tag, &bitmap, hba->nutrs) {
		lrbp = &hba->lrb[tag];

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		dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
				tag, ktime_to_us(lrbp->issue_time_stamp));
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		dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
				tag, ktime_to_us(lrbp->compl_time_stamp));
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		dev_err(hba->dev,
			"UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
			tag, (u64)lrbp->utrd_dma_addr);

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		ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
				sizeof(struct utp_transfer_req_desc));
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		dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
			(u64)lrbp->ucd_req_dma_addr);
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		ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
				sizeof(struct utp_upiu_req));
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		dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
			(u64)lrbp->ucd_rsp_dma_addr);
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		ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
				sizeof(struct utp_upiu_rsp));

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		prdt_length = le16_to_cpu(
			lrbp->utr_descriptor_ptr->prd_table_length);
		dev_err(hba->dev,
			"UPIU[%d] - PRDT - %d entries  phys@0x%llx\n",
			tag, prdt_length,
			(u64)lrbp->ucd_prdt_dma_addr);

		if (pr_prdt)
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			ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
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				sizeof(struct ufshcd_sg_entry) * prdt_length);
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	}
}

static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
{
	int tag;

	for_each_set_bit(tag, &bitmap, hba->nutmrs) {
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		struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];

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		dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
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		ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
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	}
}

500 501 502
static void ufshcd_print_host_state(struct ufs_hba *hba)
{
	dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
503 504
	dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
		hba->outstanding_reqs, hba->outstanding_tasks);
505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521
	dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
		hba->saved_err, hba->saved_uic_err);
	dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
		hba->curr_dev_pwr_mode, hba->uic_link_state);
	dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
		hba->pm_op_in_progress, hba->is_sys_suspended);
	dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
		hba->auto_bkops_enabled, hba->host->host_self_blocked);
	dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
	dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
		hba->eh_flags, hba->req_abort_count);
	dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
		hba->capabilities, hba->caps);
	dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
		hba->dev_quirks);
}

522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547
/**
 * ufshcd_print_pwr_info - print power params as saved in hba
 * power info
 * @hba: per-adapter instance
 */
static void ufshcd_print_pwr_info(struct ufs_hba *hba)
{
	static const char * const names[] = {
		"INVALID MODE",
		"FAST MODE",
		"SLOW_MODE",
		"INVALID MODE",
		"FASTAUTO_MODE",
		"SLOWAUTO_MODE",
		"INVALID MODE",
	};

	dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
		 __func__,
		 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
		 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
		 names[hba->pwr_info.pwr_rx],
		 names[hba->pwr_info.pwr_tx],
		 hba->pwr_info.hs_rate);
}

548 549 550 551 552 553 554 555 556 557 558 559
void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
{
	if (!us)
		return;

	if (us < 10)
		udelay(us);
	else
		usleep_range(us, us + tolerance);
}
EXPORT_SYMBOL_GPL(ufshcd_delay_us);

560
/**
561
 * ufshcd_wait_for_register - wait for register value to change
562 563 564 565 566 567
 * @hba: per-adapter interface
 * @reg: mmio register offset
 * @mask: mask to apply to the read register value
 * @val: value to wait for
 * @interval_us: polling interval in microseconds
 * @timeout_ms: timeout in milliseconds
568
 *
569 570
 * Return:
 * -ETIMEDOUT on error, zero on success.
571
 */
572 573
int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
				u32 val, unsigned long interval_us,
574
				unsigned long timeout_ms)
575 576 577 578 579 580 581 582
{
	int err = 0;
	unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);

	/* ignore bits that we don't intend to wait on */
	val = val & mask;

	while ((ufshcd_readl(hba, reg) & mask) != val) {
583
		usleep_range(interval_us, interval_us + 50);
584 585 586 587 588 589 590 591 592 593
		if (time_after(jiffies, timeout)) {
			if ((ufshcd_readl(hba, reg) & mask) != val)
				err = -ETIMEDOUT;
			break;
		}
	}

	return err;
}

594 595
/**
 * ufshcd_get_intr_mask - Get the interrupt bit mask
596
 * @hba: Pointer to adapter instance
597 598 599 600 601
 *
 * Returns interrupt bit mask per version
 */
static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
{
602 603 604 605 606 607 608 609 610 611 612 613 614
	u32 intr_mask = 0;

	switch (hba->ufs_version) {
	case UFSHCI_VERSION_10:
		intr_mask = INTERRUPT_MASK_ALL_VER_10;
		break;
	case UFSHCI_VERSION_11:
	case UFSHCI_VERSION_20:
		intr_mask = INTERRUPT_MASK_ALL_VER_11;
		break;
	case UFSHCI_VERSION_21:
	default:
		intr_mask = INTERRUPT_MASK_ALL_VER_21;
615
		break;
616 617 618
	}

	return intr_mask;
619 620
}

621 622
/**
 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
623
 * @hba: Pointer to adapter instance
624 625 626 627 628
 *
 * Returns UFSHCI version supported by the controller
 */
static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
{
629 630
	if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
		return ufshcd_vops_get_ufs_hci_version(hba);
631

632
	return ufshcd_readl(hba, REG_UFS_VERSION);
633 634 635 636 637
}

/**
 * ufshcd_is_device_present - Check if any device connected to
 *			      the host controller
638
 * @hba: pointer to adapter instance
639
 *
640
 * Returns true if device present, false if no device detected
641
 */
642
static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
643
{
644
	return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
645
						DEVICE_PRESENT) ? true : false;
646 647 648 649
}

/**
 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
650
 * @lrbp: pointer to local command reference block
651 652 653 654 655 656
 *
 * This function is used to get the OCS field from UTRD
 * Returns the OCS field in the UTRD
 */
static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
{
657
	return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
658 659 660 661 662 663 664 665 666
}

/**
 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 * @hba: per adapter instance
 * @pos: position of the bit to be cleared
 */
static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
{
667 668 669 670 671
	if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
		ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
	else
		ufshcd_writel(hba, ~(1 << pos),
				REG_UTP_TRANSFER_REQ_LIST_CLEAR);
672 673 674 675 676 677 678 679 680
}

/**
 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
 * @hba: per adapter instance
 * @pos: position of the bit to be cleared
 */
static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
{
681 682 683 684
	if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
		ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
	else
		ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
685 686
}

687 688 689 690 691 692 693 694 695 696
/**
 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 * @hba: per adapter instance
 * @tag: position of the bit to be cleared
 */
static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
{
	__clear_bit(tag, &hba->outstanding_reqs);
}

697 698 699 700 701 702 703 704
/**
 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 * @reg: Register value of host controller status
 *
 * Returns integer, 0 on Success and positive value if failed
 */
static inline int ufshcd_get_lists_status(u32 reg)
{
705
	return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
706 707 708 709 710 711 712 713 714 715 716
}

/**
 * ufshcd_get_uic_cmd_result - Get the UIC command result
 * @hba: Pointer to adapter instance
 *
 * This function gets the result of UIC command completion
 * Returns 0 on success, non zero value on error
 */
static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
{
717
	return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
718 719 720
	       MASK_UIC_COMMAND_RESULT;
}

721 722 723 724 725 726 727 728 729 730 731 732
/**
 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 * @hba: Pointer to adapter instance
 *
 * This function gets UIC command argument3
 * Returns 0 on success, non zero value on error
 */
static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
{
	return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
}

733
/**
734
 * ufshcd_get_req_rsp - returns the TR response transaction type
735 736 737
 * @ucd_rsp_ptr: pointer to response UPIU
 */
static inline int
738
ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
739
{
740
	return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
741 742 743 744 745 746 747 748 749 750 751 752 753 754 755
}

/**
 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * This function gets the response status and scsi_status from response UPIU
 * Returns the response result code.
 */
static inline int
ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
{
	return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
}

756 757 758 759 760 761 762 763 764 765 766 767 768 769
/*
 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 *				from response UPIU
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * Return the data segment length.
 */
static inline unsigned int
ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
{
	return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
		MASK_RSP_UPIU_DATA_SEG_LEN;
}

770 771 772 773 774 775 776 777 778 779 780 781 782 783 784
/**
 * ufshcd_is_exception_event - Check if the device raised an exception event
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * The function checks if the device raised an exception event indicated in
 * the Device Information field of response UPIU.
 *
 * Returns true if exception is raised, false otherwise.
 */
static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
{
	return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
			MASK_RSP_EXCEPTION_EVENT ? true : false;
}

785
/**
786
 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
787 788 789
 * @hba: per adapter instance
 */
static inline void
790
ufshcd_reset_intr_aggr(struct ufs_hba *hba)
791
{
792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809
	ufshcd_writel(hba, INT_AGGR_ENABLE |
		      INT_AGGR_COUNTER_AND_TIMER_RESET,
		      REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
}

/**
 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 * @hba: per adapter instance
 * @cnt: Interrupt aggregation counter threshold
 * @tmout: Interrupt aggregation timeout value
 */
static inline void
ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
{
	ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
		      INT_AGGR_COUNTER_THLD_VAL(cnt) |
		      INT_AGGR_TIMEOUT_VAL(tmout),
		      REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
810 811
}

812 813 814 815 816 817 818 819 820
/**
 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 * @hba: per adapter instance
 */
static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
{
	ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
}

821 822 823 824 825 826 827 828
/**
 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 *			When run-stop registers are set to 1, it indicates the
 *			host controller that it can process the requests
 * @hba: per adapter instance
 */
static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
{
829 830 831 832
	ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
		      REG_UTP_TASK_REQ_LIST_RUN_STOP);
	ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
		      REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
833 834 835 836 837 838 839 840
}

/**
 * ufshcd_hba_start - Start controller initialization sequence
 * @hba: per adapter instance
 */
static inline void ufshcd_hba_start(struct ufs_hba *hba)
{
841 842 843 844 845 846
	u32 val = CONTROLLER_ENABLE;

	if (ufshcd_crypto_enable(hba))
		val |= CRYPTO_GENERAL_ENABLE;

	ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
847 848 849 850 851 852
}

/**
 * ufshcd_is_hba_active - Get controller state
 * @hba: per adapter instance
 *
853
 * Returns false if controller is active, true otherwise
854
 */
855
static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
856
{
857 858
	return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
		? false : true;
859 860
}

861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888
u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
{
	/* HCI version 1.0 and 1.1 supports UniPro 1.41 */
	if ((hba->ufs_version == UFSHCI_VERSION_10) ||
	    (hba->ufs_version == UFSHCI_VERSION_11))
		return UFS_UNIPRO_VER_1_41;
	else
		return UFS_UNIPRO_VER_1_6;
}
EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);

static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
{
	/*
	 * If both host and device support UniPro ver1.6 or later, PA layer
	 * parameters tuning happens during link startup itself.
	 *
	 * We can manually tune PA layer parameters if either host or device
	 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
	 * logic simple, we will only do manual tuning if local unipro version
	 * doesn't support ver1.6 or later.
	 */
	if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
		return true;
	else
		return false;
}

889 890 891 892 893 894 895 896 897
/**
 * ufshcd_set_clk_freq - set UFS controller clock frequencies
 * @hba: per adapter instance
 * @scale_up: If True, set max possible frequency othewise set low frequency
 *
 * Returns 0 if successful
 * Returns < 0 for any other errors
 */
static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
898 899 900 901 902
{
	int ret = 0;
	struct ufs_clk_info *clki;
	struct list_head *head = &hba->clk_list_head;

903
	if (list_empty(head))
904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947
		goto out;

	list_for_each_entry(clki, head, list) {
		if (!IS_ERR_OR_NULL(clki->clk)) {
			if (scale_up && clki->max_freq) {
				if (clki->curr_freq == clki->max_freq)
					continue;

				ret = clk_set_rate(clki->clk, clki->max_freq);
				if (ret) {
					dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
						__func__, clki->name,
						clki->max_freq, ret);
					break;
				}
				trace_ufshcd_clk_scaling(dev_name(hba->dev),
						"scaled up", clki->name,
						clki->curr_freq,
						clki->max_freq);

				clki->curr_freq = clki->max_freq;

			} else if (!scale_up && clki->min_freq) {
				if (clki->curr_freq == clki->min_freq)
					continue;

				ret = clk_set_rate(clki->clk, clki->min_freq);
				if (ret) {
					dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
						__func__, clki->name,
						clki->min_freq, ret);
					break;
				}
				trace_ufshcd_clk_scaling(dev_name(hba->dev),
						"scaled down", clki->name,
						clki->curr_freq,
						clki->min_freq);
				clki->curr_freq = clki->min_freq;
			}
		}
		dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
				clki->name, clk_get_rate(clki->clk));
	}

948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972
out:
	return ret;
}

/**
 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
 * @hba: per adapter instance
 * @scale_up: True if scaling up and false if scaling down
 *
 * Returns 0 if successful
 * Returns < 0 for any other errors
 */
static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
{
	int ret = 0;
	ktime_t start = ktime_get();

	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
	if (ret)
		goto out;

	ret = ufshcd_set_clk_freq(hba, scale_up);
	if (ret)
		goto out;

973
	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
974 975
	if (ret)
		ufshcd_set_clk_freq(hba, !scale_up);
976 977

out:
978
	trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996
			(scale_up ? "up" : "down"),
			ktime_to_us(ktime_sub(ktime_get(), start)), ret);
	return ret;
}

/**
 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
 * @hba: per adapter instance
 * @scale_up: True if scaling up and false if scaling down
 *
 * Returns true if scaling is required, false otherwise.
 */
static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
					       bool scale_up)
{
	struct ufs_clk_info *clki;
	struct list_head *head = &hba->clk_list_head;

997
	if (list_empty(head))
998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111
		return false;

	list_for_each_entry(clki, head, list) {
		if (!IS_ERR_OR_NULL(clki->clk)) {
			if (scale_up && clki->max_freq) {
				if (clki->curr_freq == clki->max_freq)
					continue;
				return true;
			} else if (!scale_up && clki->min_freq) {
				if (clki->curr_freq == clki->min_freq)
					continue;
				return true;
			}
		}
	}

	return false;
}

static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
					u64 wait_timeout_us)
{
	unsigned long flags;
	int ret = 0;
	u32 tm_doorbell;
	u32 tr_doorbell;
	bool timeout = false, do_last_check = false;
	ktime_t start;

	ufshcd_hold(hba, false);
	spin_lock_irqsave(hba->host->host_lock, flags);
	/*
	 * Wait for all the outstanding tasks/transfer requests.
	 * Verify by checking the doorbell registers are clear.
	 */
	start = ktime_get();
	do {
		if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
			ret = -EBUSY;
			goto out;
		}

		tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
		tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
		if (!tm_doorbell && !tr_doorbell) {
			timeout = false;
			break;
		} else if (do_last_check) {
			break;
		}

		spin_unlock_irqrestore(hba->host->host_lock, flags);
		schedule();
		if (ktime_to_us(ktime_sub(ktime_get(), start)) >
		    wait_timeout_us) {
			timeout = true;
			/*
			 * We might have scheduled out for long time so make
			 * sure to check if doorbells are cleared by this time
			 * or not.
			 */
			do_last_check = true;
		}
		spin_lock_irqsave(hba->host->host_lock, flags);
	} while (tm_doorbell || tr_doorbell);

	if (timeout) {
		dev_err(hba->dev,
			"%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
			__func__, tm_doorbell, tr_doorbell);
		ret = -EBUSY;
	}
out:
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	ufshcd_release(hba);
	return ret;
}

/**
 * ufshcd_scale_gear - scale up/down UFS gear
 * @hba: per adapter instance
 * @scale_up: True for scaling up gear and false for scaling down
 *
 * Returns 0 for success,
 * Returns -EBUSY if scaling can't happen at this time
 * Returns non-zero for any other errors
 */
static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
{
	#define UFS_MIN_GEAR_TO_SCALE_DOWN	UFS_HS_G1
	int ret = 0;
	struct ufs_pa_layer_attr new_pwr_info;

	if (scale_up) {
		memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
		       sizeof(struct ufs_pa_layer_attr));
	} else {
		memcpy(&new_pwr_info, &hba->pwr_info,
		       sizeof(struct ufs_pa_layer_attr));

		if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
		    || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
			/* save the current power mode */
			memcpy(&hba->clk_scaling.saved_pwr_info.info,
				&hba->pwr_info,
				sizeof(struct ufs_pa_layer_attr));

			/* scale down gear */
			new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
			new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
		}
	}

	/* check if the power mode needs to be changed or not? */
1112
	ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129
	if (ret)
		dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
			__func__, ret,
			hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
			new_pwr_info.gear_tx, new_pwr_info.gear_rx);

	return ret;
}

static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
{
	#define DOORBELL_CLR_TOUT_US		(1000 * 1000) /* 1 sec */
	int ret = 0;
	/*
	 * make sure that there are no outstanding requests when
	 * clock scaling is in progress
	 */
1130
	ufshcd_scsi_block_requests(hba);
1131 1132 1133 1134
	down_write(&hba->clk_scaling_lock);
	if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
		ret = -EBUSY;
		up_write(&hba->clk_scaling_lock);
1135
		ufshcd_scsi_unblock_requests(hba);
1136 1137 1138 1139 1140 1141 1142 1143
	}

	return ret;
}

static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
{
	up_write(&hba->clk_scaling_lock);
1144
	ufshcd_scsi_unblock_requests(hba);
1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159
}

/**
 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
 * @hba: per adapter instance
 * @scale_up: True for scaling up and false for scalin down
 *
 * Returns 0 for success,
 * Returns -EBUSY if scaling can't happen at this time
 * Returns non-zero for any other errors
 */
static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
{
	int ret = 0;

1160 1161 1162
	/* let's not get into low power until clock scaling is completed */
	ufshcd_hold(hba, false);

1163 1164
	ret = ufshcd_clock_scaling_prepare(hba);
	if (ret)
1165
		goto out;
1166 1167 1168 1169 1170

	/* scale down the gear before scaling down clocks */
	if (!scale_up) {
		ret = ufshcd_scale_gear(hba, false);
		if (ret)
1171
			goto out_unprepare;
1172 1173 1174 1175 1176 1177
	}

	ret = ufshcd_scale_clks(hba, scale_up);
	if (ret) {
		if (!scale_up)
			ufshcd_scale_gear(hba, true);
1178
		goto out_unprepare;
1179 1180 1181 1182 1183
	}

	/* scale up the gear after scaling up clocks */
	if (scale_up) {
		ret = ufshcd_scale_gear(hba, true);
1184
		if (ret) {
1185
			ufshcd_scale_clks(hba, false);
1186 1187
			goto out_unprepare;
		}
1188 1189
	}

1190 1191 1192 1193 1194
	/* Enable Write Booster if we have scaled up else disable it */
	up_write(&hba->clk_scaling_lock);
	ufshcd_wb_ctrl(hba, scale_up);
	down_write(&hba->clk_scaling_lock);

1195
out_unprepare:
1196
	ufshcd_clock_scaling_unprepare(hba);
1197
out:
1198
	ufshcd_release(hba);
1199 1200 1201
	return ret;
}

1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235
static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
{
	struct ufs_hba *hba = container_of(work, struct ufs_hba,
					   clk_scaling.suspend_work);
	unsigned long irq_flags;

	spin_lock_irqsave(hba->host->host_lock, irq_flags);
	if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		return;
	}
	hba->clk_scaling.is_suspended = true;
	spin_unlock_irqrestore(hba->host->host_lock, irq_flags);

	__ufshcd_suspend_clkscaling(hba);
}

static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
{
	struct ufs_hba *hba = container_of(work, struct ufs_hba,
					   clk_scaling.resume_work);
	unsigned long irq_flags;

	spin_lock_irqsave(hba->host->host_lock, irq_flags);
	if (!hba->clk_scaling.is_suspended) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		return;
	}
	hba->clk_scaling.is_suspended = false;
	spin_unlock_irqrestore(hba->host->host_lock, irq_flags);

	devfreq_resume_device(hba->devfreq);
}

1236 1237 1238 1239 1240 1241
static int ufshcd_devfreq_target(struct device *dev,
				unsigned long *freq, u32 flags)
{
	int ret = 0;
	struct ufs_hba *hba = dev_get_drvdata(dev);
	ktime_t start;
1242
	bool scale_up, sched_clk_scaling_suspend_work = false;
1243 1244
	struct list_head *clk_list = &hba->clk_list_head;
	struct ufs_clk_info *clki;
1245 1246 1247 1248 1249
	unsigned long irq_flags;

	if (!ufshcd_is_clkscaling_supported(hba))
		return -EINVAL;

1250 1251 1252
	clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
	/* Override with the closest supported frequency */
	*freq = (unsigned long) clk_round_rate(clki->clk, *freq);
1253 1254 1255 1256 1257 1258
	spin_lock_irqsave(hba->host->host_lock, irq_flags);
	if (ufshcd_eh_in_progress(hba)) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		return 0;
	}

1259 1260 1261
	if (!hba->clk_scaling.active_reqs)
		sched_clk_scaling_suspend_work = true;

1262 1263 1264 1265 1266
	if (list_empty(clk_list)) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		goto out;
	}

1267
	/* Decide based on the rounded-off frequency and update */
1268
	scale_up = (*freq == clki->max_freq) ? true : false;
1269 1270 1271
	if (!scale_up)
		*freq = clki->min_freq;
	/* Update the frequency */
1272 1273 1274 1275
	if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		ret = 0;
		goto out; /* no state change required */
1276 1277 1278 1279 1280 1281 1282 1283 1284 1285
	}
	spin_unlock_irqrestore(hba->host->host_lock, irq_flags);

	start = ktime_get();
	ret = ufshcd_devfreq_scale(hba, scale_up);

	trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
		(scale_up ? "up" : "down"),
		ktime_to_us(ktime_sub(ktime_get(), start)), ret);

1286 1287 1288 1289 1290
out:
	if (sched_clk_scaling_suspend_work)
		queue_work(hba->clk_scaling.workq,
			   &hba->clk_scaling.suspend_work);

1291 1292 1293
	return ret;
}

1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311
static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
{
	int *busy = priv;

	WARN_ON_ONCE(reserved);
	(*busy)++;
	return false;
}

/* Whether or not any tag is in use by a request that is in progress. */
static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
{
	struct request_queue *q = hba->cmd_queue;
	int busy = 0;

	blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
	return busy;
}
1312 1313 1314 1315 1316 1317 1318

static int ufshcd_devfreq_get_dev_status(struct device *dev,
		struct devfreq_dev_status *stat)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);
	struct ufs_clk_scaling *scaling = &hba->clk_scaling;
	unsigned long flags;
1319 1320
	struct list_head *clk_list = &hba->clk_list_head;
	struct ufs_clk_info *clki;
1321
	ktime_t curr_t;
1322 1323 1324 1325 1326 1327 1328

	if (!ufshcd_is_clkscaling_supported(hba))
		return -EINVAL;

	memset(stat, 0, sizeof(*stat));

	spin_lock_irqsave(hba->host->host_lock, flags);
1329
	curr_t = ktime_get();
1330 1331 1332
	if (!scaling->window_start_t)
		goto start_window;

1333 1334 1335 1336 1337 1338 1339
	clki = list_first_entry(clk_list, struct ufs_clk_info, list);
	/*
	 * If current frequency is 0, then the ondemand governor considers
	 * there's no initial frequency set. And it always requests to set
	 * to max. frequency.
	 */
	stat->current_frequency = clki->curr_freq;
1340
	if (scaling->is_busy_started)
1341 1342
		scaling->tot_busy_t += ktime_us_delta(curr_t,
				scaling->busy_start_t);
1343

1344
	stat->total_time = ktime_us_delta(curr_t, scaling->window_start_t);
1345 1346
	stat->busy_time = scaling->tot_busy_t;
start_window:
1347
	scaling->window_start_t = curr_t;
1348 1349 1350
	scaling->tot_busy_t = 0;

	if (hba->outstanding_reqs) {
1351
		scaling->busy_start_t = curr_t;
1352 1353 1354 1355 1356 1357 1358 1359 1360
		scaling->is_busy_started = true;
	} else {
		scaling->busy_start_t = 0;
		scaling->is_busy_started = false;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	return 0;
}

1361 1362
static int ufshcd_devfreq_init(struct ufs_hba *hba)
{
1363 1364
	struct list_head *clk_list = &hba->clk_list_head;
	struct ufs_clk_info *clki;
1365 1366 1367
	struct devfreq *devfreq;
	int ret;

1368 1369 1370 1371 1372 1373 1374 1375
	/* Skip devfreq if we don't have any clocks in the list */
	if (list_empty(clk_list))
		return 0;

	clki = list_first_entry(clk_list, struct ufs_clk_info, list);
	dev_pm_opp_add(hba->dev, clki->min_freq, 0);
	dev_pm_opp_add(hba->dev, clki->max_freq, 0);

1376 1377
	ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
					 &hba->vps->ondemand_data);
1378
	devfreq = devfreq_add_device(hba->dev,
1379
			&hba->vps->devfreq_profile,
1380
			DEVFREQ_GOV_SIMPLE_ONDEMAND,
1381
			&hba->vps->ondemand_data);
1382 1383 1384
	if (IS_ERR(devfreq)) {
		ret = PTR_ERR(devfreq);
		dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1385 1386 1387

		dev_pm_opp_remove(hba->dev, clki->min_freq);
		dev_pm_opp_remove(hba->dev, clki->max_freq);
1388 1389 1390 1391 1392 1393 1394 1395
		return ret;
	}

	hba->devfreq = devfreq;

	return 0;
}

1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411
static void ufshcd_devfreq_remove(struct ufs_hba *hba)
{
	struct list_head *clk_list = &hba->clk_list_head;
	struct ufs_clk_info *clki;

	if (!hba->devfreq)
		return;

	devfreq_remove_device(hba->devfreq);
	hba->devfreq = NULL;

	clki = list_first_entry(clk_list, struct ufs_clk_info, list);
	dev_pm_opp_remove(hba->dev, clki->min_freq);
	dev_pm_opp_remove(hba->dev, clki->max_freq);
}

1412 1413 1414 1415 1416 1417 1418 1419 1420
static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
{
	unsigned long flags;

	devfreq_suspend_device(hba->devfreq);
	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->clk_scaling.window_start_t = 0;
	spin_unlock_irqrestore(hba->host->host_lock, flags);
}
1421

1422 1423
static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
{
1424 1425 1426
	unsigned long flags;
	bool suspend = false;

1427 1428 1429
	if (!ufshcd_is_clkscaling_supported(hba))
		return;

1430 1431 1432 1433 1434 1435 1436 1437 1438
	spin_lock_irqsave(hba->host->host_lock, flags);
	if (!hba->clk_scaling.is_suspended) {
		suspend = true;
		hba->clk_scaling.is_suspended = true;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (suspend)
		__ufshcd_suspend_clkscaling(hba);
1439 1440 1441 1442
}

static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
{
1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457
	unsigned long flags;
	bool resume = false;

	if (!ufshcd_is_clkscaling_supported(hba))
		return;

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (hba->clk_scaling.is_suspended) {
		resume = true;
		hba->clk_scaling.is_suspended = false;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (resume)
		devfreq_resume_device(hba->devfreq);
1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484
}

static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);

	return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
}

static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);
	u32 value;
	int err;

	if (kstrtou32(buf, 0, &value))
		return -EINVAL;

	value = !!value;
	if (value == hba->clk_scaling.is_allowed)
		goto out;

	pm_runtime_get_sync(hba->dev);
	ufshcd_hold(hba, false);

1485 1486 1487 1488 1489
	cancel_work_sync(&hba->clk_scaling.suspend_work);
	cancel_work_sync(&hba->clk_scaling.resume_work);

	hba->clk_scaling.is_allowed = value;

1490 1491 1492 1493
	if (value) {
		ufshcd_resume_clkscaling(hba);
	} else {
		ufshcd_suspend_clkscaling(hba);
1494
		err = ufshcd_devfreq_scale(hba, true);
1495 1496 1497 1498 1499 1500 1501 1502 1503
		if (err)
			dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
					__func__, err);
	}

	ufshcd_release(hba);
	pm_runtime_put_sync(hba->dev);
out:
	return count;
1504 1505
}

1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516
static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
{
	hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
	hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
	sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
	hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
	hba->clk_scaling.enable_attr.attr.mode = 0644;
	if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
		dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
}

1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534
static void ufshcd_ungate_work(struct work_struct *work)
{
	int ret;
	unsigned long flags;
	struct ufs_hba *hba = container_of(work, struct ufs_hba,
			clk_gating.ungate_work);

	cancel_delayed_work_sync(&hba->clk_gating.gate_work);

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (hba->clk_gating.state == CLKS_ON) {
		spin_unlock_irqrestore(hba->host->host_lock, flags);
		goto unblock_reqs;
	}

	spin_unlock_irqrestore(hba->host->host_lock, flags);
	ufshcd_setup_clocks(hba, true);

1535 1536
	ufshcd_enable_irq(hba);

1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551
	/* Exit from hibern8 */
	if (ufshcd_can_hibern8_during_gating(hba)) {
		/* Prevent gating in this path */
		hba->clk_gating.is_suspended = true;
		if (ufshcd_is_link_hibern8(hba)) {
			ret = ufshcd_uic_hibern8_exit(hba);
			if (ret)
				dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
					__func__, ret);
			else
				ufshcd_set_link_active(hba);
		}
		hba->clk_gating.is_suspended = false;
	}
unblock_reqs:
1552
	ufshcd_scsi_unblock_requests(hba);
1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570
}

/**
 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
 * Also, exit from hibern8 mode and set the link as active.
 * @hba: per adapter instance
 * @async: This indicates whether caller should ungate clocks asynchronously.
 */
int ufshcd_hold(struct ufs_hba *hba, bool async)
{
	int rc = 0;
	unsigned long flags;

	if (!ufshcd_is_clkgating_allowed(hba))
		goto out;
	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->clk_gating.active_reqs++;

1571 1572 1573 1574 1575
	if (ufshcd_eh_in_progress(hba)) {
		spin_unlock_irqrestore(hba->host->host_lock, flags);
		return 0;
	}

1576
start:
1577 1578
	switch (hba->clk_gating.state) {
	case CLKS_ON:
1579 1580 1581 1582 1583 1584 1585 1586 1587 1588
		/*
		 * Wait for the ungate work to complete if in progress.
		 * Though the clocks may be in ON state, the link could
		 * still be in hibner8 state if hibern8 is allowed
		 * during clock gating.
		 * Make sure we exit hibern8 state also in addition to
		 * clocks being ON.
		 */
		if (ufshcd_can_hibern8_during_gating(hba) &&
		    ufshcd_is_link_hibern8(hba)) {
1589 1590 1591 1592 1593
			if (async) {
				rc = -EAGAIN;
				hba->clk_gating.active_reqs--;
				break;
			}
1594 1595 1596 1597 1598
			spin_unlock_irqrestore(hba->host->host_lock, flags);
			flush_work(&hba->clk_gating.ungate_work);
			spin_lock_irqsave(hba->host->host_lock, flags);
			goto start;
		}
1599 1600 1601 1602
		break;
	case REQ_CLKS_OFF:
		if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
			hba->clk_gating.state = CLKS_ON;
1603 1604
			trace_ufshcd_clk_gating(dev_name(hba->dev),
						hba->clk_gating.state);
1605 1606 1607
			break;
		}
		/*
1608
		 * If we are here, it means gating work is either done or
1609 1610 1611
		 * currently running. Hence, fall through to cancel gating
		 * work and to enable clocks.
		 */
1612
		/* fallthrough */
1613
	case CLKS_OFF:
1614
		ufshcd_scsi_block_requests(hba);
1615
		hba->clk_gating.state = REQ_CLKS_ON;
1616 1617
		trace_ufshcd_clk_gating(dev_name(hba->dev),
					hba->clk_gating.state);
1618 1619
		queue_work(hba->clk_gating.clk_gating_workq,
			   &hba->clk_gating.ungate_work);
1620 1621 1622 1623
		/*
		 * fall through to check if we should wait for this
		 * work to be done or not.
		 */
1624
		/* fallthrough */
1625 1626 1627 1628 1629 1630 1631 1632 1633 1634
	case REQ_CLKS_ON:
		if (async) {
			rc = -EAGAIN;
			hba->clk_gating.active_reqs--;
			break;
		}

		spin_unlock_irqrestore(hba->host->host_lock, flags);
		flush_work(&hba->clk_gating.ungate_work);
		/* Make sure state is CLKS_ON before returning */
1635
		spin_lock_irqsave(hba->host->host_lock, flags);
1636 1637 1638 1639 1640 1641 1642 1643 1644 1645
		goto start;
	default:
		dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
				__func__, hba->clk_gating.state);
		break;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
	return rc;
}
1646
EXPORT_SYMBOL_GPL(ufshcd_hold);
1647 1648 1649 1650 1651 1652 1653 1654

static void ufshcd_gate_work(struct work_struct *work)
{
	struct ufs_hba *hba = container_of(work, struct ufs_hba,
			clk_gating.gate_work.work);
	unsigned long flags;

	spin_lock_irqsave(hba->host->host_lock, flags);
1655 1656 1657 1658 1659 1660 1661
	/*
	 * In case you are here to cancel this work the gating state
	 * would be marked as REQ_CLKS_ON. In this case save time by
	 * skipping the gating work and exit after changing the clock
	 * state to CLKS_ON.
	 */
	if (hba->clk_gating.is_suspended ||
1662
		(hba->clk_gating.state != REQ_CLKS_OFF)) {
1663
		hba->clk_gating.state = CLKS_ON;
1664 1665
		trace_ufshcd_clk_gating(dev_name(hba->dev),
					hba->clk_gating.state);
1666 1667 1668 1669 1670
		goto rel_lock;
	}

	if (hba->clk_gating.active_reqs
		|| hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1671
		|| ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1672 1673 1674 1675 1676 1677 1678 1679 1680
		|| hba->active_uic_cmd || hba->uic_async_done)
		goto rel_lock;

	spin_unlock_irqrestore(hba->host->host_lock, flags);

	/* put the link into hibern8 mode before turning off clocks */
	if (ufshcd_can_hibern8_during_gating(hba)) {
		if (ufshcd_uic_hibern8_enter(hba)) {
			hba->clk_gating.state = CLKS_ON;
1681 1682
			trace_ufshcd_clk_gating(dev_name(hba->dev),
						hba->clk_gating.state);
1683 1684 1685 1686 1687
			goto out;
		}
		ufshcd_set_link_hibern8(hba);
	}

1688 1689
	ufshcd_disable_irq(hba);

1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705
	if (!ufshcd_is_link_active(hba))
		ufshcd_setup_clocks(hba, false);
	else
		/* If link is active, device ref_clk can't be switched off */
		__ufshcd_setup_clocks(hba, false, true);

	/*
	 * In case you are here to cancel this work the gating state
	 * would be marked as REQ_CLKS_ON. In this case keep the state
	 * as REQ_CLKS_ON which would anyway imply that clocks are off
	 * and a request to turn them on is pending. By doing this way,
	 * we keep the state machine in tact and this would ultimately
	 * prevent from doing cancel work multiple times when there are
	 * new requests arriving before the current cancel work is done.
	 */
	spin_lock_irqsave(hba->host->host_lock, flags);
1706
	if (hba->clk_gating.state == REQ_CLKS_OFF) {
1707
		hba->clk_gating.state = CLKS_OFF;
1708 1709 1710
		trace_ufshcd_clk_gating(dev_name(hba->dev),
					hba->clk_gating.state);
	}
1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726
rel_lock:
	spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
	return;
}

/* host lock must be held before calling this variant */
static void __ufshcd_release(struct ufs_hba *hba)
{
	if (!ufshcd_is_clkgating_allowed(hba))
		return;

	hba->clk_gating.active_reqs--;

	if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
		|| hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1727
		|| ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1728 1729
		|| hba->active_uic_cmd || hba->uic_async_done
		|| ufshcd_eh_in_progress(hba))
1730 1731 1732
		return;

	hba->clk_gating.state = REQ_CLKS_OFF;
1733
	trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1734 1735 1736
	queue_delayed_work(hba->clk_gating.clk_gating_workq,
			   &hba->clk_gating.gate_work,
			   msecs_to_jiffies(hba->clk_gating.delay_ms));
1737 1738 1739 1740 1741 1742 1743 1744 1745 1746
}

void ufshcd_release(struct ufs_hba *hba)
{
	unsigned long flags;

	spin_lock_irqsave(hba->host->host_lock, flags);
	__ufshcd_release(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);
}
1747
EXPORT_SYMBOL_GPL(ufshcd_release);
1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771

static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);

	return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
}

static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);
	unsigned long flags, value;

	if (kstrtoul(buf, 0, &value))
		return -EINVAL;

	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->clk_gating.delay_ms = value;
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	return count;
}

1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806
static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);

	return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
}

static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);
	unsigned long flags;
	u32 value;

	if (kstrtou32(buf, 0, &value))
		return -EINVAL;

	value = !!value;
	if (value == hba->clk_gating.is_enabled)
		goto out;

	if (value) {
		ufshcd_release(hba);
	} else {
		spin_lock_irqsave(hba->host->host_lock, flags);
		hba->clk_gating.active_reqs++;
		spin_unlock_irqrestore(hba->host->host_lock, flags);
	}

	hba->clk_gating.is_enabled = value;
out:
	return count;
}

1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834
static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
{
	char wq_name[sizeof("ufs_clkscaling_00")];

	if (!ufshcd_is_clkscaling_supported(hba))
		return;

	INIT_WORK(&hba->clk_scaling.suspend_work,
		  ufshcd_clk_scaling_suspend_work);
	INIT_WORK(&hba->clk_scaling.resume_work,
		  ufshcd_clk_scaling_resume_work);

	snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
		 hba->host->host_no);
	hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);

	ufshcd_clkscaling_init_sysfs(hba);
}

static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
{
	if (!ufshcd_is_clkscaling_supported(hba))
		return;

	destroy_workqueue(hba->clk_scaling.workq);
	ufshcd_devfreq_remove(hba);
}

1835 1836
static void ufshcd_init_clk_gating(struct ufs_hba *hba)
{
1837 1838
	char wq_name[sizeof("ufs_clk_gating_00")];

1839 1840 1841 1842 1843 1844 1845
	if (!ufshcd_is_clkgating_allowed(hba))
		return;

	hba->clk_gating.delay_ms = 150;
	INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
	INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);

1846 1847 1848 1849 1850
	snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
		 hba->host->host_no);
	hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
							   WQ_MEM_RECLAIM);

1851 1852
	hba->clk_gating.is_enabled = true;

1853 1854 1855 1856
	hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
	hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
	sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
	hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1857
	hba->clk_gating.delay_attr.attr.mode = 0644;
1858 1859
	if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
		dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1860 1861 1862 1863 1864 1865 1866 1867

	hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
	hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
	sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
	hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
	hba->clk_gating.enable_attr.attr.mode = 0644;
	if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
		dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1868 1869 1870 1871 1872 1873 1874
}

static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
{
	if (!ufshcd_is_clkgating_allowed(hba))
		return;
	device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1875
	device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1876 1877
	cancel_work_sync(&hba->clk_gating.ungate_work);
	cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1878
	destroy_workqueue(hba->clk_gating.clk_gating_workq);
1879 1880
}

1881 1882 1883
/* Must be called with host lock acquired */
static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
{
1884
	bool queue_resume_work = false;
1885
	ktime_t curr_t = ktime_get();
1886

1887
	if (!ufshcd_is_clkscaling_supported(hba))
1888 1889
		return;

1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900
	if (!hba->clk_scaling.active_reqs++)
		queue_resume_work = true;

	if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
		return;

	if (queue_resume_work)
		queue_work(hba->clk_scaling.workq,
			   &hba->clk_scaling.resume_work);

	if (!hba->clk_scaling.window_start_t) {
1901
		hba->clk_scaling.window_start_t = curr_t;
1902 1903 1904 1905
		hba->clk_scaling.tot_busy_t = 0;
		hba->clk_scaling.is_busy_started = false;
	}

1906
	if (!hba->clk_scaling.is_busy_started) {
1907
		hba->clk_scaling.busy_start_t = curr_t;
1908 1909 1910 1911 1912 1913 1914 1915
		hba->clk_scaling.is_busy_started = true;
	}
}

static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
{
	struct ufs_clk_scaling *scaling = &hba->clk_scaling;

1916
	if (!ufshcd_is_clkscaling_supported(hba))
1917 1918 1919 1920 1921
		return;

	if (!hba->outstanding_reqs && scaling->is_busy_started) {
		scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
					scaling->busy_start_t));
T
Thomas Gleixner 已提交
1922
		scaling->busy_start_t = 0;
1923 1924 1925
		scaling->is_busy_started = false;
	}
}
1926 1927 1928 1929 1930 1931 1932 1933
/**
 * ufshcd_send_command - Send SCSI or device management commands
 * @hba: per adapter instance
 * @task_tag: Task tag of the command
 */
static inline
void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
{
1934
	hba->lrb[task_tag].issue_time_stamp = ktime_get();
1935
	hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1936
	ufshcd_add_command_trace(hba, task_tag, "send");
1937
	ufshcd_clk_scaling_start_busy(hba);
1938
	__set_bit(task_tag, &hba->outstanding_reqs);
1939
	ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1940 1941
	/* Make sure that doorbell is committed immediately */
	wmb();
1942 1943 1944 1945
}

/**
 * ufshcd_copy_sense_data - Copy sense data in case of check condition
1946
 * @lrbp: pointer to local reference block
1947 1948 1949 1950
 */
static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
{
	int len;
1951 1952
	if (lrbp->sense_buffer &&
	    ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1953 1954
		int len_to_copy;

1955
		len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1956
		len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
1957

1958 1959
		memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
		       len_to_copy);
1960 1961 1962
	}
}

1963 1964 1965 1966
/**
 * ufshcd_copy_query_response() - Copy the Query Response and the data
 * descriptor
 * @hba: per adapter instance
1967
 * @lrbp: pointer to local reference block
1968 1969
 */
static
1970
int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1971 1972 1973 1974 1975 1976
{
	struct ufs_query_res *query_res = &hba->dev_cmd.query.response;

	memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);

	/* Get the descriptor */
1977 1978
	if (hba->dev_cmd.query.descriptor &&
	    lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
D
Dolev Raviv 已提交
1979
		u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1980
				GENERAL_UPIU_REQUEST_SIZE;
1981 1982
		u16 resp_len;
		u16 buf_len;
1983 1984

		/* data segment length */
1985
		resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1986
						MASK_QUERY_DATA_SEG_LEN;
1987 1988
		buf_len = be16_to_cpu(
				hba->dev_cmd.query.request.upiu_req.length);
1989 1990 1991 1992
		if (likely(buf_len >= resp_len)) {
			memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
		} else {
			dev_warn(hba->dev,
1993 1994
				 "%s: rsp size %d is bigger than buffer size %d",
				 __func__, resp_len, buf_len);
1995 1996
			return -EINVAL;
		}
1997
	}
1998 1999

	return 0;
2000 2001
}

2002 2003 2004
/**
 * ufshcd_hba_capabilities - Read controller capabilities
 * @hba: per adapter instance
2005 2006
 *
 * Return: 0 on success, negative on error.
2007
 */
2008
static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
2009
{
2010 2011
	int err;

2012
	hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
2013 2014 2015 2016 2017

	/* nutrs and nutmrs are 0 based values */
	hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
	hba->nutmrs =
	((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2018 2019 2020 2021 2022 2023 2024

	/* Read crypto capabilities */
	err = ufshcd_hba_init_crypto_capabilities(hba);
	if (err)
		dev_err(hba->dev, "crypto setup failed\n");

	return err;
2025 2026 2027
}

/**
2028 2029
 * ufshcd_ready_for_uic_cmd - Check if controller is ready
 *                            to accept UIC commands
2030
 * @hba: per adapter instance
2031 2032 2033 2034 2035 2036 2037 2038 2039 2040
 * Return true on success, else false
 */
static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
{
	if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
		return true;
	else
		return false;
}

2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052
/**
 * ufshcd_get_upmcrs - Get the power mode change request status
 * @hba: Pointer to adapter instance
 *
 * This function gets the UPMCRS field of HCS register
 * Returns value of UPMCRS field
 */
static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
{
	return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
}

2053 2054 2055 2056 2057 2058
/**
 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
 * @hba: per adapter instance
 * @uic_cmd: UIC command
 *
 * Mutex must be held.
2059 2060
 */
static inline void
2061
ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2062
{
2063 2064 2065 2066
	WARN_ON(hba->active_uic_cmd);

	hba->active_uic_cmd = uic_cmd;

2067
	/* Write Args */
2068 2069 2070
	ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
	ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
	ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2071

2072 2073
	ufshcd_add_uic_command_trace(hba, uic_cmd, "send");

2074
	/* Write UIC Cmd */
2075
	ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2076
		      REG_UIC_COMMAND);
2077 2078
}

2079 2080 2081
/**
 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
 * @hba: per adapter instance
2082
 * @uic_cmd: UIC command
2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109
 *
 * Must be called with mutex held.
 * Returns 0 only if success.
 */
static int
ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
{
	int ret;
	unsigned long flags;

	if (wait_for_completion_timeout(&uic_cmd->done,
					msecs_to_jiffies(UIC_CMD_TIMEOUT)))
		ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
	else
		ret = -ETIMEDOUT;

	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->active_uic_cmd = NULL;
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	return ret;
}

/**
 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
 * @hba: per adapter instance
 * @uic_cmd: UIC command
2110
 * @completion: initialize the completion only if this is set to true
2111 2112
 *
 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2113
 * with mutex held and host_lock locked.
2114 2115 2116
 * Returns 0 only if success.
 */
static int
2117 2118
__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
		      bool completion)
2119 2120 2121 2122 2123 2124 2125
{
	if (!ufshcd_ready_for_uic_cmd(hba)) {
		dev_err(hba->dev,
			"Controller not ready to accept UIC commands\n");
		return -EIO;
	}

2126 2127
	if (completion)
		init_completion(&uic_cmd->done);
2128 2129 2130

	ufshcd_dispatch_uic_cmd(hba, uic_cmd);

2131
	return 0;
2132 2133 2134 2135 2136 2137 2138 2139 2140
}

/**
 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
 * @hba: per adapter instance
 * @uic_cmd: UIC command
 *
 * Returns 0 only if success.
 */
2141
int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2142 2143
{
	int ret;
2144
	unsigned long flags;
2145

2146
	ufshcd_hold(hba, false);
2147
	mutex_lock(&hba->uic_cmd_mutex);
2148 2149
	ufshcd_add_delay_before_dme_cmd(hba);

2150
	spin_lock_irqsave(hba->host->host_lock, flags);
2151
	ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2152 2153 2154 2155
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	if (!ret)
		ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);

2156 2157
	mutex_unlock(&hba->uic_cmd_mutex);

2158
	ufshcd_release(hba);
2159 2160 2161
	return ret;
}

2162 2163
/**
 * ufshcd_map_sg - Map scatter-gather list to prdt
2164 2165
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
2166 2167 2168
 *
 * Returns 0 in case of success, non-zero value in case of failure
 */
2169
static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182
{
	struct ufshcd_sg_entry *prd_table;
	struct scatterlist *sg;
	struct scsi_cmnd *cmd;
	int sg_segments;
	int i;

	cmd = lrbp->cmd;
	sg_segments = scsi_dma_map(cmd);
	if (sg_segments < 0)
		return sg_segments;

	if (sg_segments) {
2183 2184 2185 2186 2187 2188 2189 2190

		if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
			lrbp->utr_descriptor_ptr->prd_table_length =
				cpu_to_le16((sg_segments *
					sizeof(struct ufshcd_sg_entry)));
		else
			lrbp->utr_descriptor_ptr->prd_table_length =
				cpu_to_le16((u16) (sg_segments));
2191 2192 2193 2194 2195 2196 2197 2198 2199 2200

		prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;

		scsi_for_each_sg(cmd, sg, sg_segments, i) {
			prd_table[i].size  =
				cpu_to_le32(((u32) sg_dma_len(sg))-1);
			prd_table[i].base_addr =
				cpu_to_le32(lower_32_bits(sg->dma_address));
			prd_table[i].upper_addr =
				cpu_to_le32(upper_32_bits(sg->dma_address));
2201
			prd_table[i].reserved = 0;
2202 2203 2204 2205 2206 2207 2208 2209 2210
		}
	} else {
		lrbp->utr_descriptor_ptr->prd_table_length = 0;
	}

	return 0;
}

/**
2211
 * ufshcd_enable_intr - enable interrupts
2212
 * @hba: per adapter instance
2213
 * @intrs: interrupt bits
2214
 */
2215
static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2216
{
2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246
	u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);

	if (hba->ufs_version == UFSHCI_VERSION_10) {
		u32 rw;
		rw = set & INTERRUPT_MASK_RW_VER_10;
		set = rw | ((set ^ intrs) & intrs);
	} else {
		set |= intrs;
	}

	ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
}

/**
 * ufshcd_disable_intr - disable interrupts
 * @hba: per adapter instance
 * @intrs: interrupt bits
 */
static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
{
	u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);

	if (hba->ufs_version == UFSHCI_VERSION_10) {
		u32 rw;
		rw = (set & INTERRUPT_MASK_RW_VER_10) &
			~(intrs & INTERRUPT_MASK_RW_VER_10);
		set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);

	} else {
		set &= ~intrs;
2247
	}
2248 2249

	ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2250 2251
}

2252 2253 2254 2255 2256 2257 2258 2259
/**
 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
 * descriptor according to request
 * @lrbp: pointer to local reference block
 * @upiu_flags: flags required in the header
 * @cmd_dir: requests data direction
 */
static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
B
Bean Huo 已提交
2260
			u8 *upiu_flags, enum dma_data_direction cmd_dir)
2261 2262 2263 2264
{
	struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
	u32 data_direction;
	u32 dword_0;
2265 2266
	u32 dword_1 = 0;
	u32 dword_3 = 0;
2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283

	if (cmd_dir == DMA_FROM_DEVICE) {
		data_direction = UTP_DEVICE_TO_HOST;
		*upiu_flags = UPIU_CMD_FLAGS_READ;
	} else if (cmd_dir == DMA_TO_DEVICE) {
		data_direction = UTP_HOST_TO_DEVICE;
		*upiu_flags = UPIU_CMD_FLAGS_WRITE;
	} else {
		data_direction = UTP_NO_DATA_TRANSFER;
		*upiu_flags = UPIU_CMD_FLAGS_NONE;
	}

	dword_0 = data_direction | (lrbp->command_type
				<< UPIU_COMMAND_TYPE_OFFSET);
	if (lrbp->intr_cmd)
		dword_0 |= UTP_REQ_DESC_INT_CMD;

2284 2285 2286
	/* Prepare crypto related dwords */
	ufshcd_prepare_req_desc_hdr_crypto(lrbp, &dword_0, &dword_1, &dword_3);

2287 2288
	/* Transfer request descriptor header fields */
	req_desc->header.dword_0 = cpu_to_le32(dword_0);
2289
	req_desc->header.dword_1 = cpu_to_le32(dword_1);
2290 2291 2292 2293 2294 2295 2296
	/*
	 * assigning invalid value for command status. Controller
	 * updates OCS on command completion, with the command
	 * status
	 */
	req_desc->header.dword_2 =
		cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2297
	req_desc->header.dword_3 = cpu_to_le32(dword_3);
2298 2299

	req_desc->prd_table_length = 0;
2300 2301 2302 2303 2304
}

/**
 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
 * for scsi commands
2305 2306
 * @lrbp: local reference block pointer
 * @upiu_flags: flags
2307 2308
 */
static
B
Bean Huo 已提交
2309
void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u8 upiu_flags)
2310
{
2311
	struct scsi_cmnd *cmd = lrbp->cmd;
2312
	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2313
	unsigned short cdb_len;
2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324

	/* command descriptor fields */
	ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
				UPIU_TRANSACTION_COMMAND, upiu_flags,
				lrbp->lun, lrbp->task_tag);
	ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
				UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);

	/* Total EHS length and Data segment length will be zero */
	ucd_req_ptr->header.dword_2 = 0;

2325
	ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
2326

2327
	cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
2328
	memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2329
	memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
2330 2331

	memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2332 2333
}

2334 2335 2336 2337 2338 2339 2340 2341
/**
 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
 * for query requsts
 * @hba: UFS hba
 * @lrbp: local reference block pointer
 * @upiu_flags: flags
 */
static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
B
Bean Huo 已提交
2342
				struct ufshcd_lrb *lrbp, u8 upiu_flags)
2343 2344 2345
{
	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
	struct ufs_query *query = &hba->dev_cmd.query;
2346
	u16 len = be16_to_cpu(query->request.upiu_req.length);
2347 2348 2349 2350 2351 2352 2353 2354

	/* Query request header */
	ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
			UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
			lrbp->lun, lrbp->task_tag);
	ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
			0, query->request.query_func, 0, 0);

2355 2356 2357 2358 2359 2360
	/* Data segment length only need for WRITE_DESC */
	if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
		ucd_req_ptr->header.dword_2 =
			UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
	else
		ucd_req_ptr->header.dword_2 = 0;
2361 2362 2363 2364 2365 2366

	/* Copy the Query Request buffer as is */
	memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
			QUERY_OSF_SIZE);

	/* Copy the Descriptor */
2367
	if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2368
		memcpy(ucd_req_ptr + 1, query->descriptor, len);
2369

2370
	memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2371 2372
}

2373 2374 2375 2376 2377 2378 2379 2380 2381 2382
static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
{
	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;

	memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));

	/* command descriptor fields */
	ucd_req_ptr->header.dword_0 =
		UPIU_HEADER_DWORD(
			UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2383 2384 2385 2386 2387
	/* clear rest of the fields of basic header */
	ucd_req_ptr->header.dword_1 = 0;
	ucd_req_ptr->header.dword_2 = 0;

	memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2388 2389
}

2390
/**
J
Joao Pinto 已提交
2391 2392
 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
 *			     for Device Management Purposes
2393 2394
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
2395
 */
J
Joao Pinto 已提交
2396
static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2397
{
B
Bean Huo 已提交
2398
	u8 upiu_flags;
2399
	int ret = 0;
2400

2401 2402
	if ((hba->ufs_version == UFSHCI_VERSION_10) ||
	    (hba->ufs_version == UFSHCI_VERSION_11))
J
Joao Pinto 已提交
2403
		lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2404 2405
	else
		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
J
Joao Pinto 已提交
2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420

	ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
	if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
		ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
	else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
		ufshcd_prepare_utp_nop_upiu(lrbp);
	else
		ret = -EINVAL;

	return ret;
}

/**
 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
 *			   for SCSI Purposes
2421 2422
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
J
Joao Pinto 已提交
2423 2424 2425
 */
static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
B
Bean Huo 已提交
2426
	u8 upiu_flags;
J
Joao Pinto 已提交
2427 2428
	int ret = 0;

2429 2430
	if ((hba->ufs_version == UFSHCI_VERSION_10) ||
	    (hba->ufs_version == UFSHCI_VERSION_11))
J
Joao Pinto 已提交
2431
		lrbp->command_type = UTP_CMD_TYPE_SCSI;
2432 2433
	else
		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
J
Joao Pinto 已提交
2434 2435 2436 2437 2438 2439 2440 2441

	if (likely(lrbp->cmd)) {
		ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
						lrbp->cmd->sc_data_direction);
		ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
	} else {
		ret = -EINVAL;
	}
2442 2443

	return ret;
2444 2445
}

2446 2447
/**
 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2448
 * @upiu_wlun_id: UPIU W-LUN id
2449 2450 2451 2452 2453 2454 2455 2456
 *
 * Returns SCSI W-LUN id
 */
static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
{
	return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
}

2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477
static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
{
	struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
	struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
	dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
		i * sizeof(struct utp_transfer_cmd_desc);
	u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
				       response_upiu);
	u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);

	lrb->utr_descriptor_ptr = utrdlp + i;
	lrb->utrd_dma_addr = hba->utrdl_dma_addr +
		i * sizeof(struct utp_transfer_req_desc);
	lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
	lrb->ucd_req_dma_addr = cmd_desc_element_addr;
	lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
	lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
	lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
	lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
}

2478 2479
/**
 * ufshcd_queuecommand - main entry point for SCSI requests
2480
 * @host: SCSI host pointer
2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495
 * @cmd: command from SCSI Midlayer
 *
 * Returns 0 for success, non-zero in case of failure
 */
static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
{
	struct ufshcd_lrb *lrbp;
	struct ufs_hba *hba;
	unsigned long flags;
	int tag;
	int err = 0;

	hba = shost_priv(host);

	tag = cmd->request->tag;
2496 2497 2498 2499 2500 2501
	if (!ufshcd_valid_tag(hba, tag)) {
		dev_err(hba->dev,
			"%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
			__func__, tag, cmd, cmd->request);
		BUG();
	}
2502

2503 2504 2505
	if (!down_read_trylock(&hba->clk_scaling_lock))
		return SCSI_MLQUEUE_HOST_BUSY;

2506 2507 2508 2509
	spin_lock_irqsave(hba->host->host_lock, flags);
	switch (hba->ufshcd_state) {
	case UFSHCD_STATE_OPERATIONAL:
		break;
2510
	case UFSHCD_STATE_EH_SCHEDULED:
2511
	case UFSHCD_STATE_RESET:
2512
		err = SCSI_MLQUEUE_HOST_BUSY;
2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523
		goto out_unlock;
	case UFSHCD_STATE_ERROR:
		set_host_byte(cmd, DID_ERROR);
		cmd->scsi_done(cmd);
		goto out_unlock;
	default:
		dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
				__func__, hba->ufshcd_state);
		set_host_byte(cmd, DID_BAD_TARGET);
		cmd->scsi_done(cmd);
		goto out_unlock;
2524
	}
2525 2526 2527 2528 2529 2530 2531

	/* if error handling is in progress, don't issue commands */
	if (ufshcd_eh_in_progress(hba)) {
		set_host_byte(cmd, DID_ERROR);
		cmd->scsi_done(cmd);
		goto out_unlock;
	}
2532
	spin_unlock_irqrestore(hba->host->host_lock, flags);
2533

2534 2535
	hba->req_abort_count = 0;

2536 2537 2538 2539 2540 2541 2542
	err = ufshcd_hold(hba, true);
	if (err) {
		err = SCSI_MLQUEUE_HOST_BUSY;
		goto out;
	}
	WARN_ON(hba->clk_gating.state != CLKS_ON);

2543 2544
	lrbp = &hba->lrb[tag];

2545
	WARN_ON(lrbp->cmd);
2546
	lrbp->cmd = cmd;
2547
	lrbp->sense_bufflen = UFS_SENSE_SIZE;
2548 2549
	lrbp->sense_buffer = cmd->sense_buffer;
	lrbp->task_tag = tag;
2550
	lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2551
	lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2552 2553 2554

	ufshcd_prepare_lrbp_crypto(cmd->request, lrbp);

2555
	lrbp->req_abort_skip = false;
2556

J
Joao Pinto 已提交
2557 2558
	ufshcd_comp_scsi_upiu(hba, lrbp);

2559
	err = ufshcd_map_sg(hba, lrbp);
2560 2561
	if (err) {
		lrbp->cmd = NULL;
2562
		ufshcd_release(hba);
2563
		goto out;
2564
	}
2565 2566
	/* Make sure descriptors are ready before ringing the doorbell */
	wmb();
2567 2568 2569

	/* issue command to the controller */
	spin_lock_irqsave(hba->host->host_lock, flags);
B
Bart Van Assche 已提交
2570
	ufshcd_vops_setup_xfer_req(hba, tag, true);
2571
	ufshcd_send_command(hba, tag);
2572
out_unlock:
2573 2574
	spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
2575
	up_read(&hba->clk_scaling_lock);
2576 2577 2578
	return err;
}

2579 2580 2581 2582 2583 2584 2585 2586 2587
static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
		struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
{
	lrbp->cmd = NULL;
	lrbp->sense_bufflen = 0;
	lrbp->sense_buffer = NULL;
	lrbp->task_tag = tag;
	lrbp->lun = 0; /* device management cmd is not specific to any LUN */
	lrbp->intr_cmd = true; /* No interrupt aggregation */
2588
	ufshcd_prepare_lrbp_crypto(NULL, lrbp);
2589 2590
	hba->dev_cmd.type = cmd_type;

J
Joao Pinto 已提交
2591
	return ufshcd_comp_devman_upiu(hba, lrbp);
2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611
}

static int
ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
{
	int err = 0;
	unsigned long flags;
	u32 mask = 1 << tag;

	/* clear outstanding transaction before retry */
	spin_lock_irqsave(hba->host->host_lock, flags);
	ufshcd_utrl_clear(hba, tag);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	/*
	 * wait for for h/w to clear corresponding bit in door-bell.
	 * max. wait is 1 sec.
	 */
	err = ufshcd_wait_for_register(hba,
			REG_UTP_TRANSFER_REQ_DOOR_BELL,
2612
			mask, ~mask, 1000, 1000);
2613 2614 2615 2616

	return err;
}

2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627
static int
ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
	struct ufs_query_res *query_res = &hba->dev_cmd.query.response;

	/* Get the UPIU response */
	query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
				UPIU_RSP_CODE_OFFSET;
	return query_res->response;
}

2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638
/**
 * ufshcd_dev_cmd_completion() - handles device management command responses
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
 */
static int
ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
	int resp;
	int err = 0;

2639
	hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2640 2641 2642 2643 2644 2645 2646 2647 2648 2649
	resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);

	switch (resp) {
	case UPIU_TRANSACTION_NOP_IN:
		if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
			err = -EINVAL;
			dev_err(hba->dev, "%s: unexpected response %x\n",
					__func__, resp);
		}
		break;
2650
	case UPIU_TRANSACTION_QUERY_RSP:
2651 2652 2653
		err = ufshcd_check_query_response(hba, lrbp);
		if (!err)
			err = ufshcd_copy_query_response(hba, lrbp);
2654
		break;
2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680
	case UPIU_TRANSACTION_REJECT_UPIU:
		/* TODO: handle Reject UPIU Response */
		err = -EPERM;
		dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
				__func__);
		break;
	default:
		err = -EINVAL;
		dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
				__func__, resp);
		break;
	}

	return err;
}

static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
		struct ufshcd_lrb *lrbp, int max_timeout)
{
	int err = 0;
	unsigned long time_left;
	unsigned long flags;

	time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
			msecs_to_jiffies(max_timeout));

2681 2682
	/* Make sure descriptors are ready before ringing the doorbell */
	wmb();
2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693
	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->dev_cmd.complete = NULL;
	if (likely(time_left)) {
		err = ufshcd_get_tr_ocs(lrbp);
		if (!err)
			err = ufshcd_dev_cmd_completion(hba, lrbp);
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (!time_left) {
		err = -ETIMEDOUT;
2694 2695
		dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
			__func__, lrbp->task_tag);
2696
		if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2697
			/* successfully cleared the command, retry if needed */
2698
			err = -EAGAIN;
2699 2700 2701 2702 2703 2704
		/*
		 * in case of an error, after clearing the doorbell,
		 * we also need to clear the outstanding_request
		 * field in hba
		 */
		ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2705 2706 2707 2708 2709 2710 2711
	}

	return err;
}

/**
 * ufshcd_exec_dev_cmd - API for sending device management requests
2712 2713 2714
 * @hba: UFS hba
 * @cmd_type: specifies the type (NOP, Query...)
 * @timeout: time in seconds
2715
 *
2716 2717
 * NOTE: Since there is only one available tag for device management commands,
 * it is expected you hold the hba->dev_cmd.lock mutex.
2718 2719 2720 2721
 */
static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
		enum dev_cmd_type cmd_type, int timeout)
{
2722 2723
	struct request_queue *q = hba->cmd_queue;
	struct request *req;
2724 2725 2726 2727 2728 2729
	struct ufshcd_lrb *lrbp;
	int err;
	int tag;
	struct completion wait;
	unsigned long flags;

2730 2731
	down_read(&hba->clk_scaling_lock);

2732 2733 2734 2735 2736
	/*
	 * Get free slot, sleep if slots are unavailable.
	 * Even though we use wait_event() which sleeps indefinitely,
	 * the maximum wait time is bounded by SCSI request timeout.
	 */
2737
	req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
2738 2739 2740 2741
	if (IS_ERR(req)) {
		err = PTR_ERR(req);
		goto out_unlock;
	}
2742 2743
	tag = req->tag;
	WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
2744 2745 2746 2747 2748 2749 2750 2751 2752 2753

	init_completion(&wait);
	lrbp = &hba->lrb[tag];
	WARN_ON(lrbp->cmd);
	err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
	if (unlikely(err))
		goto out_put_tag;

	hba->dev_cmd.complete = &wait;

2754
	ufshcd_add_query_upiu_trace(hba, tag, "query_send");
2755 2756
	/* Make sure descriptors are ready before ringing the doorbell */
	wmb();
2757
	spin_lock_irqsave(hba->host->host_lock, flags);
B
Bart Van Assche 已提交
2758
	ufshcd_vops_setup_xfer_req(hba, tag, false);
2759 2760 2761 2762 2763
	ufshcd_send_command(hba, tag);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);

2764 2765 2766
	ufshcd_add_query_upiu_trace(hba, tag,
			err ? "query_complete_err" : "query_complete");

2767
out_put_tag:
2768
	blk_put_request(req);
2769
out_unlock:
2770
	up_read(&hba->clk_scaling_lock);
2771 2772 2773
	return err;
}

D
Dolev Raviv 已提交
2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793 2794 2795 2796 2797
/**
 * ufshcd_init_query() - init the query response and request parameters
 * @hba: per-adapter instance
 * @request: address of the request pointer to be initialized
 * @response: address of the response pointer to be initialized
 * @opcode: operation to perform
 * @idn: flag idn to access
 * @index: LU number to access
 * @selector: query/flag/descriptor further identification
 */
static inline void ufshcd_init_query(struct ufs_hba *hba,
		struct ufs_query_req **request, struct ufs_query_res **response,
		enum query_opcode opcode, u8 idn, u8 index, u8 selector)
{
	*request = &hba->dev_cmd.query.request;
	*response = &hba->dev_cmd.query.response;
	memset(*request, 0, sizeof(struct ufs_query_req));
	memset(*response, 0, sizeof(struct ufs_query_res));
	(*request)->upiu_req.opcode = opcode;
	(*request)->upiu_req.idn = idn;
	(*request)->upiu_req.index = index;
	(*request)->upiu_req.selector = selector;
}

2798
static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2799
	enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
2800 2801 2802 2803 2804
{
	int ret;
	int retries;

	for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2805
		ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820
		if (ret)
			dev_dbg(hba->dev,
				"%s: failed with error %d, retries %d\n",
				__func__, ret, retries);
		else
			break;
	}

	if (ret)
		dev_err(hba->dev,
			"%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
			__func__, opcode, idn, ret, retries);
	return ret;
}

2821 2822
/**
 * ufshcd_query_flag() - API function for sending flag query requests
2823 2824 2825
 * @hba: per-adapter instance
 * @opcode: flag query to perform
 * @idn: flag idn to access
2826
 * @index: flag index to access
2827
 * @flag_res: the flag value after the query request completes
2828 2829 2830
 *
 * Returns 0 for success, non-zero in case of failure
 */
2831
int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2832
			enum flag_idn idn, u8 index, bool *flag_res)
2833
{
D
Dolev Raviv 已提交
2834 2835
	struct ufs_query_req *request = NULL;
	struct ufs_query_res *response = NULL;
2836
	int err, selector = 0;
2837
	int timeout = QUERY_REQ_TIMEOUT;
2838 2839 2840

	BUG_ON(!hba);

2841
	ufshcd_hold(hba, false);
2842
	mutex_lock(&hba->dev_cmd.lock);
D
Dolev Raviv 已提交
2843 2844
	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
			selector);
2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869

	switch (opcode) {
	case UPIU_QUERY_OPCODE_SET_FLAG:
	case UPIU_QUERY_OPCODE_CLEAR_FLAG:
	case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
		break;
	case UPIU_QUERY_OPCODE_READ_FLAG:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
		if (!flag_res) {
			/* No dummy reads */
			dev_err(hba->dev, "%s: Invalid argument for read request\n",
					__func__);
			err = -EINVAL;
			goto out_unlock;
		}
		break;
	default:
		dev_err(hba->dev,
			"%s: Expected query flag opcode but got = %d\n",
			__func__, opcode);
		err = -EINVAL;
		goto out_unlock;
	}

2870
	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2871 2872 2873 2874 2875 2876 2877 2878 2879

	if (err) {
		dev_err(hba->dev,
			"%s: Sending flag query for idn %d failed, err = %d\n",
			__func__, idn, err);
		goto out_unlock;
	}

	if (flag_res)
2880
		*flag_res = (be32_to_cpu(response->upiu_res.value) &
2881 2882 2883 2884
				MASK_QUERY_UPIU_FLAG_LOC) & 0x1;

out_unlock:
	mutex_unlock(&hba->dev_cmd.lock);
2885
	ufshcd_release(hba);
2886 2887 2888
	return err;
}

2889 2890
/**
 * ufshcd_query_attr - API function for sending attribute requests
2891 2892 2893 2894 2895 2896
 * @hba: per-adapter instance
 * @opcode: attribute opcode
 * @idn: attribute idn to access
 * @index: index field
 * @selector: selector field
 * @attr_val: the attribute value after the query request completes
2897 2898 2899
 *
 * Returns 0 for success, non-zero in case of failure
*/
2900 2901
int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
		      enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2902
{
D
Dolev Raviv 已提交
2903 2904
	struct ufs_query_req *request = NULL;
	struct ufs_query_res *response = NULL;
2905 2906 2907 2908
	int err;

	BUG_ON(!hba);

2909
	ufshcd_hold(hba, false);
2910 2911 2912 2913 2914 2915 2916 2917
	if (!attr_val) {
		dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
				__func__, opcode);
		err = -EINVAL;
		goto out;
	}

	mutex_lock(&hba->dev_cmd.lock);
D
Dolev Raviv 已提交
2918 2919
	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
			selector);
2920 2921 2922 2923

	switch (opcode) {
	case UPIU_QUERY_OPCODE_WRITE_ATTR:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2924
		request->upiu_req.value = cpu_to_be32(*attr_val);
2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935
		break;
	case UPIU_QUERY_OPCODE_READ_ATTR:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
		break;
	default:
		dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
				__func__, opcode);
		err = -EINVAL;
		goto out_unlock;
	}

D
Dolev Raviv 已提交
2936
	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2937 2938

	if (err) {
2939 2940
		dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
				__func__, opcode, idn, index, err);
2941 2942 2943
		goto out_unlock;
	}

2944
	*attr_val = be32_to_cpu(response->upiu_res.value);
2945 2946 2947 2948

out_unlock:
	mutex_unlock(&hba->dev_cmd.lock);
out:
2949
	ufshcd_release(hba);
2950 2951 2952
	return err;
}

2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972
/**
 * ufshcd_query_attr_retry() - API function for sending query
 * attribute with retries
 * @hba: per-adapter instance
 * @opcode: attribute opcode
 * @idn: attribute idn to access
 * @index: index field
 * @selector: selector field
 * @attr_val: the attribute value after the query request
 * completes
 *
 * Returns 0 for success, non-zero in case of failure
*/
static int ufshcd_query_attr_retry(struct ufs_hba *hba,
	enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
	u32 *attr_val)
{
	int ret = 0;
	u32 retries;

2973
	for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989
		ret = ufshcd_query_attr(hba, opcode, idn, index,
						selector, attr_val);
		if (ret)
			dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
				__func__, ret, retries);
		else
			break;
	}

	if (ret)
		dev_err(hba->dev,
			"%s: query attribute, idn %d, failed with error %d after %d retires\n",
			__func__, idn, ret, QUERY_REQ_RETRIES);
	return ret;
}

2990
static int __ufshcd_query_descriptor(struct ufs_hba *hba,
D
Dolev Raviv 已提交
2991 2992 2993 2994 2995 2996 2997 2998 2999
			enum query_opcode opcode, enum desc_idn idn, u8 index,
			u8 selector, u8 *desc_buf, int *buf_len)
{
	struct ufs_query_req *request = NULL;
	struct ufs_query_res *response = NULL;
	int err;

	BUG_ON(!hba);

3000
	ufshcd_hold(hba, false);
D
Dolev Raviv 已提交
3001 3002 3003 3004 3005 3006 3007
	if (!desc_buf) {
		dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
				__func__, opcode);
		err = -EINVAL;
		goto out;
	}

3008
	if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
D
Dolev Raviv 已提交
3009 3010 3011 3012 3013 3014 3015 3016 3017 3018
		dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
				__func__, *buf_len);
		err = -EINVAL;
		goto out;
	}

	mutex_lock(&hba->dev_cmd.lock);
	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
			selector);
	hba->dev_cmd.query.descriptor = desc_buf;
3019
	request->upiu_req.length = cpu_to_be16(*buf_len);
D
Dolev Raviv 已提交
3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038

	switch (opcode) {
	case UPIU_QUERY_OPCODE_WRITE_DESC:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
		break;
	case UPIU_QUERY_OPCODE_READ_DESC:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
		break;
	default:
		dev_err(hba->dev,
				"%s: Expected query descriptor opcode but got = 0x%.2x\n",
				__func__, opcode);
		err = -EINVAL;
		goto out_unlock;
	}

	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);

	if (err) {
3039 3040
		dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
				__func__, opcode, idn, index, err);
D
Dolev Raviv 已提交
3041 3042 3043
		goto out_unlock;
	}

3044
	*buf_len = be16_to_cpu(response->upiu_res.length);
D
Dolev Raviv 已提交
3045 3046

out_unlock:
3047
	hba->dev_cmd.query.descriptor = NULL;
D
Dolev Raviv 已提交
3048 3049
	mutex_unlock(&hba->dev_cmd.lock);
out:
3050
	ufshcd_release(hba);
D
Dolev Raviv 已提交
3051 3052 3053
	return err;
}

3054
/**
3055 3056 3057 3058 3059 3060 3061 3062
 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
 * @hba: per-adapter instance
 * @opcode: attribute opcode
 * @idn: attribute idn to access
 * @index: index field
 * @selector: selector field
 * @desc_buf: the buffer that contains the descriptor
 * @buf_len: length parameter passed to the device
3063 3064 3065 3066 3067
 *
 * Returns 0 for success, non-zero in case of failure.
 * The buf_len parameter will contain, on return, the length parameter
 * received on the response.
 */
3068 3069 3070 3071 3072
int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
				  enum query_opcode opcode,
				  enum desc_idn idn, u8 index,
				  u8 selector,
				  u8 *desc_buf, int *buf_len)
3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086
{
	int err;
	int retries;

	for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
		err = __ufshcd_query_descriptor(hba, opcode, idn, index,
						selector, desc_buf, buf_len);
		if (!err || err == -EINVAL)
			break;
	}

	return err;
}

3087 3088 3089 3090 3091 3092
/**
 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
 * @hba: Pointer to adapter instance
 * @desc_id: descriptor idn value
 * @desc_len: mapped desc length (out)
 */
3093 3094
void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
				  int *desc_len)
3095
{
3096 3097
	if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 ||
	    desc_id == QUERY_DESC_IDN_RFU_1)
3098
		*desc_len = 0;
3099 3100
	else
		*desc_len = hba->desc_size[desc_id];
3101 3102 3103
}
EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);

3104
static void ufshcd_update_desc_length(struct ufs_hba *hba,
3105
				      enum desc_idn desc_id, int desc_index,
3106 3107 3108
				      unsigned char desc_len)
{
	if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE &&
3109 3110 3111 3112 3113 3114
	    desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT)
		/* For UFS 3.1, the normal unit descriptor is 10 bytes larger
		 * than the RPMB unit, however, both descriptors share the same
		 * desc_idn, to cover both unit descriptors with one length, we
		 * choose the normal unit descriptor length by desc_index.
		 */
3115 3116 3117
		hba->desc_size[desc_id] = desc_len;
}

3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128
/**
 * ufshcd_read_desc_param - read the specified descriptor parameter
 * @hba: Pointer to adapter instance
 * @desc_id: descriptor idn value
 * @desc_index: descriptor index
 * @param_offset: offset of the parameter to read
 * @param_read_buf: pointer to buffer where parameter would be read
 * @param_size: sizeof(param_read_buf)
 *
 * Return 0 in case of success, non-zero otherwise
 */
3129 3130 3131 3132 3133 3134
int ufshcd_read_desc_param(struct ufs_hba *hba,
			   enum desc_idn desc_id,
			   int desc_index,
			   u8 param_offset,
			   u8 *param_read_buf,
			   u8 param_size)
3135 3136 3137
{
	int ret;
	u8 *desc_buf;
3138
	int buff_len;
3139 3140
	bool is_kmalloc = true;

3141 3142
	/* Safety check */
	if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3143 3144
		return -EINVAL;

3145 3146 3147 3148 3149
	/* Get the length of descriptor */
	ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
	if (!buff_len) {
		dev_err(hba->dev, "%s: Failed to get desc length", __func__);
		return -EINVAL;
3150 3151 3152 3153
	}

	/* Check whether we need temp memory */
	if (param_offset != 0 || param_size < buff_len) {
3154 3155 3156
		desc_buf = kmalloc(buff_len, GFP_KERNEL);
		if (!desc_buf)
			return -ENOMEM;
3157 3158 3159
	} else {
		desc_buf = param_read_buf;
		is_kmalloc = false;
3160 3161
	}

3162
	/* Request for full descriptor */
3163
	ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3164 3165
					desc_id, desc_index, 0,
					desc_buf, &buff_len);
3166

3167 3168 3169
	if (ret) {
		dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
			__func__, desc_id, desc_index, param_offset, ret);
3170 3171 3172
		goto out;
	}

3173 3174 3175 3176 3177 3178 3179 3180
	/* Sanity check */
	if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
		dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
			__func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
		ret = -EINVAL;
		goto out;
	}

3181 3182
	/* Update descriptor length */
	buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
3183
	ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
3184

3185
	/* Check wherher we will not copy more data, than available */
3186 3187
	if (is_kmalloc && (param_offset + param_size) > buff_len)
		param_size = buff_len - param_offset;
3188

3189 3190 3191 3192 3193 3194 3195 3196
	if (is_kmalloc)
		memcpy(param_read_buf, &desc_buf[param_offset], param_size);
out:
	if (is_kmalloc)
		kfree(desc_buf);
	return ret;
}

3197 3198 3199 3200 3201 3202 3203 3204 3205 3206
/**
 * struct uc_string_id - unicode string
 *
 * @len: size of this descriptor inclusive
 * @type: descriptor type
 * @uc: unicode string character
 */
struct uc_string_id {
	u8 len;
	u8 type;
3207
	wchar_t uc[];
3208 3209 3210 3211 3212 3213 3214 3215
} __packed;

/* replace non-printable or non-ASCII characters with spaces */
static inline char ufshcd_remove_non_printable(u8 ch)
{
	return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
}

3216 3217 3218 3219
/**
 * ufshcd_read_string_desc - read string descriptor
 * @hba: pointer to adapter instance
 * @desc_index: descriptor index
3220 3221
 * @buf: pointer to buffer where descriptor would be read,
 *       the caller should free the memory.
3222
 * @ascii: if true convert from unicode to ascii characters
3223
 *         null terminated string.
3224
 *
3225 3226 3227 3228
 * Return:
 * *      string size on success.
 * *      -ENOMEM: on allocation failure
 * *      -EINVAL: on a wrong parameter
3229
 */
3230 3231
int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
			    u8 **buf, bool ascii)
3232
{
3233 3234 3235
	struct uc_string_id *uc_str;
	u8 *str;
	int ret;
3236

3237 3238
	if (!buf)
		return -EINVAL;
3239

3240 3241 3242
	uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
	if (!uc_str)
		return -ENOMEM;
3243

B
Bean Huo 已提交
3244 3245
	ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_STRING, desc_index, 0,
				     (u8 *)uc_str, QUERY_DESC_MAX_SIZE);
3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256
	if (ret < 0) {
		dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
			QUERY_REQ_RETRIES, ret);
		str = NULL;
		goto out;
	}

	if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
		dev_dbg(hba->dev, "String Desc is of zero length\n");
		str = NULL;
		ret = 0;
3257 3258 3259 3260
		goto out;
	}

	if (ascii) {
3261
		ssize_t ascii_len;
3262 3263
		int i;
		/* remove header and divide by 2 to move from UTF16 to UTF8 */
3264 3265 3266 3267
		ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
		str = kzalloc(ascii_len, GFP_KERNEL);
		if (!str) {
			ret = -ENOMEM;
3268
			goto out;
3269 3270 3271 3272 3273 3274
		}

		/*
		 * the descriptor contains string in UTF16 format
		 * we need to convert to utf-8 so it can be displayed
		 */
3275 3276 3277
		ret = utf16s_to_utf8s(uc_str->uc,
				      uc_str->len - QUERY_DESC_HDR_SIZE,
				      UTF16_BIG_ENDIAN, str, ascii_len);
3278 3279

		/* replace non-printable or non-ASCII characters with spaces */
3280 3281
		for (i = 0; i < ret; i++)
			str[i] = ufshcd_remove_non_printable(str[i]);
3282

3283 3284 3285
		str[ret++] = '\0';

	} else {
3286
		str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
3287 3288 3289 3290 3291
		if (!str) {
			ret = -ENOMEM;
			goto out;
		}
		ret = uc_str->len;
3292 3293
	}
out:
3294 3295 3296
	*buf = str;
	kfree(uc_str);
	return ret;
3297 3298
}

3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318
/**
 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
 * @hba: Pointer to adapter instance
 * @lun: lun id
 * @param_offset: offset of the parameter to read
 * @param_read_buf: pointer to buffer where parameter would be read
 * @param_size: sizeof(param_read_buf)
 *
 * Return 0 in case of success, non-zero otherwise
 */
static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
					      int lun,
					      enum unit_desc_param param_offset,
					      u8 *param_read_buf,
					      u32 param_size)
{
	/*
	 * Unit descriptors are only available for general purpose LUs (LUN id
	 * from 0 to 7) and RPMB Well known LU.
	 */
3319
	if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun))
3320 3321 3322 3323 3324 3325
		return -EOPNOTSUPP;

	return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
				      param_offset, param_read_buf, param_size);
}

3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350
static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
{
	int err = 0;
	u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;

	if (hba->dev_info.wspecversion >= 0x300) {
		err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
				QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
				&gating_wait);
		if (err)
			dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
					 err, gating_wait);

		if (gating_wait == 0) {
			gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
			dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
					 gating_wait);
		}

		hba->dev_info.clk_gating_wait_us = gating_wait;
	}

	return err;
}

3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369
/**
 * ufshcd_memory_alloc - allocate memory for host memory space data structures
 * @hba: per adapter instance
 *
 * 1. Allocate DMA memory for Command Descriptor array
 *	Each command descriptor consist of Command UPIU, Response UPIU and PRDT
 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
 *	(UTMRDL)
 * 4. Allocate memory for local reference block(lrb).
 *
 * Returns 0 for success, non-zero in case of failure
 */
static int ufshcd_memory_alloc(struct ufs_hba *hba)
{
	size_t utmrdl_size, utrdl_size, ucdl_size;

	/* Allocate memory for UTP command descriptors */
	ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3370 3371 3372 3373
	hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
						  ucdl_size,
						  &hba->ucdl_dma_addr,
						  GFP_KERNEL);
3374 3375 3376 3377 3378 3379 3380 3381 3382

	/*
	 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
	 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
	 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
	 * be aligned to 128 bytes as well
	 */
	if (!hba->ucdl_base_addr ||
	    WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3383
		dev_err(hba->dev,
3384 3385 3386 3387 3388 3389 3390 3391 3392
			"Command Descriptor Memory allocation failed\n");
		goto out;
	}

	/*
	 * Allocate memory for UTP Transfer descriptors
	 * UFSHCI requires 1024 byte alignment of UTRD
	 */
	utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3393 3394 3395 3396
	hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
						   utrdl_size,
						   &hba->utrdl_dma_addr,
						   GFP_KERNEL);
3397 3398
	if (!hba->utrdl_base_addr ||
	    WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3399
		dev_err(hba->dev,
3400 3401 3402 3403 3404 3405 3406 3407 3408
			"Transfer Descriptor Memory allocation failed\n");
		goto out;
	}

	/*
	 * Allocate memory for UTP Task Management descriptors
	 * UFSHCI requires 1024 byte alignment of UTMRD
	 */
	utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3409 3410 3411 3412
	hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
						    utmrdl_size,
						    &hba->utmrdl_dma_addr,
						    GFP_KERNEL);
3413 3414
	if (!hba->utmrdl_base_addr ||
	    WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3415
		dev_err(hba->dev,
3416 3417 3418 3419 3420
		"Task Management Descriptor Memory allocation failed\n");
		goto out;
	}

	/* Allocate memory for local reference block */
3421 3422
	hba->lrb = devm_kcalloc(hba->dev,
				hba->nutrs, sizeof(struct ufshcd_lrb),
3423
				GFP_KERNEL);
3424
	if (!hba->lrb) {
3425
		dev_err(hba->dev, "LRB Memory allocation failed\n");
3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475
		goto out;
	}
	return 0;
out:
	return -ENOMEM;
}

/**
 * ufshcd_host_memory_configure - configure local reference block with
 *				memory offsets
 * @hba: per adapter instance
 *
 * Configure Host memory space
 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
 * address.
 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
 * and PRDT offset.
 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
 * into local reference block.
 */
static void ufshcd_host_memory_configure(struct ufs_hba *hba)
{
	struct utp_transfer_req_desc *utrdlp;
	dma_addr_t cmd_desc_dma_addr;
	dma_addr_t cmd_desc_element_addr;
	u16 response_offset;
	u16 prdt_offset;
	int cmd_desc_size;
	int i;

	utrdlp = hba->utrdl_base_addr;

	response_offset =
		offsetof(struct utp_transfer_cmd_desc, response_upiu);
	prdt_offset =
		offsetof(struct utp_transfer_cmd_desc, prd_table);

	cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
	cmd_desc_dma_addr = hba->ucdl_dma_addr;

	for (i = 0; i < hba->nutrs; i++) {
		/* Configure UTRD with command descriptor base address */
		cmd_desc_element_addr =
				(cmd_desc_dma_addr + (cmd_desc_size * i));
		utrdlp[i].command_desc_base_addr_lo =
				cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
		utrdlp[i].command_desc_base_addr_hi =
				cpu_to_le32(upper_32_bits(cmd_desc_element_addr));

		/* Response upiu and prdt offset should be in double words */
3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490
		if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
			utrdlp[i].response_upiu_offset =
				cpu_to_le16(response_offset);
			utrdlp[i].prd_table_offset =
				cpu_to_le16(prdt_offset);
			utrdlp[i].response_upiu_length =
				cpu_to_le16(ALIGNED_UPIU_SIZE);
		} else {
			utrdlp[i].response_upiu_offset =
				cpu_to_le16(response_offset >> 2);
			utrdlp[i].prd_table_offset =
				cpu_to_le16(prdt_offset >> 2);
			utrdlp[i].response_upiu_length =
				cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
		}
3491

3492
		ufshcd_init_lrb(hba, &hba->lrb[i], i);
3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508
	}
}

/**
 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
 * @hba: per adapter instance
 *
 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
 * in order to initialize the Unipro link startup procedure.
 * Once the Unipro links are up, the device connected to the controller
 * is detected.
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_dme_link_startup(struct ufs_hba *hba)
{
3509 3510
	struct uic_command uic_cmd = {0};
	int ret;
3511

3512
	uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3513

3514 3515
	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
	if (ret)
3516
		dev_dbg(hba->dev,
3517 3518
			"dme-link-startup: error code %d\n", ret);
	return ret;
3519
}
3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565
/**
 * ufshcd_dme_reset - UIC command for DME_RESET
 * @hba: per adapter instance
 *
 * DME_RESET command is issued in order to reset UniPro stack.
 * This function now deals with cold reset.
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_dme_reset(struct ufs_hba *hba)
{
	struct uic_command uic_cmd = {0};
	int ret;

	uic_cmd.command = UIC_CMD_DME_RESET;

	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
	if (ret)
		dev_err(hba->dev,
			"dme-reset: error code %d\n", ret);

	return ret;
}

/**
 * ufshcd_dme_enable - UIC command for DME_ENABLE
 * @hba: per adapter instance
 *
 * DME_ENABLE command is issued in order to enable UniPro stack.
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_dme_enable(struct ufs_hba *hba)
{
	struct uic_command uic_cmd = {0};
	int ret;

	uic_cmd.command = UIC_CMD_DME_ENABLE;

	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
	if (ret)
		dev_err(hba->dev,
			"dme-reset: error code %d\n", ret);

	return ret;
}
3566

3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597
static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
{
	#define MIN_DELAY_BEFORE_DME_CMDS_US	1000
	unsigned long min_sleep_time_us;

	if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
		return;

	/*
	 * last_dme_cmd_tstamp will be 0 only for 1st call to
	 * this function
	 */
	if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
		min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
	} else {
		unsigned long delta =
			(unsigned long) ktime_to_us(
				ktime_sub(ktime_get(),
				hba->last_dme_cmd_tstamp));

		if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
			min_sleep_time_us =
				MIN_DELAY_BEFORE_DME_CMDS_US - delta;
		else
			return; /* no more delay required */
	}

	/* allow sleep for extra 50us if needed */
	usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
}

3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617
/**
 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
 * @hba: per adapter instance
 * @attr_sel: uic command argument1
 * @attr_set: attribute set type as uic command argument2
 * @mib_val: setting value as uic command argument3
 * @peer: indicate whether peer or local
 *
 * Returns 0 on success, non-zero value on failure
 */
int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
			u8 attr_set, u32 mib_val, u8 peer)
{
	struct uic_command uic_cmd = {0};
	static const char *const action[] = {
		"dme-set",
		"dme-peer-set"
	};
	const char *set = action[!!peer];
	int ret;
3618
	int retries = UFS_UIC_COMMAND_RETRIES;
3619 3620 3621 3622 3623 3624 3625

	uic_cmd.command = peer ?
		UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
	uic_cmd.argument1 = attr_sel;
	uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
	uic_cmd.argument3 = mib_val;

3626 3627 3628 3629 3630 3631 3632 3633
	do {
		/* for peer attributes we retry upon failure */
		ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
		if (ret)
			dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
				set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
	} while (ret && peer && --retries);

3634
	if (ret)
3635
		dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3636 3637
			set, UIC_GET_ATTR_ID(attr_sel), mib_val,
			UFS_UIC_COMMAND_RETRIES - retries);
3638 3639 3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661

	return ret;
}
EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);

/**
 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
 * @hba: per adapter instance
 * @attr_sel: uic command argument1
 * @mib_val: the value of the attribute as returned by the UIC command
 * @peer: indicate whether peer or local
 *
 * Returns 0 on success, non-zero value on failure
 */
int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
			u32 *mib_val, u8 peer)
{
	struct uic_command uic_cmd = {0};
	static const char *const action[] = {
		"dme-get",
		"dme-peer-get"
	};
	const char *get = action[!!peer];
	int ret;
3662
	int retries = UFS_UIC_COMMAND_RETRIES;
3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687
	struct ufs_pa_layer_attr orig_pwr_info;
	struct ufs_pa_layer_attr temp_pwr_info;
	bool pwr_mode_change = false;

	if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
		orig_pwr_info = hba->pwr_info;
		temp_pwr_info = orig_pwr_info;

		if (orig_pwr_info.pwr_tx == FAST_MODE ||
		    orig_pwr_info.pwr_rx == FAST_MODE) {
			temp_pwr_info.pwr_tx = FASTAUTO_MODE;
			temp_pwr_info.pwr_rx = FASTAUTO_MODE;
			pwr_mode_change = true;
		} else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
		    orig_pwr_info.pwr_rx == SLOW_MODE) {
			temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
			temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
			pwr_mode_change = true;
		}
		if (pwr_mode_change) {
			ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
			if (ret)
				goto out;
		}
	}
3688 3689 3690 3691 3692

	uic_cmd.command = peer ?
		UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
	uic_cmd.argument1 = attr_sel;

3693 3694 3695 3696 3697 3698 3699 3700
	do {
		/* for peer attributes we retry upon failure */
		ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
		if (ret)
			dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
				get, UIC_GET_ATTR_ID(attr_sel), ret);
	} while (ret && peer && --retries);

3701
	if (ret)
3702
		dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3703 3704
			get, UIC_GET_ATTR_ID(attr_sel),
			UFS_UIC_COMMAND_RETRIES - retries);
3705

3706
	if (mib_val && !ret)
3707
		*mib_val = uic_cmd.argument3;
3708 3709 3710 3711

	if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
	    && pwr_mode_change)
		ufshcd_change_power_mode(hba, &orig_pwr_info);
3712 3713 3714 3715 3716
out:
	return ret;
}
EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);

3717
/**
3718 3719 3720
 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
 * state) and waits for it to take effect.
 *
3721
 * @hba: per adapter instance
3722 3723 3724 3725 3726 3727 3728 3729
 * @cmd: UIC command to execute
 *
 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
 * and device UniPro link and hence it's final completion would be indicated by
 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
 * addition to normal UIC command completion Status (UCCS). This function only
 * returns after the relevant status bits indicate the completion.
3730 3731 3732
 *
 * Returns 0 on success, non-zero value on failure
 */
3733
static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3734
{
3735
	struct completion uic_async_done;
3736 3737 3738
	unsigned long flags;
	u8 status;
	int ret;
3739
	bool reenable_intr = false;
3740 3741

	mutex_lock(&hba->uic_cmd_mutex);
3742
	init_completion(&uic_async_done);
3743
	ufshcd_add_delay_before_dme_cmd(hba);
3744 3745

	spin_lock_irqsave(hba->host->host_lock, flags);
3746
	hba->uic_async_done = &uic_async_done;
3747 3748 3749 3750 3751 3752 3753 3754
	if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
		ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
		/*
		 * Make sure UIC command completion interrupt is disabled before
		 * issuing UIC command.
		 */
		wmb();
		reenable_intr = true;
3755
	}
3756 3757
	ret = __ufshcd_send_uic_cmd(hba, cmd, false);
	spin_unlock_irqrestore(hba->host->host_lock, flags);
3758 3759 3760 3761
	if (ret) {
		dev_err(hba->dev,
			"pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
			cmd->command, cmd->argument3, ret);
3762 3763 3764
		goto out;
	}

3765
	if (!wait_for_completion_timeout(hba->uic_async_done,
3766 3767
					 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
		dev_err(hba->dev,
3768 3769
			"pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
			cmd->command, cmd->argument3);
3770 3771 3772 3773 3774 3775 3776
		ret = -ETIMEDOUT;
		goto out;
	}

	status = ufshcd_get_upmcrs(hba);
	if (status != PWR_LOCAL) {
		dev_err(hba->dev,
Z
Zang Leigang 已提交
3777
			"pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3778
			cmd->command, status);
3779 3780 3781
		ret = (status != PWR_OK) ? status : -1;
	}
out:
3782 3783 3784 3785 3786 3787
	if (ret) {
		ufshcd_print_host_state(hba);
		ufshcd_print_pwr_info(hba);
		ufshcd_print_host_regs(hba);
	}

3788
	spin_lock_irqsave(hba->host->host_lock, flags);
3789
	hba->active_uic_cmd = NULL;
3790
	hba->uic_async_done = NULL;
3791 3792
	if (reenable_intr)
		ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3793 3794
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	mutex_unlock(&hba->uic_cmd_mutex);
3795

3796 3797 3798
	return ret;
}

3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809
/**
 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
 *				using DME_SET primitives.
 * @hba: per adapter instance
 * @mode: powr mode value
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
{
	struct uic_command uic_cmd = {0};
3810
	int ret;
3811

3812 3813 3814 3815 3816 3817 3818 3819 3820 3821
	if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
		ret = ufshcd_dme_set(hba,
				UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
		if (ret) {
			dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
						__func__, ret);
			goto out;
		}
	}

3822 3823 3824
	uic_cmd.command = UIC_CMD_DME_SET;
	uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
	uic_cmd.argument3 = mode;
3825 3826 3827
	ufshcd_hold(hba, false);
	ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
	ufshcd_release(hba);
3828

3829
out:
3830
	return ret;
3831 3832
}

3833
int ufshcd_link_recovery(struct ufs_hba *hba)
3834 3835 3836 3837 3838 3839 3840 3841 3842
{
	int ret;
	unsigned long flags;

	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->ufshcd_state = UFSHCD_STATE_RESET;
	ufshcd_set_eh_in_progress(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

3843 3844 3845
	/* Reset the attached device */
	ufshcd_vops_device_reset(hba);

3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859
	ret = ufshcd_host_reset_and_restore(hba);

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (ret)
		hba->ufshcd_state = UFSHCD_STATE_ERROR;
	ufshcd_clear_eh_in_progress(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (ret)
		dev_err(hba->dev, "%s: link recovery failed, err %d",
			__func__, ret);

	return ret;
}
3860
EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
3861

3862
static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3863
{
3864
	int ret;
3865
	struct uic_command uic_cmd = {0};
3866
	ktime_t start = ktime_get();
3867

3868 3869
	ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);

3870
	uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3871
	ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3872 3873
	trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
			     ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3874

3875
	if (ret) {
3876 3877
		int err;

3878 3879 3880
		dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
			__func__, ret);

3881
		/*
3882 3883 3884 3885
		 * If link recovery fails then return error code returned from
		 * ufshcd_link_recovery().
		 * If link recovery succeeds then return -EAGAIN to attempt
		 * hibern8 enter retry again.
3886
		 */
3887 3888 3889 3890 3891 3892 3893
		err = ufshcd_link_recovery(hba);
		if (err) {
			dev_err(hba->dev, "%s: link recovery failed", __func__);
			ret = err;
		} else {
			ret = -EAGAIN;
		}
3894 3895 3896
	} else
		ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
								POST_CHANGE);
3897

3898 3899 3900 3901 3902 3903
	return ret;
}

static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
{
	int ret = 0, retries;
3904

3905 3906
	for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
		ret = __ufshcd_uic_hibern8_enter(hba);
3907
		if (!ret)
3908 3909 3910 3911
			goto out;
	}
out:
	return ret;
3912 3913
}

3914
int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3915 3916 3917
{
	struct uic_command uic_cmd = {0};
	int ret;
3918
	ktime_t start = ktime_get();
3919

3920 3921
	ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);

3922 3923
	uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
	ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3924 3925 3926
	trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
			     ktime_to_us(ktime_sub(ktime_get(), start)), ret);

3927
	if (ret) {
3928 3929 3930
		dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
			__func__, ret);
		ret = ufshcd_link_recovery(hba);
3931
	} else {
3932 3933
		ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
								POST_CHANGE);
3934 3935 3936
		hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
		hba->ufs_stats.hibern8_exit_cnt++;
	}
3937 3938 3939

	return ret;
}
3940
EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
3941

3942 3943 3944
void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
{
	unsigned long flags;
3945
	bool update = false;
3946

3947
	if (!ufshcd_is_auto_hibern8_supported(hba))
3948 3949 3950
		return;

	spin_lock_irqsave(hba->host->host_lock, flags);
3951 3952 3953 3954
	if (hba->ahit != ahit) {
		hba->ahit = ahit;
		update = true;
	}
3955
	spin_unlock_irqrestore(hba->host->host_lock, flags);
3956 3957 3958 3959 3960 3961 3962 3963

	if (update && !pm_runtime_suspended(hba->dev)) {
		pm_runtime_get_sync(hba->dev);
		ufshcd_hold(hba, false);
		ufshcd_auto_hibern8_enable(hba);
		ufshcd_release(hba);
		pm_runtime_put(hba->dev);
	}
3964 3965 3966
}
EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);

3967
void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3968 3969 3970
{
	unsigned long flags;

3971
	if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
3972 3973 3974 3975 3976 3977 3978
		return;

	spin_lock_irqsave(hba->host->host_lock, flags);
	ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
	spin_unlock_irqrestore(hba->host->host_lock, flags);
}

3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994
 /**
 * ufshcd_init_pwr_info - setting the POR (power on reset)
 * values in hba power info
 * @hba: per-adapter instance
 */
static void ufshcd_init_pwr_info(struct ufs_hba *hba)
{
	hba->pwr_info.gear_rx = UFS_PWM_G1;
	hba->pwr_info.gear_tx = UFS_PWM_G1;
	hba->pwr_info.lane_rx = 1;
	hba->pwr_info.lane_tx = 1;
	hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
	hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
	hba->pwr_info.hs_rate = 0;
}

3995
/**
D
Dolev Raviv 已提交
3996 3997
 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
 * @hba: per-adapter instance
3998
 */
D
Dolev Raviv 已提交
3999
static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
4000
{
D
Dolev Raviv 已提交
4001 4002 4003 4004 4005
	struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;

	if (hba->max_pwr_info.is_valid)
		return 0;

4006 4007
	pwr_info->pwr_tx = FAST_MODE;
	pwr_info->pwr_rx = FAST_MODE;
D
Dolev Raviv 已提交
4008
	pwr_info->hs_rate = PA_HS_MODE_B;
4009 4010

	/* Get the connected lane count */
D
Dolev Raviv 已提交
4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022
	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
			&pwr_info->lane_rx);
	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
			&pwr_info->lane_tx);

	if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
		dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
				__func__,
				pwr_info->lane_rx,
				pwr_info->lane_tx);
		return -EINVAL;
	}
4023 4024 4025 4026 4027 4028

	/*
	 * First, get the maximum gears of HS speed.
	 * If a zero value, it means there is no HSGEAR capability.
	 * Then, get the maximum gears of PWM speed.
	 */
D
Dolev Raviv 已提交
4029 4030 4031 4032 4033 4034 4035 4036 4037
	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
	if (!pwr_info->gear_rx) {
		ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
				&pwr_info->gear_rx);
		if (!pwr_info->gear_rx) {
			dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
				__func__, pwr_info->gear_rx);
			return -EINVAL;
		}
4038
		pwr_info->pwr_rx = SLOW_MODE;
4039 4040
	}

D
Dolev Raviv 已提交
4041 4042 4043
	ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
			&pwr_info->gear_tx);
	if (!pwr_info->gear_tx) {
4044
		ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
D
Dolev Raviv 已提交
4045 4046 4047 4048 4049 4050
				&pwr_info->gear_tx);
		if (!pwr_info->gear_tx) {
			dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
				__func__, pwr_info->gear_tx);
			return -EINVAL;
		}
4051
		pwr_info->pwr_tx = SLOW_MODE;
D
Dolev Raviv 已提交
4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072
	}

	hba->max_pwr_info.is_valid = true;
	return 0;
}

static int ufshcd_change_power_mode(struct ufs_hba *hba,
			     struct ufs_pa_layer_attr *pwr_mode)
{
	int ret;

	/* if already configured to the requested pwr_mode */
	if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
	    pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
	    pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
	    pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
	    pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
	    pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
	    pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
		dev_dbg(hba->dev, "%s: power already configured\n", __func__);
		return 0;
4073 4074 4075 4076 4077 4078 4079 4080
	}

	/*
	 * Configure attributes for power mode change with below.
	 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
	 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
	 * - PA_HSSERIES
	 */
D
Dolev Raviv 已提交
4081 4082 4083 4084 4085
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
			pwr_mode->lane_rx);
	if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
			pwr_mode->pwr_rx == FAST_MODE)
4086
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
D
Dolev Raviv 已提交
4087 4088
	else
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4089

D
Dolev Raviv 已提交
4090 4091 4092 4093 4094
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
			pwr_mode->lane_tx);
	if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
			pwr_mode->pwr_tx == FAST_MODE)
4095
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
D
Dolev Raviv 已提交
4096 4097
	else
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4098

D
Dolev Raviv 已提交
4099 4100 4101 4102 4103 4104
	if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
	    pwr_mode->pwr_tx == FASTAUTO_MODE ||
	    pwr_mode->pwr_rx == FAST_MODE ||
	    pwr_mode->pwr_tx == FAST_MODE)
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
						pwr_mode->hs_rate);
4105

4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
			DL_FC0ProtectionTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
			DL_TC0ReplayTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
			DL_AFC0ReqTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
			DL_FC1ProtectionTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
			DL_TC1ReplayTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
			DL_AFC1ReqTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
			DL_FC0ProtectionTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
			DL_TC0ReplayTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
			DL_AFC0ReqTimeOutVal_Default);

D
Dolev Raviv 已提交
4126 4127 4128 4129
	ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
			| pwr_mode->pwr_tx);

	if (ret) {
4130
		dev_err(hba->dev,
D
Dolev Raviv 已提交
4131 4132
			"%s: power mode change failed %d\n", __func__, ret);
	} else {
4133 4134
		ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
								pwr_mode);
D
Dolev Raviv 已提交
4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147

		memcpy(&hba->pwr_info, pwr_mode,
			sizeof(struct ufs_pa_layer_attr));
	}

	return ret;
}

/**
 * ufshcd_config_pwr_mode - configure a new power mode
 * @hba: per-adapter instance
 * @desired_pwr_mode: desired power configuration
 */
4148
int ufshcd_config_pwr_mode(struct ufs_hba *hba,
D
Dolev Raviv 已提交
4149 4150 4151 4152 4153
		struct ufs_pa_layer_attr *desired_pwr_mode)
{
	struct ufs_pa_layer_attr final_params = { 0 };
	int ret;

4154 4155 4156 4157
	ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
					desired_pwr_mode, &final_params);

	if (ret)
D
Dolev Raviv 已提交
4158 4159 4160
		memcpy(&final_params, desired_pwr_mode, sizeof(final_params));

	ret = ufshcd_change_power_mode(hba, &final_params);
4161 4162 4163

	return ret;
}
4164
EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4165

4166 4167
/**
 * ufshcd_complete_dev_init() - checks device readiness
4168
 * @hba: per-adapter instance
4169 4170 4171 4172 4173
 *
 * Set fDeviceInit flag and poll until device toggles it.
 */
static int ufshcd_complete_dev_init(struct ufs_hba *hba)
{
4174 4175
	int i;
	int err;
4176
	bool flag_res = true;
4177

4178
	err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4179
		QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
4180 4181 4182 4183 4184 4185 4186
	if (err) {
		dev_err(hba->dev,
			"%s setting fDeviceInit flag failed with error %d\n",
			__func__, err);
		goto out;
	}

4187 4188 4189
	/* poll for max. 1000 iterations for fDeviceInit flag to clear */
	for (i = 0; i < 1000 && !err && flag_res; i++)
		err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4190
			QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4191

4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204
	if (err)
		dev_err(hba->dev,
			"%s reading fDeviceInit flag failed with error %d\n",
			__func__, err);
	else if (flag_res)
		dev_err(hba->dev,
			"%s fDeviceInit was not cleared by the device\n",
			__func__);

out:
	return err;
}

4205 4206 4207 4208 4209
/**
 * ufshcd_make_hba_operational - Make UFS controller operational
 * @hba: per adapter instance
 *
 * To bring UFS host controller to operational state,
4210 4211
 * 1. Enable required interrupts
 * 2. Configure interrupt aggregation
4212
 * 3. Program UTRL and UTMRL base address
4213
 * 4. Configure run-stop-registers
4214 4215 4216
 *
 * Returns 0 on success, non-zero value on failure
 */
4217
int ufshcd_make_hba_operational(struct ufs_hba *hba)
4218 4219 4220 4221
{
	int err = 0;
	u32 reg;

4222 4223 4224 4225
	/* Enable required interrupts */
	ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);

	/* Configure interrupt aggregation */
4226 4227 4228 4229
	if (ufshcd_is_intr_aggr_allowed(hba))
		ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
	else
		ufshcd_disable_intr_aggr(hba);
4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240

	/* Configure UTRL and UTMRL base address registers */
	ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
			REG_UTP_TRANSFER_REQ_LIST_BASE_L);
	ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
			REG_UTP_TRANSFER_REQ_LIST_BASE_H);
	ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
			REG_UTP_TASK_REQ_LIST_BASE_L);
	ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
			REG_UTP_TASK_REQ_LIST_BASE_H);

4241 4242 4243 4244 4245 4246
	/*
	 * Make sure base address and interrupt setup are updated before
	 * enabling the run/stop registers below.
	 */
	wmb();

4247 4248 4249
	/*
	 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
	 */
4250
	reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4251 4252 4253
	if (!(ufshcd_get_lists_status(reg))) {
		ufshcd_enable_run_stop_reg(hba);
	} else {
4254
		dev_err(hba->dev,
4255 4256 4257 4258 4259 4260 4261 4262
			"Host controller not ready to process requests");
		err = -EIO;
		goto out;
	}

out:
	return err;
}
4263
EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
4264

4265 4266 4267 4268
/**
 * ufshcd_hba_stop - Send controller to reset state
 * @hba: per adapter instance
 */
4269
static inline void ufshcd_hba_stop(struct ufs_hba *hba)
4270
{
4271
	unsigned long flags;
4272 4273
	int err;

4274 4275 4276 4277 4278
	/*
	 * Obtain the host lock to prevent that the controller is disabled
	 * while the UFS interrupt handler is active on another CPU.
	 */
	spin_lock_irqsave(hba->host->host_lock, flags);
4279
	ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
4280 4281
	spin_unlock_irqrestore(hba->host->host_lock, flags);

4282 4283
	err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
					CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4284
					10, 1);
4285 4286 4287 4288
	if (err)
		dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
}

4289
/**
4290
 * ufshcd_hba_execute_hce - initialize the controller
4291 4292 4293 4294 4295 4296 4297 4298
 * @hba: per adapter instance
 *
 * The controller resets itself and controller firmware initialization
 * sequence kicks off. When controller is ready it will set
 * the Host Controller Enable bit to 1.
 *
 * Returns 0 on success, non-zero value on failure
 */
4299
static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4300 4301 4302
{
	int retry;

4303
	if (!ufshcd_is_hba_active(hba))
4304
		/* change controller state to "reset state" */
4305
		ufshcd_hba_stop(hba);
4306

4307 4308 4309
	/* UniPro link is disabled at this point */
	ufshcd_set_link_off(hba);

4310
	ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4311

4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324
	/* start controller initialization sequence */
	ufshcd_hba_start(hba);

	/*
	 * To initialize a UFS host controller HCE bit must be set to 1.
	 * During initialization the HCE bit value changes from 1->0->1.
	 * When the host controller completes initialization sequence
	 * it sets the value of HCE bit to 1. The same HCE bit is read back
	 * to check if the controller has completed initialization sequence.
	 * So without this delay the value HCE = 1, set in the previous
	 * instruction might be read back.
	 * This delay can be changed based on the controller.
	 */
4325
	ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
4326 4327

	/* wait for the host controller to complete initialization */
4328
	retry = 50;
4329 4330 4331 4332
	while (ufshcd_is_hba_active(hba)) {
		if (retry) {
			retry--;
		} else {
4333
			dev_err(hba->dev,
4334 4335 4336
				"Controller enable failed\n");
			return -EIO;
		}
4337
		usleep_range(1000, 1100);
4338
	}
4339

S
Sujit Reddy Thumma 已提交
4340
	/* enable UIC related interrupts */
4341
	ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
S
Sujit Reddy Thumma 已提交
4342

4343
	ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4344

4345 4346
	return 0;
}
4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372

int ufshcd_hba_enable(struct ufs_hba *hba)
{
	int ret;

	if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
		ufshcd_set_link_off(hba);
		ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);

		/* enable UIC related interrupts */
		ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
		ret = ufshcd_dme_reset(hba);
		if (!ret) {
			ret = ufshcd_dme_enable(hba);
			if (!ret)
				ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
			if (ret)
				dev_err(hba->dev,
					"Host controller enable failed with non-hce\n");
		}
	} else {
		ret = ufshcd_hba_execute_hce(hba);
	}

	return ret;
}
4373 4374
EXPORT_SYMBOL_GPL(ufshcd_hba_enable);

4375 4376
static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
{
4377
	int tx_lanes = 0, i, err = 0;
4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410

	if (!peer)
		ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
			       &tx_lanes);
	else
		ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
				    &tx_lanes);
	for (i = 0; i < tx_lanes; i++) {
		if (!peer)
			err = ufshcd_dme_set(hba,
				UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
					UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
					0);
		else
			err = ufshcd_dme_peer_set(hba,
				UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
					UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
					0);
		if (err) {
			dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
				__func__, peer, i, err);
			break;
		}
	}

	return err;
}

static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
{
	return ufshcd_disable_tx_lcc(hba, true);
}

4411 4412
void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
			    u32 reg)
4413 4414 4415 4416 4417
{
	reg_hist->reg[reg_hist->pos] = reg;
	reg_hist->tstamp[reg_hist->pos] = ktime_get();
	reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
}
4418
EXPORT_SYMBOL_GPL(ufshcd_update_reg_hist);
4419

4420
/**
4421
 * ufshcd_link_startup - Initialize unipro link startup
4422 4423
 * @hba: per adapter instance
 *
4424
 * Returns 0 for success, non-zero in case of failure
4425
 */
4426
static int ufshcd_link_startup(struct ufs_hba *hba)
4427
{
4428
	int ret;
S
Sujit Reddy Thumma 已提交
4429
	int retries = DME_LINKSTARTUP_RETRIES;
4430
	bool link_startup_again = false;
4431

4432 4433 4434 4435 4436 4437
	/*
	 * If UFS device isn't active then we will have to issue link startup
	 * 2 times to make sure the device state move to active.
	 */
	if (!ufshcd_is_ufs_dev_active(hba))
		link_startup_again = true;
4438

4439
link_startup:
S
Sujit Reddy Thumma 已提交
4440
	do {
4441
		ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4442

S
Sujit Reddy Thumma 已提交
4443
		ret = ufshcd_dme_link_startup(hba);
4444

S
Sujit Reddy Thumma 已提交
4445 4446
		/* check if device is detected by inter-connect layer */
		if (!ret && !ufshcd_is_device_present(hba)) {
4447 4448
			ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
					       0);
S
Sujit Reddy Thumma 已提交
4449 4450 4451 4452
			dev_err(hba->dev, "%s: Device not present\n", __func__);
			ret = -ENXIO;
			goto out;
		}
4453

S
Sujit Reddy Thumma 已提交
4454 4455 4456 4457 4458
		/*
		 * DME link lost indication is only received when link is up,
		 * but we can't be sure if the link is up until link startup
		 * succeeds. So reset the local Uni-Pro and try again.
		 */
4459 4460 4461
		if (ret && ufshcd_hba_enable(hba)) {
			ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
					       (u32)ret);
S
Sujit Reddy Thumma 已提交
4462
			goto out;
4463
		}
S
Sujit Reddy Thumma 已提交
4464 4465
	} while (ret && retries--);

4466
	if (ret) {
S
Sujit Reddy Thumma 已提交
4467
		/* failed to get the link up... retire */
4468 4469
		ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
				       (u32)ret);
4470
		goto out;
4471
	}
4472

4473 4474 4475 4476 4477 4478
	if (link_startup_again) {
		link_startup_again = false;
		retries = DME_LINKSTARTUP_RETRIES;
		goto link_startup;
	}

4479 4480 4481 4482
	/* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
	ufshcd_init_pwr_info(hba);
	ufshcd_print_pwr_info(hba);

4483 4484 4485 4486 4487 4488
	if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
		ret = ufshcd_disable_device_tx_lcc(hba);
		if (ret)
			goto out;
	}

4489
	/* Include any host controller configuration via UIC commands */
4490 4491 4492
	ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
	if (ret)
		goto out;
4493

4494
	ret = ufshcd_make_hba_operational(hba);
4495
out:
4496
	if (ret) {
4497
		dev_err(hba->dev, "link startup failed %d\n", ret);
4498 4499 4500 4501
		ufshcd_print_host_state(hba);
		ufshcd_print_pwr_info(hba);
		ufshcd_print_host_regs(hba);
	}
4502
	return ret;
4503 4504
}

4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519
/**
 * ufshcd_verify_dev_init() - Verify device initialization
 * @hba: per-adapter instance
 *
 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
 * device Transport Protocol (UTP) layer is ready after a reset.
 * If the UTP layer at the device side is not initialized, it may
 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
 */
static int ufshcd_verify_dev_init(struct ufs_hba *hba)
{
	int err = 0;
	int retries;

4520
	ufshcd_hold(hba, false);
4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531
	mutex_lock(&hba->dev_cmd.lock);
	for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
		err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
					       NOP_OUT_TIMEOUT);

		if (!err || err == -ETIMEDOUT)
			break;

		dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
	}
	mutex_unlock(&hba->dev_cmd.lock);
4532
	ufshcd_release(hba);
4533 4534 4535 4536 4537 4538

	if (err)
		dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
	return err;
}

4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556
/**
 * ufshcd_set_queue_depth - set lun queue depth
 * @sdev: pointer to SCSI device
 *
 * Read bLUQueueDepth value and activate scsi tagged command
 * queueing. For WLUN, queue depth is set to 1. For best-effort
 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
 * value that host can queue.
 */
static void ufshcd_set_queue_depth(struct scsi_device *sdev)
{
	int ret = 0;
	u8 lun_qdepth;
	struct ufs_hba *hba;

	hba = shost_priv(sdev->host);

	lun_qdepth = hba->nutrs;
4557 4558 4559 4560 4561
	ret = ufshcd_read_unit_desc_param(hba,
					  ufshcd_scsi_to_upiu_lun(sdev->lun),
					  UNIT_DESC_PARAM_LU_Q_DEPTH,
					  &lun_qdepth,
					  sizeof(lun_qdepth));
4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573

	/* Some WLUN doesn't support unit descriptor */
	if (ret == -EOPNOTSUPP)
		lun_qdepth = 1;
	else if (!lun_qdepth)
		/* eventually, we can figure out the real queue depth */
		lun_qdepth = hba->nutrs;
	else
		lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);

	dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
			__func__, lun_qdepth);
4574
	scsi_change_queue_depth(sdev, lun_qdepth);
4575 4576
}

4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600
/*
 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
 * @hba: per-adapter instance
 * @lun: UFS device lun id
 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
 *
 * Returns 0 in case of success and b_lu_write_protect status would be returned
 * @b_lu_write_protect parameter.
 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
 * Returns -EINVAL in case of invalid parameters passed to this function.
 */
static int ufshcd_get_lu_wp(struct ufs_hba *hba,
			    u8 lun,
			    u8 *b_lu_write_protect)
{
	int ret;

	if (!b_lu_write_protect)
		ret = -EINVAL;
	/*
	 * According to UFS device spec, RPMB LU can't be write
	 * protected so skip reading bLUWriteProtect parameter for
	 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
	 */
4601
	else if (lun >= hba->dev_info.max_lu_supported)
4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632
		ret = -ENOTSUPP;
	else
		ret = ufshcd_read_unit_desc_param(hba,
					  lun,
					  UNIT_DESC_PARAM_LU_WR_PROTECT,
					  b_lu_write_protect,
					  sizeof(*b_lu_write_protect));
	return ret;
}

/**
 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
 * status
 * @hba: per-adapter instance
 * @sdev: pointer to SCSI device
 *
 */
static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
						    struct scsi_device *sdev)
{
	if (hba->dev_info.f_power_on_wp_en &&
	    !hba->dev_info.is_lu_power_on_wp) {
		u8 b_lu_write_protect;

		if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
				      &b_lu_write_protect) &&
		    (b_lu_write_protect == UFS_LU_POWER_ON_WP))
			hba->dev_info.is_lu_power_on_wp = true;
	}
}

4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646
/**
 * ufshcd_slave_alloc - handle initial SCSI device configurations
 * @sdev: pointer to SCSI device
 *
 * Returns success
 */
static int ufshcd_slave_alloc(struct scsi_device *sdev)
{
	struct ufs_hba *hba;

	hba = shost_priv(sdev->host);

	/* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
	sdev->use_10_for_ms = 1;
C
Can Guo 已提交
4647 4648 4649

	/* DBD field should be set to 1 in mode sense(10) */
	sdev->set_dbd_for_ms = 1;
4650

4651 4652
	/* allow SCSI layer to restart the device in case of errors */
	sdev->allow_restart = 1;
4653

4654 4655 4656
	/* REPORT SUPPORTED OPERATION CODES is not supported */
	sdev->no_report_opcodes = 1;

4657 4658
	/* WRITE_SAME command is not supported */
	sdev->no_write_same = 1;
4659

4660
	ufshcd_set_queue_depth(sdev);
4661

4662 4663
	ufshcd_get_lu_power_on_wp_status(hba, sdev);

4664 4665 4666
	return 0;
}

4667 4668 4669 4670 4671
/**
 * ufshcd_change_queue_depth - change queue depth
 * @sdev: pointer to SCSI device
 * @depth: required depth to set
 *
4672
 * Change queue depth and make sure the max. limits are not crossed.
4673
 */
4674
static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4675 4676 4677 4678 4679
{
	struct ufs_hba *hba = shost_priv(sdev->host);

	if (depth > hba->nutrs)
		depth = hba->nutrs;
4680
	return scsi_change_queue_depth(sdev, depth);
4681 4682
}

4683 4684 4685 4686 4687 4688
/**
 * ufshcd_slave_configure - adjust SCSI device configurations
 * @sdev: pointer to SCSI device
 */
static int ufshcd_slave_configure(struct scsi_device *sdev)
{
4689
	struct ufs_hba *hba = shost_priv(sdev->host);
4690 4691 4692
	struct request_queue *q = sdev->request_queue;

	blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4693 4694 4695 4696

	if (ufshcd_is_rpm_autosuspend_allowed(hba))
		sdev->rpm_autosuspend = 1;

4697 4698
	ufshcd_crypto_setup_rq_keyslot_manager(hba, q);

4699 4700 4701
	return 0;
}

4702 4703 4704 4705 4706 4707 4708 4709 4710
/**
 * ufshcd_slave_destroy - remove SCSI device configurations
 * @sdev: pointer to SCSI device
 */
static void ufshcd_slave_destroy(struct scsi_device *sdev)
{
	struct ufs_hba *hba;

	hba = shost_priv(sdev->host);
4711
	/* Drop the reference as it won't be needed anymore */
4712 4713 4714 4715
	if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
		unsigned long flags;

		spin_lock_irqsave(hba->host->host_lock, flags);
4716
		hba->sdev_ufs_device = NULL;
4717 4718
		spin_unlock_irqrestore(hba->host->host_lock, flags);
	}
4719 4720 4721 4722
}

/**
 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4723
 * @lrbp: pointer to local reference block of completed command
4724 4725 4726 4727 4728 4729 4730 4731 4732 4733 4734
 * @scsi_status: SCSI command status
 *
 * Returns value base on SCSI command status
 */
static inline int
ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
{
	int result = 0;

	switch (scsi_status) {
	case SAM_STAT_CHECK_CONDITION:
4735
		ufshcd_copy_sense_data(lrbp);
4736
		/* fallthrough */
4737
	case SAM_STAT_GOOD:
4738 4739
		result |= DID_OK << 16 |
			  COMMAND_COMPLETE << 8 |
4740
			  scsi_status;
4741 4742
		break;
	case SAM_STAT_TASK_SET_FULL:
4743
	case SAM_STAT_BUSY:
4744
	case SAM_STAT_TASK_ABORTED:
4745 4746
		ufshcd_copy_sense_data(lrbp);
		result |= scsi_status;
4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758
		break;
	default:
		result |= DID_ERROR << 16;
		break;
	} /* end of switch */

	return result;
}

/**
 * ufshcd_transfer_rsp_status - Get overall status of the response
 * @hba: per adapter instance
4759
 * @lrbp: pointer to local reference block of completed command
4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 4771 4772
 *
 * Returns result of the command to notify SCSI midlayer
 */
static inline int
ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
	int result = 0;
	int scsi_status;
	int ocs;

	/* overall command status of utrd */
	ocs = ufshcd_get_tr_ocs(lrbp);

4773 4774 4775 4776 4777 4778
	if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) {
		if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) &
					MASK_RSP_UPIU_RESULT)
			ocs = OCS_SUCCESS;
	}

4779 4780
	switch (ocs) {
	case OCS_SUCCESS:
4781
		result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4782
		hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796
		switch (result) {
		case UPIU_TRANSACTION_RESPONSE:
			/*
			 * get the response UPIU result to extract
			 * the SCSI command status
			 */
			result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);

			/*
			 * get the result based on SCSI status response
			 * to notify the SCSI midlayer of the command status
			 */
			scsi_status = result & MASK_SCSI_STATUS;
			result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4797

4798 4799 4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810
			/*
			 * Currently we are only supporting BKOPs exception
			 * events hence we can ignore BKOPs exception event
			 * during power management callbacks. BKOPs exception
			 * event is not expected to be raised in runtime suspend
			 * callback as it allows the urgent bkops.
			 * During system suspend, we are anyway forcefully
			 * disabling the bkops and if urgent bkops is needed
			 * it will be enabled on system resume. Long term
			 * solution could be to abort the system suspend if
			 * UFS device needs urgent BKOPs.
			 */
			if (!hba->pm_op_in_progress &&
4811 4812 4813 4814 4815 4816 4817 4818 4819
			    ufshcd_is_exception_event(lrbp->ucd_rsp_ptr) &&
			    schedule_work(&hba->eeh_work)) {
				/*
				 * Prevent suspend once eeh_work is scheduled
				 * to avoid deadlock between ufshcd_suspend
				 * and exception event handler.
				 */
				pm_runtime_get_noresume(hba->dev);
			}
4820 4821 4822 4823
			break;
		case UPIU_TRANSACTION_REJECT_UPIU:
			/* TODO: handle Reject UPIU Response */
			result = DID_ERROR << 16;
4824
			dev_err(hba->dev,
4825 4826 4827 4828 4829 4830
				"Reject UPIU not fully implemented\n");
			break;
		default:
			dev_err(hba->dev,
				"Unexpected request response code = %x\n",
				result);
4831
			result = DID_ERROR << 16;
4832 4833 4834 4835 4836 4837
			break;
		}
		break;
	case OCS_ABORTED:
		result |= DID_ABORT << 16;
		break;
4838 4839 4840
	case OCS_INVALID_COMMAND_STATUS:
		result |= DID_REQUEUE << 16;
		break;
4841 4842 4843 4844 4845 4846
	case OCS_INVALID_CMD_TABLE_ATTR:
	case OCS_INVALID_PRDT_ATTR:
	case OCS_MISMATCH_DATA_BUF_SIZE:
	case OCS_MISMATCH_RESP_UPIU_SIZE:
	case OCS_PEER_COMM_FAILURE:
	case OCS_FATAL_ERROR:
4847 4848 4849
	case OCS_DEVICE_FATAL_ERROR:
	case OCS_INVALID_CRYPTO_CONFIG:
	case OCS_GENERAL_CRYPTO_ERROR:
4850 4851
	default:
		result |= DID_ERROR << 16;
4852
		dev_err(hba->dev,
4853 4854 4855
				"OCS error from controller = %x for tag %d\n",
				ocs, lrbp->task_tag);
		ufshcd_print_host_regs(hba);
4856
		ufshcd_print_host_state(hba);
4857 4858 4859
		break;
	} /* end of switch */

4860
	if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
4861
		ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4862 4863 4864
	return result;
}

4865 4866 4867
/**
 * ufshcd_uic_cmd_compl - handle completion of uic command
 * @hba: per adapter instance
4868
 * @intr_status: interrupt status generated by the controller
4869 4870 4871 4872
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
4873
 */
4874
static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4875
{
4876 4877
	irqreturn_t retval = IRQ_NONE;

4878
	if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4879 4880
		hba->active_uic_cmd->argument2 |=
			ufshcd_get_uic_cmd_result(hba);
4881 4882
		hba->active_uic_cmd->argument3 =
			ufshcd_get_dme_attr_val(hba);
4883
		complete(&hba->active_uic_cmd->done);
4884
		retval = IRQ_HANDLED;
4885
	}
4886

4887
	if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
4888
		complete(hba->uic_async_done);
4889 4890
		retval = IRQ_HANDLED;
	}
4891 4892 4893 4894

	if (retval == IRQ_HANDLED)
		ufshcd_add_uic_command_trace(hba, hba->active_uic_cmd,
					     "complete");
4895
	return retval;
4896 4897
}

4898
/**
4899
 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4900
 * @hba: per adapter instance
4901
 * @completed_reqs: requests to complete
4902
 */
4903 4904
static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
					unsigned long completed_reqs)
4905
{
4906 4907
	struct ufshcd_lrb *lrbp;
	struct scsi_cmnd *cmd;
4908 4909
	int result;
	int index;
4910 4911 4912

	for_each_set_bit(index, &completed_reqs, hba->nutrs) {
		lrbp = &hba->lrb[index];
4913
		lrbp->compl_time_stamp = ktime_get();
4914 4915
		cmd = lrbp->cmd;
		if (cmd) {
4916
			ufshcd_add_command_trace(hba, index, "complete");
4917 4918 4919 4920 4921 4922 4923
			result = ufshcd_transfer_rsp_status(hba, lrbp);
			scsi_dma_unmap(cmd);
			cmd->result = result;
			/* Mark completed command as NULL in LRB */
			lrbp->cmd = NULL;
			/* Do not touch lrbp after scsi done */
			cmd->scsi_done(cmd);
4924
			__ufshcd_release(hba);
J
Joao Pinto 已提交
4925 4926
		} else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
			lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4927 4928 4929
			if (hba->dev_cmd.complete) {
				ufshcd_add_command_trace(hba, index,
						"dev_complete");
4930
				complete(hba->dev_cmd.complete);
4931
			}
4932
		}
4933 4934
		if (ufshcd_is_clkscaling_supported(hba))
			hba->clk_scaling.active_reqs--;
4935
	}
4936 4937 4938 4939

	/* clear corresponding bits of completed commands */
	hba->outstanding_reqs ^= completed_reqs;

4940
	ufshcd_clk_scaling_update_busy(hba);
4941 4942
}

4943 4944 4945
/**
 * ufshcd_transfer_req_compl - handle SCSI and query command completion
 * @hba: per adapter instance
4946 4947 4948 4949
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
4950
 */
4951
static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962
{
	unsigned long completed_reqs;
	u32 tr_doorbell;

	/* Resetting interrupt aggregation counters first and reading the
	 * DOOR_BELL afterward allows us to handle all the completed requests.
	 * In order to prevent other interrupts starvation the DB is read once
	 * after reset. The down side of this solution is the possibility of
	 * false interrupt if device completes another request after resetting
	 * aggregation and before reading the DB.
	 */
4963 4964
	if (ufshcd_is_intr_aggr_allowed(hba) &&
	    !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
4965 4966 4967 4968 4969
		ufshcd_reset_intr_aggr(hba);

	tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
	completed_reqs = tr_doorbell ^ hba->outstanding_reqs;

4970 4971 4972 4973 4974 4975
	if (completed_reqs) {
		__ufshcd_transfer_req_compl(hba, completed_reqs);
		return IRQ_HANDLED;
	} else {
		return IRQ_NONE;
	}
4976 4977
}

4978 4979 4980 4981 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 4993 4994 4995 4996
/**
 * ufshcd_disable_ee - disable exception event
 * @hba: per-adapter instance
 * @mask: exception event to disable
 *
 * Disables exception event in the device so that the EVENT_ALERT
 * bit is not set.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
{
	int err = 0;
	u32 val;

	if (!(hba->ee_ctrl_mask & mask))
		goto out;

	val = hba->ee_ctrl_mask & ~mask;
T
Tomohiro Kusumi 已提交
4997
	val &= MASK_EE_STATUS;
4998
	err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024
			QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
	if (!err)
		hba->ee_ctrl_mask &= ~mask;
out:
	return err;
}

/**
 * ufshcd_enable_ee - enable exception event
 * @hba: per-adapter instance
 * @mask: exception event to enable
 *
 * Enable corresponding exception event in the device to allow
 * device to alert host in critical scenarios.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
{
	int err = 0;
	u32 val;

	if (hba->ee_ctrl_mask & mask)
		goto out;

	val = hba->ee_ctrl_mask | mask;
T
Tomohiro Kusumi 已提交
5025
	val &= MASK_EE_STATUS;
5026
	err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042 5043 5044 5045 5046 5047 5048 5049 5050 5051
			QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
	if (!err)
		hba->ee_ctrl_mask |= mask;
out:
	return err;
}

/**
 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
 * @hba: per-adapter instance
 *
 * Allow device to manage background operations on its own. Enabling
 * this might lead to inconsistent latencies during normal data transfers
 * as the device is allowed to manage its own way of handling background
 * operations.
 *
 * Returns zero on success, non-zero on failure.
 */
static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
{
	int err = 0;

	if (hba->auto_bkops_enabled)
		goto out;

5052
	err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
5053
			QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5054 5055 5056 5057 5058 5059 5060
	if (err) {
		dev_err(hba->dev, "%s: failed to enable bkops %d\n",
				__func__, err);
		goto out;
	}

	hba->auto_bkops_enabled = true;
5061
	trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087 5088 5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101

	/* No need of URGENT_BKOPS exception from the device */
	err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
	if (err)
		dev_err(hba->dev, "%s: failed to disable exception event %d\n",
				__func__, err);
out:
	return err;
}

/**
 * ufshcd_disable_auto_bkops - block device in doing background operations
 * @hba: per-adapter instance
 *
 * Disabling background operations improves command response latency but
 * has drawback of device moving into critical state where the device is
 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
 * host is idle so that BKOPS are managed effectively without any negative
 * impacts.
 *
 * Returns zero on success, non-zero on failure.
 */
static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
{
	int err = 0;

	if (!hba->auto_bkops_enabled)
		goto out;

	/*
	 * If host assisted BKOPs is to be enabled, make sure
	 * urgent bkops exception is allowed.
	 */
	err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
	if (err) {
		dev_err(hba->dev, "%s: failed to enable exception event %d\n",
				__func__, err);
		goto out;
	}

5102
	err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5103
			QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5104 5105 5106 5107 5108 5109 5110 5111
	if (err) {
		dev_err(hba->dev, "%s: failed to disable bkops %d\n",
				__func__, err);
		ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
		goto out;
	}

	hba->auto_bkops_enabled = false;
5112
	trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5113
	hba->is_urgent_bkops_lvl_checked = false;
5114 5115 5116 5117 5118
out:
	return err;
}

/**
5119
 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5120 5121 5122 5123
 * @hba: per adapter instance
 *
 * After a device reset the device may toggle the BKOPS_EN flag
 * to default value. The s/w tracking variables should be updated
5124 5125
 * as well. This function would change the auto-bkops state based on
 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5126
 */
5127
static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5128
{
5129 5130 5131 5132 5133 5134 5135 5136 5137
	if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
		hba->auto_bkops_enabled = false;
		hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
		ufshcd_enable_auto_bkops(hba);
	} else {
		hba->auto_bkops_enabled = true;
		hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
		ufshcd_disable_auto_bkops(hba);
	}
5138
	hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
5139
	hba->is_urgent_bkops_lvl_checked = false;
5140 5141 5142 5143
}

static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
{
5144
	return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5145 5146 5147 5148
			QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
}

/**
5149
 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5150
 * @hba: per-adapter instance
5151
 * @status: bkops_status value
5152
 *
5153 5154 5155 5156 5157 5158 5159 5160 5161 5162
 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
 * flag in the device to permit background operations if the device
 * bkops_status is greater than or equal to "status" argument passed to
 * this function, disable otherwise.
 *
 * Returns 0 for success, non-zero in case of failure.
 *
 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
 * to know whether auto bkops is enabled or disabled after this function
 * returns control to it.
5163
 */
5164 5165
static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
			     enum bkops_status status)
5166 5167
{
	int err;
5168
	u32 curr_status = 0;
5169

5170
	err = ufshcd_get_bkops_status(hba, &curr_status);
5171 5172 5173 5174
	if (err) {
		dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
				__func__, err);
		goto out;
5175 5176 5177 5178 5179
	} else if (curr_status > BKOPS_STATUS_MAX) {
		dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
				__func__, curr_status);
		err = -EINVAL;
		goto out;
5180 5181
	}

5182
	if (curr_status >= status)
5183
		err = ufshcd_enable_auto_bkops(hba);
5184 5185
	else
		err = ufshcd_disable_auto_bkops(hba);
5186 5187 5188 5189
out:
	return err;
}

5190 5191 5192 5193 5194 5195 5196 5197 5198 5199 5200 5201
/**
 * ufshcd_urgent_bkops - handle urgent bkops exception event
 * @hba: per-adapter instance
 *
 * Enable fBackgroundOpsEn flag in the device to permit background
 * operations.
 *
 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
 * and negative error value for any other failure.
 */
static int ufshcd_urgent_bkops(struct ufs_hba *hba)
{
5202
	return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5203 5204
}

5205 5206
static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
{
5207
	return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5208 5209 5210
			QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
}

5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247
static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
{
	int err;
	u32 curr_status = 0;

	if (hba->is_urgent_bkops_lvl_checked)
		goto enable_auto_bkops;

	err = ufshcd_get_bkops_status(hba, &curr_status);
	if (err) {
		dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
				__func__, err);
		goto out;
	}

	/*
	 * We are seeing that some devices are raising the urgent bkops
	 * exception events even when BKOPS status doesn't indicate performace
	 * impacted or critical. Handle these device by determining their urgent
	 * bkops status at runtime.
	 */
	if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
		dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
				__func__, curr_status);
		/* update the current status as the urgent bkops level */
		hba->urgent_bkops_lvl = curr_status;
		hba->is_urgent_bkops_lvl_checked = true;
	}

enable_auto_bkops:
	err = ufshcd_enable_auto_bkops(hba);
out:
	if (err < 0)
		dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
				__func__, err);
}

5248 5249 5250
static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable)
{
	int ret;
5251
	u8 index;
5252 5253
	enum query_opcode opcode;

5254
	if (!ufshcd_is_wb_allowed(hba))
5255 5256 5257 5258 5259 5260 5261 5262 5263
		return 0;

	if (!(enable ^ hba->wb_enabled))
		return 0;
	if (enable)
		opcode = UPIU_QUERY_OPCODE_SET_FLAG;
	else
		opcode = UPIU_QUERY_OPCODE_CLEAR_FLAG;

5264
	index = ufshcd_wb_get_query_index(hba);
5265
	ret = ufshcd_query_flag_retry(hba, opcode,
5266
				      QUERY_FLAG_IDN_WB_EN, index, NULL);
5267 5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282
	if (ret) {
		dev_err(hba->dev, "%s write booster %s failed %d\n",
			__func__, enable ? "enable" : "disable", ret);
		return ret;
	}

	hba->wb_enabled = enable;
	dev_dbg(hba->dev, "%s write booster %s %d\n",
			__func__, enable ? "enable" : "disable", ret);

	return ret;
}

static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
{
	int val;
5283
	u8 index;
5284 5285 5286 5287 5288 5289

	if (set)
		val =  UPIU_QUERY_OPCODE_SET_FLAG;
	else
		val = UPIU_QUERY_OPCODE_CLEAR_FLAG;

5290
	index = ufshcd_wb_get_query_index(hba);
5291
	return ufshcd_query_flag_retry(hba, val,
5292 5293
				QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8,
				index, NULL);
5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307
}

static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
{
	if (enable)
		ufshcd_wb_buf_flush_enable(hba);
	else
		ufshcd_wb_buf_flush_disable(hba);

}

static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba)
{
	int ret;
5308
	u8 index;
5309

5310
	if (!ufshcd_is_wb_allowed(hba) || hba->wb_buf_flush_enabled)
5311 5312
		return 0;

5313
	index = ufshcd_wb_get_query_index(hba);
5314
	ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
5315
				      QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN,
5316
				      index, NULL);
5317 5318 5319 5320 5321 5322 5323 5324 5325 5326 5327 5328 5329
	if (ret)
		dev_err(hba->dev, "%s WB - buf flush enable failed %d\n",
			__func__, ret);
	else
		hba->wb_buf_flush_enabled = true;

	dev_dbg(hba->dev, "WB - Flush enabled: %d\n", ret);
	return ret;
}

static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba)
{
	int ret;
5330
	u8 index;
5331

5332
	if (!ufshcd_is_wb_allowed(hba) || !hba->wb_buf_flush_enabled)
5333 5334
		return 0;

5335
	index = ufshcd_wb_get_query_index(hba);
5336
	ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5337 5338
				      QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN,
				      index, NULL);
5339 5340 5341 5342 5343 5344 5345 5346 5347 5348 5349 5350 5351 5352 5353 5354
	if (ret) {
		dev_warn(hba->dev, "%s: WB - buf flush disable failed %d\n",
			 __func__, ret);
	} else {
		hba->wb_buf_flush_enabled = false;
		dev_dbg(hba->dev, "WB - Flush disabled: %d\n", ret);
	}

	return ret;
}

static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
						u32 avail_buf)
{
	u32 cur_buf;
	int ret;
5355
	u8 index;
5356

5357
	index = ufshcd_wb_get_query_index(hba);
5358 5359
	ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
					      QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
5360
					      index, 0, &cur_buf);
5361 5362 5363 5364 5365 5366 5367 5368 5369 5370 5371
	if (ret) {
		dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
			__func__, ret);
		return false;
	}

	if (!cur_buf) {
		dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
			 cur_buf);
		return false;
	}
5372 5373
	/* Let it continue to flush when available buffer exceeds threshold */
	if (avail_buf < hba->vps->wb_flush_threshold)
5374 5375 5376 5377 5378
		return true;

	return false;
}

5379
static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
5380 5381 5382
{
	int ret;
	u32 avail_buf;
5383
	u8 index;
5384

5385
	if (!ufshcd_is_wb_allowed(hba))
5386 5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397
		return false;
	/*
	 * The ufs device needs the vcc to be ON to flush.
	 * With user-space reduction enabled, it's enough to enable flush
	 * by checking only the available buffer. The threshold
	 * defined here is > 90% full.
	 * With user-space preserved enabled, the current-buffer
	 * should be checked too because the wb buffer size can reduce
	 * when disk tends to be full. This info is provided by current
	 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
	 * keeping vcc on when current buffer is empty.
	 */
5398
	index = ufshcd_wb_get_query_index(hba);
5399 5400
	ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
				      QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
5401
				      index, 0, &avail_buf);
5402 5403 5404 5405 5406 5407 5408
	if (ret) {
		dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
			 __func__, ret);
		return false;
	}

	if (!hba->dev_info.b_presrv_uspc_en) {
5409
		if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
5410 5411 5412 5413 5414 5415 5416
			return true;
		return false;
	}

	return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
}

5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431
static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
{
	struct ufs_hba *hba = container_of(to_delayed_work(work),
					   struct ufs_hba,
					   rpm_dev_flush_recheck_work);
	/*
	 * To prevent unnecessary VCC power drain after device finishes
	 * WriteBooster buffer flush or Auto BKOPs, force runtime resume
	 * after a certain delay to recheck the threshold by next runtime
	 * suspend.
	 */
	pm_runtime_get_sync(hba->dev);
	pm_runtime_put_sync(hba->dev);
}

5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445
/**
 * ufshcd_exception_event_handler - handle exceptions raised by device
 * @work: pointer to work data
 *
 * Read bExceptionEventStatus attribute from the device and handle the
 * exception event accordingly.
 */
static void ufshcd_exception_event_handler(struct work_struct *work)
{
	struct ufs_hba *hba;
	int err;
	u32 status = 0;
	hba = container_of(work, struct ufs_hba, eeh_work);

5446
	pm_runtime_get_sync(hba->dev);
5447
	ufshcd_scsi_block_requests(hba);
5448 5449 5450 5451 5452 5453 5454 5455
	err = ufshcd_get_ee_status(hba, &status);
	if (err) {
		dev_err(hba->dev, "%s: failed to get exception status %d\n",
				__func__, err);
		goto out;
	}

	status &= hba->ee_ctrl_mask;
5456 5457 5458 5459

	if (status & MASK_EE_URGENT_BKOPS)
		ufshcd_bkops_exception_event_handler(hba);

5460
out:
5461
	ufshcd_scsi_unblock_requests(hba);
5462 5463 5464 5465 5466 5467 5468 5469
	/*
	 * pm_runtime_get_noresume is called while scheduling
	 * eeh_work to avoid suspend racing with exception work.
	 * Hence decrement usage counter using pm_runtime_put_noidle
	 * to allow suspend on completion of exception event handler.
	 */
	pm_runtime_put_noidle(hba->dev);
	pm_runtime_put(hba->dev);
5470 5471 5472
	return;
}

5473 5474 5475 5476 5477 5478 5479
/* Complete requests that have door-bell cleared */
static void ufshcd_complete_requests(struct ufs_hba *hba)
{
	ufshcd_transfer_req_compl(hba);
	ufshcd_tmc_handler(hba);
}

5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495 5496 5497 5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517 5518 5519 5520 5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548 5549 5550 5551 5552
/**
 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
 *				to recover from the DL NAC errors or not.
 * @hba: per-adapter instance
 *
 * Returns true if error handling is required, false otherwise
 */
static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
{
	unsigned long flags;
	bool err_handling = true;

	spin_lock_irqsave(hba->host->host_lock, flags);
	/*
	 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
	 * device fatal error and/or DL NAC & REPLAY timeout errors.
	 */
	if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
		goto out;

	if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
	    ((hba->saved_err & UIC_ERROR) &&
	     (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
		goto out;

	if ((hba->saved_err & UIC_ERROR) &&
	    (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
		int err;
		/*
		 * wait for 50ms to see if we can get any other errors or not.
		 */
		spin_unlock_irqrestore(hba->host->host_lock, flags);
		msleep(50);
		spin_lock_irqsave(hba->host->host_lock, flags);

		/*
		 * now check if we have got any other severe errors other than
		 * DL NAC error?
		 */
		if ((hba->saved_err & INT_FATAL_ERRORS) ||
		    ((hba->saved_err & UIC_ERROR) &&
		    (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
			goto out;

		/*
		 * As DL NAC is the only error received so far, send out NOP
		 * command to confirm if link is still active or not.
		 *   - If we don't get any response then do error recovery.
		 *   - If we get response then clear the DL NAC error bit.
		 */

		spin_unlock_irqrestore(hba->host->host_lock, flags);
		err = ufshcd_verify_dev_init(hba);
		spin_lock_irqsave(hba->host->host_lock, flags);

		if (err)
			goto out;

		/* Link seems to be alive hence ignore the DL NAC errors */
		if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
			hba->saved_err &= ~UIC_ERROR;
		/* clear NAC error */
		hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
		if (!hba->saved_uic_err) {
			err_handling = false;
			goto out;
		}
	}
out:
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	return err_handling;
}

5553
/**
5554 5555
 * ufshcd_err_handler - handle UFS errors that require s/w attention
 * @work: pointer to work structure
5556
 */
5557
static void ufshcd_err_handler(struct work_struct *work)
5558 5559
{
	struct ufs_hba *hba;
5560 5561 5562 5563 5564
	unsigned long flags;
	u32 err_xfer = 0;
	u32 err_tm = 0;
	int err = 0;
	int tag;
5565
	bool needs_reset = false;
5566 5567

	hba = container_of(work, struct ufs_hba, eh_work);
5568

5569
	pm_runtime_get_sync(hba->dev);
5570
	ufshcd_hold(hba, false);
5571 5572

	spin_lock_irqsave(hba->host->host_lock, flags);
5573
	if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5574 5575 5576 5577 5578 5579
		goto out;

	hba->ufshcd_state = UFSHCD_STATE_RESET;
	ufshcd_set_eh_in_progress(hba);

	/* Complete requests that have door-bell cleared by h/w */
5580
	ufshcd_complete_requests(hba);
5581 5582 5583 5584 5585 5586 5587 5588 5589 5590 5591

	if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
		bool ret;

		spin_unlock_irqrestore(hba->host->host_lock, flags);
		/* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
		ret = ufshcd_quirk_dl_nac_errors(hba);
		spin_lock_irqsave(hba->host->host_lock, flags);
		if (!ret)
			goto skip_err_handling;
	}
5592
	if ((hba->saved_err & INT_FATAL_ERRORS) ||
5593
	    (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
5594 5595 5596 5597 5598
	    ((hba->saved_err & UIC_ERROR) &&
	    (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
				   UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
				   UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
		needs_reset = true;
5599

5600 5601
	/*
	 * if host reset is required then skip clearing the pending
5602 5603
	 * transfers forcefully because they will get cleared during
	 * host reset and restore
5604 5605 5606 5607 5608 5609
	 */
	if (needs_reset)
		goto skip_pending_xfer_clear;

	/* release lock as clear command might sleep */
	spin_unlock_irqrestore(hba->host->host_lock, flags);
5610
	/* Clear pending transfer requests */
5611 5612 5613 5614 5615 5616
	for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
		if (ufshcd_clear_cmd(hba, tag)) {
			err_xfer = true;
			goto lock_skip_pending_xfer_clear;
		}
	}
5617 5618

	/* Clear pending task management requests */
5619 5620 5621 5622 5623 5624
	for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
		if (ufshcd_clear_tm_cmd(hba, tag)) {
			err_tm = true;
			goto lock_skip_pending_xfer_clear;
		}
	}
5625

5626
lock_skip_pending_xfer_clear:
5627 5628
	spin_lock_irqsave(hba->host->host_lock, flags);

5629 5630 5631 5632 5633 5634 5635
	/* Complete the requests that are cleared by s/w */
	ufshcd_complete_requests(hba);

	if (err_xfer || err_tm)
		needs_reset = true;

skip_pending_xfer_clear:
5636
	/* Fatal errors need reset */
5637 5638 5639 5640 5641 5642 5643 5644 5645 5646 5647 5648 5649 5650 5651
	if (needs_reset) {
		unsigned long max_doorbells = (1UL << hba->nutrs) - 1;

		/*
		 * ufshcd_reset_and_restore() does the link reinitialization
		 * which will need atleast one empty doorbell slot to send the
		 * device management commands (NOP and query commands).
		 * If there is no slot empty at this moment then free up last
		 * slot forcefully.
		 */
		if (hba->outstanding_reqs == max_doorbells)
			__ufshcd_transfer_req_compl(hba,
						    (1UL << (hba->nutrs - 1)));

		spin_unlock_irqrestore(hba->host->host_lock, flags);
5652
		err = ufshcd_reset_and_restore(hba);
5653
		spin_lock_irqsave(hba->host->host_lock, flags);
5654 5655 5656 5657 5658 5659 5660 5661 5662 5663 5664 5665 5666
		if (err) {
			dev_err(hba->dev, "%s: reset and restore failed\n",
					__func__);
			hba->ufshcd_state = UFSHCD_STATE_ERROR;
		}
		/*
		 * Inform scsi mid-layer that we did reset and allow to handle
		 * Unit Attention properly.
		 */
		scsi_report_bus_reset(hba->host, 0);
		hba->saved_err = 0;
		hba->saved_uic_err = 0;
	}
5667

5668
skip_err_handling:
5669 5670 5671 5672 5673 5674 5675
	if (!needs_reset) {
		hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
		if (hba->saved_err || hba->saved_uic_err)
			dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
			    __func__, hba->saved_err, hba->saved_uic_err);
	}

5676 5677 5678
	ufshcd_clear_eh_in_progress(hba);

out:
5679
	spin_unlock_irqrestore(hba->host->host_lock, flags);
5680
	ufshcd_scsi_unblock_requests(hba);
5681
	ufshcd_release(hba);
5682
	pm_runtime_put_sync(hba->dev);
5683 5684 5685
}

/**
5686 5687
 * ufshcd_update_uic_error - check and set fatal UIC error flags.
 * @hba: per-adapter instance
5688 5689 5690 5691
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5692
 */
5693
static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
5694 5695
{
	u32 reg;
5696
	irqreturn_t retval = IRQ_NONE;
5697

5698 5699 5700 5701
	/* PHY layer lane error */
	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
	/* Ignore LINERESET indication, as this is not an error */
	if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5702
	    (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5703 5704 5705 5706 5707
		/*
		 * To know whether this error is fatal or not, DB timeout
		 * must be checked but this error is handled separately.
		 */
		dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5708
		ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
5709
		retval |= IRQ_HANDLED;
5710
	}
5711

5712 5713
	/* PA_INIT_ERROR is fatal and needs UIC reset */
	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5714 5715
	if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
	    (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
5716
		ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
5717

5718 5719 5720 5721 5722 5723 5724 5725 5726 5727 5728
		if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
			hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
		else if (hba->dev_quirks &
				UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
			if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
				hba->uic_error |=
					UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
			else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
				hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
		}
		retval |= IRQ_HANDLED;
5729
	}
5730 5731 5732

	/* UIC NL/TL/DME errors needs software retry */
	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5733 5734
	if ((reg & UIC_NETWORK_LAYER_ERROR) &&
	    (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
5735
		ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
5736
		hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5737
		retval |= IRQ_HANDLED;
5738
	}
5739 5740

	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5741 5742
	if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
	    (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
5743
		ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
5744
		hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5745
		retval |= IRQ_HANDLED;
5746
	}
5747 5748

	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5749 5750
	if ((reg & UIC_DME_ERROR) &&
	    (reg & UIC_DME_ERROR_CODE_MASK)) {
5751
		ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
5752
		hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5753
		retval |= IRQ_HANDLED;
5754
	}
5755 5756 5757

	dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
			__func__, hba->uic_error);
5758
	return retval;
5759 5760
}

5761 5762 5763
static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
					 u32 intr_mask)
{
5764 5765
	if (!ufshcd_is_auto_hibern8_supported(hba) ||
	    !ufshcd_is_auto_hibern8_enabled(hba))
5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778
		return false;

	if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
		return false;

	if (hba->active_uic_cmd &&
	    (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
	    hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
		return false;

	return true;
}

5779 5780 5781
/**
 * ufshcd_check_errors - Check for errors that need s/w attention
 * @hba: per-adapter instance
5782 5783 5784 5785
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5786
 */
5787
static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
5788 5789
{
	bool queue_eh_work = false;
5790
	irqreturn_t retval = IRQ_NONE;
5791

5792 5793
	if (hba->errors & INT_FATAL_ERRORS) {
		ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
5794
		queue_eh_work = true;
5795
	}
5796 5797

	if (hba->errors & UIC_ERROR) {
5798
		hba->uic_error = 0;
5799
		retval = ufshcd_update_uic_error(hba);
5800 5801
		if (hba->uic_error)
			queue_eh_work = true;
5802
	}
5803

5804 5805 5806 5807 5808 5809
	if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
		dev_err(hba->dev,
			"%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
			__func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
			"Enter" : "Exit",
			hba->errors, ufshcd_get_upmcrs(hba));
5810 5811
		ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
				       hba->errors);
5812 5813 5814
		queue_eh_work = true;
	}

5815
	if (queue_eh_work) {
5816 5817 5818 5819 5820 5821 5822
		/*
		 * update the transfer error masks to sticky bits, let's do this
		 * irrespective of current ufshcd_state.
		 */
		hba->saved_err |= hba->errors;
		hba->saved_uic_err |= hba->uic_error;

5823 5824 5825
		/* handle fatal errors only when link is functional */
		if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
			/* block commands from scsi mid-layer */
5826
			ufshcd_scsi_block_requests(hba);
5827

5828
			hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839 5840 5841 5842 5843 5844

			/* dump controller state before resetting */
			if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
				bool pr_prdt = !!(hba->saved_err &
						SYSTEM_BUS_FATAL_ERROR);

				dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
					__func__, hba->saved_err,
					hba->saved_uic_err);

				ufshcd_print_host_regs(hba);
				ufshcd_print_pwr_info(hba);
				ufshcd_print_tmrs(hba, hba->outstanding_tasks);
				ufshcd_print_trs(hba, hba->outstanding_reqs,
							pr_prdt);
			}
5845 5846
			schedule_work(&hba->eh_work);
		}
5847
		retval |= IRQ_HANDLED;
5848
	}
5849 5850 5851 5852 5853 5854
	/*
	 * if (!queue_eh_work) -
	 * Other errors are either non-fatal where host recovers
	 * itself without s/w intervention or errors that will be
	 * handled by the SCSI core layer.
	 */
5855
	return retval;
5856 5857
}

5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878
struct ctm_info {
	struct ufs_hba	*hba;
	unsigned long	pending;
	unsigned int	ncpl;
};

static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
{
	struct ctm_info *const ci = priv;
	struct completion *c;

	WARN_ON_ONCE(reserved);
	if (test_bit(req->tag, &ci->pending))
		return true;
	ci->ncpl++;
	c = req->end_io_data;
	if (c)
		complete(c);
	return true;
}

5879 5880 5881
/**
 * ufshcd_tmc_handler - handle task management function completion
 * @hba: per adapter instance
5882 5883 5884 5885
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5886
 */
5887
static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
5888
{
5889 5890 5891 5892 5893
	struct request_queue *q = hba->tmf_queue;
	struct ctm_info ci = {
		.hba	 = hba,
		.pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
	};
5894

5895 5896
	blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
	return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
5897 5898 5899 5900 5901 5902
}

/**
 * ufshcd_sl_intr - Interrupt service routine
 * @hba: per adapter instance
 * @intr_status: contains interrupts generated by the controller
5903 5904 5905 5906
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5907
 */
5908
static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5909
{
5910 5911
	irqreturn_t retval = IRQ_NONE;

5912
	hba->errors = UFSHCD_ERROR_MASK & intr_status;
5913 5914 5915 5916

	if (ufshcd_is_auto_hibern8_error(hba, intr_status))
		hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);

5917
	if (hba->errors)
5918
		retval |= ufshcd_check_errors(hba);
5919

5920
	if (intr_status & UFSHCD_UIC_MASK)
5921
		retval |= ufshcd_uic_cmd_compl(hba, intr_status);
5922 5923

	if (intr_status & UTP_TASK_REQ_COMPL)
5924
		retval |= ufshcd_tmc_handler(hba);
5925 5926

	if (intr_status & UTP_TRANSFER_REQ_COMPL)
5927 5928 5929
		retval |= ufshcd_transfer_req_compl(hba);

	return retval;
5930 5931 5932 5933 5934 5935 5936
}

/**
 * ufshcd_intr - Main interrupt service routine
 * @irq: irq number
 * @__hba: pointer to adapter instance
 *
5937 5938 5939
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5940 5941 5942
 */
static irqreturn_t ufshcd_intr(int irq, void *__hba)
{
5943
	u32 intr_status, enabled_intr_status;
5944 5945
	irqreturn_t retval = IRQ_NONE;
	struct ufs_hba *hba = __hba;
5946
	int retries = hba->nutrs;
5947 5948

	spin_lock(hba->host->host_lock);
5949
	intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5950

5951 5952 5953 5954 5955 5956 5957 5958 5959 5960 5961
	/*
	 * There could be max of hba->nutrs reqs in flight and in worst case
	 * if the reqs get finished 1 by 1 after the interrupt status is
	 * read, make sure we handle them by checking the interrupt status
	 * again in a loop until we process all of the reqs before returning.
	 */
	do {
		enabled_intr_status =
			intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
		if (intr_status)
			ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5962 5963
		if (enabled_intr_status)
			retval |= ufshcd_sl_intr(hba, enabled_intr_status);
5964 5965 5966

		intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
	} while (intr_status && --retries);
5967

5968 5969 5970 5971 5972 5973
	if (retval == IRQ_NONE) {
		dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
					__func__, intr_status);
		ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
	}

5974 5975 5976 5977
	spin_unlock(hba->host->host_lock);
	return retval;
}

5978 5979 5980 5981 5982 5983 5984 5985 5986 5987
static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
{
	int err = 0;
	u32 mask = 1 << tag;
	unsigned long flags;

	if (!test_bit(tag, &hba->outstanding_tasks))
		goto out;

	spin_lock_irqsave(hba->host->host_lock, flags);
5988
	ufshcd_utmrl_clear(hba, tag);
5989 5990 5991 5992 5993
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	/* poll for max. 1 sec to clear door bell register by h/w */
	err = ufshcd_wait_for_register(hba,
			REG_UTP_TASK_REQ_DOOR_BELL,
5994
			mask, 0, 1000, 1000);
5995 5996 5997 5998
out:
	return err;
}

5999 6000
static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
		struct utp_task_req_desc *treq, u8 tm_function)
6001
{
6002
	struct request_queue *q = hba->tmf_queue;
6003
	struct Scsi_Host *host = hba->host;
6004 6005
	DECLARE_COMPLETION_ONSTACK(wait);
	struct request *req;
6006
	unsigned long flags;
6007
	int free_slot, task_tag, err;
6008

6009 6010 6011 6012 6013
	/*
	 * Get free slot, sleep if slots are unavailable.
	 * Even though we use wait_event() which sleeps indefinitely,
	 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
	 */
6014 6015 6016 6017
	req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
	req->end_io_data = &wait;
	free_slot = req->tag;
	WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
6018
	ufshcd_hold(hba, false);
6019

6020 6021
	spin_lock_irqsave(host->host_lock, flags);
	task_tag = hba->nutrs + free_slot;
6022

6023 6024 6025
	treq->req_header.dword_0 |= cpu_to_be32(task_tag);

	memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
K
Kiwoong Kim 已提交
6026 6027
	ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);

6028 6029
	/* send command to the controller */
	__set_bit(free_slot, &hba->outstanding_tasks);
6030 6031 6032 6033

	/* Make sure descriptors are ready before ringing the task doorbell */
	wmb();

6034
	ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
6035 6036
	/* Make sure that doorbell is committed immediately */
	wmb();
6037 6038 6039

	spin_unlock_irqrestore(host->host_lock, flags);

6040 6041
	ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");

6042
	/* wait until the task management command is completed */
6043
	err = wait_for_completion_io_timeout(&wait,
6044
			msecs_to_jiffies(TM_CMD_TIMEOUT));
6045
	if (!err) {
6046 6047 6048 6049 6050
		/*
		 * Make sure that ufshcd_compl_tm() does not trigger a
		 * use-after-free.
		 */
		req->end_io_data = NULL;
6051
		ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
6052 6053 6054 6055 6056 6057 6058
		dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
				__func__, tm_function);
		if (ufshcd_clear_tm_cmd(hba, free_slot))
			dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
					__func__, free_slot);
		err = -ETIMEDOUT;
	} else {
6059 6060 6061
		err = 0;
		memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));

6062
		ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
6063
	}
6064

6065 6066 6067 6068
	spin_lock_irqsave(hba->host->host_lock, flags);
	__clear_bit(free_slot, &hba->outstanding_tasks);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

6069
	blk_put_request(req);
6070

6071
	ufshcd_release(hba);
6072 6073 6074
	return err;
}

6075 6076 6077 6078 6079 6080 6081 6082 6083 6084 6085 6086 6087 6088 6089 6090 6091 6092 6093 6094 6095 6096 6097 6098 6099 6100 6101 6102 6103 6104 6105 6106 6107 6108 6109 6110 6111 6112 6113 6114 6115 6116 6117 6118 6119 6120
/**
 * ufshcd_issue_tm_cmd - issues task management commands to controller
 * @hba: per adapter instance
 * @lun_id: LUN ID to which TM command is sent
 * @task_id: task ID to which the TM command is applicable
 * @tm_function: task management function opcode
 * @tm_response: task management service response return value
 *
 * Returns non-zero value on error, zero on success.
 */
static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
		u8 tm_function, u8 *tm_response)
{
	struct utp_task_req_desc treq = { { 0 }, };
	int ocs_value, err;

	/* Configure task request descriptor */
	treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
	treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);

	/* Configure task request UPIU */
	treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
				  cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
	treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);

	/*
	 * The host shall provide the same value for LUN field in the basic
	 * header and for Input Parameter.
	 */
	treq.input_param1 = cpu_to_be32(lun_id);
	treq.input_param2 = cpu_to_be32(task_id);

	err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
	if (err == -ETIMEDOUT)
		return err;

	ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
	if (ocs_value != OCS_SUCCESS)
		dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
				__func__, ocs_value);
	else if (tm_response)
		*tm_response = be32_to_cpu(treq.output_param1) &
				MASK_TM_SERVICE_RESP;
	return err;
}

6121 6122 6123 6124 6125 6126 6127
/**
 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
 * @hba:	per-adapter instance
 * @req_upiu:	upiu request
 * @rsp_upiu:	upiu reply
 * @desc_buff:	pointer to descriptor buffer, NULL if NA
 * @buff_len:	descriptor size, 0 if NA
6128
 * @cmd_type:	specifies the type (NOP, Query...)
6129 6130 6131 6132 6133 6134 6135 6136 6137 6138 6139 6140 6141
 * @desc_op:	descriptor operation
 *
 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
 * Therefore, it "rides" the device management infrastructure: uses its tag and
 * tasks work queues.
 *
 * Since there is only one available tag for device management commands,
 * the caller is expected to hold the hba->dev_cmd.lock mutex.
 */
static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
					struct utp_upiu_req *req_upiu,
					struct utp_upiu_req *rsp_upiu,
					u8 *desc_buff, int *buff_len,
6142
					enum dev_cmd_type cmd_type,
6143 6144
					enum query_opcode desc_op)
{
6145 6146
	struct request_queue *q = hba->cmd_queue;
	struct request *req;
6147 6148 6149 6150 6151
	struct ufshcd_lrb *lrbp;
	int err = 0;
	int tag;
	struct completion wait;
	unsigned long flags;
B
Bean Huo 已提交
6152
	u8 upiu_flags;
6153 6154 6155

	down_read(&hba->clk_scaling_lock);

6156
	req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6157 6158 6159 6160
	if (IS_ERR(req)) {
		err = PTR_ERR(req);
		goto out_unlock;
	}
6161 6162
	tag = req->tag;
	WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
6163 6164 6165 6166 6167 6168 6169 6170 6171 6172 6173

	init_completion(&wait);
	lrbp = &hba->lrb[tag];
	WARN_ON(lrbp->cmd);

	lrbp->cmd = NULL;
	lrbp->sense_bufflen = 0;
	lrbp->sense_buffer = NULL;
	lrbp->task_tag = tag;
	lrbp->lun = 0;
	lrbp->intr_cmd = true;
6174
	ufshcd_prepare_lrbp_crypto(NULL, lrbp);
6175 6176 6177 6178 6179 6180 6181 6182 6183 6184 6185 6186 6187 6188 6189 6190 6191 6192 6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220 6221
	hba->dev_cmd.type = cmd_type;

	switch (hba->ufs_version) {
	case UFSHCI_VERSION_10:
	case UFSHCI_VERSION_11:
		lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
		break;
	default:
		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
		break;
	}

	/* update the task tag in the request upiu */
	req_upiu->header.dword_0 |= cpu_to_be32(tag);

	ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);

	/* just copy the upiu request as it is */
	memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
	if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
		/* The Data Segment Area is optional depending upon the query
		 * function value. for WRITE DESCRIPTOR, the data segment
		 * follows right after the tsf.
		 */
		memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
		*buff_len = 0;
	}

	memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));

	hba->dev_cmd.complete = &wait;

	/* Make sure descriptors are ready before ringing the doorbell */
	wmb();
	spin_lock_irqsave(hba->host->host_lock, flags);
	ufshcd_send_command(hba, tag);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	/*
	 * ignore the returning value here - ufshcd_check_query_response is
	 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
	 * read the response directly ignoring all errors.
	 */
	ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);

	/* just copy the upiu response as it is */
	memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
6222 6223 6224 6225 6226 6227 6228 6229 6230
	if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
		u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
		u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
			       MASK_QUERY_DATA_SEG_LEN;

		if (*buff_len >= resp_len) {
			memcpy(desc_buff, descp, resp_len);
			*buff_len = resp_len;
		} else {
6231 6232 6233
			dev_warn(hba->dev,
				 "%s: rsp size %d is bigger than buffer size %d",
				 __func__, resp_len, *buff_len);
6234 6235 6236 6237
			*buff_len = 0;
			err = -EINVAL;
		}
	}
6238

6239
	blk_put_request(req);
6240
out_unlock:
6241 6242 6243 6244 6245 6246 6247 6248 6249 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261 6262 6263 6264 6265 6266 6267
	up_read(&hba->clk_scaling_lock);
	return err;
}

/**
 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
 * @hba:	per-adapter instance
 * @req_upiu:	upiu request
 * @rsp_upiu:	upiu reply - only 8 DW as we do not support scsi commands
 * @msgcode:	message code, one of UPIU Transaction Codes Initiator to Target
 * @desc_buff:	pointer to descriptor buffer, NULL if NA
 * @buff_len:	descriptor size, 0 if NA
 * @desc_op:	descriptor operation
 *
 * Supports UTP Transfer requests (nop and query), and UTP Task
 * Management requests.
 * It is up to the caller to fill the upiu conent properly, as it will
 * be copied without any further input validations.
 */
int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
			     struct utp_upiu_req *req_upiu,
			     struct utp_upiu_req *rsp_upiu,
			     int msgcode,
			     u8 *desc_buff, int *buff_len,
			     enum query_opcode desc_op)
{
	int err;
6268
	enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
6269 6270 6271 6272 6273 6274 6275 6276 6277 6278 6279 6280 6281 6282 6283 6284 6285 6286 6287 6288 6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302 6303 6304 6305 6306 6307 6308 6309 6310 6311 6312 6313 6314 6315
	struct utp_task_req_desc treq = { { 0 }, };
	int ocs_value;
	u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;

	switch (msgcode) {
	case UPIU_TRANSACTION_NOP_OUT:
		cmd_type = DEV_CMD_TYPE_NOP;
		/* fall through */
	case UPIU_TRANSACTION_QUERY_REQ:
		ufshcd_hold(hba, false);
		mutex_lock(&hba->dev_cmd.lock);
		err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
						   desc_buff, buff_len,
						   cmd_type, desc_op);
		mutex_unlock(&hba->dev_cmd.lock);
		ufshcd_release(hba);

		break;
	case UPIU_TRANSACTION_TASK_REQ:
		treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
		treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);

		memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));

		err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
		if (err == -ETIMEDOUT)
			break;

		ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
		if (ocs_value != OCS_SUCCESS) {
			dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
				ocs_value);
			break;
		}

		memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));

		break;
	default:
		err = -EINVAL;

		break;
	}

	return err;
}

6316
/**
6317 6318
 * ufshcd_eh_device_reset_handler - device reset handler registered to
 *                                    scsi layer.
6319 6320 6321 6322
 * @cmd: SCSI command pointer
 *
 * Returns SUCCESS/FAILED
 */
6323
static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
6324 6325 6326 6327 6328 6329
{
	struct Scsi_Host *host;
	struct ufs_hba *hba;
	unsigned int tag;
	u32 pos;
	int err;
6330 6331
	u8 resp = 0xF;
	struct ufshcd_lrb *lrbp;
6332
	unsigned long flags;
6333 6334 6335 6336 6337

	host = cmd->device->host;
	hba = shost_priv(host);
	tag = cmd->request->tag;

6338 6339 6340
	lrbp = &hba->lrb[tag];
	err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
	if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6341 6342
		if (!err)
			err = resp;
6343
		goto out;
6344
	}
6345

6346 6347 6348 6349 6350 6351
	/* clear the commands that were pending for corresponding LUN */
	for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
		if (hba->lrb[pos].lun == lrbp->lun) {
			err = ufshcd_clear_cmd(hba, pos);
			if (err)
				break;
6352
		}
6353 6354 6355 6356
	}
	spin_lock_irqsave(host->host_lock, flags);
	ufshcd_transfer_req_compl(hba);
	spin_unlock_irqrestore(host->host_lock, flags);
6357

6358
out:
6359
	hba->req_abort_count = 0;
6360
	ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
6361 6362 6363 6364 6365 6366
	if (!err) {
		err = SUCCESS;
	} else {
		dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
		err = FAILED;
	}
6367 6368 6369
	return err;
}

6370 6371 6372 6373 6374 6375 6376 6377 6378 6379 6380
static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
{
	struct ufshcd_lrb *lrbp;
	int tag;

	for_each_set_bit(tag, &bitmap, hba->nutrs) {
		lrbp = &hba->lrb[tag];
		lrbp->req_abort_skip = true;
	}
}

6381 6382 6383 6384
/**
 * ufshcd_abort - abort a specific command
 * @cmd: SCSI command pointer
 *
6385 6386 6387 6388 6389 6390
 * Abort the pending command in device by sending UFS_ABORT_TASK task management
 * command, and in host controller by clearing the door-bell register. There can
 * be race between controller sending the command to the device while abort is
 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
 * really issued and then try to abort it.
 *
6391 6392 6393 6394 6395 6396 6397 6398
 * Returns SUCCESS/FAILED
 */
static int ufshcd_abort(struct scsi_cmnd *cmd)
{
	struct Scsi_Host *host;
	struct ufs_hba *hba;
	unsigned long flags;
	unsigned int tag;
6399 6400
	int err = 0;
	int poll_cnt;
6401 6402
	u8 resp = 0xF;
	struct ufshcd_lrb *lrbp;
6403
	u32 reg;
6404 6405 6406 6407

	host = cmd->device->host;
	hba = shost_priv(host);
	tag = cmd->request->tag;
6408
	lrbp = &hba->lrb[tag];
6409 6410 6411 6412 6413 6414
	if (!ufshcd_valid_tag(hba, tag)) {
		dev_err(hba->dev,
			"%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
			__func__, tag, cmd, cmd->request);
		BUG();
	}
6415

6416 6417 6418 6419 6420 6421 6422 6423 6424 6425
	/*
	 * Task abort to the device W-LUN is illegal. When this command
	 * will fail, due to spec violation, scsi err handling next step
	 * will be to send LU reset which, again, is a spec violation.
	 * To avoid these unnecessary/illegal step we skip to the last error
	 * handling stage: reset and restore.
	 */
	if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
		return ufshcd_eh_host_reset_handler(cmd);

6426
	ufshcd_hold(hba, false);
6427
	reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6428
	/* If command is already aborted/completed, return SUCCESS */
6429 6430 6431 6432
	if (!(test_bit(tag, &hba->outstanding_reqs))) {
		dev_err(hba->dev,
			"%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
			__func__, tag, hba->outstanding_reqs, reg);
6433
		goto out;
6434
	}
6435

6436 6437 6438 6439 6440 6441
	if (!(reg & (1 << tag))) {
		dev_err(hba->dev,
		"%s: cmd was completed, but without a notifying intr, tag = %d",
		__func__, tag);
	}

6442 6443 6444
	/* Print Transfer Request of aborted task */
	dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);

6445 6446 6447 6448 6449 6450 6451 6452 6453
	/*
	 * Print detailed info about aborted request.
	 * As more than one request might get aborted at the same time,
	 * print full information only for the first aborted request in order
	 * to reduce repeated printouts. For other aborted requests only print
	 * basic details.
	 */
	scsi_print_command(hba->lrb[tag].cmd);
	if (!hba->req_abort_count) {
6454
		ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
6455
		ufshcd_print_host_regs(hba);
6456
		ufshcd_print_host_state(hba);
6457 6458 6459 6460 6461 6462
		ufshcd_print_pwr_info(hba);
		ufshcd_print_trs(hba, 1 << tag, true);
	} else {
		ufshcd_print_trs(hba, 1 << tag, false);
	}
	hba->req_abort_count++;
6463 6464 6465 6466 6467 6468 6469

	/* Skip task abort in case previous aborts failed and report failure */
	if (lrbp->req_abort_skip) {
		err = -EIO;
		goto out;
	}

6470 6471 6472 6473 6474
	for (poll_cnt = 100; poll_cnt; poll_cnt--) {
		err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
				UFS_QUERY_TASK, &resp);
		if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
			/* cmd pending in the device */
6475 6476
			dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
				__func__, tag);
6477 6478 6479 6480 6481 6482
			break;
		} else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
			/*
			 * cmd not pending in the device, check if it is
			 * in transition.
			 */
6483 6484
			dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
				__func__, tag);
6485 6486 6487 6488 6489 6490 6491
			reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
			if (reg & (1 << tag)) {
				/* sleep for max. 200us to stabilize */
				usleep_range(100, 200);
				continue;
			}
			/* command completed already */
6492 6493
			dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
				__func__, tag);
6494 6495
			goto out;
		} else {
6496 6497 6498
			dev_err(hba->dev,
				"%s: no response from device. tag = %d, err %d\n",
				__func__, tag, err);
6499 6500 6501 6502 6503 6504 6505 6506
			if (!err)
				err = resp; /* service response error */
			goto out;
		}
	}

	if (!poll_cnt) {
		err = -EBUSY;
6507 6508 6509
		goto out;
	}

6510 6511 6512
	err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
			UFS_ABORT_TASK, &resp);
	if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6513
		if (!err) {
6514
			err = resp; /* service response error */
6515 6516 6517
			dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
				__func__, tag, err);
		}
6518
		goto out;
6519
	}
6520

6521
	err = ufshcd_clear_cmd(hba, tag);
6522 6523 6524
	if (err) {
		dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
			__func__, tag, err);
6525
		goto out;
6526
	}
6527

6528 6529 6530
	scsi_dma_unmap(cmd);

	spin_lock_irqsave(host->host_lock, flags);
6531
	ufshcd_outstanding_req_clear(hba, tag);
6532 6533
	hba->lrb[tag].cmd = NULL;
	spin_unlock_irqrestore(host->host_lock, flags);
6534

6535
out:
6536 6537 6538 6539
	if (!err) {
		err = SUCCESS;
	} else {
		dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6540
		ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
6541 6542 6543
		err = FAILED;
	}

6544 6545 6546 6547 6548
	/*
	 * This ufshcd_release() corresponds to the original scsi cmd that got
	 * aborted here (as we won't get any IRQ for it).
	 */
	ufshcd_release(hba);
6549 6550 6551
	return err;
}

6552 6553 6554 6555 6556 6557 6558 6559 6560 6561 6562 6563 6564 6565 6566
/**
 * ufshcd_host_reset_and_restore - reset and restore host controller
 * @hba: per-adapter instance
 *
 * Note that host controller reset may issue DME_RESET to
 * local and remote (device) Uni-Pro stack and the attributes
 * are reset to default state.
 *
 * Returns zero on success, non-zero on failure
 */
static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
{
	int err;
	unsigned long flags;

6567 6568 6569 6570
	/*
	 * Stop the host controller and complete the requests
	 * cleared by h/w
	 */
6571 6572
	ufshcd_hba_stop(hba);

6573
	spin_lock_irqsave(hba->host->host_lock, flags);
6574 6575 6576
	hba->silence_err_logs = true;
	ufshcd_complete_requests(hba);
	hba->silence_err_logs = false;
6577 6578
	spin_unlock_irqrestore(hba->host->host_lock, flags);

6579
	/* scale up clocks to max frequency before full reinitialization */
6580
	ufshcd_set_clk_freq(hba, true);
6581

6582 6583 6584 6585 6586
	err = ufshcd_hba_enable(hba);
	if (err)
		goto out;

	/* Establish the link again and restore the device */
6587
	err = ufshcd_probe_hba(hba, false);
S
Sujit Reddy Thumma 已提交
6588 6589

	if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
6590 6591 6592 6593
		err = -EIO;
out:
	if (err)
		dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6594
	ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609
	return err;
}

/**
 * ufshcd_reset_and_restore - reset and re-initialize host/device
 * @hba: per-adapter instance
 *
 * Reset and recover device, host and re-establish link. This
 * is helpful to recover the communication in fatal error conditions.
 *
 * Returns zero on success, non-zero on failure
 */
static int ufshcd_reset_and_restore(struct ufs_hba *hba)
{
	int err = 0;
S
Sujit Reddy Thumma 已提交
6610
	int retries = MAX_HOST_RESET_RETRIES;
6611

S
Sujit Reddy Thumma 已提交
6612
	do {
6613 6614 6615
		/* Reset the attached device */
		ufshcd_vops_device_reset(hba);

S
Sujit Reddy Thumma 已提交
6616 6617
		err = ufshcd_host_reset_and_restore(hba);
	} while (err && --retries);
6618 6619 6620 6621 6622 6623

	return err;
}

/**
 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6624
 * @cmd: SCSI command pointer
6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635
 *
 * Returns SUCCESS/FAILED
 */
static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
{
	int err;
	unsigned long flags;
	struct ufs_hba *hba;

	hba = shost_priv(cmd->device->host);

6636
	ufshcd_hold(hba, false);
6637 6638 6639 6640 6641 6642 6643 6644
	/*
	 * Check if there is any race with fatal error handling.
	 * If so, wait for it to complete. Even though fatal error
	 * handling does reset and restore in some cases, don't assume
	 * anything out of it. We are just avoiding race here.
	 */
	do {
		spin_lock_irqsave(hba->host->host_lock, flags);
6645
		if (!(work_pending(&hba->eh_work) ||
6646 6647
			    hba->ufshcd_state == UFSHCD_STATE_RESET ||
			    hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
6648 6649 6650
			break;
		spin_unlock_irqrestore(hba->host->host_lock, flags);
		dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
6651
		flush_work(&hba->eh_work);
6652 6653 6654 6655 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667 6668 6669 6670
	} while (1);

	hba->ufshcd_state = UFSHCD_STATE_RESET;
	ufshcd_set_eh_in_progress(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	err = ufshcd_reset_and_restore(hba);

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (!err) {
		err = SUCCESS;
		hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
	} else {
		err = FAILED;
		hba->ufshcd_state = UFSHCD_STATE_ERROR;
	}
	ufshcd_clear_eh_in_progress(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

6671
	ufshcd_release(hba);
6672 6673 6674
	return err;
}

6675 6676 6677 6678 6679 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690
/**
 * ufshcd_get_max_icc_level - calculate the ICC level
 * @sup_curr_uA: max. current supported by the regulator
 * @start_scan: row at the desc table to start scan from
 * @buff: power descriptor buffer
 *
 * Returns calculated max ICC level for specific regulator
 */
static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
{
	int i;
	int curr_uA;
	u16 data;
	u16 unit;

	for (i = start_scan; i >= 0; i--) {
6691
		data = be16_to_cpup((__be16 *)&buff[2 * i]);
6692 6693 6694 6695 6696 6697 6698 6699 6700 6701 6702 6703 6704 6705 6706 6707 6708 6709 6710 6711 6712 6713 6714 6715 6716 6717 6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 6731 6732 6733 6734 6735 6736 6737 6738 6739 6740 6741
		unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
						ATTR_ICC_LVL_UNIT_OFFSET;
		curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
		switch (unit) {
		case UFSHCD_NANO_AMP:
			curr_uA = curr_uA / 1000;
			break;
		case UFSHCD_MILI_AMP:
			curr_uA = curr_uA * 1000;
			break;
		case UFSHCD_AMP:
			curr_uA = curr_uA * 1000 * 1000;
			break;
		case UFSHCD_MICRO_AMP:
		default:
			break;
		}
		if (sup_curr_uA >= curr_uA)
			break;
	}
	if (i < 0) {
		i = 0;
		pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
	}

	return (u32)i;
}

/**
 * ufshcd_calc_icc_level - calculate the max ICC level
 * In case regulators are not initialized we'll return 0
 * @hba: per-adapter instance
 * @desc_buf: power descriptor buffer to extract ICC levels from.
 * @len: length of desc_buff
 *
 * Returns calculated ICC level
 */
static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
							u8 *desc_buf, int len)
{
	u32 icc_level = 0;

	if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
						!hba->vreg_info.vccq2) {
		dev_err(hba->dev,
			"%s: Regulator capability was not set, actvIccLevel=%d",
							__func__, icc_level);
		goto out;
	}

6742
	if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
6743 6744 6745 6746 6747
		icc_level = ufshcd_get_max_icc_level(
				hba->vreg_info.vcc->max_uA,
				POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);

6748
	if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
6749 6750 6751 6752 6753
		icc_level = ufshcd_get_max_icc_level(
				hba->vreg_info.vccq->max_uA,
				icc_level,
				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);

6754
	if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
6755 6756 6757 6758 6759 6760 6761 6762
		icc_level = ufshcd_get_max_icc_level(
				hba->vreg_info.vccq2->max_uA,
				icc_level,
				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
out:
	return icc_level;
}

6763
static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
6764 6765
{
	int ret;
6766
	int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER];
K
Kees Cook 已提交
6767
	u8 *desc_buf;
6768
	u32 icc_level;
K
Kees Cook 已提交
6769 6770 6771 6772

	desc_buf = kmalloc(buff_len, GFP_KERNEL);
	if (!desc_buf)
		return;
6773

B
Bean Huo 已提交
6774 6775
	ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0,
				     desc_buf, buff_len);
6776 6777 6778 6779
	if (ret) {
		dev_err(hba->dev,
			"%s: Failed reading power descriptor.len = %d ret = %d",
			__func__, buff_len, ret);
K
Kees Cook 已提交
6780
		goto out;
6781 6782
	}

6783 6784 6785
	icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
							 buff_len);
	dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
6786

6787
	ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6788
		QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
6789 6790 6791 6792

	if (ret)
		dev_err(hba->dev,
			"%s: Failed configuring bActiveICCLevel = %d ret = %d",
6793
			__func__, icc_level, ret);
6794

K
Kees Cook 已提交
6795 6796
out:
	kfree(desc_buf);
6797 6798
}

6799 6800 6801 6802 6803 6804 6805 6806 6807 6808
static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
{
	scsi_autopm_get_device(sdev);
	blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
	if (sdev->rpm_autosuspend)
		pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
						 RPM_AUTOSUSPEND_DELAY_MS);
	scsi_autopm_put_device(sdev);
}

6809 6810 6811 6812 6813 6814 6815 6816 6817 6818 6819 6820 6821 6822 6823
/**
 * ufshcd_scsi_add_wlus - Adds required W-LUs
 * @hba: per-adapter instance
 *
 * UFS device specification requires the UFS devices to support 4 well known
 * logical units:
 *	"REPORT_LUNS" (address: 01h)
 *	"UFS Device" (address: 50h)
 *	"RPMB" (address: 44h)
 *	"BOOT" (address: 30h)
 * UFS device's power management needs to be controlled by "POWER CONDITION"
 * field of SSU (START STOP UNIT) command. But this "power condition" field
 * will take effect only when its sent to "UFS device" well known logical unit
 * hence we require the scsi_device instance to represent this logical unit in
 * order for the UFS host driver to send the SSU command for power management.
6824
 *
6825 6826 6827
 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
 * Block) LU so user space process can control this LU. User space may also
 * want to have access to BOOT LU.
6828
 *
6829 6830 6831 6832 6833 6834 6835 6836 6837
 * This function adds scsi device instances for each of all well known LUs
 * (except "REPORT LUNS" LU).
 *
 * Returns zero on success (all required W-LUs are added successfully),
 * non-zero error value on failure (if failed to add any of the required W-LU).
 */
static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
{
	int ret = 0;
6838 6839
	struct scsi_device *sdev_rpmb;
	struct scsi_device *sdev_boot;
6840 6841 6842 6843 6844 6845 6846 6847

	hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
	if (IS_ERR(hba->sdev_ufs_device)) {
		ret = PTR_ERR(hba->sdev_ufs_device);
		hba->sdev_ufs_device = NULL;
		goto out;
	}
6848
	ufshcd_blk_pm_runtime_init(hba->sdev_ufs_device);
6849
	scsi_device_put(hba->sdev_ufs_device);
6850

6851
	sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6852
		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6853 6854
	if (IS_ERR(sdev_rpmb)) {
		ret = PTR_ERR(sdev_rpmb);
6855
		goto remove_sdev_ufs_device;
6856
	}
6857
	ufshcd_blk_pm_runtime_init(sdev_rpmb);
6858
	scsi_device_put(sdev_rpmb);
6859 6860 6861

	sdev_boot = __scsi_add_device(hba->host, 0, 0,
		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6862
	if (IS_ERR(sdev_boot)) {
6863
		dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6864 6865
	} else {
		ufshcd_blk_pm_runtime_init(sdev_boot);
6866
		scsi_device_put(sdev_boot);
6867
	}
6868 6869 6870 6871 6872 6873 6874 6875
	goto out;

remove_sdev_ufs_device:
	scsi_remove_device(hba->sdev_ufs_device);
out:
	return ret;
}

6876 6877
static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
{
6878
	struct ufs_dev_info *dev_info = &hba->dev_info;
6879 6880 6881
	u8 lun;
	u32 d_lu_wb_buf_alloc;

6882 6883
	if (!ufshcd_is_wb_allowed(hba))
		return;
6884 6885 6886 6887 6888 6889 6890 6891 6892
	/*
	 * Probe WB only for UFS-2.2 and UFS-3.1 (and later) devices or
	 * UFS devices with quirk UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES
	 * enabled
	 */
	if (!(dev_info->wspecversion >= 0x310 ||
	      dev_info->wspecversion == 0x220 ||
	     (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES)))
		goto wb_disabled;
6893

6894 6895
	if (hba->desc_size[QUERY_DESC_IDN_DEVICE] <
	    DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
6896 6897
		goto wb_disabled;

6898
	dev_info->d_ext_ufs_feature_sup =
6899 6900
		get_unaligned_be32(desc_buf +
				   DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
6901

6902
	if (!(dev_info->d_ext_ufs_feature_sup & UFS_DEV_WRITE_BOOSTER_SUP))
6903 6904
		goto wb_disabled;

6905 6906 6907 6908 6909 6910
	/*
	 * WB may be supported but not configured while provisioning.
	 * The spec says, in dedicated wb buffer mode,
	 * a max of 1 lun would have wb buffer configured.
	 * Now only shared buffer mode is supported.
	 */
6911
	dev_info->b_wb_buffer_type =
6912 6913
		desc_buf[DEVICE_DESC_PARAM_WB_TYPE];

6914
	dev_info->b_presrv_uspc_en =
6915 6916
		desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];

6917 6918
	if (dev_info->b_wb_buffer_type == WB_BUF_MODE_SHARED) {
		dev_info->d_wb_alloc_units =
6919 6920
		get_unaligned_be32(desc_buf +
				   DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS);
6921
		if (!dev_info->d_wb_alloc_units)
6922 6923 6924 6925 6926 6927 6928 6929 6930 6931
			goto wb_disabled;
	} else {
		for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
			d_lu_wb_buf_alloc = 0;
			ufshcd_read_unit_desc_param(hba,
					lun,
					UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
					(u8 *)&d_lu_wb_buf_alloc,
					sizeof(d_lu_wb_buf_alloc));
			if (d_lu_wb_buf_alloc) {
6932
				dev_info->wb_dedicated_lu = lun;
6933 6934 6935
				break;
			}
		}
6936

6937 6938 6939
		if (!d_lu_wb_buf_alloc)
			goto wb_disabled;
	}
6940 6941 6942 6943 6944 6945
	return;

wb_disabled:
	hba->caps &= ~UFSHCD_CAP_WB_EN;
}

6946
void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
6947 6948 6949 6950
{
	struct ufs_dev_fix *f;
	struct ufs_dev_info *dev_info = &hba->dev_info;

6951 6952 6953 6954
	if (!fixups)
		return;

	for (f = fixups; f->quirk; f++) {
6955 6956 6957 6958 6959 6960 6961
		if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
		     f->wmanufacturerid == UFS_ANY_VENDOR) &&
		     ((dev_info->model &&
		       STR_PRFX_EQUAL(f->model, dev_info->model)) ||
		      !strcmp(f->model, UFS_ANY_MODEL)))
			hba->dev_quirks |= f->quirk;
	}
6962
}
6963
EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
6964

6965 6966 6967
static void ufs_fixup_device_setup(struct ufs_hba *hba)
{
	/* fix by general quirk table */
6968
	ufshcd_fixup_dev_quirks(hba, ufs_fixups);
6969 6970 6971 6972 6973

	/* allow vendors to fix quirks */
	ufshcd_vops_fixup_dev_quirks(hba);
}

B
Bean Huo 已提交
6974
static int ufs_get_device_desc(struct ufs_hba *hba)
6975 6976 6977
{
	int err;
	u8 model_index;
K
Kees Cook 已提交
6978
	u8 *desc_buf;
B
Bean Huo 已提交
6979
	struct ufs_dev_info *dev_info = &hba->dev_info;
6980

6981
	desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
K
Kees Cook 已提交
6982 6983 6984 6985
	if (!desc_buf) {
		err = -ENOMEM;
		goto out;
	}
6986

B
Bean Huo 已提交
6987
	err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf,
6988
				     hba->desc_size[QUERY_DESC_IDN_DEVICE]);
6989 6990 6991 6992 6993 6994 6995 6996 6997 6998
	if (err) {
		dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
			__func__, err);
		goto out;
	}

	/*
	 * getting vendor (manufacturerID) and Bank Index in big endian
	 * format
	 */
B
Bean Huo 已提交
6999
	dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
7000 7001
				     desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];

7002 7003 7004 7005
	/* getting Specification Version in big endian format */
	dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
				      desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];

7006
	model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
7007

7008
	err = ufshcd_read_string_desc(hba, model_index,
B
Bean Huo 已提交
7009
				      &dev_info->model, SD_ASCII_STD);
7010
	if (err < 0) {
7011 7012 7013 7014 7015
		dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
			__func__, err);
		goto out;
	}

7016 7017
	ufs_fixup_device_setup(hba);

7018
	ufshcd_wb_probe(hba, desc_buf);
7019

7020 7021 7022 7023 7024
	/*
	 * ufshcd_read_string_desc returns size of the string
	 * reset the error value
	 */
	err = 0;
7025 7026

out:
K
Kees Cook 已提交
7027
	kfree(desc_buf);
7028 7029 7030
	return err;
}

B
Bean Huo 已提交
7031
static void ufs_put_device_desc(struct ufs_hba *hba)
7032
{
B
Bean Huo 已提交
7033 7034 7035 7036
	struct ufs_dev_info *dev_info = &hba->dev_info;

	kfree(dev_info->model);
	dev_info->model = NULL;
7037 7038
}

7039 7040 7041 7042 7043 7044 7045 7046 7047 7048 7049 7050 7051 7052 7053 7054 7055 7056 7057 7058 7059 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 7078 7079 7080 7081 7082 7083 7084 7085 7086 7087 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097 7098 7099 7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110 7111 7112 7113 7114 7115
/**
 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
 * @hba: per-adapter instance
 *
 * PA_TActivate parameter can be tuned manually if UniPro version is less than
 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
 * the hibern8 exit latency.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
{
	int ret = 0;
	u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;

	ret = ufshcd_dme_peer_get(hba,
				  UIC_ARG_MIB_SEL(
					RX_MIN_ACTIVATETIME_CAPABILITY,
					UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
				  &peer_rx_min_activatetime);
	if (ret)
		goto out;

	/* make sure proper unit conversion is applied */
	tuned_pa_tactivate =
		((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
		 / PA_TACTIVATE_TIME_UNIT_US);
	ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
			     tuned_pa_tactivate);

out:
	return ret;
}

/**
 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
 * @hba: per-adapter instance
 *
 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
 * This optimal value can help reduce the hibern8 exit latency.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
{
	int ret = 0;
	u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
	u32 max_hibern8_time, tuned_pa_hibern8time;

	ret = ufshcd_dme_get(hba,
			     UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
					UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
				  &local_tx_hibern8_time_cap);
	if (ret)
		goto out;

	ret = ufshcd_dme_peer_get(hba,
				  UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
					UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
				  &peer_rx_hibern8_time_cap);
	if (ret)
		goto out;

	max_hibern8_time = max(local_tx_hibern8_time_cap,
			       peer_rx_hibern8_time_cap);
	/* make sure proper unit conversion is applied */
	tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
				/ PA_HIBERN8_TIME_UNIT_US);
	ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
			     tuned_pa_hibern8time);
out:
	return ret;
}

7116 7117 7118 7119 7120 7121 7122 7123 7124 7125 7126 7127 7128 7129 7130 7131 7132 7133 7134 7135 7136 7137 7138 7139 7140 7141 7142 7143 7144 7145 7146 7147 7148 7149 7150 7151 7152 7153 7154 7155 7156 7157 7158 7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170 7171 7172 7173 7174 7175 7176 7177 7178 7179 7180 7181 7182 7183 7184 7185
/**
 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
 * less than device PA_TACTIVATE time.
 * @hba: per-adapter instance
 *
 * Some UFS devices require host PA_TACTIVATE to be lower than device
 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
 * for such devices.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
{
	int ret = 0;
	u32 granularity, peer_granularity;
	u32 pa_tactivate, peer_pa_tactivate;
	u32 pa_tactivate_us, peer_pa_tactivate_us;
	u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};

	ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
				  &granularity);
	if (ret)
		goto out;

	ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
				  &peer_granularity);
	if (ret)
		goto out;

	if ((granularity < PA_GRANULARITY_MIN_VAL) ||
	    (granularity > PA_GRANULARITY_MAX_VAL)) {
		dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
			__func__, granularity);
		return -EINVAL;
	}

	if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
	    (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
		dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
			__func__, peer_granularity);
		return -EINVAL;
	}

	ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
	if (ret)
		goto out;

	ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
				  &peer_pa_tactivate);
	if (ret)
		goto out;

	pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
	peer_pa_tactivate_us = peer_pa_tactivate *
			     gran_to_us_table[peer_granularity - 1];

	if (pa_tactivate_us > peer_pa_tactivate_us) {
		u32 new_peer_pa_tactivate;

		new_peer_pa_tactivate = pa_tactivate_us /
				      gran_to_us_table[peer_granularity - 1];
		new_peer_pa_tactivate++;
		ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
					  new_peer_pa_tactivate);
	}

out:
	return ret;
}

B
Bean Huo 已提交
7186
static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
7187 7188 7189 7190 7191 7192
{
	if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
		ufshcd_tune_pa_tactivate(hba);
		ufshcd_tune_pa_hibern8time(hba);
	}

7193 7194
	ufshcd_vops_apply_dev_quirks(hba);

7195 7196 7197
	if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
		/* set 1ms timeout for PA_TACTIVATE */
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
7198 7199 7200

	if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
		ufshcd_quirk_tune_host_pa_tactivate(hba);
7201 7202
}

7203 7204 7205 7206
static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
{
	hba->ufs_stats.hibern8_exit_cnt = 0;
	hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
7207
	hba->req_abort_count = 0;
7208 7209
}

7210 7211 7212 7213 7214 7215
static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
{
	int err;
	size_t buff_len;
	u8 *desc_buf;

7216
	buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY];
7217 7218 7219 7220 7221 7222
	desc_buf = kmalloc(buff_len, GFP_KERNEL);
	if (!desc_buf) {
		err = -ENOMEM;
		goto out;
	}

B
Bean Huo 已提交
7223 7224
	err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0,
				     desc_buf, buff_len);
7225 7226 7227 7228 7229 7230 7231 7232 7233 7234 7235 7236 7237 7238 7239 7240
	if (err) {
		dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
				__func__, err);
		goto out;
	}

	if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
		hba->dev_info.max_lu_supported = 32;
	else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
		hba->dev_info.max_lu_supported = 8;

out:
	kfree(desc_buf);
	return err;
}

7241 7242 7243 7244 7245 7246 7247 7248 7249 7250 7251 7252 7253 7254 7255 7256 7257 7258 7259 7260 7261 7262 7263 7264 7265 7266 7267 7268 7269 7270 7271 7272 7273 7274 7275 7276 7277 7278 7279 7280 7281 7282 7283 7284 7285 7286 7287 7288 7289 7290 7291 7292 7293 7294 7295 7296 7297 7298 7299 7300 7301 7302 7303 7304 7305 7306 7307 7308
static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
	{19200000, REF_CLK_FREQ_19_2_MHZ},
	{26000000, REF_CLK_FREQ_26_MHZ},
	{38400000, REF_CLK_FREQ_38_4_MHZ},
	{52000000, REF_CLK_FREQ_52_MHZ},
	{0, REF_CLK_FREQ_INVAL},
};

static enum ufs_ref_clk_freq
ufs_get_bref_clk_from_hz(unsigned long freq)
{
	int i;

	for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
		if (ufs_ref_clk_freqs[i].freq_hz == freq)
			return ufs_ref_clk_freqs[i].val;

	return REF_CLK_FREQ_INVAL;
}

void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
{
	unsigned long freq;

	freq = clk_get_rate(refclk);

	hba->dev_ref_clk_freq =
		ufs_get_bref_clk_from_hz(freq);

	if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
		dev_err(hba->dev,
		"invalid ref_clk setting = %ld\n", freq);
}

static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
{
	int err;
	u32 ref_clk;
	u32 freq = hba->dev_ref_clk_freq;

	err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
			QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);

	if (err) {
		dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
			err);
		goto out;
	}

	if (ref_clk == freq)
		goto out; /* nothing to update */

	err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
			QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);

	if (err) {
		dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
			ufs_ref_clk_freqs[freq].freq_hz);
		goto out;
	}

	dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
			ufs_ref_clk_freqs[freq].freq_hz);

out:
	return err;
}

7309 7310 7311
static int ufshcd_device_params_init(struct ufs_hba *hba)
{
	bool flag;
7312
	int ret, i;
7313

7314 7315 7316
	 /* Init device descriptor sizes */
	for (i = 0; i < QUERY_DESC_IDN_MAX; i++)
		hba->desc_size[i] = QUERY_DESC_MAX_SIZE;
7317

7318 7319 7320 7321 7322
	/* Init UFS geometry descriptor related parameters */
	ret = ufshcd_device_geo_params_init(hba);
	if (ret)
		goto out;

7323 7324 7325 7326 7327 7328 7329 7330
	/* Check and apply UFS device quirks */
	ret = ufs_get_device_desc(hba);
	if (ret) {
		dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
			__func__, ret);
		goto out;
	}

7331 7332
	ufshcd_get_ref_clk_gating_wait(hba);

7333
	if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7334
			QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
7335 7336
		hba->dev_info.f_power_on_wp_en = flag;

7337 7338 7339 7340 7341
	/* Probe maximum power mode co-supported by both UFS host and device */
	if (ufshcd_get_max_pwr_mode(hba))
		dev_err(hba->dev,
			"%s: Failed getting max supported power mode\n",
			__func__);
7342 7343 7344 7345 7346 7347 7348 7349 7350 7351 7352 7353 7354 7355 7356 7357 7358 7359 7360 7361 7362 7363 7364 7365 7366 7367 7368 7369 7370 7371 7372 7373 7374 7375 7376 7377 7378 7379 7380 7381
out:
	return ret;
}

/**
 * ufshcd_add_lus - probe and add UFS logical units
 * @hba: per-adapter instance
 */
static int ufshcd_add_lus(struct ufs_hba *hba)
{
	int ret;

	/* Add required well known logical units to scsi mid layer */
	ret = ufshcd_scsi_add_wlus(hba);
	if (ret)
		goto out;

	/* Initialize devfreq after UFS device is detected */
	if (ufshcd_is_clkscaling_supported(hba)) {
		memcpy(&hba->clk_scaling.saved_pwr_info.info,
			&hba->pwr_info,
			sizeof(struct ufs_pa_layer_attr));
		hba->clk_scaling.saved_pwr_info.is_valid = true;
		if (!hba->devfreq) {
			ret = ufshcd_devfreq_init(hba);
			if (ret)
				goto out;
		}

		hba->clk_scaling.is_allowed = true;
	}

	ufs_bsg_probe(hba);
	scsi_scan_host(hba->host);
	pm_runtime_put_sync(hba->dev);

out:
	return ret;
}

7382
/**
S
Sujit Reddy Thumma 已提交
7383 7384
 * ufshcd_probe_hba - probe hba to detect device and initialize
 * @hba: per-adapter instance
7385
 * @async: asynchronous execution or not
S
Sujit Reddy Thumma 已提交
7386 7387
 *
 * Execute link-startup and verify device initialization
7388
 */
7389
static int ufshcd_probe_hba(struct ufs_hba *hba, bool async)
7390 7391
{
	int ret;
7392
	ktime_t start = ktime_get();
7393 7394

	ret = ufshcd_link_startup(hba);
7395 7396 7397
	if (ret)
		goto out;

7398 7399 7400
	/* Debug counters initialization */
	ufshcd_clear_dbg_ufs_stats(hba);

7401 7402
	/* UniPro link is active now */
	ufshcd_set_link_active(hba);
7403

7404
	/* Verify device initialization by sending NOP OUT UPIU */
7405 7406 7407
	ret = ufshcd_verify_dev_init(hba);
	if (ret)
		goto out;
7408

7409
	/* Initiate UFS initialization, and waiting until completion */
7410 7411 7412
	ret = ufshcd_complete_dev_init(hba);
	if (ret)
		goto out;
7413

7414 7415 7416 7417 7418 7419 7420 7421
	/*
	 * Initialize UFS device parameters used by driver, these
	 * parameters are associated with UFS descriptors.
	 */
	if (async) {
		ret = ufshcd_device_params_init(hba);
		if (ret)
			goto out;
7422 7423
	}

B
Bean Huo 已提交
7424
	ufshcd_tune_unipro_params(hba);
7425

7426 7427
	/* UFS device is also active now */
	ufshcd_set_ufs_dev_active(hba);
7428
	ufshcd_force_reset_auto_bkops(hba);
7429 7430
	hba->wlun_dev_clr_ua = true;

7431 7432
	/* Gear up to HS gear if supported */
	if (hba->max_pwr_info.is_valid) {
7433 7434 7435 7436 7437 7438
		/*
		 * Set the right value to bRefClkFreq before attempting to
		 * switch to HS gears.
		 */
		if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
			ufshcd_set_dev_ref_clk(hba);
D
Dolev Raviv 已提交
7439
		ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
7440
		if (ret) {
D
Dolev Raviv 已提交
7441 7442
			dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
					__func__, ret);
7443 7444
			goto out;
		}
7445
		ufshcd_print_pwr_info(hba);
D
Dolev Raviv 已提交
7446
	}
7447

7448 7449 7450 7451 7452 7453 7454 7455
	/*
	 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
	 * and for removable UFS card as well, hence always set the parameter.
	 * Note: Error handler may issue the device reset hence resetting
	 * bActiveICCLevel as well so it is always safe to set this here.
	 */
	ufshcd_set_active_icc_lvl(hba);

7456 7457
	/* set the state as operational after switching to desired gear */
	hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
7458

7459
	ufshcd_wb_config(hba);
7460 7461 7462
	/* Enable Auto-Hibernate if configured */
	ufshcd_auto_hibern8_enable(hba);

7463
out:
S
Sujit Reddy Thumma 已提交
7464

7465 7466
	trace_ufshcd_init(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
7467
		hba->curr_dev_pwr_mode, hba->uic_link_state);
S
Sujit Reddy Thumma 已提交
7468 7469 7470 7471 7472 7473 7474 7475 7476 7477 7478
	return ret;
}

/**
 * ufshcd_async_scan - asynchronous execution for probing hba
 * @data: data pointer to pass to this function
 * @cookie: cookie data
 */
static void ufshcd_async_scan(void *data, async_cookie_t cookie)
{
	struct ufs_hba *hba = (struct ufs_hba *)data;
7479
	int ret;
S
Sujit Reddy Thumma 已提交
7480

7481 7482 7483 7484 7485 7486 7487 7488 7489 7490 7491 7492 7493 7494 7495 7496 7497
	/* Initialize hba, detect and initialize UFS device */
	ret = ufshcd_probe_hba(hba, true);
	if (ret)
		goto out;

	/* Probe and add UFS logical units  */
	ret = ufshcd_add_lus(hba);
out:
	/*
	 * If we failed to initialize the device or the device is not
	 * present, turn off the power/clocks etc.
	 */
	if (ret) {
		pm_runtime_put_sync(hba->dev);
		ufshcd_exit_clk_scaling(hba);
		ufshcd_hba_exit(hba);
	}
7498 7499
}

7500 7501
static const struct attribute_group *ufshcd_driver_groups[] = {
	&ufs_sysfs_unit_descriptor_group,
7502
	&ufs_sysfs_lun_attributes_group,
7503 7504 7505
	NULL,
};

7506 7507
static struct ufs_hba_variant_params ufs_hba_vps = {
	.hba_enable_delay_us		= 1000,
7508
	.wb_flush_threshold		= UFS_WB_BUF_REMAIN_PERCENT(40),
7509 7510 7511 7512 7513 7514 7515
	.devfreq_profile.polling_ms	= 100,
	.devfreq_profile.target		= ufshcd_devfreq_target,
	.devfreq_profile.get_dev_status	= ufshcd_devfreq_get_dev_status,
	.ondemand_data.upthreshold	= 70,
	.ondemand_data.downdifferential	= 5,
};

7516 7517 7518 7519 7520 7521
static struct scsi_host_template ufshcd_driver_template = {
	.module			= THIS_MODULE,
	.name			= UFSHCD,
	.proc_name		= UFSHCD,
	.queuecommand		= ufshcd_queuecommand,
	.slave_alloc		= ufshcd_slave_alloc,
7522
	.slave_configure	= ufshcd_slave_configure,
7523
	.slave_destroy		= ufshcd_slave_destroy,
7524
	.change_queue_depth	= ufshcd_change_queue_depth,
7525
	.eh_abort_handler	= ufshcd_abort,
7526 7527
	.eh_device_reset_handler = ufshcd_eh_device_reset_handler,
	.eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
7528 7529 7530 7531
	.this_id		= -1,
	.sg_tablesize		= SG_ALL,
	.cmd_per_lun		= UFSHCD_CMD_PER_LUN,
	.can_queue		= UFSHCD_CAN_QUEUE,
7532
	.max_segment_size	= PRDT_DATA_BYTE_COUNT_MAX,
7533
	.max_host_blocked	= 1,
7534
	.track_queue_depth	= 1,
7535
	.sdev_groups		= ufshcd_driver_groups,
7536
	.dma_boundary		= PAGE_SIZE - 1,
7537
	.rpm_autosuspend_delay	= RPM_AUTOSUSPEND_DELAY_MS,
7538 7539
};

7540 7541 7542
static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
				   int ua)
{
7543
	int ret;
7544

7545 7546
	if (!vreg)
		return 0;
7547

7548 7549 7550 7551 7552 7553 7554 7555 7556
	/*
	 * "set_load" operation shall be required on those regulators
	 * which specifically configured current limitation. Otherwise
	 * zero max_uA may cause unexpected behavior when regulator is
	 * enabled or set as high power mode.
	 */
	if (!vreg->max_uA)
		return 0;

7557 7558 7559 7560
	ret = regulator_set_load(vreg->reg, ua);
	if (ret < 0) {
		dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
				__func__, vreg->name, ua, ret);
7561 7562 7563 7564 7565 7566 7567 7568
	}

	return ret;
}

static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
					 struct ufs_vreg *vreg)
{
7569
	return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
7570 7571 7572 7573 7574
}

static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
					 struct ufs_vreg *vreg)
{
7575 7576 7577
	if (!vreg)
		return 0;

7578
	return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
7579 7580
}

7581 7582 7583 7584
static int ufshcd_config_vreg(struct device *dev,
		struct ufs_vreg *vreg, bool on)
{
	int ret = 0;
7585 7586
	struct regulator *reg;
	const char *name;
7587 7588 7589 7590
	int min_uV, uA_load;

	BUG_ON(!vreg);

7591 7592 7593
	reg = vreg->reg;
	name = vreg->name;

7594
	if (regulator_count_voltages(reg) > 0) {
7595 7596 7597 7598 7599
		uA_load = on ? vreg->max_uA : 0;
		ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
		if (ret)
			goto out;

7600 7601 7602 7603 7604 7605
		if (vreg->min_uV && vreg->max_uV) {
			min_uV = on ? vreg->min_uV : 0;
			ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
			if (ret) {
				dev_err(dev,
					"%s: %s set voltage failed, err=%d\n",
7606
					__func__, name, ret);
7607 7608
				goto out;
			}
7609 7610 7611 7612 7613 7614 7615 7616 7617 7618
		}
	}
out:
	return ret;
}

static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
{
	int ret = 0;

7619
	if (!vreg || vreg->enabled)
7620 7621 7622 7623 7624 7625 7626 7627 7628 7629 7630 7631 7632 7633 7634 7635 7636 7637 7638
		goto out;

	ret = ufshcd_config_vreg(dev, vreg, true);
	if (!ret)
		ret = regulator_enable(vreg->reg);

	if (!ret)
		vreg->enabled = true;
	else
		dev_err(dev, "%s: %s enable failed, err=%d\n",
				__func__, vreg->name, ret);
out:
	return ret;
}

static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
{
	int ret = 0;

7639
	if (!vreg || !vreg->enabled)
7640 7641 7642 7643 7644 7645 7646 7647 7648 7649 7650 7651 7652 7653 7654 7655 7656 7657 7658 7659 7660 7661 7662 7663 7664 7665 7666 7667 7668 7669 7670 7671 7672 7673 7674 7675 7676 7677 7678 7679 7680 7681 7682
		goto out;

	ret = regulator_disable(vreg->reg);

	if (!ret) {
		/* ignore errors on applying disable config */
		ufshcd_config_vreg(dev, vreg, false);
		vreg->enabled = false;
	} else {
		dev_err(dev, "%s: %s disable failed, err=%d\n",
				__func__, vreg->name, ret);
	}
out:
	return ret;
}

static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
{
	int ret = 0;
	struct device *dev = hba->dev;
	struct ufs_vreg_info *info = &hba->vreg_info;

	ret = ufshcd_toggle_vreg(dev, info->vcc, on);
	if (ret)
		goto out;

	ret = ufshcd_toggle_vreg(dev, info->vccq, on);
	if (ret)
		goto out;

	ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
	if (ret)
		goto out;

out:
	if (ret) {
		ufshcd_toggle_vreg(dev, info->vccq2, false);
		ufshcd_toggle_vreg(dev, info->vccq, false);
		ufshcd_toggle_vreg(dev, info->vcc, false);
	}
	return ret;
}

7683 7684 7685 7686
static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
{
	struct ufs_vreg_info *info = &hba->vreg_info;

7687
	return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7688 7689
}

7690 7691 7692 7693 7694 7695 7696 7697 7698 7699 7700 7701 7702 7703 7704 7705 7706 7707 7708 7709 7710 7711 7712 7713 7714 7715 7716 7717 7718 7719 7720 7721 7722 7723 7724 7725
static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
{
	int ret = 0;

	if (!vreg)
		goto out;

	vreg->reg = devm_regulator_get(dev, vreg->name);
	if (IS_ERR(vreg->reg)) {
		ret = PTR_ERR(vreg->reg);
		dev_err(dev, "%s: %s get failed, err=%d\n",
				__func__, vreg->name, ret);
	}
out:
	return ret;
}

static int ufshcd_init_vreg(struct ufs_hba *hba)
{
	int ret = 0;
	struct device *dev = hba->dev;
	struct ufs_vreg_info *info = &hba->vreg_info;

	ret = ufshcd_get_vreg(dev, info->vcc);
	if (ret)
		goto out;

	ret = ufshcd_get_vreg(dev, info->vccq);
	if (ret)
		goto out;

	ret = ufshcd_get_vreg(dev, info->vccq2);
out:
	return ret;
}

7726 7727 7728 7729 7730 7731 7732 7733 7734 7735
static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
{
	struct ufs_vreg_info *info = &hba->vreg_info;

	if (info)
		return ufshcd_get_vreg(hba->dev, info->vdd_hba);

	return 0;
}

7736 7737
static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
					bool skip_ref_clk)
7738 7739 7740 7741
{
	int ret = 0;
	struct ufs_clk_info *clki;
	struct list_head *head = &hba->clk_list_head;
7742
	unsigned long flags;
7743 7744
	ktime_t start = ktime_get();
	bool clk_state_changed = false;
7745

7746
	if (list_empty(head))
7747 7748
		goto out;

7749 7750 7751
	ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
	if (ret)
		return ret;
7752

7753 7754
	list_for_each_entry(clki, head, list) {
		if (!IS_ERR_OR_NULL(clki->clk)) {
7755 7756 7757
			if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
				continue;

7758
			clk_state_changed = on ^ clki->enabled;
7759 7760 7761 7762 7763 7764 7765 7766 7767 7768 7769 7770 7771 7772 7773
			if (on && !clki->enabled) {
				ret = clk_prepare_enable(clki->clk);
				if (ret) {
					dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
						__func__, clki->name, ret);
					goto out;
				}
			} else if (!on && clki->enabled) {
				clk_disable_unprepare(clki->clk);
			}
			clki->enabled = on;
			dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
					clki->name, on ? "en" : "dis");
		}
	}
7774

7775 7776 7777
	ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
	if (ret)
		return ret;
7778

7779 7780 7781 7782 7783 7784
out:
	if (ret) {
		list_for_each_entry(clki, head, list) {
			if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
				clk_disable_unprepare(clki->clk);
		}
7785
	} else if (!ret && on) {
7786 7787
		spin_lock_irqsave(hba->host->host_lock, flags);
		hba->clk_gating.state = CLKS_ON;
7788 7789
		trace_ufshcd_clk_gating(dev_name(hba->dev),
					hba->clk_gating.state);
7790
		spin_unlock_irqrestore(hba->host->host_lock, flags);
7791
	}
7792

7793 7794 7795 7796
	if (clk_state_changed)
		trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
			(on ? "on" : "off"),
			ktime_to_us(ktime_sub(ktime_get(), start)), ret);
7797 7798 7799
	return ret;
}

7800 7801 7802 7803 7804
static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
{
	return  __ufshcd_setup_clocks(hba, on, false);
}

7805 7806 7807 7808 7809 7810 7811
static int ufshcd_init_clocks(struct ufs_hba *hba)
{
	int ret = 0;
	struct ufs_clk_info *clki;
	struct device *dev = hba->dev;
	struct list_head *head = &hba->clk_list_head;

7812
	if (list_empty(head))
7813 7814 7815 7816 7817 7818 7819 7820 7821 7822 7823 7824 7825 7826
		goto out;

	list_for_each_entry(clki, head, list) {
		if (!clki->name)
			continue;

		clki->clk = devm_clk_get(dev, clki->name);
		if (IS_ERR(clki->clk)) {
			ret = PTR_ERR(clki->clk);
			dev_err(dev, "%s: %s clk get failed, %d\n",
					__func__, clki->name, ret);
			goto out;
		}

7827 7828 7829 7830 7831 7832 7833 7834
		/*
		 * Parse device ref clk freq as per device tree "ref_clk".
		 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
		 * in ufshcd_alloc_host().
		 */
		if (!strcmp(clki->name, "ref_clk"))
			ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);

7835 7836 7837 7838 7839 7840 7841 7842
		if (clki->max_freq) {
			ret = clk_set_rate(clki->clk, clki->max_freq);
			if (ret) {
				dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
					__func__, clki->name,
					clki->max_freq, ret);
				goto out;
			}
7843
			clki->curr_freq = clki->max_freq;
7844 7845 7846 7847 7848 7849 7850 7851
		}
		dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
				clki->name, clk_get_rate(clki->clk));
	}
out:
	return ret;
}

7852 7853 7854 7855 7856 7857 7858
static int ufshcd_variant_hba_init(struct ufs_hba *hba)
{
	int err = 0;

	if (!hba->vops)
		goto out;

7859 7860 7861
	err = ufshcd_vops_init(hba);
	if (err)
		goto out;
7862

7863 7864 7865
	err = ufshcd_vops_setup_regulators(hba, true);
	if (err)
		goto out_exit;
7866 7867 7868 7869

	goto out;

out_exit:
7870
	ufshcd_vops_exit(hba);
7871 7872 7873
out:
	if (err)
		dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7874
			__func__, ufshcd_get_var_name(hba), err);
7875 7876 7877 7878 7879 7880 7881 7882
	return err;
}

static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
{
	if (!hba->vops)
		return;

7883
	ufshcd_vops_setup_regulators(hba, false);
7884

7885
	ufshcd_vops_exit(hba);
7886 7887
}

7888 7889 7890 7891
static int ufshcd_hba_init(struct ufs_hba *hba)
{
	int err;

7892 7893 7894 7895 7896 7897 7898 7899
	/*
	 * Handle host controller power separately from the UFS device power
	 * rails as it will help controlling the UFS host controller power
	 * collapse easily which is different than UFS device power collapse.
	 * Also, enable the host controller power before we go ahead with rest
	 * of the initialization here.
	 */
	err = ufshcd_init_hba_vreg(hba);
7900 7901 7902
	if (err)
		goto out;

7903
	err = ufshcd_setup_hba_vreg(hba, true);
7904 7905 7906
	if (err)
		goto out;

7907 7908 7909 7910 7911 7912 7913 7914
	err = ufshcd_init_clocks(hba);
	if (err)
		goto out_disable_hba_vreg;

	err = ufshcd_setup_clocks(hba, true);
	if (err)
		goto out_disable_hba_vreg;

7915 7916 7917 7918 7919 7920 7921 7922
	err = ufshcd_init_vreg(hba);
	if (err)
		goto out_disable_clks;

	err = ufshcd_setup_vreg(hba, true);
	if (err)
		goto out_disable_clks;

7923 7924 7925 7926
	err = ufshcd_variant_hba_init(hba);
	if (err)
		goto out_disable_vreg;

S
Sujit Reddy Thumma 已提交
7927
	hba->is_powered = true;
7928 7929 7930 7931
	goto out;

out_disable_vreg:
	ufshcd_setup_vreg(hba, false);
7932 7933
out_disable_clks:
	ufshcd_setup_clocks(hba, false);
7934 7935
out_disable_hba_vreg:
	ufshcd_setup_hba_vreg(hba, false);
7936 7937 7938 7939 7940 7941
out:
	return err;
}

static void ufshcd_hba_exit(struct ufs_hba *hba)
{
S
Sujit Reddy Thumma 已提交
7942 7943 7944
	if (hba->is_powered) {
		ufshcd_variant_hba_exit(hba);
		ufshcd_setup_vreg(hba, false);
7945
		ufshcd_suspend_clkscaling(hba);
7946
		if (ufshcd_is_clkscaling_supported(hba))
7947 7948
			if (hba->devfreq)
				ufshcd_suspend_clkscaling(hba);
S
Sujit Reddy Thumma 已提交
7949 7950 7951
		ufshcd_setup_clocks(hba, false);
		ufshcd_setup_hba_vreg(hba, false);
		hba->is_powered = false;
B
Bean Huo 已提交
7952
		ufs_put_device_desc(hba);
S
Sujit Reddy Thumma 已提交
7953
	}
7954 7955
}

7956 7957 7958 7959 7960 7961 7962
static int
ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
{
	unsigned char cmd[6] = {REQUEST_SENSE,
				0,
				0,
				0,
7963
				UFS_SENSE_SIZE,
7964 7965 7966 7967
				0};
	char *buffer;
	int ret;

7968
	buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7969 7970 7971 7972 7973
	if (!buffer) {
		ret = -ENOMEM;
		goto out;
	}

7974
	ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7975
			UFS_SENSE_SIZE, NULL, NULL,
7976
			msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7977 7978 7979 7980 7981 7982 7983 7984 7985 7986 7987 7988 7989 7990 7991 7992 7993 7994 7995 7996 7997 7998
	if (ret)
		pr_err("%s: failed with err %d\n", __func__, ret);

	kfree(buffer);
out:
	return ret;
}

/**
 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
 *			     power mode
 * @hba: per adapter instance
 * @pwr_mode: device power mode to set
 *
 * Returns 0 if requested power mode is set successfully
 * Returns non-zero if failed to set the requested power mode
 */
static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
				     enum ufs_dev_pwr_mode pwr_mode)
{
	unsigned char cmd[6] = { START_STOP };
	struct scsi_sense_hdr sshdr;
7999 8000
	struct scsi_device *sdp;
	unsigned long flags;
8001 8002
	int ret;

8003 8004 8005 8006 8007 8008 8009 8010 8011 8012 8013 8014 8015 8016 8017
	spin_lock_irqsave(hba->host->host_lock, flags);
	sdp = hba->sdev_ufs_device;
	if (sdp) {
		ret = scsi_device_get(sdp);
		if (!ret && !scsi_device_online(sdp)) {
			ret = -ENODEV;
			scsi_device_put(sdp);
		}
	} else {
		ret = -ENODEV;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (ret)
		return ret;
8018 8019 8020 8021 8022 8023 8024 8025 8026 8027 8028 8029 8030 8031 8032 8033 8034 8035 8036 8037

	/*
	 * If scsi commands fail, the scsi mid-layer schedules scsi error-
	 * handling, which would wait for host to be resumed. Since we know
	 * we are functional while we are here, skip host resume in error
	 * handling context.
	 */
	hba->host->eh_noresume = 1;
	if (hba->wlun_dev_clr_ua) {
		ret = ufshcd_send_request_sense(hba, sdp);
		if (ret)
			goto out;
		/* Unit attention condition is cleared now */
		hba->wlun_dev_clr_ua = false;
	}

	cmd[4] = pwr_mode << 4;

	/*
	 * Current function would be generally called from the power management
8038
	 * callbacks hence set the RQF_PM flag so that it doesn't resume the
8039 8040
	 * already suspended childs.
	 */
8041 8042
	ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
			START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
8043 8044
	if (ret) {
		sdev_printk(KERN_WARNING, sdp,
H
Hannes Reinecke 已提交
8045 8046
			    "START_STOP failed for power mode: %d, result %x\n",
			    pwr_mode, ret);
8047
		if (driver_byte(ret) == DRIVER_SENSE)
8048
			scsi_print_sense_hdr(sdp, NULL, &sshdr);
8049 8050 8051 8052 8053
	}

	if (!ret)
		hba->curr_dev_pwr_mode = pwr_mode;
out:
8054
	scsi_device_put(sdp);
8055 8056 8057 8058 8059 8060 8061 8062 8063 8064 8065 8066 8067 8068 8069 8070 8071 8072 8073 8074 8075 8076 8077 8078 8079
	hba->host->eh_noresume = 0;
	return ret;
}

static int ufshcd_link_state_transition(struct ufs_hba *hba,
					enum uic_link_state req_link_state,
					int check_for_bkops)
{
	int ret = 0;

	if (req_link_state == hba->uic_link_state)
		return 0;

	if (req_link_state == UIC_LINK_HIBERN8_STATE) {
		ret = ufshcd_uic_hibern8_enter(hba);
		if (!ret)
			ufshcd_set_link_hibern8(hba);
		else
			goto out;
	}
	/*
	 * If autobkops is enabled, link can't be turned off because
	 * turning off the link would also turn off the device.
	 */
	else if ((req_link_state == UIC_LINK_OFF_STATE) &&
D
Dan Carpenter 已提交
8080
		 (!check_for_bkops || !hba->auto_bkops_enabled)) {
8081 8082 8083 8084 8085 8086 8087 8088 8089 8090
		/*
		 * Let's make sure that link is in low power mode, we are doing
		 * this currently by putting the link in Hibern8. Otherway to
		 * put the link in low power mode is to send the DME end point
		 * to device and then send the DME reset command to local
		 * unipro. But putting the link in hibern8 is much faster.
		 */
		ret = ufshcd_uic_hibern8_enter(hba);
		if (ret)
			goto out;
8091 8092 8093 8094
		/*
		 * Change controller state to "reset state" which
		 * should also put the link in off/reset state
		 */
8095
		ufshcd_hba_stop(hba);
8096 8097 8098 8099 8100 8101 8102 8103 8104 8105 8106 8107 8108
		/*
		 * TODO: Check if we need any delay to make sure that
		 * controller is reset
		 */
		ufshcd_set_link_off(hba);
	}

out:
	return ret;
}

static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
{
8109 8110 8111 8112 8113 8114 8115 8116 8117 8118
	/*
	 * It seems some UFS devices may keep drawing more than sleep current
	 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
	 * To avoid this situation, add 2ms delay before putting these UFS
	 * rails in LPM mode.
	 */
	if (!ufshcd_is_link_active(hba) &&
	    hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
		usleep_range(2000, 2100);

8119 8120 8121 8122 8123 8124 8125 8126 8127 8128 8129
	/*
	 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
	 * power.
	 *
	 * If UFS device and link is in OFF state, all power supplies (VCC,
	 * VCCQ, VCCQ2) can be turned off if power on write protect is not
	 * required. If UFS link is inactive (Hibern8 or OFF state) and device
	 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
	 *
	 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
	 * in low power state which would save some power.
8130 8131 8132
	 *
	 * If Write Booster is enabled and the device needs to flush the WB
	 * buffer OR if bkops status is urgent for WB, keep Vcc on.
8133 8134 8135 8136 8137
	 */
	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
	    !hba->dev_info.is_lu_power_on_wp) {
		ufshcd_setup_vreg(hba, false);
	} else if (!ufshcd_is_ufs_dev_active(hba)) {
8138
		ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8139 8140 8141 8142 8143 8144 8145 8146 8147 8148 8149 8150 8151 8152 8153 8154 8155 8156 8157 8158 8159 8160 8161
		if (!ufshcd_is_link_active(hba)) {
			ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
			ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
		}
	}
}

static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
{
	int ret = 0;

	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
	    !hba->dev_info.is_lu_power_on_wp) {
		ret = ufshcd_setup_vreg(hba, true);
	} else if (!ufshcd_is_ufs_dev_active(hba)) {
		if (!ret && !ufshcd_is_link_active(hba)) {
			ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
			if (ret)
				goto vcc_disable;
			ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
			if (ret)
				goto vccq_lpm;
		}
8162
		ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
8163 8164 8165 8166 8167 8168 8169 8170 8171 8172 8173 8174 8175 8176 8177 8178 8179 8180 8181 8182 8183 8184 8185
	}
	goto out;

vccq_lpm:
	ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
vcc_disable:
	ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
out:
	return ret;
}

static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
{
	if (ufshcd_is_link_off(hba))
		ufshcd_setup_hba_vreg(hba, false);
}

static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
{
	if (ufshcd_is_link_off(hba))
		ufshcd_setup_hba_vreg(hba, true);
}

8186
/**
8187
 * ufshcd_suspend - helper function for suspend operations
8188
 * @hba: per adapter instance
8189 8190 8191 8192 8193 8194 8195 8196
 * @pm_op: desired low power operation type
 *
 * This function will try to put the UFS device and link into low power
 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
 * (System PM level).
 *
 * If this function is called during shutdown, it will make sure that
 * both UFS device and UFS link is powered off.
8197
 *
8198 8199 8200
 * NOTE: UFS device & link must be active before we enter in this function.
 *
 * Returns 0 for success and non-zero for failure
8201
 */
8202
static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8203
{
8204 8205 8206 8207 8208 8209 8210 8211 8212 8213 8214 8215 8216 8217 8218 8219
	int ret = 0;
	enum ufs_pm_level pm_lvl;
	enum ufs_dev_pwr_mode req_dev_pwr_mode;
	enum uic_link_state req_link_state;

	hba->pm_op_in_progress = 1;
	if (!ufshcd_is_shutdown_pm(pm_op)) {
		pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
			 hba->rpm_lvl : hba->spm_lvl;
		req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
		req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
	} else {
		req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
		req_link_state = UIC_LINK_OFF_STATE;
	}

8220
	/*
8221 8222
	 * If we can't transition into any of the low power modes
	 * just gate the clocks.
8223
	 */
8224 8225 8226
	ufshcd_hold(hba, false);
	hba->clk_gating.is_suspended = true;

8227 8228 8229 8230 8231
	if (hba->clk_scaling.is_allowed) {
		cancel_work_sync(&hba->clk_scaling.suspend_work);
		cancel_work_sync(&hba->clk_scaling.resume_work);
		ufshcd_suspend_clkscaling(hba);
	}
8232

8233 8234 8235 8236
	if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
			req_link_state == UIC_LINK_ACTIVE_STATE) {
		goto disable_clks;
	}
8237

8238 8239
	if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
	    (req_link_state == hba->uic_link_state))
8240
		goto enable_gating;
8241 8242 8243 8244

	/* UFS device & link must be active before we enter in this function */
	if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
		ret = -EINVAL;
8245
		goto enable_gating;
8246 8247 8248
	}

	if (ufshcd_is_runtime_pm(pm_op)) {
8249 8250 8251 8252 8253 8254 8255 8256 8257 8258 8259 8260 8261
		if (ufshcd_can_autobkops_during_suspend(hba)) {
			/*
			 * The device is idle with no requests in the queue,
			 * allow background operations if bkops status shows
			 * that performance might be impacted.
			 */
			ret = ufshcd_urgent_bkops(hba);
			if (ret)
				goto enable_gating;
		} else {
			/* make sure that auto bkops is disabled */
			ufshcd_disable_auto_bkops(hba);
		}
8262
		/*
8263 8264 8265
		 * If device needs to do BKOP or WB buffer flush during
		 * Hibern8, keep device power mode as "active power mode"
		 * and VCC supply.
8266
		 */
8267 8268 8269 8270 8271 8272 8273 8274 8275 8276 8277 8278 8279 8280
		hba->dev_info.b_rpm_dev_flush_capable =
			hba->auto_bkops_enabled ||
			(((req_link_state == UIC_LINK_HIBERN8_STATE) ||
			((req_link_state == UIC_LINK_ACTIVE_STATE) &&
			ufshcd_is_auto_hibern8_enabled(hba))) &&
			ufshcd_wb_need_flush(hba));
	}

	if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
		if ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
		    !ufshcd_is_runtime_pm(pm_op)) {
			/* ensure that bkops is disabled */
			ufshcd_disable_auto_bkops(hba);
		}
8281

8282 8283 8284 8285 8286
		if (!hba->dev_info.b_rpm_dev_flush_capable) {
			ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
			if (ret)
				goto enable_gating;
		}
8287 8288
	}

8289
	flush_work(&hba->eeh_work);
8290 8291 8292 8293 8294 8295 8296 8297 8298 8299 8300 8301
	ret = ufshcd_link_state_transition(hba, req_link_state, 1);
	if (ret)
		goto set_dev_active;

	ufshcd_vreg_set_lpm(hba);

disable_clks:
	/*
	 * Call vendor specific suspend callback. As these callbacks may access
	 * vendor specific host controller register space call them before the
	 * host clocks are ON.
	 */
8302 8303 8304
	ret = ufshcd_vops_suspend(hba, pm_op);
	if (ret)
		goto set_link_active;
8305 8306 8307 8308 8309
	/*
	 * Disable the host irq as host controller as there won't be any
	 * host controller transaction expected till resume.
	 */
	ufshcd_disable_irq(hba);
8310 8311 8312 8313 8314 8315 8316

	if (!ufshcd_is_link_active(hba))
		ufshcd_setup_clocks(hba, false);
	else
		/* If link is active, device ref_clk can't be switched off */
		__ufshcd_setup_clocks(hba, false, true);

8317
	hba->clk_gating.state = CLKS_OFF;
8318
	trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
8319

8320 8321 8322 8323 8324
	/* Put the host controller in low power mode if possible */
	ufshcd_hba_vreg_set_lpm(hba);
	goto out;

set_link_active:
8325 8326
	if (hba->clk_scaling.is_allowed)
		ufshcd_resume_clkscaling(hba);
8327 8328 8329 8330 8331 8332 8333 8334
	ufshcd_vreg_set_hpm(hba);
	if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
		ufshcd_set_link_active(hba);
	else if (ufshcd_is_link_off(hba))
		ufshcd_host_reset_and_restore(hba);
set_dev_active:
	if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
		ufshcd_disable_auto_bkops(hba);
8335
enable_gating:
8336 8337
	if (hba->clk_scaling.is_allowed)
		ufshcd_resume_clkscaling(hba);
8338
	hba->clk_gating.is_suspended = false;
8339
	hba->dev_info.b_rpm_dev_flush_capable = false;
8340
	ufshcd_release(hba);
8341
out:
8342 8343 8344 8345 8346
	if (hba->dev_info.b_rpm_dev_flush_capable) {
		schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
			msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
	}

8347
	hba->pm_op_in_progress = 0;
8348

8349 8350
	if (ret)
		ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
8351
	return ret;
8352 8353 8354
}

/**
8355
 * ufshcd_resume - helper function for resume operations
8356
 * @hba: per adapter instance
8357
 * @pm_op: runtime PM or system PM
8358
 *
8359 8360 8361 8362
 * This function basically brings the UFS device, UniPro link and controller
 * to active state.
 *
 * Returns 0 for success and non-zero for failure
8363
 */
8364
static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8365
{
8366 8367 8368 8369 8370 8371 8372 8373 8374 8375 8376 8377 8378
	int ret;
	enum uic_link_state old_link_state;

	hba->pm_op_in_progress = 1;
	old_link_state = hba->uic_link_state;

	ufshcd_hba_vreg_set_hpm(hba);
	/* Make sure clocks are enabled before accessing controller */
	ret = ufshcd_setup_clocks(hba, true);
	if (ret)
		goto out;

	/* enable the host irq as host controller would be active soon */
C
Can Guo 已提交
8379
	ufshcd_enable_irq(hba);
8380 8381 8382 8383 8384

	ret = ufshcd_vreg_set_hpm(hba);
	if (ret)
		goto disable_irq_and_vops_clks;

8385
	/*
8386 8387 8388
	 * Call vendor specific resume callback. As these callbacks may access
	 * vendor specific host controller register space call them when the
	 * host clocks are ON.
8389
	 */
8390 8391 8392
	ret = ufshcd_vops_resume(hba, pm_op);
	if (ret)
		goto disable_vreg;
8393 8394 8395 8396 8397 8398 8399 8400 8401

	if (ufshcd_is_link_hibern8(hba)) {
		ret = ufshcd_uic_hibern8_exit(hba);
		if (!ret)
			ufshcd_set_link_active(hba);
		else
			goto vendor_suspend;
	} else if (ufshcd_is_link_off(hba)) {
		/*
8402 8403 8404 8405 8406 8407
		 * A full initialization of the host and the device is
		 * required since the link was put to off during suspend.
		 */
		ret = ufshcd_reset_and_restore(hba);
		/*
		 * ufshcd_reset_and_restore() should have already
8408 8409 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419
		 * set the link state as active
		 */
		if (ret || !ufshcd_is_link_active(hba))
			goto vendor_suspend;
	}

	if (!ufshcd_is_ufs_dev_active(hba)) {
		ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
		if (ret)
			goto set_old_link_state;
	}

8420 8421 8422 8423 8424 8425 8426 8427 8428
	if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
		ufshcd_enable_auto_bkops(hba);
	else
		/*
		 * If BKOPs operations are urgently needed at this moment then
		 * keep auto-bkops enabled or else disable it.
		 */
		ufshcd_urgent_bkops(hba);

8429 8430
	hba->clk_gating.is_suspended = false;

8431 8432
	if (hba->clk_scaling.is_allowed)
		ufshcd_resume_clkscaling(hba);
8433

8434 8435 8436
	/* Enable Auto-Hibernate if configured */
	ufshcd_auto_hibern8_enable(hba);

8437 8438 8439 8440 8441
	if (hba->dev_info.b_rpm_dev_flush_capable) {
		hba->dev_info.b_rpm_dev_flush_capable = false;
		cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
	}

8442 8443 8444
	/* Schedule clock gating in case of no access to UFS device yet */
	ufshcd_release(hba);

8445 8446 8447 8448 8449
	goto out;

set_old_link_state:
	ufshcd_link_state_transition(hba, old_link_state, 0);
vendor_suspend:
8450
	ufshcd_vops_suspend(hba, pm_op);
8451 8452 8453 8454
disable_vreg:
	ufshcd_vreg_set_lpm(hba);
disable_irq_and_vops_clks:
	ufshcd_disable_irq(hba);
8455 8456
	if (hba->clk_scaling.is_allowed)
		ufshcd_suspend_clkscaling(hba);
8457 8458 8459
	ufshcd_setup_clocks(hba, false);
out:
	hba->pm_op_in_progress = 0;
8460 8461
	if (ret)
		ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
8462 8463 8464 8465 8466 8467 8468 8469 8470 8471 8472 8473 8474 8475
	return ret;
}

/**
 * ufshcd_system_suspend - system suspend routine
 * @hba: per adapter instance
 *
 * Check the description of ufshcd_suspend() function for more details.
 *
 * Returns 0 for success and non-zero for failure
 */
int ufshcd_system_suspend(struct ufs_hba *hba)
{
	int ret = 0;
8476
	ktime_t start = ktime_get();
8477 8478

	if (!hba || !hba->is_powered)
8479
		return 0;
8480

8481 8482 8483 8484 8485
	if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
	     hba->curr_dev_pwr_mode) &&
	    (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
	     hba->uic_link_state))
		goto out;
8486

8487
	if (pm_runtime_suspended(hba->dev)) {
8488 8489 8490 8491 8492 8493 8494 8495 8496 8497 8498 8499 8500 8501 8502
		/*
		 * UFS device and/or UFS link low power states during runtime
		 * suspend seems to be different than what is expected during
		 * system suspend. Hence runtime resume the devic & link and
		 * let the system suspend low power states to take effect.
		 * TODO: If resume takes longer time, we might have optimize
		 * it in future by not resuming everything if possible.
		 */
		ret = ufshcd_runtime_resume(hba);
		if (ret)
			goto out;
	}

	ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
out:
8503 8504
	trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
8505
		hba->curr_dev_pwr_mode, hba->uic_link_state);
D
Dolev Raviv 已提交
8506 8507
	if (!ret)
		hba->is_sys_suspended = true;
8508 8509 8510 8511 8512 8513 8514 8515 8516 8517
	return ret;
}
EXPORT_SYMBOL(ufshcd_system_suspend);

/**
 * ufshcd_system_resume - system resume routine
 * @hba: per adapter instance
 *
 * Returns 0 for success and non-zero for failure
 */
8518

8519 8520
int ufshcd_system_resume(struct ufs_hba *hba)
{
8521 8522 8523
	int ret = 0;
	ktime_t start = ktime_get();

8524 8525 8526 8527
	if (!hba)
		return -EINVAL;

	if (!hba->is_powered || pm_runtime_suspended(hba->dev))
8528 8529 8530 8531
		/*
		 * Let the runtime resume take care of resuming
		 * if runtime suspended.
		 */
8532 8533 8534 8535 8536 8537
		goto out;
	else
		ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
out:
	trace_ufshcd_system_resume(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
8538
		hba->curr_dev_pwr_mode, hba->uic_link_state);
8539 8540
	if (!ret)
		hba->is_sys_suspended = false;
8541
	return ret;
8542
}
8543
EXPORT_SYMBOL(ufshcd_system_resume);
8544

8545 8546 8547 8548 8549 8550 8551 8552
/**
 * ufshcd_runtime_suspend - runtime suspend routine
 * @hba: per adapter instance
 *
 * Check the description of ufshcd_suspend() function for more details.
 *
 * Returns 0 for success and non-zero for failure
 */
8553 8554
int ufshcd_runtime_suspend(struct ufs_hba *hba)
{
8555 8556 8557
	int ret = 0;
	ktime_t start = ktime_get();

8558 8559 8560 8561
	if (!hba)
		return -EINVAL;

	if (!hba->is_powered)
8562 8563 8564 8565 8566 8567
		goto out;
	else
		ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
out:
	trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
8568
		hba->curr_dev_pwr_mode, hba->uic_link_state);
8569
	return ret;
8570 8571 8572
}
EXPORT_SYMBOL(ufshcd_runtime_suspend);

8573 8574 8575 8576 8577 8578 8579 8580 8581 8582 8583 8584 8585 8586 8587 8588 8589 8590 8591 8592 8593
/**
 * ufshcd_runtime_resume - runtime resume routine
 * @hba: per adapter instance
 *
 * This function basically brings the UFS device, UniPro link and controller
 * to active state. Following operations are done in this function:
 *
 * 1. Turn on all the controller related clocks
 * 2. Bring the UniPro link out of Hibernate state
 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
 *    to active state.
 * 4. If auto-bkops is enabled on the device, disable it.
 *
 * So following would be the possible power state after this function return
 * successfully:
 *	S1: UFS device in Active state with VCC rail ON
 *	    UniPro link in Active state
 *	    All the UFS/UniPro controller clocks are ON
 *
 * Returns 0 for success and non-zero for failure
 */
8594 8595
int ufshcd_runtime_resume(struct ufs_hba *hba)
{
8596 8597 8598
	int ret = 0;
	ktime_t start = ktime_get();

8599 8600 8601 8602
	if (!hba)
		return -EINVAL;

	if (!hba->is_powered)
8603 8604 8605 8606 8607 8608
		goto out;
	else
		ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
out:
	trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
8609
		hba->curr_dev_pwr_mode, hba->uic_link_state);
8610
	return ret;
8611 8612 8613 8614 8615 8616 8617 8618 8619
}
EXPORT_SYMBOL(ufshcd_runtime_resume);

int ufshcd_runtime_idle(struct ufs_hba *hba)
{
	return 0;
}
EXPORT_SYMBOL(ufshcd_runtime_idle);

8620 8621 8622 8623 8624 8625 8626 8627 8628 8629 8630 8631
/**
 * ufshcd_shutdown - shutdown routine
 * @hba: per adapter instance
 *
 * This function would power off both UFS device and UFS link.
 *
 * Returns 0 always to allow force shutdown even in case of errors.
 */
int ufshcd_shutdown(struct ufs_hba *hba)
{
	int ret = 0;

8632 8633 8634
	if (!hba->is_powered)
		goto out;

8635 8636 8637 8638 8639 8640 8641 8642 8643 8644 8645 8646 8647 8648 8649 8650 8651 8652
	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
		goto out;

	if (pm_runtime_suspended(hba->dev)) {
		ret = ufshcd_runtime_resume(hba);
		if (ret)
			goto out;
	}

	ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
out:
	if (ret)
		dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
	/* allow force shutdown even in case of errors */
	return 0;
}
EXPORT_SYMBOL(ufshcd_shutdown);

8653
/**
8654
 * ufshcd_remove - de-allocate SCSI host and host memory space
8655
 *		data structure memory
8656
 * @hba: per adapter instance
8657
 */
8658
void ufshcd_remove(struct ufs_hba *hba)
8659
{
8660
	ufs_bsg_remove(hba);
8661
	ufs_sysfs_remove_nodes(hba->dev);
8662 8663
	blk_cleanup_queue(hba->tmf_queue);
	blk_mq_free_tag_set(&hba->tmf_tag_set);
8664
	blk_cleanup_queue(hba->cmd_queue);
8665
	scsi_remove_host(hba->host);
8666
	/* disable interrupts */
8667
	ufshcd_disable_intr(hba, hba->intr_mask);
8668
	ufshcd_hba_stop(hba);
8669

8670
	ufshcd_exit_clk_scaling(hba);
8671
	ufshcd_exit_clk_gating(hba);
8672 8673
	if (ufshcd_is_clkscaling_supported(hba))
		device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
8674
	ufshcd_hba_exit(hba);
8675 8676 8677
}
EXPORT_SYMBOL_GPL(ufshcd_remove);

8678 8679 8680 8681 8682 8683
/**
 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
 * @hba: pointer to Host Bus Adapter (HBA)
 */
void ufshcd_dealloc_host(struct ufs_hba *hba)
{
8684
	ufshcd_crypto_destroy_keyslot_manager(hba);
8685 8686 8687 8688
	scsi_host_put(hba->host);
}
EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);

A
Akinobu Mita 已提交
8689 8690 8691 8692 8693 8694 8695 8696 8697 8698 8699 8700 8701 8702 8703 8704
/**
 * ufshcd_set_dma_mask - Set dma mask based on the controller
 *			 addressing capability
 * @hba: per adapter instance
 *
 * Returns 0 for success, non-zero for failure
 */
static int ufshcd_set_dma_mask(struct ufs_hba *hba)
{
	if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
		if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
			return 0;
	}
	return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
}

8705
/**
8706
 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
8707 8708
 * @dev: pointer to device handle
 * @hba_handle: driver private handle
8709 8710
 * Returns 0 on success, non-zero value on failure
 */
8711
int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
8712 8713 8714
{
	struct Scsi_Host *host;
	struct ufs_hba *hba;
8715
	int err = 0;
8716

8717 8718 8719 8720
	if (!dev) {
		dev_err(dev,
		"Invalid memory reference for dev is NULL\n");
		err = -ENODEV;
8721 8722 8723 8724 8725 8726
		goto out_error;
	}

	host = scsi_host_alloc(&ufshcd_driver_template,
				sizeof(struct ufs_hba));
	if (!host) {
8727
		dev_err(dev, "scsi_host_alloc failed\n");
8728
		err = -ENOMEM;
8729
		goto out_error;
8730 8731 8732
	}
	hba = shost_priv(host);
	hba->host = host;
8733
	hba->dev = dev;
8734
	*hba_handle = hba;
8735
	hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
8736

8737 8738
	INIT_LIST_HEAD(&hba->clk_list_head);

8739 8740 8741 8742 8743
out_error:
	return err;
}
EXPORT_SYMBOL(ufshcd_alloc_host);

8744 8745 8746 8747 8748 8749 8750 8751 8752 8753 8754 8755
/* This function exists because blk_mq_alloc_tag_set() requires this. */
static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
				     const struct blk_mq_queue_data *qd)
{
	WARN_ON_ONCE(true);
	return BLK_STS_NOTSUPP;
}

static const struct blk_mq_ops ufshcd_tmf_ops = {
	.queue_rq = ufshcd_queue_tmf,
};

8756 8757 8758 8759 8760 8761 8762 8763 8764 8765 8766 8767 8768 8769 8770 8771 8772 8773 8774 8775
/**
 * ufshcd_init - Driver initialization routine
 * @hba: per-adapter instance
 * @mmio_base: base register address
 * @irq: Interrupt line of device
 * Returns 0 on success, non-zero value on failure
 */
int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
{
	int err;
	struct Scsi_Host *host = hba->host;
	struct device *dev = hba->dev;

	if (!mmio_base) {
		dev_err(hba->dev,
		"Invalid memory reference for mmio_base is NULL\n");
		err = -ENODEV;
		goto out_error;
	}

8776 8777
	hba->mmio_base = mmio_base;
	hba->irq = irq;
8778
	hba->vps = &ufs_hba_vps;
8779

8780
	err = ufshcd_hba_init(hba);
8781 8782 8783
	if (err)
		goto out_error;

8784
	/* Read capabilities registers */
8785 8786 8787
	err = ufshcd_hba_capabilities(hba);
	if (err)
		goto out_disable;
8788 8789 8790 8791

	/* Get UFS version supported by the controller */
	hba->ufs_version = ufshcd_get_ufs_version(hba);

8792 8793 8794 8795 8796 8797 8798
	if ((hba->ufs_version != UFSHCI_VERSION_10) &&
	    (hba->ufs_version != UFSHCI_VERSION_11) &&
	    (hba->ufs_version != UFSHCI_VERSION_20) &&
	    (hba->ufs_version != UFSHCI_VERSION_21))
		dev_err(hba->dev, "invalid UFS version 0x%x\n",
			hba->ufs_version);

8799 8800 8801
	/* Get Interrupt bit mask per version */
	hba->intr_mask = ufshcd_get_intr_mask(hba);

A
Akinobu Mita 已提交
8802 8803 8804 8805 8806 8807
	err = ufshcd_set_dma_mask(hba);
	if (err) {
		dev_err(hba->dev, "set dma mask failed\n");
		goto out_disable;
	}

8808 8809 8810
	/* Allocate memory for host memory space */
	err = ufshcd_memory_alloc(hba);
	if (err) {
8811 8812
		dev_err(hba->dev, "Memory allocation failed\n");
		goto out_disable;
8813 8814 8815 8816 8817 8818 8819 8820
	}

	/* Configure LRB */
	ufshcd_host_memory_configure(hba);

	host->can_queue = hba->nutrs;
	host->cmd_per_lun = hba->nutrs;
	host->max_id = UFSHCD_MAX_ID;
8821
	host->max_lun = UFS_MAX_LUNS;
8822 8823
	host->max_channel = UFSHCD_MAX_CHANNEL;
	host->unique_id = host->host_no;
8824
	host->max_cmd_len = UFS_CDB_SIZE;
8825

D
Dolev Raviv 已提交
8826 8827
	hba->max_pwr_info.is_valid = false;

8828
	/* Initialize work queues */
8829
	INIT_WORK(&hba->eh_work, ufshcd_err_handler);
8830
	INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
8831

8832 8833 8834
	/* Initialize UIC command mutex */
	mutex_init(&hba->uic_cmd_mutex);

8835 8836 8837
	/* Initialize mutex for device management commands */
	mutex_init(&hba->dev_cmd.lock);

8838 8839
	init_rwsem(&hba->clk_scaling_lock);

8840
	ufshcd_init_clk_gating(hba);
8841

8842 8843
	ufshcd_init_clk_scaling(hba);

8844 8845 8846 8847 8848 8849 8850 8851 8852 8853 8854 8855 8856 8857
	/*
	 * In order to avoid any spurious interrupt immediately after
	 * registering UFS controller interrupt handler, clear any pending UFS
	 * interrupt status and disable all the UFS interrupts.
	 */
	ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
		      REG_INTERRUPT_STATUS);
	ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
	/*
	 * Make sure that UFS interrupts are disabled and any pending interrupt
	 * status is cleared before registering UFS interrupt handler.
	 */
	mb();

8858
	/* IRQ registration */
8859
	err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
8860
	if (err) {
8861
		dev_err(hba->dev, "request irq failed\n");
8862
		goto exit_gating;
8863 8864
	} else {
		hba->is_irq_enabled = true;
8865 8866
	}

8867
	err = scsi_add_host(host, hba->dev);
8868
	if (err) {
8869
		dev_err(hba->dev, "scsi_add_host failed\n");
8870
		goto exit_gating;
8871 8872
	}

8873 8874 8875 8876 8877 8878
	hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
	if (IS_ERR(hba->cmd_queue)) {
		err = PTR_ERR(hba->cmd_queue);
		goto out_remove_scsi_host;
	}

8879 8880 8881 8882 8883 8884 8885 8886 8887 8888 8889 8890 8891 8892 8893
	hba->tmf_tag_set = (struct blk_mq_tag_set) {
		.nr_hw_queues	= 1,
		.queue_depth	= hba->nutmrs,
		.ops		= &ufshcd_tmf_ops,
		.flags		= BLK_MQ_F_NO_SCHED,
	};
	err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
	if (err < 0)
		goto free_cmd_queue;
	hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
	if (IS_ERR(hba->tmf_queue)) {
		err = PTR_ERR(hba->tmf_queue);
		goto free_tmf_tag_set;
	}

8894 8895 8896
	/* Reset the attached device */
	ufshcd_vops_device_reset(hba);

8897 8898
	ufshcd_init_crypto(hba);

8899 8900
	/* Host controller enable */
	err = ufshcd_hba_enable(hba);
8901
	if (err) {
8902
		dev_err(hba->dev, "Host controller enable failed\n");
8903
		ufshcd_print_host_regs(hba);
8904
		ufshcd_print_host_state(hba);
8905
		goto free_tmf_queue;
8906
	}
8907

8908 8909 8910 8911 8912 8913 8914 8915 8916 8917 8918 8919
	/*
	 * Set the default power management level for runtime and system PM.
	 * Default power saving mode is to keep UFS link in Hibern8 state
	 * and UFS device in sleep state.
	 */
	hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
						UFS_SLEEP_PWR_MODE,
						UIC_LINK_HIBERN8_STATE);
	hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
						UFS_SLEEP_PWR_MODE,
						UIC_LINK_HIBERN8_STATE);

8920 8921 8922
	INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
			  ufshcd_rpm_dev_flush_recheck_work);

8923
	/* Set the default auto-hiberate idle timer value to 150 ms */
8924
	if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
8925 8926 8927 8928
		hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
			    FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
	}

8929 8930
	/* Hold auto suspend until async scan completes */
	pm_runtime_get_sync(dev);
8931
	atomic_set(&hba->scsi_block_reqs_cnt, 0);
8932
	/*
8933 8934 8935 8936
	 * We are assuming that device wasn't put in sleep/power-down
	 * state exclusively during the boot stage before kernel.
	 * This assumption helps avoid doing link startup twice during
	 * ufshcd_probe_hba().
8937
	 */
8938
	ufshcd_set_ufs_dev_active(hba);
8939

8940
	async_schedule(ufshcd_async_scan, hba);
8941
	ufs_sysfs_add_nodes(hba->dev);
8942

8943 8944
	return 0;

8945 8946 8947 8948
free_tmf_queue:
	blk_cleanup_queue(hba->tmf_queue);
free_tmf_tag_set:
	blk_mq_free_tag_set(&hba->tmf_tag_set);
8949 8950
free_cmd_queue:
	blk_cleanup_queue(hba->cmd_queue);
8951 8952
out_remove_scsi_host:
	scsi_remove_host(hba->host);
8953
exit_gating:
8954
	ufshcd_exit_clk_scaling(hba);
8955
	ufshcd_exit_clk_gating(hba);
8956
out_disable:
8957
	hba->is_irq_enabled = false;
8958
	ufshcd_hba_exit(hba);
8959 8960 8961 8962 8963 8964 8965
out_error:
	return err;
}
EXPORT_SYMBOL_GPL(ufshcd_init);

MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8966
MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8967 8968
MODULE_LICENSE("GPL");
MODULE_VERSION(UFSHCD_DRIVER_VERSION);