scsi: ufs: disable irq before disabling clocks

During suspend flow, interrupt shall be disabled before disabling clocks to
avoid potential system hang due to accessing host registers after host
clocks are disabled.

For example, if an interrupt comes with IRQF_IRQPOLL flag configured with
the misrouted interrupt recovery feature enabled, ufshcd ISR may be
triggered even if nothing shall be done for UFS. In this case, system hang
may happen if UFS interrupt status register is accessed with host clocks
disabled.

Link: https://lore.kernel.org/r/1575721321-8071-2-git-send-email-stanley.chu@mediatek.comReviewed-by: NAvri Altman <avri.altman@wdc.com>
Signed-off-by: NStanley Chu <stanley.chu@mediatek.com>
Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>

drivers/scsi/ufs/ufshcd.c

@@ -7890,6 +7890,11 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
 	ret = ufshcd_vops_suspend(hba, pm_op);
 	if (ret)
 		goto set_link_active;
+	/*
+	 * Disable the host irq as host controller as there won't be any
+	 * host controller transaction expected till resume.
+	 */
+	ufshcd_disable_irq(hba);
 
 	if (!ufshcd_is_link_active(hba))
 		ufshcd_setup_clocks(hba, false);
@@ -7899,11 +7904,7 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
 
 	hba->clk_gating.state = CLKS_OFF;
 	trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
-	/*
-	 * Disable the host irq as host controller as there won't be any
-	 * host controller transaction expected till resume.
-	 */
-	ufshcd_disable_irq(hba);
+
 	/* Put the host controller in low power mode if possible */
 	ufshcd_hba_vreg_set_lpm(hba);
 	goto out;