ufshcd.c 237.4 KB
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/*
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 * Universal Flash Storage Host controller driver Core
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 *
 * This code is based on drivers/scsi/ufs/ufshcd.c
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 * Copyright (C) 2011-2013 Samsung India Software Operations
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 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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 *
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 * Authors:
 *	Santosh Yaraganavi <santosh.sy@samsung.com>
 *	Vinayak Holikatti <h.vinayak@samsung.com>
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 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
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 * See the COPYING file in the top-level directory or visit
 * <http://www.gnu.org/licenses/gpl-2.0.html>
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 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
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 * This program is provided "AS IS" and "WITH ALL FAULTS" and
 * without warranty of any kind. You are solely responsible for
 * determining the appropriateness of using and distributing
 * the program and assume all risks associated with your exercise
 * of rights with respect to the program, including but not limited
 * to infringement of third party rights, the risks and costs of
 * program errors, damage to or loss of data, programs or equipment,
 * and unavailability or interruption of operations. Under no
 * circumstances will the contributor of this Program be liable for
 * any damages of any kind arising from your use or distribution of
 * this program.
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 *
 * The Linux Foundation chooses to take subject only to the GPLv2
 * license terms, and distributes only under these terms.
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 */

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#include <linux/async.h>
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#include <linux/devfreq.h>
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#include <linux/nls.h>
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#include <linux/of.h>
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#include <linux/bitfield.h>
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#include <linux/blk-pm.h>
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#include "ufshcd.h"
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#include "ufs_quirks.h"
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#include "unipro.h"
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#include "ufs-sysfs.h"
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#include "ufs_bsg.h"
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#include <asm/unaligned.h>
#include <linux/blkdev.h>
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#define CREATE_TRACE_POINTS
#include <trace/events/ufs.h>

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#define UFSHCD_ENABLE_INTRS	(UTP_TRANSFER_REQ_COMPL |\
				 UTP_TASK_REQ_COMPL |\
				 UFSHCD_ERROR_MASK)
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/* UIC command timeout, unit: ms */
#define UIC_CMD_TIMEOUT	500
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/* NOP OUT retries waiting for NOP IN response */
#define NOP_OUT_RETRIES    10
/* Timeout after 30 msecs if NOP OUT hangs without response */
#define NOP_OUT_TIMEOUT    30 /* msecs */

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/* Query request retries */
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#define QUERY_REQ_RETRIES 3
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/* Query request timeout */
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#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
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/* Task management command timeout */
#define TM_CMD_TIMEOUT	100 /* msecs */

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/* maximum number of retries for a general UIC command  */
#define UFS_UIC_COMMAND_RETRIES 3

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/* maximum number of link-startup retries */
#define DME_LINKSTARTUP_RETRIES 3

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/* Maximum retries for Hibern8 enter */
#define UIC_HIBERN8_ENTER_RETRIES 3

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/* maximum number of reset retries before giving up */
#define MAX_HOST_RESET_RETRIES 5

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/* Expose the flag value from utp_upiu_query.value */
#define MASK_QUERY_UPIU_FLAG_LOC 0xFF

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/* Interrupt aggregation default timeout, unit: 40us */
#define INT_AGGR_DEF_TO	0x02

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/* default delay of autosuspend: 2000 ms */
#define RPM_AUTOSUSPEND_DELAY_MS 2000

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/* Default delay of RPM device flush delayed work */
#define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000

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/* Default value of wait time before gating device ref clock */
#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */

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#define ufshcd_toggle_vreg(_dev, _vreg, _on)				\
	({                                                              \
		int _ret;                                               \
		if (_on)                                                \
			_ret = ufshcd_enable_vreg(_dev, _vreg);         \
		else                                                    \
			_ret = ufshcd_disable_vreg(_dev, _vreg);        \
		_ret;                                                   \
	})

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#define ufshcd_hex_dump(prefix_str, buf, len) do {                       \
	size_t __len = (len);                                            \
	print_hex_dump(KERN_ERR, prefix_str,                             \
		       __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
		       16, 4, buf, __len, false);                        \
} while (0)

int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
		     const char *prefix)
{
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	u32 *regs;
	size_t pos;

	if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
		return -EINVAL;
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	regs = kzalloc(len, GFP_ATOMIC);
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	if (!regs)
		return -ENOMEM;

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	for (pos = 0; pos < len; pos += 4)
		regs[pos / 4] = ufshcd_readl(hba, offset + pos);

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	ufshcd_hex_dump(prefix, regs, len);
	kfree(regs);

	return 0;
}
EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
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enum {
	UFSHCD_MAX_CHANNEL	= 0,
	UFSHCD_MAX_ID		= 1,
	UFSHCD_CMD_PER_LUN	= 32,
	UFSHCD_CAN_QUEUE	= 32,
};

/* UFSHCD states */
enum {
	UFSHCD_STATE_RESET,
	UFSHCD_STATE_ERROR,
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	UFSHCD_STATE_OPERATIONAL,
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	UFSHCD_STATE_EH_SCHEDULED,
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};

/* UFSHCD error handling flags */
enum {
	UFSHCD_EH_IN_PROGRESS = (1 << 0),
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};

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/* UFSHCD UIC layer error flags */
enum {
	UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
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	UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
	UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
	UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
	UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
	UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
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};

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#define ufshcd_set_eh_in_progress(h) \
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	((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
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#define ufshcd_eh_in_progress(h) \
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	((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
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#define ufshcd_clear_eh_in_progress(h) \
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	((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
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struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
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	{UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
	{UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
	{UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
	{UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
	{UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
	{UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
};

static inline enum ufs_dev_pwr_mode
ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
{
	return ufs_pm_lvl_states[lvl].dev_state;
}

static inline enum uic_link_state
ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
{
	return ufs_pm_lvl_states[lvl].link_state;
}

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static inline enum ufs_pm_level
ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
					enum uic_link_state link_state)
{
	enum ufs_pm_level lvl;

	for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
		if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
			(ufs_pm_lvl_states[lvl].link_state == link_state))
			return lvl;
	}

	/* if no match found, return the level 0 */
	return UFS_PM_LVL_0;
}

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static struct ufs_dev_fix ufs_fixups[] = {
	/* UFS cards deviations table */
	UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
		UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
	UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
		UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
	UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
		UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
	UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
		UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
	UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
		UFS_DEVICE_QUIRK_PA_TACTIVATE),
	UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
		UFS_DEVICE_QUIRK_PA_TACTIVATE),
	UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
		UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
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	UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
		UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
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	END_FIX
};

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static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
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static void ufshcd_async_scan(void *data, async_cookie_t cookie);
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static int ufshcd_reset_and_restore(struct ufs_hba *hba);
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static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
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static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
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static void ufshcd_hba_exit(struct ufs_hba *hba);
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static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
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static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
				 bool skip_ref_clk);
static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
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static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
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static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
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static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
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static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
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static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
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static irqreturn_t ufshcd_intr(int irq, void *__hba);
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static int ufshcd_change_power_mode(struct ufs_hba *hba,
			     struct ufs_pa_layer_attr *pwr_mode);
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static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba);
static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba);
static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable);
static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);

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static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
{
	return tag >= 0 && tag < hba->nutrs;
}
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static inline void ufshcd_enable_irq(struct ufs_hba *hba)
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{
	if (!hba->is_irq_enabled) {
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		enable_irq(hba->irq);
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		hba->is_irq_enabled = true;
	}
}

static inline void ufshcd_disable_irq(struct ufs_hba *hba)
{
	if (hba->is_irq_enabled) {
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		disable_irq(hba->irq);
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		hba->is_irq_enabled = false;
	}
}
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static inline void ufshcd_wb_config(struct ufs_hba *hba)
{
	int ret;

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	if (!ufshcd_is_wb_allowed(hba))
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		return;

	ret = ufshcd_wb_ctrl(hba, true);
	if (ret)
		dev_err(hba->dev, "%s: Enable WB failed: %d\n", __func__, ret);
	else
		dev_info(hba->dev, "%s: Write Booster Configured\n", __func__);
	ret = ufshcd_wb_toggle_flush_during_h8(hba, true);
	if (ret)
		dev_err(hba->dev, "%s: En WB flush during H8: failed: %d\n",
			__func__, ret);
	ufshcd_wb_toggle_flush(hba, true);
}

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static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
{
	if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
		scsi_unblock_requests(hba->host);
}

static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
{
	if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
		scsi_block_requests(hba->host);
}

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static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
		const char *str)
{
	struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;

	trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
}

static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
		const char *str)
{
	struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;

	trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
}

static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
		const char *str)
{
	int off = (int)tag - hba->nutrs;
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	struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
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	trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
			&descp->input_param1);
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}

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static void ufshcd_add_command_trace(struct ufs_hba *hba,
		unsigned int tag, const char *str)
{
	sector_t lba = -1;
	u8 opcode = 0;
	u32 intr, doorbell;
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	struct ufshcd_lrb *lrbp = &hba->lrb[tag];
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	struct scsi_cmnd *cmd = lrbp->cmd;
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	int transfer_len = -1;

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	if (!trace_ufshcd_command_enabled()) {
		/* trace UPIU W/O tracing command */
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		if (cmd)
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			ufshcd_add_cmd_upiu_trace(hba, tag, str);
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		return;
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	}
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	if (cmd) { /* data phase exists */
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		/* trace UPIU also */
		ufshcd_add_cmd_upiu_trace(hba, tag, str);
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		opcode = cmd->cmnd[0];
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		if ((opcode == READ_10) || (opcode == WRITE_10)) {
			/*
			 * Currently we only fully trace read(10) and write(10)
			 * commands
			 */
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			if (cmd->request && cmd->request->bio)
				lba = cmd->request->bio->bi_iter.bi_sector;
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			transfer_len = be32_to_cpu(
				lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
		}
	}

	intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
	doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
	trace_ufshcd_command(dev_name(hba->dev), str, tag,
				doorbell, transfer_len, intr, lba, opcode);
}

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static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
{
	struct ufs_clk_info *clki;
	struct list_head *head = &hba->clk_list_head;

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	if (list_empty(head))
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		return;

	list_for_each_entry(clki, head, list) {
		if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
				clki->max_freq)
			dev_err(hba->dev, "clk: %s, rate: %u\n",
					clki->name, clki->curr_freq);
	}
}

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static void ufshcd_print_err_hist(struct ufs_hba *hba,
				  struct ufs_err_reg_hist *err_hist,
				  char *err_name)
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{
	int i;
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	bool found = false;
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	for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
		int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
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		if (err_hist->tstamp[p] == 0)
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			continue;
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		dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
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			err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
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		found = true;
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	}
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	if (!found)
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		dev_err(hba->dev, "No record of %s\n", err_name);
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}

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static void ufshcd_print_host_regs(struct ufs_hba *hba)
{
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	ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
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	dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
		hba->ufs_version, hba->capabilities);
	dev_err(hba->dev,
		"hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
		(u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
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	dev_err(hba->dev,
		"last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
		ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
		hba->ufs_stats.hibern8_exit_cnt);

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	ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
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	ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
			      "auto_hibern8_err");
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	ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
			      "link_startup_fail");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
			      "suspend_fail");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
	ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
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	ufshcd_print_clk_freqs(hba);

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	ufshcd_vops_dbg_register_dump(hba);
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}

static
void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
{
	struct ufshcd_lrb *lrbp;
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	int prdt_length;
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	int tag;

	for_each_set_bit(tag, &bitmap, hba->nutrs) {
		lrbp = &hba->lrb[tag];

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		dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
				tag, ktime_to_us(lrbp->issue_time_stamp));
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		dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
				tag, ktime_to_us(lrbp->compl_time_stamp));
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		dev_err(hba->dev,
			"UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
			tag, (u64)lrbp->utrd_dma_addr);

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		ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
				sizeof(struct utp_transfer_req_desc));
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		dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
			(u64)lrbp->ucd_req_dma_addr);
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		ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
				sizeof(struct utp_upiu_req));
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		dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
			(u64)lrbp->ucd_rsp_dma_addr);
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		ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
				sizeof(struct utp_upiu_rsp));

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		prdt_length = le16_to_cpu(
			lrbp->utr_descriptor_ptr->prd_table_length);
		dev_err(hba->dev,
			"UPIU[%d] - PRDT - %d entries  phys@0x%llx\n",
			tag, prdt_length,
			(u64)lrbp->ucd_prdt_dma_addr);

		if (pr_prdt)
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			ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
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				sizeof(struct ufshcd_sg_entry) * prdt_length);
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	}
}

static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
{
	int tag;

	for_each_set_bit(tag, &bitmap, hba->nutmrs) {
501 502
		struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];

503
		dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
504
		ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
505 506 507
	}
}

508 509 510
static void ufshcd_print_host_state(struct ufs_hba *hba)
{
	dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
511 512
	dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
		hba->outstanding_reqs, hba->outstanding_tasks);
513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529
	dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
		hba->saved_err, hba->saved_uic_err);
	dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
		hba->curr_dev_pwr_mode, hba->uic_link_state);
	dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
		hba->pm_op_in_progress, hba->is_sys_suspended);
	dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
		hba->auto_bkops_enabled, hba->host->host_self_blocked);
	dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
	dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
		hba->eh_flags, hba->req_abort_count);
	dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
		hba->capabilities, hba->caps);
	dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
		hba->dev_quirks);
}

530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555
/**
 * ufshcd_print_pwr_info - print power params as saved in hba
 * power info
 * @hba: per-adapter instance
 */
static void ufshcd_print_pwr_info(struct ufs_hba *hba)
{
	static const char * const names[] = {
		"INVALID MODE",
		"FAST MODE",
		"SLOW_MODE",
		"INVALID MODE",
		"FASTAUTO_MODE",
		"SLOWAUTO_MODE",
		"INVALID MODE",
	};

	dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
		 __func__,
		 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
		 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
		 names[hba->pwr_info.pwr_rx],
		 names[hba->pwr_info.pwr_tx],
		 hba->pwr_info.hs_rate);
}

556 557 558 559 560 561 562 563 564 565 566 567
void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
{
	if (!us)
		return;

	if (us < 10)
		udelay(us);
	else
		usleep_range(us, us + tolerance);
}
EXPORT_SYMBOL_GPL(ufshcd_delay_us);

568
/**
569
 * ufshcd_wait_for_register - wait for register value to change
570 571 572 573 574 575
 * @hba: per-adapter interface
 * @reg: mmio register offset
 * @mask: mask to apply to the read register value
 * @val: value to wait for
 * @interval_us: polling interval in microseconds
 * @timeout_ms: timeout in milliseconds
576
 *
577 578
 * Return:
 * -ETIMEDOUT on error, zero on success.
579
 */
580 581
int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
				u32 val, unsigned long interval_us,
582
				unsigned long timeout_ms)
583 584 585 586 587 588 589 590
{
	int err = 0;
	unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);

	/* ignore bits that we don't intend to wait on */
	val = val & mask;

	while ((ufshcd_readl(hba, reg) & mask) != val) {
591
		usleep_range(interval_us, interval_us + 50);
592 593 594 595 596 597 598 599 600 601
		if (time_after(jiffies, timeout)) {
			if ((ufshcd_readl(hba, reg) & mask) != val)
				err = -ETIMEDOUT;
			break;
		}
	}

	return err;
}

602 603
/**
 * ufshcd_get_intr_mask - Get the interrupt bit mask
604
 * @hba: Pointer to adapter instance
605 606 607 608 609
 *
 * Returns interrupt bit mask per version
 */
static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
{
610 611 612 613 614 615 616 617 618 619 620 621 622
	u32 intr_mask = 0;

	switch (hba->ufs_version) {
	case UFSHCI_VERSION_10:
		intr_mask = INTERRUPT_MASK_ALL_VER_10;
		break;
	case UFSHCI_VERSION_11:
	case UFSHCI_VERSION_20:
		intr_mask = INTERRUPT_MASK_ALL_VER_11;
		break;
	case UFSHCI_VERSION_21:
	default:
		intr_mask = INTERRUPT_MASK_ALL_VER_21;
623
		break;
624 625 626
	}

	return intr_mask;
627 628
}

629 630
/**
 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
631
 * @hba: Pointer to adapter instance
632 633 634 635 636
 *
 * Returns UFSHCI version supported by the controller
 */
static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
{
637 638
	if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
		return ufshcd_vops_get_ufs_hci_version(hba);
639

640
	return ufshcd_readl(hba, REG_UFS_VERSION);
641 642 643 644 645
}

/**
 * ufshcd_is_device_present - Check if any device connected to
 *			      the host controller
646
 * @hba: pointer to adapter instance
647
 *
648
 * Returns true if device present, false if no device detected
649
 */
650
static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
651
{
652
	return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
653
						DEVICE_PRESENT) ? true : false;
654 655 656 657
}

/**
 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
658
 * @lrbp: pointer to local command reference block
659 660 661 662 663 664
 *
 * This function is used to get the OCS field from UTRD
 * Returns the OCS field in the UTRD
 */
static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
{
665
	return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
666 667 668 669 670 671 672 673 674
}

/**
 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 * @hba: per adapter instance
 * @pos: position of the bit to be cleared
 */
static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
{
675
	ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
676 677 678 679 680 681 682 683 684
}

/**
 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
 * @hba: per adapter instance
 * @pos: position of the bit to be cleared
 */
static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
{
685
	ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
686 687
}

688 689 690 691 692 693 694 695 696 697
/**
 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 * @hba: per adapter instance
 * @tag: position of the bit to be cleared
 */
static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
{
	__clear_bit(tag, &hba->outstanding_reqs);
}

698 699 700 701 702 703 704 705
/**
 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 * @reg: Register value of host controller status
 *
 * Returns integer, 0 on Success and positive value if failed
 */
static inline int ufshcd_get_lists_status(u32 reg)
{
706
	return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
707 708 709 710 711 712 713 714 715 716 717
}

/**
 * ufshcd_get_uic_cmd_result - Get the UIC command result
 * @hba: Pointer to adapter instance
 *
 * This function gets the result of UIC command completion
 * Returns 0 on success, non zero value on error
 */
static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
{
718
	return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
719 720 721
	       MASK_UIC_COMMAND_RESULT;
}

722 723 724 725 726 727 728 729 730 731 732 733
/**
 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 * @hba: Pointer to adapter instance
 *
 * This function gets UIC command argument3
 * Returns 0 on success, non zero value on error
 */
static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
{
	return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
}

734
/**
735
 * ufshcd_get_req_rsp - returns the TR response transaction type
736 737 738
 * @ucd_rsp_ptr: pointer to response UPIU
 */
static inline int
739
ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
740
{
741
	return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
742 743 744 745 746 747 748 749 750 751 752 753 754 755 756
}

/**
 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * This function gets the response status and scsi_status from response UPIU
 * Returns the response result code.
 */
static inline int
ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
{
	return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
}

757 758 759 760 761 762 763 764 765 766 767 768 769 770
/*
 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 *				from response UPIU
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * Return the data segment length.
 */
static inline unsigned int
ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
{
	return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
		MASK_RSP_UPIU_DATA_SEG_LEN;
}

771 772 773 774 775 776 777 778 779 780 781 782 783 784 785
/**
 * ufshcd_is_exception_event - Check if the device raised an exception event
 * @ucd_rsp_ptr: pointer to response UPIU
 *
 * The function checks if the device raised an exception event indicated in
 * the Device Information field of response UPIU.
 *
 * Returns true if exception is raised, false otherwise.
 */
static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
{
	return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
			MASK_RSP_EXCEPTION_EVENT ? true : false;
}

786
/**
787
 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
788 789 790
 * @hba: per adapter instance
 */
static inline void
791
ufshcd_reset_intr_aggr(struct ufs_hba *hba)
792
{
793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810
	ufshcd_writel(hba, INT_AGGR_ENABLE |
		      INT_AGGR_COUNTER_AND_TIMER_RESET,
		      REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
}

/**
 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 * @hba: per adapter instance
 * @cnt: Interrupt aggregation counter threshold
 * @tmout: Interrupt aggregation timeout value
 */
static inline void
ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
{
	ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
		      INT_AGGR_COUNTER_THLD_VAL(cnt) |
		      INT_AGGR_TIMEOUT_VAL(tmout),
		      REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
811 812
}

813 814 815 816 817 818 819 820 821
/**
 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 * @hba: per adapter instance
 */
static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
{
	ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
}

822 823 824 825 826 827 828 829
/**
 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 *			When run-stop registers are set to 1, it indicates the
 *			host controller that it can process the requests
 * @hba: per adapter instance
 */
static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
{
830 831 832 833
	ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
		      REG_UTP_TASK_REQ_LIST_RUN_STOP);
	ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
		      REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
834 835 836 837 838 839 840 841
}

/**
 * ufshcd_hba_start - Start controller initialization sequence
 * @hba: per adapter instance
 */
static inline void ufshcd_hba_start(struct ufs_hba *hba)
{
842
	ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
843 844 845 846 847 848
}

/**
 * ufshcd_is_hba_active - Get controller state
 * @hba: per adapter instance
 *
849
 * Returns false if controller is active, true otherwise
850
 */
851
static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
852
{
853 854
	return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
		? false : true;
855 856
}

857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884
u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
{
	/* HCI version 1.0 and 1.1 supports UniPro 1.41 */
	if ((hba->ufs_version == UFSHCI_VERSION_10) ||
	    (hba->ufs_version == UFSHCI_VERSION_11))
		return UFS_UNIPRO_VER_1_41;
	else
		return UFS_UNIPRO_VER_1_6;
}
EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);

static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
{
	/*
	 * If both host and device support UniPro ver1.6 or later, PA layer
	 * parameters tuning happens during link startup itself.
	 *
	 * We can manually tune PA layer parameters if either host or device
	 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
	 * logic simple, we will only do manual tuning if local unipro version
	 * doesn't support ver1.6 or later.
	 */
	if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
		return true;
	else
		return false;
}

885 886 887 888 889 890 891 892 893
/**
 * ufshcd_set_clk_freq - set UFS controller clock frequencies
 * @hba: per adapter instance
 * @scale_up: If True, set max possible frequency othewise set low frequency
 *
 * Returns 0 if successful
 * Returns < 0 for any other errors
 */
static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
894 895 896 897 898
{
	int ret = 0;
	struct ufs_clk_info *clki;
	struct list_head *head = &hba->clk_list_head;

899
	if (list_empty(head))
900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943
		goto out;

	list_for_each_entry(clki, head, list) {
		if (!IS_ERR_OR_NULL(clki->clk)) {
			if (scale_up && clki->max_freq) {
				if (clki->curr_freq == clki->max_freq)
					continue;

				ret = clk_set_rate(clki->clk, clki->max_freq);
				if (ret) {
					dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
						__func__, clki->name,
						clki->max_freq, ret);
					break;
				}
				trace_ufshcd_clk_scaling(dev_name(hba->dev),
						"scaled up", clki->name,
						clki->curr_freq,
						clki->max_freq);

				clki->curr_freq = clki->max_freq;

			} else if (!scale_up && clki->min_freq) {
				if (clki->curr_freq == clki->min_freq)
					continue;

				ret = clk_set_rate(clki->clk, clki->min_freq);
				if (ret) {
					dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
						__func__, clki->name,
						clki->min_freq, ret);
					break;
				}
				trace_ufshcd_clk_scaling(dev_name(hba->dev),
						"scaled down", clki->name,
						clki->curr_freq,
						clki->min_freq);
				clki->curr_freq = clki->min_freq;
			}
		}
		dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
				clki->name, clk_get_rate(clki->clk));
	}

944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968
out:
	return ret;
}

/**
 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
 * @hba: per adapter instance
 * @scale_up: True if scaling up and false if scaling down
 *
 * Returns 0 if successful
 * Returns < 0 for any other errors
 */
static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
{
	int ret = 0;
	ktime_t start = ktime_get();

	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
	if (ret)
		goto out;

	ret = ufshcd_set_clk_freq(hba, scale_up);
	if (ret)
		goto out;

969
	ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
970 971
	if (ret)
		ufshcd_set_clk_freq(hba, !scale_up);
972 973

out:
974
	trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992
			(scale_up ? "up" : "down"),
			ktime_to_us(ktime_sub(ktime_get(), start)), ret);
	return ret;
}

/**
 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
 * @hba: per adapter instance
 * @scale_up: True if scaling up and false if scaling down
 *
 * Returns true if scaling is required, false otherwise.
 */
static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
					       bool scale_up)
{
	struct ufs_clk_info *clki;
	struct list_head *head = &hba->clk_list_head;

993
	if (list_empty(head))
994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107
		return false;

	list_for_each_entry(clki, head, list) {
		if (!IS_ERR_OR_NULL(clki->clk)) {
			if (scale_up && clki->max_freq) {
				if (clki->curr_freq == clki->max_freq)
					continue;
				return true;
			} else if (!scale_up && clki->min_freq) {
				if (clki->curr_freq == clki->min_freq)
					continue;
				return true;
			}
		}
	}

	return false;
}

static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
					u64 wait_timeout_us)
{
	unsigned long flags;
	int ret = 0;
	u32 tm_doorbell;
	u32 tr_doorbell;
	bool timeout = false, do_last_check = false;
	ktime_t start;

	ufshcd_hold(hba, false);
	spin_lock_irqsave(hba->host->host_lock, flags);
	/*
	 * Wait for all the outstanding tasks/transfer requests.
	 * Verify by checking the doorbell registers are clear.
	 */
	start = ktime_get();
	do {
		if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
			ret = -EBUSY;
			goto out;
		}

		tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
		tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
		if (!tm_doorbell && !tr_doorbell) {
			timeout = false;
			break;
		} else if (do_last_check) {
			break;
		}

		spin_unlock_irqrestore(hba->host->host_lock, flags);
		schedule();
		if (ktime_to_us(ktime_sub(ktime_get(), start)) >
		    wait_timeout_us) {
			timeout = true;
			/*
			 * We might have scheduled out for long time so make
			 * sure to check if doorbells are cleared by this time
			 * or not.
			 */
			do_last_check = true;
		}
		spin_lock_irqsave(hba->host->host_lock, flags);
	} while (tm_doorbell || tr_doorbell);

	if (timeout) {
		dev_err(hba->dev,
			"%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
			__func__, tm_doorbell, tr_doorbell);
		ret = -EBUSY;
	}
out:
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	ufshcd_release(hba);
	return ret;
}

/**
 * ufshcd_scale_gear - scale up/down UFS gear
 * @hba: per adapter instance
 * @scale_up: True for scaling up gear and false for scaling down
 *
 * Returns 0 for success,
 * Returns -EBUSY if scaling can't happen at this time
 * Returns non-zero for any other errors
 */
static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
{
	#define UFS_MIN_GEAR_TO_SCALE_DOWN	UFS_HS_G1
	int ret = 0;
	struct ufs_pa_layer_attr new_pwr_info;

	if (scale_up) {
		memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
		       sizeof(struct ufs_pa_layer_attr));
	} else {
		memcpy(&new_pwr_info, &hba->pwr_info,
		       sizeof(struct ufs_pa_layer_attr));

		if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
		    || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
			/* save the current power mode */
			memcpy(&hba->clk_scaling.saved_pwr_info.info,
				&hba->pwr_info,
				sizeof(struct ufs_pa_layer_attr));

			/* scale down gear */
			new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
			new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
		}
	}

	/* check if the power mode needs to be changed or not? */
1108
	ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125
	if (ret)
		dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
			__func__, ret,
			hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
			new_pwr_info.gear_tx, new_pwr_info.gear_rx);

	return ret;
}

static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
{
	#define DOORBELL_CLR_TOUT_US		(1000 * 1000) /* 1 sec */
	int ret = 0;
	/*
	 * make sure that there are no outstanding requests when
	 * clock scaling is in progress
	 */
1126
	ufshcd_scsi_block_requests(hba);
1127 1128 1129 1130
	down_write(&hba->clk_scaling_lock);
	if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
		ret = -EBUSY;
		up_write(&hba->clk_scaling_lock);
1131
		ufshcd_scsi_unblock_requests(hba);
1132 1133 1134 1135 1136 1137 1138 1139
	}

	return ret;
}

static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
{
	up_write(&hba->clk_scaling_lock);
1140
	ufshcd_scsi_unblock_requests(hba);
1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155
}

/**
 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
 * @hba: per adapter instance
 * @scale_up: True for scaling up and false for scalin down
 *
 * Returns 0 for success,
 * Returns -EBUSY if scaling can't happen at this time
 * Returns non-zero for any other errors
 */
static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
{
	int ret = 0;

1156 1157 1158
	/* let's not get into low power until clock scaling is completed */
	ufshcd_hold(hba, false);

1159 1160
	ret = ufshcd_clock_scaling_prepare(hba);
	if (ret)
1161
		goto out;
1162 1163 1164 1165 1166

	/* scale down the gear before scaling down clocks */
	if (!scale_up) {
		ret = ufshcd_scale_gear(hba, false);
		if (ret)
1167
			goto out_unprepare;
1168 1169 1170 1171 1172 1173
	}

	ret = ufshcd_scale_clks(hba, scale_up);
	if (ret) {
		if (!scale_up)
			ufshcd_scale_gear(hba, true);
1174
		goto out_unprepare;
1175 1176 1177 1178 1179
	}

	/* scale up the gear after scaling up clocks */
	if (scale_up) {
		ret = ufshcd_scale_gear(hba, true);
1180
		if (ret) {
1181
			ufshcd_scale_clks(hba, false);
1182 1183
			goto out_unprepare;
		}
1184 1185
	}

1186 1187 1188 1189 1190
	/* Enable Write Booster if we have scaled up else disable it */
	up_write(&hba->clk_scaling_lock);
	ufshcd_wb_ctrl(hba, scale_up);
	down_write(&hba->clk_scaling_lock);

1191
out_unprepare:
1192
	ufshcd_clock_scaling_unprepare(hba);
1193
out:
1194
	ufshcd_release(hba);
1195 1196 1197
	return ret;
}

1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231
static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
{
	struct ufs_hba *hba = container_of(work, struct ufs_hba,
					   clk_scaling.suspend_work);
	unsigned long irq_flags;

	spin_lock_irqsave(hba->host->host_lock, irq_flags);
	if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		return;
	}
	hba->clk_scaling.is_suspended = true;
	spin_unlock_irqrestore(hba->host->host_lock, irq_flags);

	__ufshcd_suspend_clkscaling(hba);
}

static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
{
	struct ufs_hba *hba = container_of(work, struct ufs_hba,
					   clk_scaling.resume_work);
	unsigned long irq_flags;

	spin_lock_irqsave(hba->host->host_lock, irq_flags);
	if (!hba->clk_scaling.is_suspended) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		return;
	}
	hba->clk_scaling.is_suspended = false;
	spin_unlock_irqrestore(hba->host->host_lock, irq_flags);

	devfreq_resume_device(hba->devfreq);
}

1232 1233 1234 1235 1236 1237
static int ufshcd_devfreq_target(struct device *dev,
				unsigned long *freq, u32 flags)
{
	int ret = 0;
	struct ufs_hba *hba = dev_get_drvdata(dev);
	ktime_t start;
1238
	bool scale_up, sched_clk_scaling_suspend_work = false;
1239 1240
	struct list_head *clk_list = &hba->clk_list_head;
	struct ufs_clk_info *clki;
1241 1242 1243 1244 1245
	unsigned long irq_flags;

	if (!ufshcd_is_clkscaling_supported(hba))
		return -EINVAL;

1246 1247 1248
	clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
	/* Override with the closest supported frequency */
	*freq = (unsigned long) clk_round_rate(clki->clk, *freq);
1249 1250 1251 1252 1253 1254
	spin_lock_irqsave(hba->host->host_lock, irq_flags);
	if (ufshcd_eh_in_progress(hba)) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		return 0;
	}

1255 1256 1257
	if (!hba->clk_scaling.active_reqs)
		sched_clk_scaling_suspend_work = true;

1258 1259 1260 1261 1262
	if (list_empty(clk_list)) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		goto out;
	}

1263
	/* Decide based on the rounded-off frequency and update */
1264
	scale_up = (*freq == clki->max_freq) ? true : false;
1265 1266 1267
	if (!scale_up)
		*freq = clki->min_freq;
	/* Update the frequency */
1268 1269 1270 1271
	if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
		spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
		ret = 0;
		goto out; /* no state change required */
1272 1273 1274 1275 1276 1277 1278 1279 1280 1281
	}
	spin_unlock_irqrestore(hba->host->host_lock, irq_flags);

	start = ktime_get();
	ret = ufshcd_devfreq_scale(hba, scale_up);

	trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
		(scale_up ? "up" : "down"),
		ktime_to_us(ktime_sub(ktime_get(), start)), ret);

1282 1283 1284 1285 1286
out:
	if (sched_clk_scaling_suspend_work)
		queue_work(hba->clk_scaling.workq,
			   &hba->clk_scaling.suspend_work);

1287 1288 1289
	return ret;
}

1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307
static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
{
	int *busy = priv;

	WARN_ON_ONCE(reserved);
	(*busy)++;
	return false;
}

/* Whether or not any tag is in use by a request that is in progress. */
static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
{
	struct request_queue *q = hba->cmd_queue;
	int busy = 0;

	blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
	return busy;
}
1308 1309 1310 1311 1312 1313 1314

static int ufshcd_devfreq_get_dev_status(struct device *dev,
		struct devfreq_dev_status *stat)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);
	struct ufs_clk_scaling *scaling = &hba->clk_scaling;
	unsigned long flags;
1315 1316
	struct list_head *clk_list = &hba->clk_list_head;
	struct ufs_clk_info *clki;
1317 1318 1319 1320 1321 1322 1323 1324 1325 1326

	if (!ufshcd_is_clkscaling_supported(hba))
		return -EINVAL;

	memset(stat, 0, sizeof(*stat));

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (!scaling->window_start_t)
		goto start_window;

1327 1328 1329 1330 1331 1332 1333
	clki = list_first_entry(clk_list, struct ufs_clk_info, list);
	/*
	 * If current frequency is 0, then the ondemand governor considers
	 * there's no initial frequency set. And it always requests to set
	 * to max. frequency.
	 */
	stat->current_frequency = clki->curr_freq;
1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355
	if (scaling->is_busy_started)
		scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
					scaling->busy_start_t));

	stat->total_time = jiffies_to_usecs((long)jiffies -
				(long)scaling->window_start_t);
	stat->busy_time = scaling->tot_busy_t;
start_window:
	scaling->window_start_t = jiffies;
	scaling->tot_busy_t = 0;

	if (hba->outstanding_reqs) {
		scaling->busy_start_t = ktime_get();
		scaling->is_busy_started = true;
	} else {
		scaling->busy_start_t = 0;
		scaling->is_busy_started = false;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	return 0;
}

1356 1357
static int ufshcd_devfreq_init(struct ufs_hba *hba)
{
1358 1359
	struct list_head *clk_list = &hba->clk_list_head;
	struct ufs_clk_info *clki;
1360 1361 1362
	struct devfreq *devfreq;
	int ret;

1363 1364 1365 1366 1367 1368 1369 1370
	/* Skip devfreq if we don't have any clocks in the list */
	if (list_empty(clk_list))
		return 0;

	clki = list_first_entry(clk_list, struct ufs_clk_info, list);
	dev_pm_opp_add(hba->dev, clki->min_freq, 0);
	dev_pm_opp_add(hba->dev, clki->max_freq, 0);

1371 1372
	ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
					 &hba->vps->ondemand_data);
1373
	devfreq = devfreq_add_device(hba->dev,
1374
			&hba->vps->devfreq_profile,
1375
			DEVFREQ_GOV_SIMPLE_ONDEMAND,
1376
			&hba->vps->ondemand_data);
1377 1378 1379
	if (IS_ERR(devfreq)) {
		ret = PTR_ERR(devfreq);
		dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1380 1381 1382

		dev_pm_opp_remove(hba->dev, clki->min_freq);
		dev_pm_opp_remove(hba->dev, clki->max_freq);
1383 1384 1385 1386 1387 1388 1389 1390
		return ret;
	}

	hba->devfreq = devfreq;

	return 0;
}

1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406
static void ufshcd_devfreq_remove(struct ufs_hba *hba)
{
	struct list_head *clk_list = &hba->clk_list_head;
	struct ufs_clk_info *clki;

	if (!hba->devfreq)
		return;

	devfreq_remove_device(hba->devfreq);
	hba->devfreq = NULL;

	clki = list_first_entry(clk_list, struct ufs_clk_info, list);
	dev_pm_opp_remove(hba->dev, clki->min_freq);
	dev_pm_opp_remove(hba->dev, clki->max_freq);
}

1407 1408 1409 1410 1411 1412 1413 1414 1415
static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
{
	unsigned long flags;

	devfreq_suspend_device(hba->devfreq);
	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->clk_scaling.window_start_t = 0;
	spin_unlock_irqrestore(hba->host->host_lock, flags);
}
1416

1417 1418
static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
{
1419 1420 1421
	unsigned long flags;
	bool suspend = false;

1422 1423 1424
	if (!ufshcd_is_clkscaling_supported(hba))
		return;

1425 1426 1427 1428 1429 1430 1431 1432 1433
	spin_lock_irqsave(hba->host->host_lock, flags);
	if (!hba->clk_scaling.is_suspended) {
		suspend = true;
		hba->clk_scaling.is_suspended = true;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (suspend)
		__ufshcd_suspend_clkscaling(hba);
1434 1435 1436 1437
}

static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
{
1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452
	unsigned long flags;
	bool resume = false;

	if (!ufshcd_is_clkscaling_supported(hba))
		return;

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (hba->clk_scaling.is_suspended) {
		resume = true;
		hba->clk_scaling.is_suspended = false;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (resume)
		devfreq_resume_device(hba->devfreq);
1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479
}

static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);

	return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
}

static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);
	u32 value;
	int err;

	if (kstrtou32(buf, 0, &value))
		return -EINVAL;

	value = !!value;
	if (value == hba->clk_scaling.is_allowed)
		goto out;

	pm_runtime_get_sync(hba->dev);
	ufshcd_hold(hba, false);

1480 1481 1482 1483 1484
	cancel_work_sync(&hba->clk_scaling.suspend_work);
	cancel_work_sync(&hba->clk_scaling.resume_work);

	hba->clk_scaling.is_allowed = value;

1485 1486 1487 1488
	if (value) {
		ufshcd_resume_clkscaling(hba);
	} else {
		ufshcd_suspend_clkscaling(hba);
1489
		err = ufshcd_devfreq_scale(hba, true);
1490 1491 1492 1493 1494 1495 1496 1497 1498
		if (err)
			dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
					__func__, err);
	}

	ufshcd_release(hba);
	pm_runtime_put_sync(hba->dev);
out:
	return count;
1499 1500
}

1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511
static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
{
	hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
	hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
	sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
	hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
	hba->clk_scaling.enable_attr.attr.mode = 0644;
	if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
		dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
}

1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529
static void ufshcd_ungate_work(struct work_struct *work)
{
	int ret;
	unsigned long flags;
	struct ufs_hba *hba = container_of(work, struct ufs_hba,
			clk_gating.ungate_work);

	cancel_delayed_work_sync(&hba->clk_gating.gate_work);

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (hba->clk_gating.state == CLKS_ON) {
		spin_unlock_irqrestore(hba->host->host_lock, flags);
		goto unblock_reqs;
	}

	spin_unlock_irqrestore(hba->host->host_lock, flags);
	ufshcd_setup_clocks(hba, true);

1530 1531
	ufshcd_enable_irq(hba);

1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546
	/* Exit from hibern8 */
	if (ufshcd_can_hibern8_during_gating(hba)) {
		/* Prevent gating in this path */
		hba->clk_gating.is_suspended = true;
		if (ufshcd_is_link_hibern8(hba)) {
			ret = ufshcd_uic_hibern8_exit(hba);
			if (ret)
				dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
					__func__, ret);
			else
				ufshcd_set_link_active(hba);
		}
		hba->clk_gating.is_suspended = false;
	}
unblock_reqs:
1547
	ufshcd_scsi_unblock_requests(hba);
1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565
}

/**
 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
 * Also, exit from hibern8 mode and set the link as active.
 * @hba: per adapter instance
 * @async: This indicates whether caller should ungate clocks asynchronously.
 */
int ufshcd_hold(struct ufs_hba *hba, bool async)
{
	int rc = 0;
	unsigned long flags;

	if (!ufshcd_is_clkgating_allowed(hba))
		goto out;
	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->clk_gating.active_reqs++;

1566 1567 1568 1569 1570
	if (ufshcd_eh_in_progress(hba)) {
		spin_unlock_irqrestore(hba->host->host_lock, flags);
		return 0;
	}

1571
start:
1572 1573
	switch (hba->clk_gating.state) {
	case CLKS_ON:
1574 1575 1576 1577 1578 1579 1580 1581 1582 1583
		/*
		 * Wait for the ungate work to complete if in progress.
		 * Though the clocks may be in ON state, the link could
		 * still be in hibner8 state if hibern8 is allowed
		 * during clock gating.
		 * Make sure we exit hibern8 state also in addition to
		 * clocks being ON.
		 */
		if (ufshcd_can_hibern8_during_gating(hba) &&
		    ufshcd_is_link_hibern8(hba)) {
1584 1585 1586 1587 1588
			if (async) {
				rc = -EAGAIN;
				hba->clk_gating.active_reqs--;
				break;
			}
1589 1590 1591 1592 1593
			spin_unlock_irqrestore(hba->host->host_lock, flags);
			flush_work(&hba->clk_gating.ungate_work);
			spin_lock_irqsave(hba->host->host_lock, flags);
			goto start;
		}
1594 1595 1596 1597
		break;
	case REQ_CLKS_OFF:
		if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
			hba->clk_gating.state = CLKS_ON;
1598 1599
			trace_ufshcd_clk_gating(dev_name(hba->dev),
						hba->clk_gating.state);
1600 1601 1602
			break;
		}
		/*
1603
		 * If we are here, it means gating work is either done or
1604 1605 1606
		 * currently running. Hence, fall through to cancel gating
		 * work and to enable clocks.
		 */
1607
		/* fallthrough */
1608
	case CLKS_OFF:
1609
		ufshcd_scsi_block_requests(hba);
1610
		hba->clk_gating.state = REQ_CLKS_ON;
1611 1612
		trace_ufshcd_clk_gating(dev_name(hba->dev),
					hba->clk_gating.state);
1613 1614
		queue_work(hba->clk_gating.clk_gating_workq,
			   &hba->clk_gating.ungate_work);
1615 1616 1617 1618
		/*
		 * fall through to check if we should wait for this
		 * work to be done or not.
		 */
1619
		/* fallthrough */
1620 1621 1622 1623 1624 1625 1626 1627 1628 1629
	case REQ_CLKS_ON:
		if (async) {
			rc = -EAGAIN;
			hba->clk_gating.active_reqs--;
			break;
		}

		spin_unlock_irqrestore(hba->host->host_lock, flags);
		flush_work(&hba->clk_gating.ungate_work);
		/* Make sure state is CLKS_ON before returning */
1630
		spin_lock_irqsave(hba->host->host_lock, flags);
1631 1632 1633 1634 1635 1636 1637 1638 1639 1640
		goto start;
	default:
		dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
				__func__, hba->clk_gating.state);
		break;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
	return rc;
}
1641
EXPORT_SYMBOL_GPL(ufshcd_hold);
1642 1643 1644 1645 1646 1647 1648 1649

static void ufshcd_gate_work(struct work_struct *work)
{
	struct ufs_hba *hba = container_of(work, struct ufs_hba,
			clk_gating.gate_work.work);
	unsigned long flags;

	spin_lock_irqsave(hba->host->host_lock, flags);
1650 1651 1652 1653 1654 1655 1656
	/*
	 * In case you are here to cancel this work the gating state
	 * would be marked as REQ_CLKS_ON. In this case save time by
	 * skipping the gating work and exit after changing the clock
	 * state to CLKS_ON.
	 */
	if (hba->clk_gating.is_suspended ||
1657
		(hba->clk_gating.state != REQ_CLKS_OFF)) {
1658
		hba->clk_gating.state = CLKS_ON;
1659 1660
		trace_ufshcd_clk_gating(dev_name(hba->dev),
					hba->clk_gating.state);
1661 1662 1663 1664 1665
		goto rel_lock;
	}

	if (hba->clk_gating.active_reqs
		|| hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1666
		|| ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1667 1668 1669 1670 1671 1672 1673 1674 1675
		|| hba->active_uic_cmd || hba->uic_async_done)
		goto rel_lock;

	spin_unlock_irqrestore(hba->host->host_lock, flags);

	/* put the link into hibern8 mode before turning off clocks */
	if (ufshcd_can_hibern8_during_gating(hba)) {
		if (ufshcd_uic_hibern8_enter(hba)) {
			hba->clk_gating.state = CLKS_ON;
1676 1677
			trace_ufshcd_clk_gating(dev_name(hba->dev),
						hba->clk_gating.state);
1678 1679 1680 1681 1682
			goto out;
		}
		ufshcd_set_link_hibern8(hba);
	}

1683 1684
	ufshcd_disable_irq(hba);

1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700
	if (!ufshcd_is_link_active(hba))
		ufshcd_setup_clocks(hba, false);
	else
		/* If link is active, device ref_clk can't be switched off */
		__ufshcd_setup_clocks(hba, false, true);

	/*
	 * In case you are here to cancel this work the gating state
	 * would be marked as REQ_CLKS_ON. In this case keep the state
	 * as REQ_CLKS_ON which would anyway imply that clocks are off
	 * and a request to turn them on is pending. By doing this way,
	 * we keep the state machine in tact and this would ultimately
	 * prevent from doing cancel work multiple times when there are
	 * new requests arriving before the current cancel work is done.
	 */
	spin_lock_irqsave(hba->host->host_lock, flags);
1701
	if (hba->clk_gating.state == REQ_CLKS_OFF) {
1702
		hba->clk_gating.state = CLKS_OFF;
1703 1704 1705
		trace_ufshcd_clk_gating(dev_name(hba->dev),
					hba->clk_gating.state);
	}
1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721
rel_lock:
	spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
	return;
}

/* host lock must be held before calling this variant */
static void __ufshcd_release(struct ufs_hba *hba)
{
	if (!ufshcd_is_clkgating_allowed(hba))
		return;

	hba->clk_gating.active_reqs--;

	if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
		|| hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1722
		|| ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1723 1724
		|| hba->active_uic_cmd || hba->uic_async_done
		|| ufshcd_eh_in_progress(hba))
1725 1726 1727
		return;

	hba->clk_gating.state = REQ_CLKS_OFF;
1728
	trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1729 1730 1731
	queue_delayed_work(hba->clk_gating.clk_gating_workq,
			   &hba->clk_gating.gate_work,
			   msecs_to_jiffies(hba->clk_gating.delay_ms));
1732 1733 1734 1735 1736 1737 1738 1739 1740 1741
}

void ufshcd_release(struct ufs_hba *hba)
{
	unsigned long flags;

	spin_lock_irqsave(hba->host->host_lock, flags);
	__ufshcd_release(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);
}
1742
EXPORT_SYMBOL_GPL(ufshcd_release);
1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766

static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);

	return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
}

static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);
	unsigned long flags, value;

	if (kstrtoul(buf, 0, &value))
		return -EINVAL;

	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->clk_gating.delay_ms = value;
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	return count;
}

1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801
static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);

	return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
}

static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
		struct device_attribute *attr, const char *buf, size_t count)
{
	struct ufs_hba *hba = dev_get_drvdata(dev);
	unsigned long flags;
	u32 value;

	if (kstrtou32(buf, 0, &value))
		return -EINVAL;

	value = !!value;
	if (value == hba->clk_gating.is_enabled)
		goto out;

	if (value) {
		ufshcd_release(hba);
	} else {
		spin_lock_irqsave(hba->host->host_lock, flags);
		hba->clk_gating.active_reqs++;
		spin_unlock_irqrestore(hba->host->host_lock, flags);
	}

	hba->clk_gating.is_enabled = value;
out:
	return count;
}

1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829
static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
{
	char wq_name[sizeof("ufs_clkscaling_00")];

	if (!ufshcd_is_clkscaling_supported(hba))
		return;

	INIT_WORK(&hba->clk_scaling.suspend_work,
		  ufshcd_clk_scaling_suspend_work);
	INIT_WORK(&hba->clk_scaling.resume_work,
		  ufshcd_clk_scaling_resume_work);

	snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
		 hba->host->host_no);
	hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);

	ufshcd_clkscaling_init_sysfs(hba);
}

static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
{
	if (!ufshcd_is_clkscaling_supported(hba))
		return;

	destroy_workqueue(hba->clk_scaling.workq);
	ufshcd_devfreq_remove(hba);
}

1830 1831
static void ufshcd_init_clk_gating(struct ufs_hba *hba)
{
1832 1833
	char wq_name[sizeof("ufs_clk_gating_00")];

1834 1835 1836 1837 1838 1839 1840
	if (!ufshcd_is_clkgating_allowed(hba))
		return;

	hba->clk_gating.delay_ms = 150;
	INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
	INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);

1841 1842 1843 1844 1845
	snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
		 hba->host->host_no);
	hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
							   WQ_MEM_RECLAIM);

1846 1847
	hba->clk_gating.is_enabled = true;

1848 1849 1850 1851
	hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
	hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
	sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
	hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1852
	hba->clk_gating.delay_attr.attr.mode = 0644;
1853 1854
	if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
		dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1855 1856 1857 1858 1859 1860 1861 1862

	hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
	hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
	sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
	hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
	hba->clk_gating.enable_attr.attr.mode = 0644;
	if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
		dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1863 1864 1865 1866 1867 1868 1869
}

static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
{
	if (!ufshcd_is_clkgating_allowed(hba))
		return;
	device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1870
	device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1871 1872
	cancel_work_sync(&hba->clk_gating.ungate_work);
	cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1873
	destroy_workqueue(hba->clk_gating.clk_gating_workq);
1874 1875
}

1876 1877 1878
/* Must be called with host lock acquired */
static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
{
1879 1880
	bool queue_resume_work = false;

1881
	if (!ufshcd_is_clkscaling_supported(hba))
1882 1883
		return;

1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899
	if (!hba->clk_scaling.active_reqs++)
		queue_resume_work = true;

	if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
		return;

	if (queue_resume_work)
		queue_work(hba->clk_scaling.workq,
			   &hba->clk_scaling.resume_work);

	if (!hba->clk_scaling.window_start_t) {
		hba->clk_scaling.window_start_t = jiffies;
		hba->clk_scaling.tot_busy_t = 0;
		hba->clk_scaling.is_busy_started = false;
	}

1900 1901 1902 1903 1904 1905 1906 1907 1908 1909
	if (!hba->clk_scaling.is_busy_started) {
		hba->clk_scaling.busy_start_t = ktime_get();
		hba->clk_scaling.is_busy_started = true;
	}
}

static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
{
	struct ufs_clk_scaling *scaling = &hba->clk_scaling;

1910
	if (!ufshcd_is_clkscaling_supported(hba))
1911 1912 1913 1914 1915
		return;

	if (!hba->outstanding_reqs && scaling->is_busy_started) {
		scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
					scaling->busy_start_t));
T
Thomas Gleixner 已提交
1916
		scaling->busy_start_t = 0;
1917 1918 1919
		scaling->is_busy_started = false;
	}
}
1920 1921 1922 1923 1924 1925 1926 1927
/**
 * ufshcd_send_command - Send SCSI or device management commands
 * @hba: per adapter instance
 * @task_tag: Task tag of the command
 */
static inline
void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
{
1928
	hba->lrb[task_tag].issue_time_stamp = ktime_get();
1929
	hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1930
	ufshcd_add_command_trace(hba, task_tag, "send");
1931
	ufshcd_clk_scaling_start_busy(hba);
1932
	__set_bit(task_tag, &hba->outstanding_reqs);
1933
	ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1934 1935
	/* Make sure that doorbell is committed immediately */
	wmb();
1936 1937 1938 1939
}

/**
 * ufshcd_copy_sense_data - Copy sense data in case of check condition
1940
 * @lrbp: pointer to local reference block
1941 1942 1943 1944
 */
static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
{
	int len;
1945 1946
	if (lrbp->sense_buffer &&
	    ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1947 1948
		int len_to_copy;

1949
		len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1950
		len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
1951

1952 1953
		memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
		       len_to_copy);
1954 1955 1956
	}
}

1957 1958 1959 1960
/**
 * ufshcd_copy_query_response() - Copy the Query Response and the data
 * descriptor
 * @hba: per adapter instance
1961
 * @lrbp: pointer to local reference block
1962 1963
 */
static
1964
int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1965 1966 1967 1968 1969 1970
{
	struct ufs_query_res *query_res = &hba->dev_cmd.query.response;

	memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);

	/* Get the descriptor */
1971 1972
	if (hba->dev_cmd.query.descriptor &&
	    lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
D
Dolev Raviv 已提交
1973
		u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1974
				GENERAL_UPIU_REQUEST_SIZE;
1975 1976
		u16 resp_len;
		u16 buf_len;
1977 1978

		/* data segment length */
1979
		resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1980
						MASK_QUERY_DATA_SEG_LEN;
1981 1982
		buf_len = be16_to_cpu(
				hba->dev_cmd.query.request.upiu_req.length);
1983 1984 1985 1986
		if (likely(buf_len >= resp_len)) {
			memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
		} else {
			dev_warn(hba->dev,
1987 1988
				 "%s: rsp size %d is bigger than buffer size %d",
				 __func__, resp_len, buf_len);
1989 1990
			return -EINVAL;
		}
1991
	}
1992 1993

	return 0;
1994 1995
}

1996 1997 1998 1999 2000 2001
/**
 * ufshcd_hba_capabilities - Read controller capabilities
 * @hba: per adapter instance
 */
static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
{
2002
	hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
2003 2004 2005 2006 2007 2008 2009 2010

	/* nutrs and nutmrs are 0 based values */
	hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
	hba->nutmrs =
	((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
}

/**
2011 2012
 * ufshcd_ready_for_uic_cmd - Check if controller is ready
 *                            to accept UIC commands
2013
 * @hba: per adapter instance
2014 2015 2016 2017 2018 2019 2020 2021 2022 2023
 * Return true on success, else false
 */
static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
{
	if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
		return true;
	else
		return false;
}

2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035
/**
 * ufshcd_get_upmcrs - Get the power mode change request status
 * @hba: Pointer to adapter instance
 *
 * This function gets the UPMCRS field of HCS register
 * Returns value of UPMCRS field
 */
static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
{
	return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
}

2036 2037 2038 2039 2040 2041
/**
 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
 * @hba: per adapter instance
 * @uic_cmd: UIC command
 *
 * Mutex must be held.
2042 2043
 */
static inline void
2044
ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2045
{
2046 2047 2048 2049
	WARN_ON(hba->active_uic_cmd);

	hba->active_uic_cmd = uic_cmd;

2050
	/* Write Args */
2051 2052 2053
	ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
	ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
	ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2054 2055

	/* Write UIC Cmd */
2056
	ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2057
		      REG_UIC_COMMAND);
2058 2059
}

2060 2061 2062
/**
 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
 * @hba: per adapter instance
2063
 * @uic_cmd: UIC command
2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090
 *
 * Must be called with mutex held.
 * Returns 0 only if success.
 */
static int
ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
{
	int ret;
	unsigned long flags;

	if (wait_for_completion_timeout(&uic_cmd->done,
					msecs_to_jiffies(UIC_CMD_TIMEOUT)))
		ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
	else
		ret = -ETIMEDOUT;

	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->active_uic_cmd = NULL;
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	return ret;
}

/**
 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
 * @hba: per adapter instance
 * @uic_cmd: UIC command
2091
 * @completion: initialize the completion only if this is set to true
2092 2093
 *
 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2094
 * with mutex held and host_lock locked.
2095 2096 2097
 * Returns 0 only if success.
 */
static int
2098 2099
__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
		      bool completion)
2100 2101 2102 2103 2104 2105 2106
{
	if (!ufshcd_ready_for_uic_cmd(hba)) {
		dev_err(hba->dev,
			"Controller not ready to accept UIC commands\n");
		return -EIO;
	}

2107 2108
	if (completion)
		init_completion(&uic_cmd->done);
2109 2110 2111

	ufshcd_dispatch_uic_cmd(hba, uic_cmd);

2112
	return 0;
2113 2114 2115 2116 2117 2118 2119 2120 2121
}

/**
 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
 * @hba: per adapter instance
 * @uic_cmd: UIC command
 *
 * Returns 0 only if success.
 */
2122
int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2123 2124
{
	int ret;
2125
	unsigned long flags;
2126

2127
	ufshcd_hold(hba, false);
2128
	mutex_lock(&hba->uic_cmd_mutex);
2129 2130
	ufshcd_add_delay_before_dme_cmd(hba);

2131
	spin_lock_irqsave(hba->host->host_lock, flags);
2132
	ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2133 2134 2135 2136
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	if (!ret)
		ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);

2137 2138
	mutex_unlock(&hba->uic_cmd_mutex);

2139
	ufshcd_release(hba);
2140 2141 2142
	return ret;
}

2143 2144
/**
 * ufshcd_map_sg - Map scatter-gather list to prdt
2145 2146
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
2147 2148 2149
 *
 * Returns 0 in case of success, non-zero value in case of failure
 */
2150
static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163
{
	struct ufshcd_sg_entry *prd_table;
	struct scatterlist *sg;
	struct scsi_cmnd *cmd;
	int sg_segments;
	int i;

	cmd = lrbp->cmd;
	sg_segments = scsi_dma_map(cmd);
	if (sg_segments < 0)
		return sg_segments;

	if (sg_segments) {
2164 2165
		lrbp->utr_descriptor_ptr->prd_table_length =
			cpu_to_le16((u16)sg_segments);
2166 2167 2168 2169 2170 2171 2172 2173 2174 2175

		prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;

		scsi_for_each_sg(cmd, sg, sg_segments, i) {
			prd_table[i].size  =
				cpu_to_le32(((u32) sg_dma_len(sg))-1);
			prd_table[i].base_addr =
				cpu_to_le32(lower_32_bits(sg->dma_address));
			prd_table[i].upper_addr =
				cpu_to_le32(upper_32_bits(sg->dma_address));
2176
			prd_table[i].reserved = 0;
2177 2178 2179 2180 2181 2182 2183 2184 2185
		}
	} else {
		lrbp->utr_descriptor_ptr->prd_table_length = 0;
	}

	return 0;
}

/**
2186
 * ufshcd_enable_intr - enable interrupts
2187
 * @hba: per adapter instance
2188
 * @intrs: interrupt bits
2189
 */
2190
static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2191
{
2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221
	u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);

	if (hba->ufs_version == UFSHCI_VERSION_10) {
		u32 rw;
		rw = set & INTERRUPT_MASK_RW_VER_10;
		set = rw | ((set ^ intrs) & intrs);
	} else {
		set |= intrs;
	}

	ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
}

/**
 * ufshcd_disable_intr - disable interrupts
 * @hba: per adapter instance
 * @intrs: interrupt bits
 */
static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
{
	u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);

	if (hba->ufs_version == UFSHCI_VERSION_10) {
		u32 rw;
		rw = (set & INTERRUPT_MASK_RW_VER_10) &
			~(intrs & INTERRUPT_MASK_RW_VER_10);
		set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);

	} else {
		set &= ~intrs;
2222
	}
2223 2224

	ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2225 2226
}

2227 2228 2229 2230 2231 2232 2233 2234
/**
 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
 * descriptor according to request
 * @lrbp: pointer to local reference block
 * @upiu_flags: flags required in the header
 * @cmd_dir: requests data direction
 */
static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
J
Joao Pinto 已提交
2235
			u32 *upiu_flags, enum dma_data_direction cmd_dir)
2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258
{
	struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
	u32 data_direction;
	u32 dword_0;

	if (cmd_dir == DMA_FROM_DEVICE) {
		data_direction = UTP_DEVICE_TO_HOST;
		*upiu_flags = UPIU_CMD_FLAGS_READ;
	} else if (cmd_dir == DMA_TO_DEVICE) {
		data_direction = UTP_HOST_TO_DEVICE;
		*upiu_flags = UPIU_CMD_FLAGS_WRITE;
	} else {
		data_direction = UTP_NO_DATA_TRANSFER;
		*upiu_flags = UPIU_CMD_FLAGS_NONE;
	}

	dword_0 = data_direction | (lrbp->command_type
				<< UPIU_COMMAND_TYPE_OFFSET);
	if (lrbp->intr_cmd)
		dword_0 |= UTP_REQ_DESC_INT_CMD;

	/* Transfer request descriptor header fields */
	req_desc->header.dword_0 = cpu_to_le32(dword_0);
2259 2260
	/* dword_1 is reserved, hence it is set to 0 */
	req_desc->header.dword_1 = 0;
2261 2262 2263 2264 2265 2266 2267
	/*
	 * assigning invalid value for command status. Controller
	 * updates OCS on command completion, with the command
	 * status
	 */
	req_desc->header.dword_2 =
		cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2268 2269
	/* dword_3 is reserved, hence it is set to 0 */
	req_desc->header.dword_3 = 0;
2270 2271

	req_desc->prd_table_length = 0;
2272 2273 2274 2275 2276
}

/**
 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
 * for scsi commands
2277 2278
 * @lrbp: local reference block pointer
 * @upiu_flags: flags
2279 2280 2281 2282
 */
static
void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
{
2283
	struct scsi_cmnd *cmd = lrbp->cmd;
2284
	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2285
	unsigned short cdb_len;
2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296

	/* command descriptor fields */
	ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
				UPIU_TRANSACTION_COMMAND, upiu_flags,
				lrbp->lun, lrbp->task_tag);
	ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
				UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);

	/* Total EHS length and Data segment length will be zero */
	ucd_req_ptr->header.dword_2 = 0;

2297
	ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
2298

2299
	cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
2300
	memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2301
	memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
2302 2303

	memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2304 2305
}

2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317
/**
 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
 * for query requsts
 * @hba: UFS hba
 * @lrbp: local reference block pointer
 * @upiu_flags: flags
 */
static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
				struct ufshcd_lrb *lrbp, u32 upiu_flags)
{
	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
	struct ufs_query *query = &hba->dev_cmd.query;
2318
	u16 len = be16_to_cpu(query->request.upiu_req.length);
2319 2320 2321 2322 2323 2324 2325 2326

	/* Query request header */
	ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
			UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
			lrbp->lun, lrbp->task_tag);
	ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
			0, query->request.query_func, 0, 0);

2327 2328 2329 2330 2331 2332
	/* Data segment length only need for WRITE_DESC */
	if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
		ucd_req_ptr->header.dword_2 =
			UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
	else
		ucd_req_ptr->header.dword_2 = 0;
2333 2334 2335 2336 2337 2338

	/* Copy the Query Request buffer as is */
	memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
			QUERY_OSF_SIZE);

	/* Copy the Descriptor */
2339
	if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2340
		memcpy(ucd_req_ptr + 1, query->descriptor, len);
2341

2342
	memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2343 2344
}

2345 2346 2347 2348 2349 2350 2351 2352 2353 2354
static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
{
	struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;

	memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));

	/* command descriptor fields */
	ucd_req_ptr->header.dword_0 =
		UPIU_HEADER_DWORD(
			UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2355 2356 2357 2358 2359
	/* clear rest of the fields of basic header */
	ucd_req_ptr->header.dword_1 = 0;
	ucd_req_ptr->header.dword_2 = 0;

	memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2360 2361
}

2362
/**
J
Joao Pinto 已提交
2363 2364
 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
 *			     for Device Management Purposes
2365 2366
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
2367
 */
J
Joao Pinto 已提交
2368
static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2369 2370
{
	u32 upiu_flags;
2371
	int ret = 0;
2372

2373 2374
	if ((hba->ufs_version == UFSHCI_VERSION_10) ||
	    (hba->ufs_version == UFSHCI_VERSION_11))
J
Joao Pinto 已提交
2375
		lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2376 2377
	else
		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
J
Joao Pinto 已提交
2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392

	ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
	if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
		ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
	else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
		ufshcd_prepare_utp_nop_upiu(lrbp);
	else
		ret = -EINVAL;

	return ret;
}

/**
 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
 *			   for SCSI Purposes
2393 2394
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
J
Joao Pinto 已提交
2395 2396 2397 2398 2399 2400
 */
static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
	u32 upiu_flags;
	int ret = 0;

2401 2402
	if ((hba->ufs_version == UFSHCI_VERSION_10) ||
	    (hba->ufs_version == UFSHCI_VERSION_11))
J
Joao Pinto 已提交
2403
		lrbp->command_type = UTP_CMD_TYPE_SCSI;
2404 2405
	else
		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
J
Joao Pinto 已提交
2406 2407 2408 2409 2410 2411 2412 2413

	if (likely(lrbp->cmd)) {
		ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
						lrbp->cmd->sc_data_direction);
		ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
	} else {
		ret = -EINVAL;
	}
2414 2415

	return ret;
2416 2417
}

2418 2419
/**
 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2420
 * @upiu_wlun_id: UPIU W-LUN id
2421 2422 2423 2424 2425 2426 2427 2428
 *
 * Returns SCSI W-LUN id
 */
static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
{
	return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
}

2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449
static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
{
	struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
	struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
	dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
		i * sizeof(struct utp_transfer_cmd_desc);
	u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
				       response_upiu);
	u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);

	lrb->utr_descriptor_ptr = utrdlp + i;
	lrb->utrd_dma_addr = hba->utrdl_dma_addr +
		i * sizeof(struct utp_transfer_req_desc);
	lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
	lrb->ucd_req_dma_addr = cmd_desc_element_addr;
	lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
	lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
	lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
	lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
}

2450 2451
/**
 * ufshcd_queuecommand - main entry point for SCSI requests
2452
 * @host: SCSI host pointer
2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467
 * @cmd: command from SCSI Midlayer
 *
 * Returns 0 for success, non-zero in case of failure
 */
static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
{
	struct ufshcd_lrb *lrbp;
	struct ufs_hba *hba;
	unsigned long flags;
	int tag;
	int err = 0;

	hba = shost_priv(host);

	tag = cmd->request->tag;
2468 2469 2470 2471 2472 2473
	if (!ufshcd_valid_tag(hba, tag)) {
		dev_err(hba->dev,
			"%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
			__func__, tag, cmd, cmd->request);
		BUG();
	}
2474

2475 2476 2477
	if (!down_read_trylock(&hba->clk_scaling_lock))
		return SCSI_MLQUEUE_HOST_BUSY;

2478 2479 2480 2481
	spin_lock_irqsave(hba->host->host_lock, flags);
	switch (hba->ufshcd_state) {
	case UFSHCD_STATE_OPERATIONAL:
		break;
2482
	case UFSHCD_STATE_EH_SCHEDULED:
2483
	case UFSHCD_STATE_RESET:
2484
		err = SCSI_MLQUEUE_HOST_BUSY;
2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495
		goto out_unlock;
	case UFSHCD_STATE_ERROR:
		set_host_byte(cmd, DID_ERROR);
		cmd->scsi_done(cmd);
		goto out_unlock;
	default:
		dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
				__func__, hba->ufshcd_state);
		set_host_byte(cmd, DID_BAD_TARGET);
		cmd->scsi_done(cmd);
		goto out_unlock;
2496
	}
2497 2498 2499 2500 2501 2502 2503

	/* if error handling is in progress, don't issue commands */
	if (ufshcd_eh_in_progress(hba)) {
		set_host_byte(cmd, DID_ERROR);
		cmd->scsi_done(cmd);
		goto out_unlock;
	}
2504
	spin_unlock_irqrestore(hba->host->host_lock, flags);
2505

2506 2507
	hba->req_abort_count = 0;

2508 2509 2510 2511 2512 2513 2514
	err = ufshcd_hold(hba, true);
	if (err) {
		err = SCSI_MLQUEUE_HOST_BUSY;
		goto out;
	}
	WARN_ON(hba->clk_gating.state != CLKS_ON);

2515 2516
	lrbp = &hba->lrb[tag];

2517
	WARN_ON(lrbp->cmd);
2518
	lrbp->cmd = cmd;
2519
	lrbp->sense_bufflen = UFS_SENSE_SIZE;
2520 2521
	lrbp->sense_buffer = cmd->sense_buffer;
	lrbp->task_tag = tag;
2522
	lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2523
	lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2524
	lrbp->req_abort_skip = false;
2525

J
Joao Pinto 已提交
2526 2527
	ufshcd_comp_scsi_upiu(hba, lrbp);

2528
	err = ufshcd_map_sg(hba, lrbp);
2529 2530
	if (err) {
		lrbp->cmd = NULL;
2531
		ufshcd_release(hba);
2532
		goto out;
2533
	}
2534 2535
	/* Make sure descriptors are ready before ringing the doorbell */
	wmb();
2536 2537 2538

	/* issue command to the controller */
	spin_lock_irqsave(hba->host->host_lock, flags);
B
Bart Van Assche 已提交
2539
	ufshcd_vops_setup_xfer_req(hba, tag, true);
2540
	ufshcd_send_command(hba, tag);
2541
out_unlock:
2542 2543
	spin_unlock_irqrestore(hba->host->host_lock, flags);
out:
2544
	up_read(&hba->clk_scaling_lock);
2545 2546 2547
	return err;
}

2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558
static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
		struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
{
	lrbp->cmd = NULL;
	lrbp->sense_bufflen = 0;
	lrbp->sense_buffer = NULL;
	lrbp->task_tag = tag;
	lrbp->lun = 0; /* device management cmd is not specific to any LUN */
	lrbp->intr_cmd = true; /* No interrupt aggregation */
	hba->dev_cmd.type = cmd_type;

J
Joao Pinto 已提交
2559
	return ufshcd_comp_devman_upiu(hba, lrbp);
2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579
}

static int
ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
{
	int err = 0;
	unsigned long flags;
	u32 mask = 1 << tag;

	/* clear outstanding transaction before retry */
	spin_lock_irqsave(hba->host->host_lock, flags);
	ufshcd_utrl_clear(hba, tag);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	/*
	 * wait for for h/w to clear corresponding bit in door-bell.
	 * max. wait is 1 sec.
	 */
	err = ufshcd_wait_for_register(hba,
			REG_UTP_TRANSFER_REQ_DOOR_BELL,
2580
			mask, ~mask, 1000, 1000);
2581 2582 2583 2584

	return err;
}

2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595
static int
ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
	struct ufs_query_res *query_res = &hba->dev_cmd.query.response;

	/* Get the UPIU response */
	query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
				UPIU_RSP_CODE_OFFSET;
	return query_res->response;
}

2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606
/**
 * ufshcd_dev_cmd_completion() - handles device management command responses
 * @hba: per adapter instance
 * @lrbp: pointer to local reference block
 */
static int
ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
	int resp;
	int err = 0;

2607
	hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2608 2609 2610 2611 2612 2613 2614 2615 2616 2617
	resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);

	switch (resp) {
	case UPIU_TRANSACTION_NOP_IN:
		if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
			err = -EINVAL;
			dev_err(hba->dev, "%s: unexpected response %x\n",
					__func__, resp);
		}
		break;
2618
	case UPIU_TRANSACTION_QUERY_RSP:
2619 2620 2621
		err = ufshcd_check_query_response(hba, lrbp);
		if (!err)
			err = ufshcd_copy_query_response(hba, lrbp);
2622
		break;
2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648
	case UPIU_TRANSACTION_REJECT_UPIU:
		/* TODO: handle Reject UPIU Response */
		err = -EPERM;
		dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
				__func__);
		break;
	default:
		err = -EINVAL;
		dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
				__func__, resp);
		break;
	}

	return err;
}

static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
		struct ufshcd_lrb *lrbp, int max_timeout)
{
	int err = 0;
	unsigned long time_left;
	unsigned long flags;

	time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
			msecs_to_jiffies(max_timeout));

2649 2650
	/* Make sure descriptors are ready before ringing the doorbell */
	wmb();
2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661
	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->dev_cmd.complete = NULL;
	if (likely(time_left)) {
		err = ufshcd_get_tr_ocs(lrbp);
		if (!err)
			err = ufshcd_dev_cmd_completion(hba, lrbp);
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (!time_left) {
		err = -ETIMEDOUT;
2662 2663
		dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
			__func__, lrbp->task_tag);
2664
		if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2665
			/* successfully cleared the command, retry if needed */
2666
			err = -EAGAIN;
2667 2668 2669 2670 2671 2672
		/*
		 * in case of an error, after clearing the doorbell,
		 * we also need to clear the outstanding_request
		 * field in hba
		 */
		ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2673 2674 2675 2676 2677 2678 2679
	}

	return err;
}

/**
 * ufshcd_exec_dev_cmd - API for sending device management requests
2680 2681 2682
 * @hba: UFS hba
 * @cmd_type: specifies the type (NOP, Query...)
 * @timeout: time in seconds
2683
 *
2684 2685
 * NOTE: Since there is only one available tag for device management commands,
 * it is expected you hold the hba->dev_cmd.lock mutex.
2686 2687 2688 2689
 */
static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
		enum dev_cmd_type cmd_type, int timeout)
{
2690 2691
	struct request_queue *q = hba->cmd_queue;
	struct request *req;
2692 2693 2694 2695 2696 2697
	struct ufshcd_lrb *lrbp;
	int err;
	int tag;
	struct completion wait;
	unsigned long flags;

2698 2699
	down_read(&hba->clk_scaling_lock);

2700 2701 2702 2703 2704
	/*
	 * Get free slot, sleep if slots are unavailable.
	 * Even though we use wait_event() which sleeps indefinitely,
	 * the maximum wait time is bounded by SCSI request timeout.
	 */
2705
	req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
2706 2707 2708 2709
	if (IS_ERR(req)) {
		err = PTR_ERR(req);
		goto out_unlock;
	}
2710 2711
	tag = req->tag;
	WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
2712 2713 2714 2715 2716 2717 2718 2719 2720 2721

	init_completion(&wait);
	lrbp = &hba->lrb[tag];
	WARN_ON(lrbp->cmd);
	err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
	if (unlikely(err))
		goto out_put_tag;

	hba->dev_cmd.complete = &wait;

2722
	ufshcd_add_query_upiu_trace(hba, tag, "query_send");
2723 2724
	/* Make sure descriptors are ready before ringing the doorbell */
	wmb();
2725
	spin_lock_irqsave(hba->host->host_lock, flags);
B
Bart Van Assche 已提交
2726
	ufshcd_vops_setup_xfer_req(hba, tag, false);
2727 2728 2729 2730 2731
	ufshcd_send_command(hba, tag);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);

2732 2733 2734
	ufshcd_add_query_upiu_trace(hba, tag,
			err ? "query_complete_err" : "query_complete");

2735
out_put_tag:
2736
	blk_put_request(req);
2737
out_unlock:
2738
	up_read(&hba->clk_scaling_lock);
2739 2740 2741
	return err;
}

D
Dolev Raviv 已提交
2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765
/**
 * ufshcd_init_query() - init the query response and request parameters
 * @hba: per-adapter instance
 * @request: address of the request pointer to be initialized
 * @response: address of the response pointer to be initialized
 * @opcode: operation to perform
 * @idn: flag idn to access
 * @index: LU number to access
 * @selector: query/flag/descriptor further identification
 */
static inline void ufshcd_init_query(struct ufs_hba *hba,
		struct ufs_query_req **request, struct ufs_query_res **response,
		enum query_opcode opcode, u8 idn, u8 index, u8 selector)
{
	*request = &hba->dev_cmd.query.request;
	*response = &hba->dev_cmd.query.response;
	memset(*request, 0, sizeof(struct ufs_query_req));
	memset(*response, 0, sizeof(struct ufs_query_res));
	(*request)->upiu_req.opcode = opcode;
	(*request)->upiu_req.idn = idn;
	(*request)->upiu_req.index = index;
	(*request)->upiu_req.selector = selector;
}

2766
static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2767
	enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
2768 2769 2770 2771 2772
{
	int ret;
	int retries;

	for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2773
		ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788
		if (ret)
			dev_dbg(hba->dev,
				"%s: failed with error %d, retries %d\n",
				__func__, ret, retries);
		else
			break;
	}

	if (ret)
		dev_err(hba->dev,
			"%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
			__func__, opcode, idn, ret, retries);
	return ret;
}

2789 2790
/**
 * ufshcd_query_flag() - API function for sending flag query requests
2791 2792 2793
 * @hba: per-adapter instance
 * @opcode: flag query to perform
 * @idn: flag idn to access
2794
 * @index: flag index to access
2795
 * @flag_res: the flag value after the query request completes
2796 2797 2798
 *
 * Returns 0 for success, non-zero in case of failure
 */
2799
int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2800
			enum flag_idn idn, u8 index, bool *flag_res)
2801
{
D
Dolev Raviv 已提交
2802 2803
	struct ufs_query_req *request = NULL;
	struct ufs_query_res *response = NULL;
2804
	int err, selector = 0;
2805
	int timeout = QUERY_REQ_TIMEOUT;
2806 2807 2808

	BUG_ON(!hba);

2809
	ufshcd_hold(hba, false);
2810
	mutex_lock(&hba->dev_cmd.lock);
D
Dolev Raviv 已提交
2811 2812
	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
			selector);
2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837

	switch (opcode) {
	case UPIU_QUERY_OPCODE_SET_FLAG:
	case UPIU_QUERY_OPCODE_CLEAR_FLAG:
	case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
		break;
	case UPIU_QUERY_OPCODE_READ_FLAG:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
		if (!flag_res) {
			/* No dummy reads */
			dev_err(hba->dev, "%s: Invalid argument for read request\n",
					__func__);
			err = -EINVAL;
			goto out_unlock;
		}
		break;
	default:
		dev_err(hba->dev,
			"%s: Expected query flag opcode but got = %d\n",
			__func__, opcode);
		err = -EINVAL;
		goto out_unlock;
	}

2838
	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2839 2840 2841 2842 2843 2844 2845 2846 2847

	if (err) {
		dev_err(hba->dev,
			"%s: Sending flag query for idn %d failed, err = %d\n",
			__func__, idn, err);
		goto out_unlock;
	}

	if (flag_res)
2848
		*flag_res = (be32_to_cpu(response->upiu_res.value) &
2849 2850 2851 2852
				MASK_QUERY_UPIU_FLAG_LOC) & 0x1;

out_unlock:
	mutex_unlock(&hba->dev_cmd.lock);
2853
	ufshcd_release(hba);
2854 2855 2856
	return err;
}

2857 2858
/**
 * ufshcd_query_attr - API function for sending attribute requests
2859 2860 2861 2862 2863 2864
 * @hba: per-adapter instance
 * @opcode: attribute opcode
 * @idn: attribute idn to access
 * @index: index field
 * @selector: selector field
 * @attr_val: the attribute value after the query request completes
2865 2866 2867
 *
 * Returns 0 for success, non-zero in case of failure
*/
2868 2869
int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
		      enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2870
{
D
Dolev Raviv 已提交
2871 2872
	struct ufs_query_req *request = NULL;
	struct ufs_query_res *response = NULL;
2873 2874 2875 2876
	int err;

	BUG_ON(!hba);

2877
	ufshcd_hold(hba, false);
2878 2879 2880 2881 2882 2883 2884 2885
	if (!attr_val) {
		dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
				__func__, opcode);
		err = -EINVAL;
		goto out;
	}

	mutex_lock(&hba->dev_cmd.lock);
D
Dolev Raviv 已提交
2886 2887
	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
			selector);
2888 2889 2890 2891

	switch (opcode) {
	case UPIU_QUERY_OPCODE_WRITE_ATTR:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2892
		request->upiu_req.value = cpu_to_be32(*attr_val);
2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903
		break;
	case UPIU_QUERY_OPCODE_READ_ATTR:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
		break;
	default:
		dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
				__func__, opcode);
		err = -EINVAL;
		goto out_unlock;
	}

D
Dolev Raviv 已提交
2904
	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2905 2906

	if (err) {
2907 2908
		dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
				__func__, opcode, idn, index, err);
2909 2910 2911
		goto out_unlock;
	}

2912
	*attr_val = be32_to_cpu(response->upiu_res.value);
2913 2914 2915 2916

out_unlock:
	mutex_unlock(&hba->dev_cmd.lock);
out:
2917
	ufshcd_release(hba);
2918 2919 2920
	return err;
}

2921 2922 2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940
/**
 * ufshcd_query_attr_retry() - API function for sending query
 * attribute with retries
 * @hba: per-adapter instance
 * @opcode: attribute opcode
 * @idn: attribute idn to access
 * @index: index field
 * @selector: selector field
 * @attr_val: the attribute value after the query request
 * completes
 *
 * Returns 0 for success, non-zero in case of failure
*/
static int ufshcd_query_attr_retry(struct ufs_hba *hba,
	enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
	u32 *attr_val)
{
	int ret = 0;
	u32 retries;

2941
	for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957
		ret = ufshcd_query_attr(hba, opcode, idn, index,
						selector, attr_val);
		if (ret)
			dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
				__func__, ret, retries);
		else
			break;
	}

	if (ret)
		dev_err(hba->dev,
			"%s: query attribute, idn %d, failed with error %d after %d retires\n",
			__func__, idn, ret, QUERY_REQ_RETRIES);
	return ret;
}

2958
static int __ufshcd_query_descriptor(struct ufs_hba *hba,
D
Dolev Raviv 已提交
2959 2960 2961 2962 2963 2964 2965 2966 2967
			enum query_opcode opcode, enum desc_idn idn, u8 index,
			u8 selector, u8 *desc_buf, int *buf_len)
{
	struct ufs_query_req *request = NULL;
	struct ufs_query_res *response = NULL;
	int err;

	BUG_ON(!hba);

2968
	ufshcd_hold(hba, false);
D
Dolev Raviv 已提交
2969 2970 2971 2972 2973 2974 2975
	if (!desc_buf) {
		dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
				__func__, opcode);
		err = -EINVAL;
		goto out;
	}

2976
	if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
D
Dolev Raviv 已提交
2977 2978 2979 2980 2981 2982 2983 2984 2985 2986
		dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
				__func__, *buf_len);
		err = -EINVAL;
		goto out;
	}

	mutex_lock(&hba->dev_cmd.lock);
	ufshcd_init_query(hba, &request, &response, opcode, idn, index,
			selector);
	hba->dev_cmd.query.descriptor = desc_buf;
2987
	request->upiu_req.length = cpu_to_be16(*buf_len);
D
Dolev Raviv 已提交
2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006

	switch (opcode) {
	case UPIU_QUERY_OPCODE_WRITE_DESC:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
		break;
	case UPIU_QUERY_OPCODE_READ_DESC:
		request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
		break;
	default:
		dev_err(hba->dev,
				"%s: Expected query descriptor opcode but got = 0x%.2x\n",
				__func__, opcode);
		err = -EINVAL;
		goto out_unlock;
	}

	err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);

	if (err) {
3007 3008
		dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
				__func__, opcode, idn, index, err);
D
Dolev Raviv 已提交
3009 3010 3011
		goto out_unlock;
	}

3012
	*buf_len = be16_to_cpu(response->upiu_res.length);
D
Dolev Raviv 已提交
3013 3014

out_unlock:
3015
	hba->dev_cmd.query.descriptor = NULL;
D
Dolev Raviv 已提交
3016 3017
	mutex_unlock(&hba->dev_cmd.lock);
out:
3018
	ufshcd_release(hba);
D
Dolev Raviv 已提交
3019 3020 3021
	return err;
}

3022
/**
3023 3024 3025 3026 3027 3028 3029 3030
 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
 * @hba: per-adapter instance
 * @opcode: attribute opcode
 * @idn: attribute idn to access
 * @index: index field
 * @selector: selector field
 * @desc_buf: the buffer that contains the descriptor
 * @buf_len: length parameter passed to the device
3031 3032 3033 3034 3035
 *
 * Returns 0 for success, non-zero in case of failure.
 * The buf_len parameter will contain, on return, the length parameter
 * received on the response.
 */
3036 3037 3038 3039 3040
int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
				  enum query_opcode opcode,
				  enum desc_idn idn, u8 index,
				  u8 selector,
				  u8 *desc_buf, int *buf_len)
3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054
{
	int err;
	int retries;

	for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
		err = __ufshcd_query_descriptor(hba, opcode, idn, index,
						selector, desc_buf, buf_len);
		if (!err || err == -EINVAL)
			break;
	}

	return err;
}

3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128
/**
 * ufshcd_read_desc_length - read the specified descriptor length from header
 * @hba: Pointer to adapter instance
 * @desc_id: descriptor idn value
 * @desc_index: descriptor index
 * @desc_length: pointer to variable to read the length of descriptor
 *
 * Return 0 in case of success, non-zero otherwise
 */
static int ufshcd_read_desc_length(struct ufs_hba *hba,
	enum desc_idn desc_id,
	int desc_index,
	int *desc_length)
{
	int ret;
	u8 header[QUERY_DESC_HDR_SIZE];
	int header_len = QUERY_DESC_HDR_SIZE;

	if (desc_id >= QUERY_DESC_IDN_MAX)
		return -EINVAL;

	ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
					desc_id, desc_index, 0, header,
					&header_len);

	if (ret) {
		dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
			__func__, desc_id);
		return ret;
	} else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
		dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
			__func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
			desc_id);
		ret = -EINVAL;
	}

	*desc_length = header[QUERY_DESC_LENGTH_OFFSET];
	return ret;

}

/**
 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
 * @hba: Pointer to adapter instance
 * @desc_id: descriptor idn value
 * @desc_len: mapped desc length (out)
 *
 * Return 0 in case of success, non-zero otherwise
 */
int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
	enum desc_idn desc_id, int *desc_len)
{
	switch (desc_id) {
	case QUERY_DESC_IDN_DEVICE:
		*desc_len = hba->desc_size.dev_desc;
		break;
	case QUERY_DESC_IDN_POWER:
		*desc_len = hba->desc_size.pwr_desc;
		break;
	case QUERY_DESC_IDN_GEOMETRY:
		*desc_len = hba->desc_size.geom_desc;
		break;
	case QUERY_DESC_IDN_CONFIGURATION:
		*desc_len = hba->desc_size.conf_desc;
		break;
	case QUERY_DESC_IDN_UNIT:
		*desc_len = hba->desc_size.unit_desc;
		break;
	case QUERY_DESC_IDN_INTERCONNECT:
		*desc_len = hba->desc_size.interc_desc;
		break;
	case QUERY_DESC_IDN_STRING:
		*desc_len = QUERY_DESC_MAX_SIZE;
		break;
3129 3130 3131
	case QUERY_DESC_IDN_HEALTH:
		*desc_len = hba->desc_size.hlth_desc;
		break;
3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143
	case QUERY_DESC_IDN_RFU_0:
	case QUERY_DESC_IDN_RFU_1:
		*desc_len = 0;
		break;
	default:
		*desc_len = 0;
		return -EINVAL;
	}
	return 0;
}
EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);

3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154
/**
 * ufshcd_read_desc_param - read the specified descriptor parameter
 * @hba: Pointer to adapter instance
 * @desc_id: descriptor idn value
 * @desc_index: descriptor index
 * @param_offset: offset of the parameter to read
 * @param_read_buf: pointer to buffer where parameter would be read
 * @param_size: sizeof(param_read_buf)
 *
 * Return 0 in case of success, non-zero otherwise
 */
3155 3156 3157 3158 3159 3160
int ufshcd_read_desc_param(struct ufs_hba *hba,
			   enum desc_idn desc_id,
			   int desc_index,
			   u8 param_offset,
			   u8 *param_read_buf,
			   u8 param_size)
3161 3162 3163
{
	int ret;
	u8 *desc_buf;
3164
	int buff_len;
3165 3166
	bool is_kmalloc = true;

3167 3168
	/* Safety check */
	if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3169 3170
		return -EINVAL;

3171 3172 3173 3174
	/* Get the max length of descriptor from structure filled up at probe
	 * time.
	 */
	ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3175

3176 3177 3178 3179 3180 3181 3182 3183 3184
	/* Sanity checks */
	if (ret || !buff_len) {
		dev_err(hba->dev, "%s: Failed to get full descriptor length",
			__func__);
		return ret;
	}

	/* Check whether we need temp memory */
	if (param_offset != 0 || param_size < buff_len) {
3185 3186 3187
		desc_buf = kmalloc(buff_len, GFP_KERNEL);
		if (!desc_buf)
			return -ENOMEM;
3188 3189 3190
	} else {
		desc_buf = param_read_buf;
		is_kmalloc = false;
3191 3192
	}

3193
	/* Request for full descriptor */
3194
	ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3195 3196
					desc_id, desc_index, 0,
					desc_buf, &buff_len);
3197

3198 3199 3200
	if (ret) {
		dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
			__func__, desc_id, desc_index, param_offset, ret);
3201 3202 3203
		goto out;
	}

3204 3205 3206 3207 3208 3209 3210 3211
	/* Sanity check */
	if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
		dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
			__func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
		ret = -EINVAL;
		goto out;
	}

3212 3213 3214
	/* Check wherher we will not copy more data, than available */
	if (is_kmalloc && param_size > buff_len)
		param_size = buff_len;
3215

3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226
	if (is_kmalloc)
		memcpy(param_read_buf, &desc_buf[param_offset], param_size);
out:
	if (is_kmalloc)
		kfree(desc_buf);
	return ret;
}

static inline int ufshcd_read_desc(struct ufs_hba *hba,
				   enum desc_idn desc_id,
				   int desc_index,
3227
				   void *buf,
3228 3229 3230 3231 3232
				   u32 size)
{
	return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
}

3233

3234 3235 3236 3237 3238 3239 3240 3241 3242 3243
/**
 * struct uc_string_id - unicode string
 *
 * @len: size of this descriptor inclusive
 * @type: descriptor type
 * @uc: unicode string character
 */
struct uc_string_id {
	u8 len;
	u8 type;
3244
	wchar_t uc[];
3245 3246 3247 3248 3249 3250 3251 3252
} __packed;

/* replace non-printable or non-ASCII characters with spaces */
static inline char ufshcd_remove_non_printable(u8 ch)
{
	return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
}

3253 3254 3255 3256
/**
 * ufshcd_read_string_desc - read string descriptor
 * @hba: pointer to adapter instance
 * @desc_index: descriptor index
3257 3258
 * @buf: pointer to buffer where descriptor would be read,
 *       the caller should free the memory.
3259
 * @ascii: if true convert from unicode to ascii characters
3260
 *         null terminated string.
3261
 *
3262 3263 3264 3265
 * Return:
 * *      string size on success.
 * *      -ENOMEM: on allocation failure
 * *      -EINVAL: on a wrong parameter
3266
 */
3267 3268
int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
			    u8 **buf, bool ascii)
3269
{
3270 3271 3272
	struct uc_string_id *uc_str;
	u8 *str;
	int ret;
3273

3274 3275
	if (!buf)
		return -EINVAL;
3276

3277 3278 3279
	uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
	if (!uc_str)
		return -ENOMEM;
3280

3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294
	ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
			       desc_index, uc_str,
			       QUERY_DESC_MAX_SIZE);
	if (ret < 0) {
		dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
			QUERY_REQ_RETRIES, ret);
		str = NULL;
		goto out;
	}

	if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
		dev_dbg(hba->dev, "String Desc is of zero length\n");
		str = NULL;
		ret = 0;
3295 3296 3297 3298
		goto out;
	}

	if (ascii) {
3299
		ssize_t ascii_len;
3300 3301
		int i;
		/* remove header and divide by 2 to move from UTF16 to UTF8 */
3302 3303 3304 3305
		ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
		str = kzalloc(ascii_len, GFP_KERNEL);
		if (!str) {
			ret = -ENOMEM;
3306
			goto out;
3307 3308 3309 3310 3311 3312
		}

		/*
		 * the descriptor contains string in UTF16 format
		 * we need to convert to utf-8 so it can be displayed
		 */
3313 3314 3315
		ret = utf16s_to_utf8s(uc_str->uc,
				      uc_str->len - QUERY_DESC_HDR_SIZE,
				      UTF16_BIG_ENDIAN, str, ascii_len);
3316 3317

		/* replace non-printable or non-ASCII characters with spaces */
3318 3319
		for (i = 0; i < ret; i++)
			str[i] = ufshcd_remove_non_printable(str[i]);
3320

3321 3322 3323
		str[ret++] = '\0';

	} else {
3324
		str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
3325 3326 3327 3328 3329
		if (!str) {
			ret = -ENOMEM;
			goto out;
		}
		ret = uc_str->len;
3330 3331
	}
out:
3332 3333 3334
	*buf = str;
	kfree(uc_str);
	return ret;
3335 3336
}

3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356
/**
 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
 * @hba: Pointer to adapter instance
 * @lun: lun id
 * @param_offset: offset of the parameter to read
 * @param_read_buf: pointer to buffer where parameter would be read
 * @param_size: sizeof(param_read_buf)
 *
 * Return 0 in case of success, non-zero otherwise
 */
static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
					      int lun,
					      enum unit_desc_param param_offset,
					      u8 *param_read_buf,
					      u32 param_size)
{
	/*
	 * Unit descriptors are only available for general purpose LUs (LUN id
	 * from 0 to 7) and RPMB Well known LU.
	 */
3357
	if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun))
3358 3359 3360 3361 3362 3363
		return -EOPNOTSUPP;

	return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
				      param_offset, param_read_buf, param_size);
}

3364 3365 3366 3367 3368 3369 3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388
static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
{
	int err = 0;
	u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;

	if (hba->dev_info.wspecversion >= 0x300) {
		err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
				QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
				&gating_wait);
		if (err)
			dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
					 err, gating_wait);

		if (gating_wait == 0) {
			gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
			dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
					 gating_wait);
		}

		hba->dev_info.clk_gating_wait_us = gating_wait;
	}

	return err;
}

3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407
/**
 * ufshcd_memory_alloc - allocate memory for host memory space data structures
 * @hba: per adapter instance
 *
 * 1. Allocate DMA memory for Command Descriptor array
 *	Each command descriptor consist of Command UPIU, Response UPIU and PRDT
 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
 *	(UTMRDL)
 * 4. Allocate memory for local reference block(lrb).
 *
 * Returns 0 for success, non-zero in case of failure
 */
static int ufshcd_memory_alloc(struct ufs_hba *hba)
{
	size_t utmrdl_size, utrdl_size, ucdl_size;

	/* Allocate memory for UTP command descriptors */
	ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3408 3409 3410 3411
	hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
						  ucdl_size,
						  &hba->ucdl_dma_addr,
						  GFP_KERNEL);
3412 3413 3414 3415 3416 3417 3418 3419 3420

	/*
	 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
	 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
	 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
	 * be aligned to 128 bytes as well
	 */
	if (!hba->ucdl_base_addr ||
	    WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3421
		dev_err(hba->dev,
3422 3423 3424 3425 3426 3427 3428 3429 3430
			"Command Descriptor Memory allocation failed\n");
		goto out;
	}

	/*
	 * Allocate memory for UTP Transfer descriptors
	 * UFSHCI requires 1024 byte alignment of UTRD
	 */
	utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3431 3432 3433 3434
	hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
						   utrdl_size,
						   &hba->utrdl_dma_addr,
						   GFP_KERNEL);
3435 3436
	if (!hba->utrdl_base_addr ||
	    WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3437
		dev_err(hba->dev,
3438 3439 3440 3441 3442 3443 3444 3445 3446
			"Transfer Descriptor Memory allocation failed\n");
		goto out;
	}

	/*
	 * Allocate memory for UTP Task Management descriptors
	 * UFSHCI requires 1024 byte alignment of UTMRD
	 */
	utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3447 3448 3449 3450
	hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
						    utmrdl_size,
						    &hba->utmrdl_dma_addr,
						    GFP_KERNEL);
3451 3452
	if (!hba->utmrdl_base_addr ||
	    WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3453
		dev_err(hba->dev,
3454 3455 3456 3457 3458
		"Task Management Descriptor Memory allocation failed\n");
		goto out;
	}

	/* Allocate memory for local reference block */
3459 3460
	hba->lrb = devm_kcalloc(hba->dev,
				hba->nutrs, sizeof(struct ufshcd_lrb),
3461
				GFP_KERNEL);
3462
	if (!hba->lrb) {
3463
		dev_err(hba->dev, "LRB Memory allocation failed\n");
3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513
		goto out;
	}
	return 0;
out:
	return -ENOMEM;
}

/**
 * ufshcd_host_memory_configure - configure local reference block with
 *				memory offsets
 * @hba: per adapter instance
 *
 * Configure Host memory space
 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
 * address.
 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
 * and PRDT offset.
 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
 * into local reference block.
 */
static void ufshcd_host_memory_configure(struct ufs_hba *hba)
{
	struct utp_transfer_req_desc *utrdlp;
	dma_addr_t cmd_desc_dma_addr;
	dma_addr_t cmd_desc_element_addr;
	u16 response_offset;
	u16 prdt_offset;
	int cmd_desc_size;
	int i;

	utrdlp = hba->utrdl_base_addr;

	response_offset =
		offsetof(struct utp_transfer_cmd_desc, response_upiu);
	prdt_offset =
		offsetof(struct utp_transfer_cmd_desc, prd_table);

	cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
	cmd_desc_dma_addr = hba->ucdl_dma_addr;

	for (i = 0; i < hba->nutrs; i++) {
		/* Configure UTRD with command descriptor base address */
		cmd_desc_element_addr =
				(cmd_desc_dma_addr + (cmd_desc_size * i));
		utrdlp[i].command_desc_base_addr_lo =
				cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
		utrdlp[i].command_desc_base_addr_hi =
				cpu_to_le32(upper_32_bits(cmd_desc_element_addr));

		/* Response upiu and prdt offset should be in double words */
3514 3515 3516 3517 3518
		utrdlp[i].response_upiu_offset =
			cpu_to_le16(response_offset >> 2);
		utrdlp[i].prd_table_offset = cpu_to_le16(prdt_offset >> 2);
		utrdlp[i].response_upiu_length =
			cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3519

3520
		ufshcd_init_lrb(hba, &hba->lrb[i], i);
3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536
	}
}

/**
 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
 * @hba: per adapter instance
 *
 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
 * in order to initialize the Unipro link startup procedure.
 * Once the Unipro links are up, the device connected to the controller
 * is detected.
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_dme_link_startup(struct ufs_hba *hba)
{
3537 3538
	struct uic_command uic_cmd = {0};
	int ret;
3539

3540
	uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3541

3542 3543
	ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
	if (ret)
3544
		dev_dbg(hba->dev,
3545 3546
			"dme-link-startup: error code %d\n", ret);
	return ret;
3547 3548
}

3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579
static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
{
	#define MIN_DELAY_BEFORE_DME_CMDS_US	1000
	unsigned long min_sleep_time_us;

	if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
		return;

	/*
	 * last_dme_cmd_tstamp will be 0 only for 1st call to
	 * this function
	 */
	if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
		min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
	} else {
		unsigned long delta =
			(unsigned long) ktime_to_us(
				ktime_sub(ktime_get(),
				hba->last_dme_cmd_tstamp));

		if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
			min_sleep_time_us =
				MIN_DELAY_BEFORE_DME_CMDS_US - delta;
		else
			return; /* no more delay required */
	}

	/* allow sleep for extra 50us if needed */
	usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
}

3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599
/**
 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
 * @hba: per adapter instance
 * @attr_sel: uic command argument1
 * @attr_set: attribute set type as uic command argument2
 * @mib_val: setting value as uic command argument3
 * @peer: indicate whether peer or local
 *
 * Returns 0 on success, non-zero value on failure
 */
int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
			u8 attr_set, u32 mib_val, u8 peer)
{
	struct uic_command uic_cmd = {0};
	static const char *const action[] = {
		"dme-set",
		"dme-peer-set"
	};
	const char *set = action[!!peer];
	int ret;
3600
	int retries = UFS_UIC_COMMAND_RETRIES;
3601 3602 3603 3604 3605 3606 3607

	uic_cmd.command = peer ?
		UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
	uic_cmd.argument1 = attr_sel;
	uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
	uic_cmd.argument3 = mib_val;

3608 3609 3610 3611 3612 3613 3614 3615
	do {
		/* for peer attributes we retry upon failure */
		ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
		if (ret)
			dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
				set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
	} while (ret && peer && --retries);

3616
	if (ret)
3617
		dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3618 3619
			set, UIC_GET_ATTR_ID(attr_sel), mib_val,
			UFS_UIC_COMMAND_RETRIES - retries);
3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643

	return ret;
}
EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);

/**
 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
 * @hba: per adapter instance
 * @attr_sel: uic command argument1
 * @mib_val: the value of the attribute as returned by the UIC command
 * @peer: indicate whether peer or local
 *
 * Returns 0 on success, non-zero value on failure
 */
int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
			u32 *mib_val, u8 peer)
{
	struct uic_command uic_cmd = {0};
	static const char *const action[] = {
		"dme-get",
		"dme-peer-get"
	};
	const char *get = action[!!peer];
	int ret;
3644
	int retries = UFS_UIC_COMMAND_RETRIES;
3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669
	struct ufs_pa_layer_attr orig_pwr_info;
	struct ufs_pa_layer_attr temp_pwr_info;
	bool pwr_mode_change = false;

	if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
		orig_pwr_info = hba->pwr_info;
		temp_pwr_info = orig_pwr_info;

		if (orig_pwr_info.pwr_tx == FAST_MODE ||
		    orig_pwr_info.pwr_rx == FAST_MODE) {
			temp_pwr_info.pwr_tx = FASTAUTO_MODE;
			temp_pwr_info.pwr_rx = FASTAUTO_MODE;
			pwr_mode_change = true;
		} else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
		    orig_pwr_info.pwr_rx == SLOW_MODE) {
			temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
			temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
			pwr_mode_change = true;
		}
		if (pwr_mode_change) {
			ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
			if (ret)
				goto out;
		}
	}
3670 3671 3672 3673 3674

	uic_cmd.command = peer ?
		UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
	uic_cmd.argument1 = attr_sel;

3675 3676 3677 3678 3679 3680 3681 3682
	do {
		/* for peer attributes we retry upon failure */
		ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
		if (ret)
			dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
				get, UIC_GET_ATTR_ID(attr_sel), ret);
	} while (ret && peer && --retries);

3683
	if (ret)
3684
		dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3685 3686
			get, UIC_GET_ATTR_ID(attr_sel),
			UFS_UIC_COMMAND_RETRIES - retries);
3687

3688
	if (mib_val && !ret)
3689
		*mib_val = uic_cmd.argument3;
3690 3691 3692 3693

	if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
	    && pwr_mode_change)
		ufshcd_change_power_mode(hba, &orig_pwr_info);
3694 3695 3696 3697 3698
out:
	return ret;
}
EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);

3699
/**
3700 3701 3702
 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
 * state) and waits for it to take effect.
 *
3703
 * @hba: per adapter instance
3704 3705 3706 3707 3708 3709 3710 3711
 * @cmd: UIC command to execute
 *
 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
 * and device UniPro link and hence it's final completion would be indicated by
 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
 * addition to normal UIC command completion Status (UCCS). This function only
 * returns after the relevant status bits indicate the completion.
3712 3713 3714
 *
 * Returns 0 on success, non-zero value on failure
 */
3715
static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3716
{
3717
	struct completion uic_async_done;
3718 3719 3720
	unsigned long flags;
	u8 status;
	int ret;
3721
	bool reenable_intr = false;
3722 3723

	mutex_lock(&hba->uic_cmd_mutex);
3724
	init_completion(&uic_async_done);
3725
	ufshcd_add_delay_before_dme_cmd(hba);
3726 3727

	spin_lock_irqsave(hba->host->host_lock, flags);
3728
	hba->uic_async_done = &uic_async_done;
3729 3730 3731 3732 3733 3734 3735 3736
	if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
		ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
		/*
		 * Make sure UIC command completion interrupt is disabled before
		 * issuing UIC command.
		 */
		wmb();
		reenable_intr = true;
3737
	}
3738 3739
	ret = __ufshcd_send_uic_cmd(hba, cmd, false);
	spin_unlock_irqrestore(hba->host->host_lock, flags);
3740 3741 3742 3743
	if (ret) {
		dev_err(hba->dev,
			"pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
			cmd->command, cmd->argument3, ret);
3744 3745 3746
		goto out;
	}

3747
	if (!wait_for_completion_timeout(hba->uic_async_done,
3748 3749
					 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
		dev_err(hba->dev,
3750 3751
			"pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
			cmd->command, cmd->argument3);
3752 3753 3754 3755 3756 3757 3758
		ret = -ETIMEDOUT;
		goto out;
	}

	status = ufshcd_get_upmcrs(hba);
	if (status != PWR_LOCAL) {
		dev_err(hba->dev,
Z
Zang Leigang 已提交
3759
			"pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3760
			cmd->command, status);
3761 3762 3763
		ret = (status != PWR_OK) ? status : -1;
	}
out:
3764 3765 3766 3767 3768 3769
	if (ret) {
		ufshcd_print_host_state(hba);
		ufshcd_print_pwr_info(hba);
		ufshcd_print_host_regs(hba);
	}

3770
	spin_lock_irqsave(hba->host->host_lock, flags);
3771
	hba->active_uic_cmd = NULL;
3772
	hba->uic_async_done = NULL;
3773 3774
	if (reenable_intr)
		ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3775 3776
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	mutex_unlock(&hba->uic_cmd_mutex);
3777

3778 3779 3780
	return ret;
}

3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791
/**
 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
 *				using DME_SET primitives.
 * @hba: per adapter instance
 * @mode: powr mode value
 *
 * Returns 0 on success, non-zero value on failure
 */
static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
{
	struct uic_command uic_cmd = {0};
3792
	int ret;
3793

3794 3795 3796 3797 3798 3799 3800 3801 3802 3803
	if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
		ret = ufshcd_dme_set(hba,
				UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
		if (ret) {
			dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
						__func__, ret);
			goto out;
		}
	}

3804 3805 3806
	uic_cmd.command = UIC_CMD_DME_SET;
	uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
	uic_cmd.argument3 = mode;
3807 3808 3809
	ufshcd_hold(hba, false);
	ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
	ufshcd_release(hba);
3810

3811
out:
3812
	return ret;
3813 3814
}

3815
int ufshcd_link_recovery(struct ufs_hba *hba)
3816 3817 3818 3819 3820 3821 3822 3823 3824
{
	int ret;
	unsigned long flags;

	spin_lock_irqsave(hba->host->host_lock, flags);
	hba->ufshcd_state = UFSHCD_STATE_RESET;
	ufshcd_set_eh_in_progress(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

3825 3826 3827
	/* Reset the attached device */
	ufshcd_vops_device_reset(hba);

3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841
	ret = ufshcd_host_reset_and_restore(hba);

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (ret)
		hba->ufshcd_state = UFSHCD_STATE_ERROR;
	ufshcd_clear_eh_in_progress(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (ret)
		dev_err(hba->dev, "%s: link recovery failed, err %d",
			__func__, ret);

	return ret;
}
3842
EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
3843

3844
static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3845
{
3846
	int ret;
3847
	struct uic_command uic_cmd = {0};
3848
	ktime_t start = ktime_get();
3849

3850 3851
	ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);

3852
	uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3853
	ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3854 3855
	trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
			     ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3856

3857
	if (ret) {
3858 3859
		int err;

3860 3861 3862
		dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
			__func__, ret);

3863
		/*
3864 3865 3866 3867
		 * If link recovery fails then return error code returned from
		 * ufshcd_link_recovery().
		 * If link recovery succeeds then return -EAGAIN to attempt
		 * hibern8 enter retry again.
3868
		 */
3869 3870 3871 3872 3873 3874 3875
		err = ufshcd_link_recovery(hba);
		if (err) {
			dev_err(hba->dev, "%s: link recovery failed", __func__);
			ret = err;
		} else {
			ret = -EAGAIN;
		}
3876 3877 3878
	} else
		ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
								POST_CHANGE);
3879

3880 3881 3882 3883 3884 3885
	return ret;
}

static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
{
	int ret = 0, retries;
3886

3887 3888
	for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
		ret = __ufshcd_uic_hibern8_enter(hba);
3889
		if (!ret)
3890 3891 3892 3893
			goto out;
	}
out:
	return ret;
3894 3895
}

3896
int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3897 3898 3899
{
	struct uic_command uic_cmd = {0};
	int ret;
3900
	ktime_t start = ktime_get();
3901

3902 3903
	ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);

3904 3905
	uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
	ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3906 3907 3908
	trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
			     ktime_to_us(ktime_sub(ktime_get(), start)), ret);

3909
	if (ret) {
3910 3911 3912
		dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
			__func__, ret);
		ret = ufshcd_link_recovery(hba);
3913
	} else {
3914 3915
		ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
								POST_CHANGE);
3916 3917 3918
		hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
		hba->ufs_stats.hibern8_exit_cnt++;
	}
3919 3920 3921

	return ret;
}
3922
EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
3923

3924 3925 3926
void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
{
	unsigned long flags;
3927
	bool update = false;
3928

3929
	if (!ufshcd_is_auto_hibern8_supported(hba))
3930 3931 3932
		return;

	spin_lock_irqsave(hba->host->host_lock, flags);
3933 3934 3935 3936
	if (hba->ahit != ahit) {
		hba->ahit = ahit;
		update = true;
	}
3937
	spin_unlock_irqrestore(hba->host->host_lock, flags);
3938 3939 3940 3941 3942 3943 3944 3945

	if (update && !pm_runtime_suspended(hba->dev)) {
		pm_runtime_get_sync(hba->dev);
		ufshcd_hold(hba, false);
		ufshcd_auto_hibern8_enable(hba);
		ufshcd_release(hba);
		pm_runtime_put(hba->dev);
	}
3946 3947 3948
}
EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);

3949
void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3950 3951 3952
{
	unsigned long flags;

3953
	if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
3954 3955 3956 3957 3958 3959 3960
		return;

	spin_lock_irqsave(hba->host->host_lock, flags);
	ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
	spin_unlock_irqrestore(hba->host->host_lock, flags);
}

3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976
 /**
 * ufshcd_init_pwr_info - setting the POR (power on reset)
 * values in hba power info
 * @hba: per-adapter instance
 */
static void ufshcd_init_pwr_info(struct ufs_hba *hba)
{
	hba->pwr_info.gear_rx = UFS_PWM_G1;
	hba->pwr_info.gear_tx = UFS_PWM_G1;
	hba->pwr_info.lane_rx = 1;
	hba->pwr_info.lane_tx = 1;
	hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
	hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
	hba->pwr_info.hs_rate = 0;
}

3977
/**
D
Dolev Raviv 已提交
3978 3979
 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
 * @hba: per-adapter instance
3980
 */
D
Dolev Raviv 已提交
3981
static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
3982
{
D
Dolev Raviv 已提交
3983 3984 3985 3986 3987
	struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;

	if (hba->max_pwr_info.is_valid)
		return 0;

3988 3989
	pwr_info->pwr_tx = FAST_MODE;
	pwr_info->pwr_rx = FAST_MODE;
D
Dolev Raviv 已提交
3990
	pwr_info->hs_rate = PA_HS_MODE_B;
3991 3992

	/* Get the connected lane count */
D
Dolev Raviv 已提交
3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004
	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
			&pwr_info->lane_rx);
	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
			&pwr_info->lane_tx);

	if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
		dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
				__func__,
				pwr_info->lane_rx,
				pwr_info->lane_tx);
		return -EINVAL;
	}
4005 4006 4007 4008 4009 4010

	/*
	 * First, get the maximum gears of HS speed.
	 * If a zero value, it means there is no HSGEAR capability.
	 * Then, get the maximum gears of PWM speed.
	 */
D
Dolev Raviv 已提交
4011 4012 4013 4014 4015 4016 4017 4018 4019
	ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
	if (!pwr_info->gear_rx) {
		ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
				&pwr_info->gear_rx);
		if (!pwr_info->gear_rx) {
			dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
				__func__, pwr_info->gear_rx);
			return -EINVAL;
		}
4020
		pwr_info->pwr_rx = SLOW_MODE;
4021 4022
	}

D
Dolev Raviv 已提交
4023 4024 4025
	ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
			&pwr_info->gear_tx);
	if (!pwr_info->gear_tx) {
4026
		ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
D
Dolev Raviv 已提交
4027 4028 4029 4030 4031 4032
				&pwr_info->gear_tx);
		if (!pwr_info->gear_tx) {
			dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
				__func__, pwr_info->gear_tx);
			return -EINVAL;
		}
4033
		pwr_info->pwr_tx = SLOW_MODE;
D
Dolev Raviv 已提交
4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054
	}

	hba->max_pwr_info.is_valid = true;
	return 0;
}

static int ufshcd_change_power_mode(struct ufs_hba *hba,
			     struct ufs_pa_layer_attr *pwr_mode)
{
	int ret;

	/* if already configured to the requested pwr_mode */
	if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
	    pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
	    pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
	    pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
	    pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
	    pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
	    pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
		dev_dbg(hba->dev, "%s: power already configured\n", __func__);
		return 0;
4055 4056 4057 4058 4059 4060 4061 4062
	}

	/*
	 * Configure attributes for power mode change with below.
	 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
	 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
	 * - PA_HSSERIES
	 */
D
Dolev Raviv 已提交
4063 4064 4065 4066 4067
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
			pwr_mode->lane_rx);
	if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
			pwr_mode->pwr_rx == FAST_MODE)
4068
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
D
Dolev Raviv 已提交
4069 4070
	else
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4071

D
Dolev Raviv 已提交
4072 4073 4074 4075 4076
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
			pwr_mode->lane_tx);
	if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
			pwr_mode->pwr_tx == FAST_MODE)
4077
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
D
Dolev Raviv 已提交
4078 4079
	else
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4080

D
Dolev Raviv 已提交
4081 4082 4083 4084 4085 4086
	if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
	    pwr_mode->pwr_tx == FASTAUTO_MODE ||
	    pwr_mode->pwr_rx == FAST_MODE ||
	    pwr_mode->pwr_tx == FAST_MODE)
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
						pwr_mode->hs_rate);
4087

4088 4089 4090 4091 4092 4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
			DL_FC0ProtectionTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
			DL_TC0ReplayTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
			DL_AFC0ReqTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
			DL_FC1ProtectionTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
			DL_TC1ReplayTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
			DL_AFC1ReqTimeOutVal_Default);

	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
			DL_FC0ProtectionTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
			DL_TC0ReplayTimeOutVal_Default);
	ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
			DL_AFC0ReqTimeOutVal_Default);

D
Dolev Raviv 已提交
4108 4109 4110 4111
	ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
			| pwr_mode->pwr_tx);

	if (ret) {
4112
		dev_err(hba->dev,
D
Dolev Raviv 已提交
4113 4114
			"%s: power mode change failed %d\n", __func__, ret);
	} else {
4115 4116
		ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
								pwr_mode);
D
Dolev Raviv 已提交
4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129

		memcpy(&hba->pwr_info, pwr_mode,
			sizeof(struct ufs_pa_layer_attr));
	}

	return ret;
}

/**
 * ufshcd_config_pwr_mode - configure a new power mode
 * @hba: per-adapter instance
 * @desired_pwr_mode: desired power configuration
 */
4130
int ufshcd_config_pwr_mode(struct ufs_hba *hba,
D
Dolev Raviv 已提交
4131 4132 4133 4134 4135
		struct ufs_pa_layer_attr *desired_pwr_mode)
{
	struct ufs_pa_layer_attr final_params = { 0 };
	int ret;

4136 4137 4138 4139
	ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
					desired_pwr_mode, &final_params);

	if (ret)
D
Dolev Raviv 已提交
4140 4141 4142
		memcpy(&final_params, desired_pwr_mode, sizeof(final_params));

	ret = ufshcd_change_power_mode(hba, &final_params);
4143 4144 4145

	return ret;
}
4146
EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4147

4148 4149
/**
 * ufshcd_complete_dev_init() - checks device readiness
4150
 * @hba: per-adapter instance
4151 4152 4153 4154 4155
 *
 * Set fDeviceInit flag and poll until device toggles it.
 */
static int ufshcd_complete_dev_init(struct ufs_hba *hba)
{
4156 4157
	int i;
	int err;
4158
	bool flag_res = true;
4159

4160
	err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4161
		QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
4162 4163 4164 4165 4166 4167 4168
	if (err) {
		dev_err(hba->dev,
			"%s setting fDeviceInit flag failed with error %d\n",
			__func__, err);
		goto out;
	}

4169 4170 4171
	/* poll for max. 1000 iterations for fDeviceInit flag to clear */
	for (i = 0; i < 1000 && !err && flag_res; i++)
		err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4172
			QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4173

4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186
	if (err)
		dev_err(hba->dev,
			"%s reading fDeviceInit flag failed with error %d\n",
			__func__, err);
	else if (flag_res)
		dev_err(hba->dev,
			"%s fDeviceInit was not cleared by the device\n",
			__func__);

out:
	return err;
}

4187 4188 4189 4190 4191
/**
 * ufshcd_make_hba_operational - Make UFS controller operational
 * @hba: per adapter instance
 *
 * To bring UFS host controller to operational state,
4192 4193
 * 1. Enable required interrupts
 * 2. Configure interrupt aggregation
4194
 * 3. Program UTRL and UTMRL base address
4195
 * 4. Configure run-stop-registers
4196 4197 4198
 *
 * Returns 0 on success, non-zero value on failure
 */
4199
int ufshcd_make_hba_operational(struct ufs_hba *hba)
4200 4201 4202 4203
{
	int err = 0;
	u32 reg;

4204 4205 4206 4207
	/* Enable required interrupts */
	ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);

	/* Configure interrupt aggregation */
4208 4209 4210 4211
	if (ufshcd_is_intr_aggr_allowed(hba))
		ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
	else
		ufshcd_disable_intr_aggr(hba);
4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222

	/* Configure UTRL and UTMRL base address registers */
	ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
			REG_UTP_TRANSFER_REQ_LIST_BASE_L);
	ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
			REG_UTP_TRANSFER_REQ_LIST_BASE_H);
	ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
			REG_UTP_TASK_REQ_LIST_BASE_L);
	ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
			REG_UTP_TASK_REQ_LIST_BASE_H);

4223 4224 4225 4226 4227 4228
	/*
	 * Make sure base address and interrupt setup are updated before
	 * enabling the run/stop registers below.
	 */
	wmb();

4229 4230 4231
	/*
	 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
	 */
4232
	reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4233 4234 4235
	if (!(ufshcd_get_lists_status(reg))) {
		ufshcd_enable_run_stop_reg(hba);
	} else {
4236
		dev_err(hba->dev,
4237 4238 4239 4240 4241 4242 4243 4244
			"Host controller not ready to process requests");
		err = -EIO;
		goto out;
	}

out:
	return err;
}
4245
EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
4246

4247 4248 4249 4250
/**
 * ufshcd_hba_stop - Send controller to reset state
 * @hba: per adapter instance
 */
4251
static inline void ufshcd_hba_stop(struct ufs_hba *hba)
4252
{
4253
	unsigned long flags;
4254 4255
	int err;

4256 4257 4258 4259 4260
	/*
	 * Obtain the host lock to prevent that the controller is disabled
	 * while the UFS interrupt handler is active on another CPU.
	 */
	spin_lock_irqsave(hba->host->host_lock, flags);
4261
	ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
4262 4263
	spin_unlock_irqrestore(hba->host->host_lock, flags);

4264 4265
	err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
					CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4266
					10, 1);
4267 4268 4269 4270
	if (err)
		dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
}

4271
/**
4272
 * ufshcd_hba_enable - initialize the controller
4273 4274 4275 4276 4277 4278 4279 4280
 * @hba: per adapter instance
 *
 * The controller resets itself and controller firmware initialization
 * sequence kicks off. When controller is ready it will set
 * the Host Controller Enable bit to 1.
 *
 * Returns 0 on success, non-zero value on failure
 */
4281
int ufshcd_hba_enable(struct ufs_hba *hba)
4282 4283 4284
{
	int retry;

4285
	if (!ufshcd_is_hba_active(hba))
4286
		/* change controller state to "reset state" */
4287
		ufshcd_hba_stop(hba);
4288

4289 4290 4291
	/* UniPro link is disabled at this point */
	ufshcd_set_link_off(hba);

4292
	ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4293

4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306
	/* start controller initialization sequence */
	ufshcd_hba_start(hba);

	/*
	 * To initialize a UFS host controller HCE bit must be set to 1.
	 * During initialization the HCE bit value changes from 1->0->1.
	 * When the host controller completes initialization sequence
	 * it sets the value of HCE bit to 1. The same HCE bit is read back
	 * to check if the controller has completed initialization sequence.
	 * So without this delay the value HCE = 1, set in the previous
	 * instruction might be read back.
	 * This delay can be changed based on the controller.
	 */
4307
	ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
4308 4309

	/* wait for the host controller to complete initialization */
4310
	retry = 50;
4311 4312 4313 4314
	while (ufshcd_is_hba_active(hba)) {
		if (retry) {
			retry--;
		} else {
4315
			dev_err(hba->dev,
4316 4317 4318
				"Controller enable failed\n");
			return -EIO;
		}
4319
		usleep_range(1000, 1100);
4320
	}
4321

S
Sujit Reddy Thumma 已提交
4322
	/* enable UIC related interrupts */
4323
	ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
S
Sujit Reddy Thumma 已提交
4324

4325
	ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4326

4327 4328
	return 0;
}
4329 4330
EXPORT_SYMBOL_GPL(ufshcd_hba_enable);

4331 4332
static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
{
4333
	int tx_lanes = 0, i, err = 0;
4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366

	if (!peer)
		ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
			       &tx_lanes);
	else
		ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
				    &tx_lanes);
	for (i = 0; i < tx_lanes; i++) {
		if (!peer)
			err = ufshcd_dme_set(hba,
				UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
					UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
					0);
		else
			err = ufshcd_dme_peer_set(hba,
				UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
					UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
					0);
		if (err) {
			dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
				__func__, peer, i, err);
			break;
		}
	}

	return err;
}

static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
{
	return ufshcd_disable_tx_lcc(hba, true);
}

4367 4368
void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
			    u32 reg)
4369 4370 4371 4372 4373
{
	reg_hist->reg[reg_hist->pos] = reg;
	reg_hist->tstamp[reg_hist->pos] = ktime_get();
	reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
}
4374
EXPORT_SYMBOL_GPL(ufshcd_update_reg_hist);
4375

4376
/**
4377
 * ufshcd_link_startup - Initialize unipro link startup
4378 4379
 * @hba: per adapter instance
 *
4380
 * Returns 0 for success, non-zero in case of failure
4381
 */
4382
static int ufshcd_link_startup(struct ufs_hba *hba)
4383
{
4384
	int ret;
S
Sujit Reddy Thumma 已提交
4385
	int retries = DME_LINKSTARTUP_RETRIES;
4386
	bool link_startup_again = false;
4387

4388 4389 4390 4391 4392 4393
	/*
	 * If UFS device isn't active then we will have to issue link startup
	 * 2 times to make sure the device state move to active.
	 */
	if (!ufshcd_is_ufs_dev_active(hba))
		link_startup_again = true;
4394

4395
link_startup:
S
Sujit Reddy Thumma 已提交
4396
	do {
4397
		ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4398

S
Sujit Reddy Thumma 已提交
4399
		ret = ufshcd_dme_link_startup(hba);
4400

S
Sujit Reddy Thumma 已提交
4401 4402
		/* check if device is detected by inter-connect layer */
		if (!ret && !ufshcd_is_device_present(hba)) {
4403 4404
			ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
					       0);
S
Sujit Reddy Thumma 已提交
4405 4406 4407 4408
			dev_err(hba->dev, "%s: Device not present\n", __func__);
			ret = -ENXIO;
			goto out;
		}
4409

S
Sujit Reddy Thumma 已提交
4410 4411 4412 4413 4414
		/*
		 * DME link lost indication is only received when link is up,
		 * but we can't be sure if the link is up until link startup
		 * succeeds. So reset the local Uni-Pro and try again.
		 */
4415 4416 4417
		if (ret && ufshcd_hba_enable(hba)) {
			ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
					       (u32)ret);
S
Sujit Reddy Thumma 已提交
4418
			goto out;
4419
		}
S
Sujit Reddy Thumma 已提交
4420 4421
	} while (ret && retries--);

4422
	if (ret) {
S
Sujit Reddy Thumma 已提交
4423
		/* failed to get the link up... retire */
4424 4425
		ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
				       (u32)ret);
4426
		goto out;
4427
	}
4428

4429 4430 4431 4432 4433 4434
	if (link_startup_again) {
		link_startup_again = false;
		retries = DME_LINKSTARTUP_RETRIES;
		goto link_startup;
	}

4435 4436 4437 4438
	/* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
	ufshcd_init_pwr_info(hba);
	ufshcd_print_pwr_info(hba);

4439 4440 4441 4442 4443 4444
	if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
		ret = ufshcd_disable_device_tx_lcc(hba);
		if (ret)
			goto out;
	}

4445
	/* Include any host controller configuration via UIC commands */
4446 4447 4448
	ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
	if (ret)
		goto out;
4449

4450
	ret = ufshcd_make_hba_operational(hba);
4451
out:
4452
	if (ret) {
4453
		dev_err(hba->dev, "link startup failed %d\n", ret);
4454 4455 4456 4457
		ufshcd_print_host_state(hba);
		ufshcd_print_pwr_info(hba);
		ufshcd_print_host_regs(hba);
	}
4458
	return ret;
4459 4460
}

4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475
/**
 * ufshcd_verify_dev_init() - Verify device initialization
 * @hba: per-adapter instance
 *
 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
 * device Transport Protocol (UTP) layer is ready after a reset.
 * If the UTP layer at the device side is not initialized, it may
 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
 */
static int ufshcd_verify_dev_init(struct ufs_hba *hba)
{
	int err = 0;
	int retries;

4476
	ufshcd_hold(hba, false);
4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487
	mutex_lock(&hba->dev_cmd.lock);
	for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
		err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
					       NOP_OUT_TIMEOUT);

		if (!err || err == -ETIMEDOUT)
			break;

		dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
	}
	mutex_unlock(&hba->dev_cmd.lock);
4488
	ufshcd_release(hba);
4489 4490 4491 4492 4493 4494

	if (err)
		dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
	return err;
}

4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512
/**
 * ufshcd_set_queue_depth - set lun queue depth
 * @sdev: pointer to SCSI device
 *
 * Read bLUQueueDepth value and activate scsi tagged command
 * queueing. For WLUN, queue depth is set to 1. For best-effort
 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
 * value that host can queue.
 */
static void ufshcd_set_queue_depth(struct scsi_device *sdev)
{
	int ret = 0;
	u8 lun_qdepth;
	struct ufs_hba *hba;

	hba = shost_priv(sdev->host);

	lun_qdepth = hba->nutrs;
4513 4514 4515 4516 4517
	ret = ufshcd_read_unit_desc_param(hba,
					  ufshcd_scsi_to_upiu_lun(sdev->lun),
					  UNIT_DESC_PARAM_LU_Q_DEPTH,
					  &lun_qdepth,
					  sizeof(lun_qdepth));
4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529

	/* Some WLUN doesn't support unit descriptor */
	if (ret == -EOPNOTSUPP)
		lun_qdepth = 1;
	else if (!lun_qdepth)
		/* eventually, we can figure out the real queue depth */
		lun_qdepth = hba->nutrs;
	else
		lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);

	dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
			__func__, lun_qdepth);
4530
	scsi_change_queue_depth(sdev, lun_qdepth);
4531 4532
}

4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556
/*
 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
 * @hba: per-adapter instance
 * @lun: UFS device lun id
 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
 *
 * Returns 0 in case of success and b_lu_write_protect status would be returned
 * @b_lu_write_protect parameter.
 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
 * Returns -EINVAL in case of invalid parameters passed to this function.
 */
static int ufshcd_get_lu_wp(struct ufs_hba *hba,
			    u8 lun,
			    u8 *b_lu_write_protect)
{
	int ret;

	if (!b_lu_write_protect)
		ret = -EINVAL;
	/*
	 * According to UFS device spec, RPMB LU can't be write
	 * protected so skip reading bLUWriteProtect parameter for
	 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
	 */
4557
	else if (lun >= hba->dev_info.max_lu_supported)
4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588
		ret = -ENOTSUPP;
	else
		ret = ufshcd_read_unit_desc_param(hba,
					  lun,
					  UNIT_DESC_PARAM_LU_WR_PROTECT,
					  b_lu_write_protect,
					  sizeof(*b_lu_write_protect));
	return ret;
}

/**
 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
 * status
 * @hba: per-adapter instance
 * @sdev: pointer to SCSI device
 *
 */
static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
						    struct scsi_device *sdev)
{
	if (hba->dev_info.f_power_on_wp_en &&
	    !hba->dev_info.is_lu_power_on_wp) {
		u8 b_lu_write_protect;

		if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
				      &b_lu_write_protect) &&
		    (b_lu_write_protect == UFS_LU_POWER_ON_WP))
			hba->dev_info.is_lu_power_on_wp = true;
	}
}

4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602
/**
 * ufshcd_slave_alloc - handle initial SCSI device configurations
 * @sdev: pointer to SCSI device
 *
 * Returns success
 */
static int ufshcd_slave_alloc(struct scsi_device *sdev)
{
	struct ufs_hba *hba;

	hba = shost_priv(sdev->host);

	/* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
	sdev->use_10_for_ms = 1;
C
Can Guo 已提交
4603 4604 4605

	/* DBD field should be set to 1 in mode sense(10) */
	sdev->set_dbd_for_ms = 1;
4606

4607 4608
	/* allow SCSI layer to restart the device in case of errors */
	sdev->allow_restart = 1;
4609

4610 4611 4612
	/* REPORT SUPPORTED OPERATION CODES is not supported */
	sdev->no_report_opcodes = 1;

4613 4614
	/* WRITE_SAME command is not supported */
	sdev->no_write_same = 1;
4615

4616
	ufshcd_set_queue_depth(sdev);
4617

4618 4619
	ufshcd_get_lu_power_on_wp_status(hba, sdev);

4620 4621 4622
	return 0;
}

4623 4624 4625 4626 4627
/**
 * ufshcd_change_queue_depth - change queue depth
 * @sdev: pointer to SCSI device
 * @depth: required depth to set
 *
4628
 * Change queue depth and make sure the max. limits are not crossed.
4629
 */
4630
static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4631 4632 4633 4634 4635
{
	struct ufs_hba *hba = shost_priv(sdev->host);

	if (depth > hba->nutrs)
		depth = hba->nutrs;
4636
	return scsi_change_queue_depth(sdev, depth);
4637 4638
}

4639 4640 4641 4642 4643 4644
/**
 * ufshcd_slave_configure - adjust SCSI device configurations
 * @sdev: pointer to SCSI device
 */
static int ufshcd_slave_configure(struct scsi_device *sdev)
{
4645
	struct ufs_hba *hba = shost_priv(sdev->host);
4646 4647 4648
	struct request_queue *q = sdev->request_queue;

	blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4649 4650 4651 4652

	if (ufshcd_is_rpm_autosuspend_allowed(hba))
		sdev->rpm_autosuspend = 1;

4653 4654 4655
	return 0;
}

4656 4657 4658 4659 4660 4661 4662 4663 4664
/**
 * ufshcd_slave_destroy - remove SCSI device configurations
 * @sdev: pointer to SCSI device
 */
static void ufshcd_slave_destroy(struct scsi_device *sdev)
{
	struct ufs_hba *hba;

	hba = shost_priv(sdev->host);
4665
	/* Drop the reference as it won't be needed anymore */
4666 4667 4668 4669
	if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
		unsigned long flags;

		spin_lock_irqsave(hba->host->host_lock, flags);
4670
		hba->sdev_ufs_device = NULL;
4671 4672
		spin_unlock_irqrestore(hba->host->host_lock, flags);
	}
4673 4674 4675 4676
}

/**
 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4677
 * @lrbp: pointer to local reference block of completed command
4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688
 * @scsi_status: SCSI command status
 *
 * Returns value base on SCSI command status
 */
static inline int
ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
{
	int result = 0;

	switch (scsi_status) {
	case SAM_STAT_CHECK_CONDITION:
4689
		ufshcd_copy_sense_data(lrbp);
4690
		/* fallthrough */
4691
	case SAM_STAT_GOOD:
4692 4693
		result |= DID_OK << 16 |
			  COMMAND_COMPLETE << 8 |
4694
			  scsi_status;
4695 4696
		break;
	case SAM_STAT_TASK_SET_FULL:
4697
	case SAM_STAT_BUSY:
4698
	case SAM_STAT_TASK_ABORTED:
4699 4700
		ufshcd_copy_sense_data(lrbp);
		result |= scsi_status;
4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712
		break;
	default:
		result |= DID_ERROR << 16;
		break;
	} /* end of switch */

	return result;
}

/**
 * ufshcd_transfer_rsp_status - Get overall status of the response
 * @hba: per adapter instance
4713
 * @lrbp: pointer to local reference block of completed command
4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726 4727 4728
 *
 * Returns result of the command to notify SCSI midlayer
 */
static inline int
ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
{
	int result = 0;
	int scsi_status;
	int ocs;

	/* overall command status of utrd */
	ocs = ufshcd_get_tr_ocs(lrbp);

	switch (ocs) {
	case OCS_SUCCESS:
4729
		result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4730
		hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744
		switch (result) {
		case UPIU_TRANSACTION_RESPONSE:
			/*
			 * get the response UPIU result to extract
			 * the SCSI command status
			 */
			result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);

			/*
			 * get the result based on SCSI status response
			 * to notify the SCSI midlayer of the command status
			 */
			scsi_status = result & MASK_SCSI_STATUS;
			result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4745

4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758
			/*
			 * Currently we are only supporting BKOPs exception
			 * events hence we can ignore BKOPs exception event
			 * during power management callbacks. BKOPs exception
			 * event is not expected to be raised in runtime suspend
			 * callback as it allows the urgent bkops.
			 * During system suspend, we are anyway forcefully
			 * disabling the bkops and if urgent bkops is needed
			 * it will be enabled on system resume. Long term
			 * solution could be to abort the system suspend if
			 * UFS device needs urgent BKOPs.
			 */
			if (!hba->pm_op_in_progress &&
4759 4760 4761 4762 4763 4764 4765 4766 4767
			    ufshcd_is_exception_event(lrbp->ucd_rsp_ptr) &&
			    schedule_work(&hba->eeh_work)) {
				/*
				 * Prevent suspend once eeh_work is scheduled
				 * to avoid deadlock between ufshcd_suspend
				 * and exception event handler.
				 */
				pm_runtime_get_noresume(hba->dev);
			}
4768 4769 4770 4771
			break;
		case UPIU_TRANSACTION_REJECT_UPIU:
			/* TODO: handle Reject UPIU Response */
			result = DID_ERROR << 16;
4772
			dev_err(hba->dev,
4773 4774 4775 4776 4777 4778
				"Reject UPIU not fully implemented\n");
			break;
		default:
			dev_err(hba->dev,
				"Unexpected request response code = %x\n",
				result);
4779
			result = DID_ERROR << 16;
4780 4781 4782 4783 4784 4785
			break;
		}
		break;
	case OCS_ABORTED:
		result |= DID_ABORT << 16;
		break;
4786 4787 4788
	case OCS_INVALID_COMMAND_STATUS:
		result |= DID_REQUEUE << 16;
		break;
4789 4790 4791 4792 4793 4794 4795 4796
	case OCS_INVALID_CMD_TABLE_ATTR:
	case OCS_INVALID_PRDT_ATTR:
	case OCS_MISMATCH_DATA_BUF_SIZE:
	case OCS_MISMATCH_RESP_UPIU_SIZE:
	case OCS_PEER_COMM_FAILURE:
	case OCS_FATAL_ERROR:
	default:
		result |= DID_ERROR << 16;
4797
		dev_err(hba->dev,
4798 4799 4800
				"OCS error from controller = %x for tag %d\n",
				ocs, lrbp->task_tag);
		ufshcd_print_host_regs(hba);
4801
		ufshcd_print_host_state(hba);
4802 4803 4804
		break;
	} /* end of switch */

4805
	if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
4806
		ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4807 4808 4809
	return result;
}

4810 4811 4812
/**
 * ufshcd_uic_cmd_compl - handle completion of uic command
 * @hba: per adapter instance
4813
 * @intr_status: interrupt status generated by the controller
4814 4815 4816 4817
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
4818
 */
4819
static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4820
{
4821 4822
	irqreturn_t retval = IRQ_NONE;

4823
	if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4824 4825
		hba->active_uic_cmd->argument2 |=
			ufshcd_get_uic_cmd_result(hba);
4826 4827
		hba->active_uic_cmd->argument3 =
			ufshcd_get_dme_attr_val(hba);
4828
		complete(&hba->active_uic_cmd->done);
4829
		retval = IRQ_HANDLED;
4830
	}
4831

4832
	if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
4833
		complete(hba->uic_async_done);
4834 4835 4836
		retval = IRQ_HANDLED;
	}
	return retval;
4837 4838
}

4839
/**
4840
 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4841
 * @hba: per adapter instance
4842
 * @completed_reqs: requests to complete
4843
 */
4844 4845
static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
					unsigned long completed_reqs)
4846
{
4847 4848
	struct ufshcd_lrb *lrbp;
	struct scsi_cmnd *cmd;
4849 4850
	int result;
	int index;
4851 4852 4853 4854 4855

	for_each_set_bit(index, &completed_reqs, hba->nutrs) {
		lrbp = &hba->lrb[index];
		cmd = lrbp->cmd;
		if (cmd) {
4856
			ufshcd_add_command_trace(hba, index, "complete");
4857 4858 4859 4860 4861
			result = ufshcd_transfer_rsp_status(hba, lrbp);
			scsi_dma_unmap(cmd);
			cmd->result = result;
			/* Mark completed command as NULL in LRB */
			lrbp->cmd = NULL;
4862
			lrbp->compl_time_stamp = ktime_get();
4863 4864
			/* Do not touch lrbp after scsi done */
			cmd->scsi_done(cmd);
4865
			__ufshcd_release(hba);
J
Joao Pinto 已提交
4866 4867
		} else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
			lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4868
			lrbp->compl_time_stamp = ktime_get();
4869 4870 4871
			if (hba->dev_cmd.complete) {
				ufshcd_add_command_trace(hba, index,
						"dev_complete");
4872
				complete(hba->dev_cmd.complete);
4873
			}
4874
		}
4875 4876
		if (ufshcd_is_clkscaling_supported(hba))
			hba->clk_scaling.active_reqs--;
4877
	}
4878 4879 4880 4881

	/* clear corresponding bits of completed commands */
	hba->outstanding_reqs ^= completed_reqs;

4882
	ufshcd_clk_scaling_update_busy(hba);
4883 4884
}

4885 4886 4887
/**
 * ufshcd_transfer_req_compl - handle SCSI and query command completion
 * @hba: per adapter instance
4888 4889 4890 4891
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
4892
 */
4893
static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
4894 4895 4896 4897 4898 4899 4900 4901 4902 4903 4904
{
	unsigned long completed_reqs;
	u32 tr_doorbell;

	/* Resetting interrupt aggregation counters first and reading the
	 * DOOR_BELL afterward allows us to handle all the completed requests.
	 * In order to prevent other interrupts starvation the DB is read once
	 * after reset. The down side of this solution is the possibility of
	 * false interrupt if device completes another request after resetting
	 * aggregation and before reading the DB.
	 */
4905
	if (ufshcd_is_intr_aggr_allowed(hba))
4906 4907 4908 4909 4910
		ufshcd_reset_intr_aggr(hba);

	tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
	completed_reqs = tr_doorbell ^ hba->outstanding_reqs;

4911 4912 4913 4914 4915 4916
	if (completed_reqs) {
		__ufshcd_transfer_req_compl(hba, completed_reqs);
		return IRQ_HANDLED;
	} else {
		return IRQ_NONE;
	}
4917 4918
}

4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934 4935 4936 4937
/**
 * ufshcd_disable_ee - disable exception event
 * @hba: per-adapter instance
 * @mask: exception event to disable
 *
 * Disables exception event in the device so that the EVENT_ALERT
 * bit is not set.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
{
	int err = 0;
	u32 val;

	if (!(hba->ee_ctrl_mask & mask))
		goto out;

	val = hba->ee_ctrl_mask & ~mask;
T
Tomohiro Kusumi 已提交
4938
	val &= MASK_EE_STATUS;
4939
	err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4940 4941 4942 4943 4944 4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965
			QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
	if (!err)
		hba->ee_ctrl_mask &= ~mask;
out:
	return err;
}

/**
 * ufshcd_enable_ee - enable exception event
 * @hba: per-adapter instance
 * @mask: exception event to enable
 *
 * Enable corresponding exception event in the device to allow
 * device to alert host in critical scenarios.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
{
	int err = 0;
	u32 val;

	if (hba->ee_ctrl_mask & mask)
		goto out;

	val = hba->ee_ctrl_mask | mask;
T
Tomohiro Kusumi 已提交
4966
	val &= MASK_EE_STATUS;
4967
	err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992
			QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
	if (!err)
		hba->ee_ctrl_mask |= mask;
out:
	return err;
}

/**
 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
 * @hba: per-adapter instance
 *
 * Allow device to manage background operations on its own. Enabling
 * this might lead to inconsistent latencies during normal data transfers
 * as the device is allowed to manage its own way of handling background
 * operations.
 *
 * Returns zero on success, non-zero on failure.
 */
static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
{
	int err = 0;

	if (hba->auto_bkops_enabled)
		goto out;

4993
	err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4994
			QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
4995 4996 4997 4998 4999 5000 5001
	if (err) {
		dev_err(hba->dev, "%s: failed to enable bkops %d\n",
				__func__, err);
		goto out;
	}

	hba->auto_bkops_enabled = true;
5002
	trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 5019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042

	/* No need of URGENT_BKOPS exception from the device */
	err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
	if (err)
		dev_err(hba->dev, "%s: failed to disable exception event %d\n",
				__func__, err);
out:
	return err;
}

/**
 * ufshcd_disable_auto_bkops - block device in doing background operations
 * @hba: per-adapter instance
 *
 * Disabling background operations improves command response latency but
 * has drawback of device moving into critical state where the device is
 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
 * host is idle so that BKOPS are managed effectively without any negative
 * impacts.
 *
 * Returns zero on success, non-zero on failure.
 */
static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
{
	int err = 0;

	if (!hba->auto_bkops_enabled)
		goto out;

	/*
	 * If host assisted BKOPs is to be enabled, make sure
	 * urgent bkops exception is allowed.
	 */
	err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
	if (err) {
		dev_err(hba->dev, "%s: failed to enable exception event %d\n",
				__func__, err);
		goto out;
	}

5043
	err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5044
			QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5045 5046 5047 5048 5049 5050 5051 5052
	if (err) {
		dev_err(hba->dev, "%s: failed to disable bkops %d\n",
				__func__, err);
		ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
		goto out;
	}

	hba->auto_bkops_enabled = false;
5053
	trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5054
	hba->is_urgent_bkops_lvl_checked = false;
5055 5056 5057 5058 5059
out:
	return err;
}

/**
5060
 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5061 5062 5063 5064
 * @hba: per adapter instance
 *
 * After a device reset the device may toggle the BKOPS_EN flag
 * to default value. The s/w tracking variables should be updated
5065 5066
 * as well. This function would change the auto-bkops state based on
 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5067
 */
5068
static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5069
{
5070 5071 5072 5073 5074 5075 5076 5077 5078
	if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
		hba->auto_bkops_enabled = false;
		hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
		ufshcd_enable_auto_bkops(hba);
	} else {
		hba->auto_bkops_enabled = true;
		hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
		ufshcd_disable_auto_bkops(hba);
	}
5079
	hba->is_urgent_bkops_lvl_checked = false;
5080 5081 5082 5083
}

static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
{
5084
	return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5085 5086 5087 5088
			QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
}

/**
5089
 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5090
 * @hba: per-adapter instance
5091
 * @status: bkops_status value
5092
 *
5093 5094 5095 5096 5097 5098 5099 5100 5101 5102
 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
 * flag in the device to permit background operations if the device
 * bkops_status is greater than or equal to "status" argument passed to
 * this function, disable otherwise.
 *
 * Returns 0 for success, non-zero in case of failure.
 *
 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
 * to know whether auto bkops is enabled or disabled after this function
 * returns control to it.
5103
 */
5104 5105
static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
			     enum bkops_status status)
5106 5107
{
	int err;
5108
	u32 curr_status = 0;
5109

5110
	err = ufshcd_get_bkops_status(hba, &curr_status);
5111 5112 5113 5114
	if (err) {
		dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
				__func__, err);
		goto out;
5115 5116 5117 5118 5119
	} else if (curr_status > BKOPS_STATUS_MAX) {
		dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
				__func__, curr_status);
		err = -EINVAL;
		goto out;
5120 5121
	}

5122
	if (curr_status >= status)
5123
		err = ufshcd_enable_auto_bkops(hba);
5124 5125
	else
		err = ufshcd_disable_auto_bkops(hba);
5126 5127 5128 5129
out:
	return err;
}

5130 5131 5132 5133 5134 5135 5136 5137 5138 5139 5140 5141
/**
 * ufshcd_urgent_bkops - handle urgent bkops exception event
 * @hba: per-adapter instance
 *
 * Enable fBackgroundOpsEn flag in the device to permit background
 * operations.
 *
 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
 * and negative error value for any other failure.
 */
static int ufshcd_urgent_bkops(struct ufs_hba *hba)
{
5142
	return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5143 5144
}

5145 5146
static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
{
5147
	return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5148 5149 5150
			QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
}

5151 5152 5153 5154 5155 5156 5157 5158 5159 5160 5161 5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187
static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
{
	int err;
	u32 curr_status = 0;

	if (hba->is_urgent_bkops_lvl_checked)
		goto enable_auto_bkops;

	err = ufshcd_get_bkops_status(hba, &curr_status);
	if (err) {
		dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
				__func__, err);
		goto out;
	}

	/*
	 * We are seeing that some devices are raising the urgent bkops
	 * exception events even when BKOPS status doesn't indicate performace
	 * impacted or critical. Handle these device by determining their urgent
	 * bkops status at runtime.
	 */
	if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
		dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
				__func__, curr_status);
		/* update the current status as the urgent bkops level */
		hba->urgent_bkops_lvl = curr_status;
		hba->is_urgent_bkops_lvl_checked = true;
	}

enable_auto_bkops:
	err = ufshcd_enable_auto_bkops(hba);
out:
	if (err < 0)
		dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
				__func__, err);
}

5188 5189 5190
static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable)
{
	int ret;
5191
	u8 index;
5192 5193
	enum query_opcode opcode;

5194
	if (!ufshcd_is_wb_allowed(hba))
5195 5196 5197 5198 5199 5200 5201 5202 5203
		return 0;

	if (!(enable ^ hba->wb_enabled))
		return 0;
	if (enable)
		opcode = UPIU_QUERY_OPCODE_SET_FLAG;
	else
		opcode = UPIU_QUERY_OPCODE_CLEAR_FLAG;

5204
	index = ufshcd_wb_get_query_index(hba);
5205
	ret = ufshcd_query_flag_retry(hba, opcode,
5206
				      QUERY_FLAG_IDN_WB_EN, index, NULL);
5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222
	if (ret) {
		dev_err(hba->dev, "%s write booster %s failed %d\n",
			__func__, enable ? "enable" : "disable", ret);
		return ret;
	}

	hba->wb_enabled = enable;
	dev_dbg(hba->dev, "%s write booster %s %d\n",
			__func__, enable ? "enable" : "disable", ret);

	return ret;
}

static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
{
	int val;
5223
	u8 index;
5224 5225 5226 5227 5228 5229

	if (set)
		val =  UPIU_QUERY_OPCODE_SET_FLAG;
	else
		val = UPIU_QUERY_OPCODE_CLEAR_FLAG;

5230
	index = ufshcd_wb_get_query_index(hba);
5231
	return ufshcd_query_flag_retry(hba, val,
5232 5233
				QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8,
				index, NULL);
5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247
}

static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
{
	if (enable)
		ufshcd_wb_buf_flush_enable(hba);
	else
		ufshcd_wb_buf_flush_disable(hba);

}

static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba)
{
	int ret;
5248
	u8 index;
5249

5250
	if (!ufshcd_is_wb_allowed(hba) || hba->wb_buf_flush_enabled)
5251 5252
		return 0;

5253
	index = ufshcd_wb_get_query_index(hba);
5254
	ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
5255
				      QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN,
5256
				      index, NULL);
5257 5258 5259 5260 5261 5262 5263 5264 5265 5266 5267 5268 5269
	if (ret)
		dev_err(hba->dev, "%s WB - buf flush enable failed %d\n",
			__func__, ret);
	else
		hba->wb_buf_flush_enabled = true;

	dev_dbg(hba->dev, "WB - Flush enabled: %d\n", ret);
	return ret;
}

static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba)
{
	int ret;
5270
	u8 index;
5271

5272
	if (!ufshcd_is_wb_allowed(hba) || !hba->wb_buf_flush_enabled)
5273 5274
		return 0;

5275
	index = ufshcd_wb_get_query_index(hba);
5276
	ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5277 5278
				      QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN,
				      index, NULL);
5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294
	if (ret) {
		dev_warn(hba->dev, "%s: WB - buf flush disable failed %d\n",
			 __func__, ret);
	} else {
		hba->wb_buf_flush_enabled = false;
		dev_dbg(hba->dev, "WB - Flush disabled: %d\n", ret);
	}

	return ret;
}

static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
						u32 avail_buf)
{
	u32 cur_buf;
	int ret;
5295
	u8 index;
5296

5297
	index = ufshcd_wb_get_query_index(hba);
5298 5299
	ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
					      QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
5300
					      index, 0, &cur_buf);
5301 5302 5303 5304 5305 5306 5307 5308 5309 5310 5311
	if (ret) {
		dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
			__func__, ret);
		return false;
	}

	if (!cur_buf) {
		dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
			 cur_buf);
		return false;
	}
5312 5313
	/* Let it continue to flush when available buffer exceeds threshold */
	if (avail_buf < hba->vps->wb_flush_threshold)
5314 5315 5316 5317 5318
		return true;

	return false;
}

5319
static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
5320 5321 5322
{
	int ret;
	u32 avail_buf;
5323
	u8 index;
5324

5325
	if (!ufshcd_is_wb_allowed(hba))
5326 5327 5328 5329 5330 5331 5332 5333 5334 5335 5336 5337
		return false;
	/*
	 * The ufs device needs the vcc to be ON to flush.
	 * With user-space reduction enabled, it's enough to enable flush
	 * by checking only the available buffer. The threshold
	 * defined here is > 90% full.
	 * With user-space preserved enabled, the current-buffer
	 * should be checked too because the wb buffer size can reduce
	 * when disk tends to be full. This info is provided by current
	 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
	 * keeping vcc on when current buffer is empty.
	 */
5338
	index = ufshcd_wb_get_query_index(hba);
5339 5340
	ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
				      QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
5341
				      index, 0, &avail_buf);
5342 5343 5344 5345 5346 5347 5348
	if (ret) {
		dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
			 __func__, ret);
		return false;
	}

	if (!hba->dev_info.b_presrv_uspc_en) {
5349
		if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
5350 5351 5352 5353 5354 5355 5356
			return true;
		return false;
	}

	return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
}

5357 5358 5359 5360 5361 5362 5363 5364 5365 5366 5367 5368 5369 5370 5371
static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
{
	struct ufs_hba *hba = container_of(to_delayed_work(work),
					   struct ufs_hba,
					   rpm_dev_flush_recheck_work);
	/*
	 * To prevent unnecessary VCC power drain after device finishes
	 * WriteBooster buffer flush or Auto BKOPs, force runtime resume
	 * after a certain delay to recheck the threshold by next runtime
	 * suspend.
	 */
	pm_runtime_get_sync(hba->dev);
	pm_runtime_put_sync(hba->dev);
}

5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385
/**
 * ufshcd_exception_event_handler - handle exceptions raised by device
 * @work: pointer to work data
 *
 * Read bExceptionEventStatus attribute from the device and handle the
 * exception event accordingly.
 */
static void ufshcd_exception_event_handler(struct work_struct *work)
{
	struct ufs_hba *hba;
	int err;
	u32 status = 0;
	hba = container_of(work, struct ufs_hba, eeh_work);

5386
	pm_runtime_get_sync(hba->dev);
5387
	ufshcd_scsi_block_requests(hba);
5388 5389 5390 5391 5392 5393 5394 5395
	err = ufshcd_get_ee_status(hba, &status);
	if (err) {
		dev_err(hba->dev, "%s: failed to get exception status %d\n",
				__func__, err);
		goto out;
	}

	status &= hba->ee_ctrl_mask;
5396 5397 5398 5399

	if (status & MASK_EE_URGENT_BKOPS)
		ufshcd_bkops_exception_event_handler(hba);

5400
out:
5401
	ufshcd_scsi_unblock_requests(hba);
5402 5403 5404 5405 5406 5407 5408 5409
	/*
	 * pm_runtime_get_noresume is called while scheduling
	 * eeh_work to avoid suspend racing with exception work.
	 * Hence decrement usage counter using pm_runtime_put_noidle
	 * to allow suspend on completion of exception event handler.
	 */
	pm_runtime_put_noidle(hba->dev);
	pm_runtime_put(hba->dev);
5410 5411 5412
	return;
}

5413 5414 5415 5416 5417 5418 5419
/* Complete requests that have door-bell cleared */
static void ufshcd_complete_requests(struct ufs_hba *hba)
{
	ufshcd_transfer_req_compl(hba);
	ufshcd_tmc_handler(hba);
}

5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431 5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445 5446 5447 5448 5449 5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492
/**
 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
 *				to recover from the DL NAC errors or not.
 * @hba: per-adapter instance
 *
 * Returns true if error handling is required, false otherwise
 */
static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
{
	unsigned long flags;
	bool err_handling = true;

	spin_lock_irqsave(hba->host->host_lock, flags);
	/*
	 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
	 * device fatal error and/or DL NAC & REPLAY timeout errors.
	 */
	if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
		goto out;

	if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
	    ((hba->saved_err & UIC_ERROR) &&
	     (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
		goto out;

	if ((hba->saved_err & UIC_ERROR) &&
	    (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
		int err;
		/*
		 * wait for 50ms to see if we can get any other errors or not.
		 */
		spin_unlock_irqrestore(hba->host->host_lock, flags);
		msleep(50);
		spin_lock_irqsave(hba->host->host_lock, flags);

		/*
		 * now check if we have got any other severe errors other than
		 * DL NAC error?
		 */
		if ((hba->saved_err & INT_FATAL_ERRORS) ||
		    ((hba->saved_err & UIC_ERROR) &&
		    (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
			goto out;

		/*
		 * As DL NAC is the only error received so far, send out NOP
		 * command to confirm if link is still active or not.
		 *   - If we don't get any response then do error recovery.
		 *   - If we get response then clear the DL NAC error bit.
		 */

		spin_unlock_irqrestore(hba->host->host_lock, flags);
		err = ufshcd_verify_dev_init(hba);
		spin_lock_irqsave(hba->host->host_lock, flags);

		if (err)
			goto out;

		/* Link seems to be alive hence ignore the DL NAC errors */
		if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
			hba->saved_err &= ~UIC_ERROR;
		/* clear NAC error */
		hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
		if (!hba->saved_uic_err) {
			err_handling = false;
			goto out;
		}
	}
out:
	spin_unlock_irqrestore(hba->host->host_lock, flags);
	return err_handling;
}

5493
/**
5494 5495
 * ufshcd_err_handler - handle UFS errors that require s/w attention
 * @work: pointer to work structure
5496
 */
5497
static void ufshcd_err_handler(struct work_struct *work)
5498 5499
{
	struct ufs_hba *hba;
5500 5501 5502 5503 5504
	unsigned long flags;
	u32 err_xfer = 0;
	u32 err_tm = 0;
	int err = 0;
	int tag;
5505
	bool needs_reset = false;
5506 5507

	hba = container_of(work, struct ufs_hba, eh_work);
5508

5509
	pm_runtime_get_sync(hba->dev);
5510
	ufshcd_hold(hba, false);
5511 5512

	spin_lock_irqsave(hba->host->host_lock, flags);
5513
	if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5514 5515 5516 5517 5518 5519
		goto out;

	hba->ufshcd_state = UFSHCD_STATE_RESET;
	ufshcd_set_eh_in_progress(hba);

	/* Complete requests that have door-bell cleared by h/w */
5520
	ufshcd_complete_requests(hba);
5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531

	if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
		bool ret;

		spin_unlock_irqrestore(hba->host->host_lock, flags);
		/* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
		ret = ufshcd_quirk_dl_nac_errors(hba);
		spin_lock_irqsave(hba->host->host_lock, flags);
		if (!ret)
			goto skip_err_handling;
	}
5532
	if ((hba->saved_err & INT_FATAL_ERRORS) ||
5533
	    (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
5534 5535 5536 5537 5538
	    ((hba->saved_err & UIC_ERROR) &&
	    (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
				   UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
				   UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
		needs_reset = true;
5539

5540 5541
	/*
	 * if host reset is required then skip clearing the pending
5542 5543
	 * transfers forcefully because they will get cleared during
	 * host reset and restore
5544 5545 5546 5547 5548 5549
	 */
	if (needs_reset)
		goto skip_pending_xfer_clear;

	/* release lock as clear command might sleep */
	spin_unlock_irqrestore(hba->host->host_lock, flags);
5550
	/* Clear pending transfer requests */
5551 5552 5553 5554 5555 5556
	for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
		if (ufshcd_clear_cmd(hba, tag)) {
			err_xfer = true;
			goto lock_skip_pending_xfer_clear;
		}
	}
5557 5558

	/* Clear pending task management requests */
5559 5560 5561 5562 5563 5564
	for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
		if (ufshcd_clear_tm_cmd(hba, tag)) {
			err_tm = true;
			goto lock_skip_pending_xfer_clear;
		}
	}
5565

5566
lock_skip_pending_xfer_clear:
5567 5568
	spin_lock_irqsave(hba->host->host_lock, flags);

5569 5570 5571 5572 5573 5574 5575
	/* Complete the requests that are cleared by s/w */
	ufshcd_complete_requests(hba);

	if (err_xfer || err_tm)
		needs_reset = true;

skip_pending_xfer_clear:
5576
	/* Fatal errors need reset */
5577 5578 5579 5580 5581 5582 5583 5584 5585 5586 5587 5588 5589 5590 5591
	if (needs_reset) {
		unsigned long max_doorbells = (1UL << hba->nutrs) - 1;

		/*
		 * ufshcd_reset_and_restore() does the link reinitialization
		 * which will need atleast one empty doorbell slot to send the
		 * device management commands (NOP and query commands).
		 * If there is no slot empty at this moment then free up last
		 * slot forcefully.
		 */
		if (hba->outstanding_reqs == max_doorbells)
			__ufshcd_transfer_req_compl(hba,
						    (1UL << (hba->nutrs - 1)));

		spin_unlock_irqrestore(hba->host->host_lock, flags);
5592
		err = ufshcd_reset_and_restore(hba);
5593
		spin_lock_irqsave(hba->host->host_lock, flags);
5594 5595 5596 5597 5598 5599 5600 5601 5602 5603 5604 5605 5606
		if (err) {
			dev_err(hba->dev, "%s: reset and restore failed\n",
					__func__);
			hba->ufshcd_state = UFSHCD_STATE_ERROR;
		}
		/*
		 * Inform scsi mid-layer that we did reset and allow to handle
		 * Unit Attention properly.
		 */
		scsi_report_bus_reset(hba->host, 0);
		hba->saved_err = 0;
		hba->saved_uic_err = 0;
	}
5607

5608
skip_err_handling:
5609 5610 5611 5612 5613 5614 5615
	if (!needs_reset) {
		hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
		if (hba->saved_err || hba->saved_uic_err)
			dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
			    __func__, hba->saved_err, hba->saved_uic_err);
	}

5616 5617 5618
	ufshcd_clear_eh_in_progress(hba);

out:
5619
	spin_unlock_irqrestore(hba->host->host_lock, flags);
5620
	ufshcd_scsi_unblock_requests(hba);
5621
	ufshcd_release(hba);
5622
	pm_runtime_put_sync(hba->dev);
5623 5624 5625
}

/**
5626 5627
 * ufshcd_update_uic_error - check and set fatal UIC error flags.
 * @hba: per-adapter instance
5628 5629 5630 5631
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5632
 */
5633
static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
5634 5635
{
	u32 reg;
5636
	irqreturn_t retval = IRQ_NONE;
5637

5638 5639 5640 5641
	/* PHY layer lane error */
	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
	/* Ignore LINERESET indication, as this is not an error */
	if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5642
	    (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5643 5644 5645 5646 5647
		/*
		 * To know whether this error is fatal or not, DB timeout
		 * must be checked but this error is handled separately.
		 */
		dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5648
		ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
5649
		retval |= IRQ_HANDLED;
5650
	}
5651

5652 5653
	/* PA_INIT_ERROR is fatal and needs UIC reset */
	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5654 5655
	if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
	    (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
5656
		ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
5657

5658 5659 5660 5661 5662 5663 5664 5665 5666 5667 5668
		if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
			hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
		else if (hba->dev_quirks &
				UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
			if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
				hba->uic_error |=
					UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
			else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
				hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
		}
		retval |= IRQ_HANDLED;
5669
	}
5670 5671 5672

	/* UIC NL/TL/DME errors needs software retry */
	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5673 5674
	if ((reg & UIC_NETWORK_LAYER_ERROR) &&
	    (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
5675
		ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
5676
		hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5677
		retval |= IRQ_HANDLED;
5678
	}
5679 5680

	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5681 5682
	if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
	    (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
5683
		ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
5684
		hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5685
		retval |= IRQ_HANDLED;
5686
	}
5687 5688

	reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5689 5690
	if ((reg & UIC_DME_ERROR) &&
	    (reg & UIC_DME_ERROR_CODE_MASK)) {
5691
		ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
5692
		hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5693
		retval |= IRQ_HANDLED;
5694
	}
5695 5696 5697

	dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
			__func__, hba->uic_error);
5698
	return retval;
5699 5700
}

5701 5702 5703
static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
					 u32 intr_mask)
{
5704 5705
	if (!ufshcd_is_auto_hibern8_supported(hba) ||
	    !ufshcd_is_auto_hibern8_enabled(hba))
5706 5707 5708 5709 5710 5711 5712 5713 5714 5715 5716 5717 5718
		return false;

	if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
		return false;

	if (hba->active_uic_cmd &&
	    (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
	    hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
		return false;

	return true;
}

5719 5720 5721
/**
 * ufshcd_check_errors - Check for errors that need s/w attention
 * @hba: per-adapter instance
5722 5723 5724 5725
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5726
 */
5727
static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
5728 5729
{
	bool queue_eh_work = false;
5730
	irqreturn_t retval = IRQ_NONE;
5731

5732 5733
	if (hba->errors & INT_FATAL_ERRORS) {
		ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
5734
		queue_eh_work = true;
5735
	}
5736 5737

	if (hba->errors & UIC_ERROR) {
5738
		hba->uic_error = 0;
5739
		retval = ufshcd_update_uic_error(hba);
5740 5741
		if (hba->uic_error)
			queue_eh_work = true;
5742
	}
5743

5744 5745 5746 5747 5748 5749
	if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
		dev_err(hba->dev,
			"%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
			__func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
			"Enter" : "Exit",
			hba->errors, ufshcd_get_upmcrs(hba));
5750 5751
		ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
				       hba->errors);
5752 5753 5754
		queue_eh_work = true;
	}

5755
	if (queue_eh_work) {
5756 5757 5758 5759 5760 5761 5762
		/*
		 * update the transfer error masks to sticky bits, let's do this
		 * irrespective of current ufshcd_state.
		 */
		hba->saved_err |= hba->errors;
		hba->saved_uic_err |= hba->uic_error;

5763 5764 5765
		/* handle fatal errors only when link is functional */
		if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
			/* block commands from scsi mid-layer */
5766
			ufshcd_scsi_block_requests(hba);
5767

5768
			hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784

			/* dump controller state before resetting */
			if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
				bool pr_prdt = !!(hba->saved_err &
						SYSTEM_BUS_FATAL_ERROR);

				dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
					__func__, hba->saved_err,
					hba->saved_uic_err);

				ufshcd_print_host_regs(hba);
				ufshcd_print_pwr_info(hba);
				ufshcd_print_tmrs(hba, hba->outstanding_tasks);
				ufshcd_print_trs(hba, hba->outstanding_reqs,
							pr_prdt);
			}
5785 5786
			schedule_work(&hba->eh_work);
		}
5787
		retval |= IRQ_HANDLED;
5788
	}
5789 5790 5791 5792 5793 5794
	/*
	 * if (!queue_eh_work) -
	 * Other errors are either non-fatal where host recovers
	 * itself without s/w intervention or errors that will be
	 * handled by the SCSI core layer.
	 */
5795
	return retval;
5796 5797
}

5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812 5813 5814 5815 5816 5817 5818
struct ctm_info {
	struct ufs_hba	*hba;
	unsigned long	pending;
	unsigned int	ncpl;
};

static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
{
	struct ctm_info *const ci = priv;
	struct completion *c;

	WARN_ON_ONCE(reserved);
	if (test_bit(req->tag, &ci->pending))
		return true;
	ci->ncpl++;
	c = req->end_io_data;
	if (c)
		complete(c);
	return true;
}

5819 5820 5821
/**
 * ufshcd_tmc_handler - handle task management function completion
 * @hba: per adapter instance
5822 5823 5824 5825
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5826
 */
5827
static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
5828
{
5829 5830 5831 5832 5833
	struct request_queue *q = hba->tmf_queue;
	struct ctm_info ci = {
		.hba	 = hba,
		.pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
	};
5834

5835 5836
	blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
	return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
5837 5838 5839 5840 5841 5842
}

/**
 * ufshcd_sl_intr - Interrupt service routine
 * @hba: per adapter instance
 * @intr_status: contains interrupts generated by the controller
5843 5844 5845 5846
 *
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5847
 */
5848
static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5849
{
5850 5851
	irqreturn_t retval = IRQ_NONE;

5852
	hba->errors = UFSHCD_ERROR_MASK & intr_status;
5853 5854 5855 5856

	if (ufshcd_is_auto_hibern8_error(hba, intr_status))
		hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);

5857
	if (hba->errors)
5858
		retval |= ufshcd_check_errors(hba);
5859

5860
	if (intr_status & UFSHCD_UIC_MASK)
5861
		retval |= ufshcd_uic_cmd_compl(hba, intr_status);
5862 5863

	if (intr_status & UTP_TASK_REQ_COMPL)
5864
		retval |= ufshcd_tmc_handler(hba);
5865 5866

	if (intr_status & UTP_TRANSFER_REQ_COMPL)
5867 5868 5869
		retval |= ufshcd_transfer_req_compl(hba);

	return retval;
5870 5871 5872 5873 5874 5875 5876
}

/**
 * ufshcd_intr - Main interrupt service routine
 * @irq: irq number
 * @__hba: pointer to adapter instance
 *
5877 5878 5879
 * Returns
 *  IRQ_HANDLED - If interrupt is valid
 *  IRQ_NONE    - If invalid interrupt
5880 5881 5882
 */
static irqreturn_t ufshcd_intr(int irq, void *__hba)
{
5883
	u32 intr_status, enabled_intr_status;
5884 5885
	irqreturn_t retval = IRQ_NONE;
	struct ufs_hba *hba = __hba;
5886
	int retries = hba->nutrs;
5887 5888

	spin_lock(hba->host->host_lock);
5889
	intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5890

5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901
	/*
	 * There could be max of hba->nutrs reqs in flight and in worst case
	 * if the reqs get finished 1 by 1 after the interrupt status is
	 * read, make sure we handle them by checking the interrupt status
	 * again in a loop until we process all of the reqs before returning.
	 */
	do {
		enabled_intr_status =
			intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
		if (intr_status)
			ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5902 5903
		if (enabled_intr_status)
			retval |= ufshcd_sl_intr(hba, enabled_intr_status);
5904 5905 5906

		intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
	} while (intr_status && --retries);
5907

5908 5909 5910 5911 5912 5913
	if (retval == IRQ_NONE) {
		dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
					__func__, intr_status);
		ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
	}

5914 5915 5916 5917
	spin_unlock(hba->host->host_lock);
	return retval;
}

5918 5919 5920 5921 5922 5923 5924 5925 5926 5927
static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
{
	int err = 0;
	u32 mask = 1 << tag;
	unsigned long flags;

	if (!test_bit(tag, &hba->outstanding_tasks))
		goto out;

	spin_lock_irqsave(hba->host->host_lock, flags);
5928
	ufshcd_utmrl_clear(hba, tag);
5929 5930 5931 5932 5933
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	/* poll for max. 1 sec to clear door bell register by h/w */
	err = ufshcd_wait_for_register(hba,
			REG_UTP_TASK_REQ_DOOR_BELL,
5934
			mask, 0, 1000, 1000);
5935 5936 5937 5938
out:
	return err;
}

5939 5940
static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
		struct utp_task_req_desc *treq, u8 tm_function)
5941
{
5942
	struct request_queue *q = hba->tmf_queue;
5943
	struct Scsi_Host *host = hba->host;
5944 5945
	DECLARE_COMPLETION_ONSTACK(wait);
	struct request *req;
5946
	unsigned long flags;
5947
	int free_slot, task_tag, err;
5948

5949 5950 5951 5952 5953
	/*
	 * Get free slot, sleep if slots are unavailable.
	 * Even though we use wait_event() which sleeps indefinitely,
	 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
	 */
5954 5955 5956 5957
	req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
	req->end_io_data = &wait;
	free_slot = req->tag;
	WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
5958
	ufshcd_hold(hba, false);
5959

5960 5961
	spin_lock_irqsave(host->host_lock, flags);
	task_tag = hba->nutrs + free_slot;
5962

5963 5964 5965
	treq->req_header.dword_0 |= cpu_to_be32(task_tag);

	memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
K
Kiwoong Kim 已提交
5966 5967
	ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);

5968 5969
	/* send command to the controller */
	__set_bit(free_slot, &hba->outstanding_tasks);
5970 5971 5972 5973

	/* Make sure descriptors are ready before ringing the task doorbell */
	wmb();

5974
	ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
5975 5976
	/* Make sure that doorbell is committed immediately */
	wmb();
5977 5978 5979

	spin_unlock_irqrestore(host->host_lock, flags);

5980 5981
	ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");

5982
	/* wait until the task management command is completed */
5983
	err = wait_for_completion_io_timeout(&wait,
5984
			msecs_to_jiffies(TM_CMD_TIMEOUT));
5985
	if (!err) {
5986 5987 5988 5989 5990
		/*
		 * Make sure that ufshcd_compl_tm() does not trigger a
		 * use-after-free.
		 */
		req->end_io_data = NULL;
5991
		ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
5992 5993 5994 5995 5996 5997 5998
		dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
				__func__, tm_function);
		if (ufshcd_clear_tm_cmd(hba, free_slot))
			dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
					__func__, free_slot);
		err = -ETIMEDOUT;
	} else {
5999 6000 6001
		err = 0;
		memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));

6002
		ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
6003
	}
6004

6005 6006 6007 6008
	spin_lock_irqsave(hba->host->host_lock, flags);
	__clear_bit(free_slot, &hba->outstanding_tasks);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

6009
	blk_put_request(req);
6010

6011
	ufshcd_release(hba);
6012 6013 6014
	return err;
}

6015 6016 6017 6018 6019 6020 6021 6022 6023 6024 6025 6026 6027 6028 6029 6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040 6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054 6055 6056 6057 6058 6059 6060
/**
 * ufshcd_issue_tm_cmd - issues task management commands to controller
 * @hba: per adapter instance
 * @lun_id: LUN ID to which TM command is sent
 * @task_id: task ID to which the TM command is applicable
 * @tm_function: task management function opcode
 * @tm_response: task management service response return value
 *
 * Returns non-zero value on error, zero on success.
 */
static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
		u8 tm_function, u8 *tm_response)
{
	struct utp_task_req_desc treq = { { 0 }, };
	int ocs_value, err;

	/* Configure task request descriptor */
	treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
	treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);

	/* Configure task request UPIU */
	treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
				  cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
	treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);

	/*
	 * The host shall provide the same value for LUN field in the basic
	 * header and for Input Parameter.
	 */
	treq.input_param1 = cpu_to_be32(lun_id);
	treq.input_param2 = cpu_to_be32(task_id);

	err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
	if (err == -ETIMEDOUT)
		return err;

	ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
	if (ocs_value != OCS_SUCCESS)
		dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
				__func__, ocs_value);
	else if (tm_response)
		*tm_response = be32_to_cpu(treq.output_param1) &
				MASK_TM_SERVICE_RESP;
	return err;
}

6061 6062 6063 6064 6065 6066 6067
/**
 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
 * @hba:	per-adapter instance
 * @req_upiu:	upiu request
 * @rsp_upiu:	upiu reply
 * @desc_buff:	pointer to descriptor buffer, NULL if NA
 * @buff_len:	descriptor size, 0 if NA
6068
 * @cmd_type:	specifies the type (NOP, Query...)
6069 6070 6071 6072 6073 6074 6075 6076 6077 6078 6079 6080 6081
 * @desc_op:	descriptor operation
 *
 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
 * Therefore, it "rides" the device management infrastructure: uses its tag and
 * tasks work queues.
 *
 * Since there is only one available tag for device management commands,
 * the caller is expected to hold the hba->dev_cmd.lock mutex.
 */
static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
					struct utp_upiu_req *req_upiu,
					struct utp_upiu_req *rsp_upiu,
					u8 *desc_buff, int *buff_len,
6082
					enum dev_cmd_type cmd_type,
6083 6084
					enum query_opcode desc_op)
{
6085 6086
	struct request_queue *q = hba->cmd_queue;
	struct request *req;
6087 6088 6089 6090 6091 6092 6093 6094 6095
	struct ufshcd_lrb *lrbp;
	int err = 0;
	int tag;
	struct completion wait;
	unsigned long flags;
	u32 upiu_flags;

	down_read(&hba->clk_scaling_lock);

6096
	req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6097 6098 6099 6100
	if (IS_ERR(req)) {
		err = PTR_ERR(req);
		goto out_unlock;
	}
6101 6102
	tag = req->tag;
	WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
6103 6104 6105 6106 6107 6108 6109 6110 6111 6112 6113 6114 6115 6116 6117 6118 6119 6120 6121 6122 6123 6124 6125 6126 6127 6128 6129 6130 6131 6132 6133 6134 6135 6136 6137 6138 6139 6140 6141 6142 6143 6144 6145 6146 6147 6148 6149 6150 6151 6152 6153 6154 6155 6156 6157 6158 6159 6160

	init_completion(&wait);
	lrbp = &hba->lrb[tag];
	WARN_ON(lrbp->cmd);

	lrbp->cmd = NULL;
	lrbp->sense_bufflen = 0;
	lrbp->sense_buffer = NULL;
	lrbp->task_tag = tag;
	lrbp->lun = 0;
	lrbp->intr_cmd = true;
	hba->dev_cmd.type = cmd_type;

	switch (hba->ufs_version) {
	case UFSHCI_VERSION_10:
	case UFSHCI_VERSION_11:
		lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
		break;
	default:
		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
		break;
	}

	/* update the task tag in the request upiu */
	req_upiu->header.dword_0 |= cpu_to_be32(tag);

	ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);

	/* just copy the upiu request as it is */
	memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
	if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
		/* The Data Segment Area is optional depending upon the query
		 * function value. for WRITE DESCRIPTOR, the data segment
		 * follows right after the tsf.
		 */
		memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
		*buff_len = 0;
	}

	memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));

	hba->dev_cmd.complete = &wait;

	/* Make sure descriptors are ready before ringing the doorbell */
	wmb();
	spin_lock_irqsave(hba->host->host_lock, flags);
	ufshcd_send_command(hba, tag);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	/*
	 * ignore the returning value here - ufshcd_check_query_response is
	 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
	 * read the response directly ignoring all errors.
	 */
	ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);

	/* just copy the upiu response as it is */
	memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
6161 6162 6163 6164 6165 6166 6167 6168 6169
	if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
		u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
		u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
			       MASK_QUERY_DATA_SEG_LEN;

		if (*buff_len >= resp_len) {
			memcpy(desc_buff, descp, resp_len);
			*buff_len = resp_len;
		} else {
6170 6171 6172
			dev_warn(hba->dev,
				 "%s: rsp size %d is bigger than buffer size %d",
				 __func__, resp_len, *buff_len);
6173 6174 6175 6176
			*buff_len = 0;
			err = -EINVAL;
		}
	}
6177

6178
	blk_put_request(req);
6179
out_unlock:
6180 6181 6182 6183 6184 6185 6186 6187 6188 6189 6190 6191 6192 6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206
	up_read(&hba->clk_scaling_lock);
	return err;
}

/**
 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
 * @hba:	per-adapter instance
 * @req_upiu:	upiu request
 * @rsp_upiu:	upiu reply - only 8 DW as we do not support scsi commands
 * @msgcode:	message code, one of UPIU Transaction Codes Initiator to Target
 * @desc_buff:	pointer to descriptor buffer, NULL if NA
 * @buff_len:	descriptor size, 0 if NA
 * @desc_op:	descriptor operation
 *
 * Supports UTP Transfer requests (nop and query), and UTP Task
 * Management requests.
 * It is up to the caller to fill the upiu conent properly, as it will
 * be copied without any further input validations.
 */
int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
			     struct utp_upiu_req *req_upiu,
			     struct utp_upiu_req *rsp_upiu,
			     int msgcode,
			     u8 *desc_buff, int *buff_len,
			     enum query_opcode desc_op)
{
	int err;
6207
	enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220 6221 6222 6223 6224 6225 6226 6227 6228 6229 6230 6231 6232 6233 6234 6235 6236 6237 6238 6239 6240 6241 6242 6243 6244 6245 6246 6247 6248 6249 6250 6251 6252 6253 6254
	struct utp_task_req_desc treq = { { 0 }, };
	int ocs_value;
	u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;

	switch (msgcode) {
	case UPIU_TRANSACTION_NOP_OUT:
		cmd_type = DEV_CMD_TYPE_NOP;
		/* fall through */
	case UPIU_TRANSACTION_QUERY_REQ:
		ufshcd_hold(hba, false);
		mutex_lock(&hba->dev_cmd.lock);
		err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
						   desc_buff, buff_len,
						   cmd_type, desc_op);
		mutex_unlock(&hba->dev_cmd.lock);
		ufshcd_release(hba);

		break;
	case UPIU_TRANSACTION_TASK_REQ:
		treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
		treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);

		memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));

		err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
		if (err == -ETIMEDOUT)
			break;

		ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
		if (ocs_value != OCS_SUCCESS) {
			dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
				ocs_value);
			break;
		}

		memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));

		break;
	default:
		err = -EINVAL;

		break;
	}

	return err;
}

6255
/**
6256 6257
 * ufshcd_eh_device_reset_handler - device reset handler registered to
 *                                    scsi layer.
6258 6259 6260 6261
 * @cmd: SCSI command pointer
 *
 * Returns SUCCESS/FAILED
 */
6262
static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
6263 6264 6265 6266 6267 6268
{
	struct Scsi_Host *host;
	struct ufs_hba *hba;
	unsigned int tag;
	u32 pos;
	int err;
6269 6270
	u8 resp = 0xF;
	struct ufshcd_lrb *lrbp;
6271
	unsigned long flags;
6272 6273 6274 6275 6276

	host = cmd->device->host;
	hba = shost_priv(host);
	tag = cmd->request->tag;

6277 6278 6279
	lrbp = &hba->lrb[tag];
	err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
	if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6280 6281
		if (!err)
			err = resp;
6282
		goto out;
6283
	}
6284

6285 6286 6287 6288 6289 6290
	/* clear the commands that were pending for corresponding LUN */
	for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
		if (hba->lrb[pos].lun == lrbp->lun) {
			err = ufshcd_clear_cmd(hba, pos);
			if (err)
				break;
6291
		}
6292 6293 6294 6295
	}
	spin_lock_irqsave(host->host_lock, flags);
	ufshcd_transfer_req_compl(hba);
	spin_unlock_irqrestore(host->host_lock, flags);
6296

6297
out:
6298
	hba->req_abort_count = 0;
6299
	ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
6300 6301 6302 6303 6304 6305
	if (!err) {
		err = SUCCESS;
	} else {
		dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
		err = FAILED;
	}
6306 6307 6308
	return err;
}

6309 6310 6311 6312 6313 6314 6315 6316 6317 6318 6319
static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
{
	struct ufshcd_lrb *lrbp;
	int tag;

	for_each_set_bit(tag, &bitmap, hba->nutrs) {
		lrbp = &hba->lrb[tag];
		lrbp->req_abort_skip = true;
	}
}

6320 6321 6322 6323
/**
 * ufshcd_abort - abort a specific command
 * @cmd: SCSI command pointer
 *
6324 6325 6326 6327 6328 6329
 * Abort the pending command in device by sending UFS_ABORT_TASK task management
 * command, and in host controller by clearing the door-bell register. There can
 * be race between controller sending the command to the device while abort is
 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
 * really issued and then try to abort it.
 *
6330 6331 6332 6333 6334 6335 6336 6337
 * Returns SUCCESS/FAILED
 */
static int ufshcd_abort(struct scsi_cmnd *cmd)
{
	struct Scsi_Host *host;
	struct ufs_hba *hba;
	unsigned long flags;
	unsigned int tag;
6338 6339
	int err = 0;
	int poll_cnt;
6340 6341
	u8 resp = 0xF;
	struct ufshcd_lrb *lrbp;
6342
	u32 reg;
6343 6344 6345 6346

	host = cmd->device->host;
	hba = shost_priv(host);
	tag = cmd->request->tag;
6347
	lrbp = &hba->lrb[tag];
6348 6349 6350 6351 6352 6353
	if (!ufshcd_valid_tag(hba, tag)) {
		dev_err(hba->dev,
			"%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
			__func__, tag, cmd, cmd->request);
		BUG();
	}
6354

6355 6356 6357 6358 6359 6360 6361 6362 6363 6364
	/*
	 * Task abort to the device W-LUN is illegal. When this command
	 * will fail, due to spec violation, scsi err handling next step
	 * will be to send LU reset which, again, is a spec violation.
	 * To avoid these unnecessary/illegal step we skip to the last error
	 * handling stage: reset and restore.
	 */
	if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
		return ufshcd_eh_host_reset_handler(cmd);

6365
	ufshcd_hold(hba, false);
6366
	reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6367
	/* If command is already aborted/completed, return SUCCESS */
6368 6369 6370 6371
	if (!(test_bit(tag, &hba->outstanding_reqs))) {
		dev_err(hba->dev,
			"%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
			__func__, tag, hba->outstanding_reqs, reg);
6372
		goto out;
6373
	}
6374

6375 6376 6377 6378 6379 6380
	if (!(reg & (1 << tag))) {
		dev_err(hba->dev,
		"%s: cmd was completed, but without a notifying intr, tag = %d",
		__func__, tag);
	}

6381 6382 6383
	/* Print Transfer Request of aborted task */
	dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);

6384 6385 6386 6387 6388 6389 6390 6391 6392
	/*
	 * Print detailed info about aborted request.
	 * As more than one request might get aborted at the same time,
	 * print full information only for the first aborted request in order
	 * to reduce repeated printouts. For other aborted requests only print
	 * basic details.
	 */
	scsi_print_command(hba->lrb[tag].cmd);
	if (!hba->req_abort_count) {
6393
		ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
6394
		ufshcd_print_host_regs(hba);
6395
		ufshcd_print_host_state(hba);
6396 6397 6398 6399 6400 6401
		ufshcd_print_pwr_info(hba);
		ufshcd_print_trs(hba, 1 << tag, true);
	} else {
		ufshcd_print_trs(hba, 1 << tag, false);
	}
	hba->req_abort_count++;
6402 6403 6404 6405 6406 6407 6408

	/* Skip task abort in case previous aborts failed and report failure */
	if (lrbp->req_abort_skip) {
		err = -EIO;
		goto out;
	}

6409 6410 6411 6412 6413
	for (poll_cnt = 100; poll_cnt; poll_cnt--) {
		err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
				UFS_QUERY_TASK, &resp);
		if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
			/* cmd pending in the device */
6414 6415
			dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
				__func__, tag);
6416 6417 6418 6419 6420 6421
			break;
		} else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
			/*
			 * cmd not pending in the device, check if it is
			 * in transition.
			 */
6422 6423
			dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
				__func__, tag);
6424 6425 6426 6427 6428 6429 6430
			reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
			if (reg & (1 << tag)) {
				/* sleep for max. 200us to stabilize */
				usleep_range(100, 200);
				continue;
			}
			/* command completed already */
6431 6432
			dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
				__func__, tag);
6433 6434
			goto out;
		} else {
6435 6436 6437
			dev_err(hba->dev,
				"%s: no response from device. tag = %d, err %d\n",
				__func__, tag, err);
6438 6439 6440 6441 6442 6443 6444 6445
			if (!err)
				err = resp; /* service response error */
			goto out;
		}
	}

	if (!poll_cnt) {
		err = -EBUSY;
6446 6447 6448
		goto out;
	}

6449 6450 6451
	err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
			UFS_ABORT_TASK, &resp);
	if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6452
		if (!err) {
6453
			err = resp; /* service response error */
6454 6455 6456
			dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
				__func__, tag, err);
		}
6457
		goto out;
6458
	}
6459

6460
	err = ufshcd_clear_cmd(hba, tag);
6461 6462 6463
	if (err) {
		dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
			__func__, tag, err);
6464
		goto out;
6465
	}
6466

6467 6468 6469
	scsi_dma_unmap(cmd);

	spin_lock_irqsave(host->host_lock, flags);
6470
	ufshcd_outstanding_req_clear(hba, tag);
6471 6472
	hba->lrb[tag].cmd = NULL;
	spin_unlock_irqrestore(host->host_lock, flags);
6473

6474
out:
6475 6476 6477 6478
	if (!err) {
		err = SUCCESS;
	} else {
		dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6479
		ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
6480 6481 6482
		err = FAILED;
	}

6483 6484 6485 6486 6487
	/*
	 * This ufshcd_release() corresponds to the original scsi cmd that got
	 * aborted here (as we won't get any IRQ for it).
	 */
	ufshcd_release(hba);
6488 6489 6490
	return err;
}

6491 6492 6493 6494 6495 6496 6497 6498 6499 6500 6501 6502 6503 6504 6505
/**
 * ufshcd_host_reset_and_restore - reset and restore host controller
 * @hba: per-adapter instance
 *
 * Note that host controller reset may issue DME_RESET to
 * local and remote (device) Uni-Pro stack and the attributes
 * are reset to default state.
 *
 * Returns zero on success, non-zero on failure
 */
static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
{
	int err;
	unsigned long flags;

6506 6507 6508 6509
	/*
	 * Stop the host controller and complete the requests
	 * cleared by h/w
	 */
6510 6511
	ufshcd_hba_stop(hba);

6512
	spin_lock_irqsave(hba->host->host_lock, flags);
6513 6514 6515
	hba->silence_err_logs = true;
	ufshcd_complete_requests(hba);
	hba->silence_err_logs = false;
6516 6517
	spin_unlock_irqrestore(hba->host->host_lock, flags);

6518
	/* scale up clocks to max frequency before full reinitialization */
6519
	ufshcd_set_clk_freq(hba, true);
6520

6521 6522 6523 6524 6525
	err = ufshcd_hba_enable(hba);
	if (err)
		goto out;

	/* Establish the link again and restore the device */
6526
	err = ufshcd_probe_hba(hba, false);
S
Sujit Reddy Thumma 已提交
6527 6528

	if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
6529 6530 6531 6532
		err = -EIO;
out:
	if (err)
		dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6533
	ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548
	return err;
}

/**
 * ufshcd_reset_and_restore - reset and re-initialize host/device
 * @hba: per-adapter instance
 *
 * Reset and recover device, host and re-establish link. This
 * is helpful to recover the communication in fatal error conditions.
 *
 * Returns zero on success, non-zero on failure
 */
static int ufshcd_reset_and_restore(struct ufs_hba *hba)
{
	int err = 0;
S
Sujit Reddy Thumma 已提交
6549
	int retries = MAX_HOST_RESET_RETRIES;
6550

S
Sujit Reddy Thumma 已提交
6551
	do {
6552 6553 6554
		/* Reset the attached device */
		ufshcd_vops_device_reset(hba);

S
Sujit Reddy Thumma 已提交
6555 6556
		err = ufshcd_host_reset_and_restore(hba);
	} while (err && --retries);
6557 6558 6559 6560 6561 6562

	return err;
}

/**
 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6563
 * @cmd: SCSI command pointer
6564 6565 6566 6567 6568 6569 6570 6571 6572 6573 6574
 *
 * Returns SUCCESS/FAILED
 */
static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
{
	int err;
	unsigned long flags;
	struct ufs_hba *hba;

	hba = shost_priv(cmd->device->host);

6575
	ufshcd_hold(hba, false);
6576 6577 6578 6579 6580 6581 6582 6583
	/*
	 * Check if there is any race with fatal error handling.
	 * If so, wait for it to complete. Even though fatal error
	 * handling does reset and restore in some cases, don't assume
	 * anything out of it. We are just avoiding race here.
	 */
	do {
		spin_lock_irqsave(hba->host->host_lock, flags);
6584
		if (!(work_pending(&hba->eh_work) ||
6585 6586
			    hba->ufshcd_state == UFSHCD_STATE_RESET ||
			    hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
6587 6588 6589
			break;
		spin_unlock_irqrestore(hba->host->host_lock, flags);
		dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
6590
		flush_work(&hba->eh_work);
6591 6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609
	} while (1);

	hba->ufshcd_state = UFSHCD_STATE_RESET;
	ufshcd_set_eh_in_progress(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	err = ufshcd_reset_and_restore(hba);

	spin_lock_irqsave(hba->host->host_lock, flags);
	if (!err) {
		err = SUCCESS;
		hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
	} else {
		err = FAILED;
		hba->ufshcd_state = UFSHCD_STATE_ERROR;
	}
	ufshcd_clear_eh_in_progress(hba);
	spin_unlock_irqrestore(hba->host->host_lock, flags);

6610
	ufshcd_release(hba);
6611 6612 6613
	return err;
}

6614 6615 6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 6628 6629
/**
 * ufshcd_get_max_icc_level - calculate the ICC level
 * @sup_curr_uA: max. current supported by the regulator
 * @start_scan: row at the desc table to start scan from
 * @buff: power descriptor buffer
 *
 * Returns calculated max ICC level for specific regulator
 */
static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
{
	int i;
	int curr_uA;
	u16 data;
	u16 unit;

	for (i = start_scan; i >= 0; i--) {
6630
		data = be16_to_cpup((__be16 *)&buff[2 * i]);
6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6654 6655 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667 6668 6669 6670 6671 6672 6673 6674 6675 6676 6677 6678 6679 6680
		unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
						ATTR_ICC_LVL_UNIT_OFFSET;
		curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
		switch (unit) {
		case UFSHCD_NANO_AMP:
			curr_uA = curr_uA / 1000;
			break;
		case UFSHCD_MILI_AMP:
			curr_uA = curr_uA * 1000;
			break;
		case UFSHCD_AMP:
			curr_uA = curr_uA * 1000 * 1000;
			break;
		case UFSHCD_MICRO_AMP:
		default:
			break;
		}
		if (sup_curr_uA >= curr_uA)
			break;
	}
	if (i < 0) {
		i = 0;
		pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
	}

	return (u32)i;
}

/**
 * ufshcd_calc_icc_level - calculate the max ICC level
 * In case regulators are not initialized we'll return 0
 * @hba: per-adapter instance
 * @desc_buf: power descriptor buffer to extract ICC levels from.
 * @len: length of desc_buff
 *
 * Returns calculated ICC level
 */
static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
							u8 *desc_buf, int len)
{
	u32 icc_level = 0;

	if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
						!hba->vreg_info.vccq2) {
		dev_err(hba->dev,
			"%s: Regulator capability was not set, actvIccLevel=%d",
							__func__, icc_level);
		goto out;
	}

6681
	if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
6682 6683 6684 6685 6686
		icc_level = ufshcd_get_max_icc_level(
				hba->vreg_info.vcc->max_uA,
				POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);

6687
	if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
6688 6689 6690 6691 6692
		icc_level = ufshcd_get_max_icc_level(
				hba->vreg_info.vccq->max_uA,
				icc_level,
				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);

6693
	if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
6694 6695 6696 6697 6698 6699 6700 6701
		icc_level = ufshcd_get_max_icc_level(
				hba->vreg_info.vccq2->max_uA,
				icc_level,
				&desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
out:
	return icc_level;
}

6702
static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
6703 6704
{
	int ret;
6705
	int buff_len = hba->desc_size.pwr_desc;
K
Kees Cook 已提交
6706
	u8 *desc_buf;
6707
	u32 icc_level;
K
Kees Cook 已提交
6708 6709 6710 6711

	desc_buf = kmalloc(buff_len, GFP_KERNEL);
	if (!desc_buf)
		return;
6712

6713 6714
	ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0,
			desc_buf, buff_len);
6715 6716 6717 6718
	if (ret) {
		dev_err(hba->dev,
			"%s: Failed reading power descriptor.len = %d ret = %d",
			__func__, buff_len, ret);
K
Kees Cook 已提交
6719
		goto out;
6720 6721
	}

6722 6723 6724
	icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
							 buff_len);
	dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
6725

6726
	ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6727
		QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
6728 6729 6730 6731

	if (ret)
		dev_err(hba->dev,
			"%s: Failed configuring bActiveICCLevel = %d ret = %d",
6732
			__func__, icc_level, ret);
6733

K
Kees Cook 已提交
6734 6735
out:
	kfree(desc_buf);
6736 6737
}

6738 6739 6740 6741 6742 6743 6744 6745 6746 6747
static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
{
	scsi_autopm_get_device(sdev);
	blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
	if (sdev->rpm_autosuspend)
		pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
						 RPM_AUTOSUSPEND_DELAY_MS);
	scsi_autopm_put_device(sdev);
}

6748 6749 6750 6751 6752 6753 6754 6755 6756 6757 6758 6759 6760 6761 6762
/**
 * ufshcd_scsi_add_wlus - Adds required W-LUs
 * @hba: per-adapter instance
 *
 * UFS device specification requires the UFS devices to support 4 well known
 * logical units:
 *	"REPORT_LUNS" (address: 01h)
 *	"UFS Device" (address: 50h)
 *	"RPMB" (address: 44h)
 *	"BOOT" (address: 30h)
 * UFS device's power management needs to be controlled by "POWER CONDITION"
 * field of SSU (START STOP UNIT) command. But this "power condition" field
 * will take effect only when its sent to "UFS device" well known logical unit
 * hence we require the scsi_device instance to represent this logical unit in
 * order for the UFS host driver to send the SSU command for power management.
6763
 *
6764 6765 6766
 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
 * Block) LU so user space process can control this LU. User space may also
 * want to have access to BOOT LU.
6767
 *
6768 6769 6770 6771 6772 6773 6774 6775 6776
 * This function adds scsi device instances for each of all well known LUs
 * (except "REPORT LUNS" LU).
 *
 * Returns zero on success (all required W-LUs are added successfully),
 * non-zero error value on failure (if failed to add any of the required W-LU).
 */
static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
{
	int ret = 0;
6777 6778
	struct scsi_device *sdev_rpmb;
	struct scsi_device *sdev_boot;
6779 6780 6781 6782 6783 6784 6785 6786

	hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
	if (IS_ERR(hba->sdev_ufs_device)) {
		ret = PTR_ERR(hba->sdev_ufs_device);
		hba->sdev_ufs_device = NULL;
		goto out;
	}
6787
	ufshcd_blk_pm_runtime_init(hba->sdev_ufs_device);
6788
	scsi_device_put(hba->sdev_ufs_device);
6789

6790
	sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6791
		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6792 6793
	if (IS_ERR(sdev_rpmb)) {
		ret = PTR_ERR(sdev_rpmb);
6794
		goto remove_sdev_ufs_device;
6795
	}
6796
	ufshcd_blk_pm_runtime_init(sdev_rpmb);
6797
	scsi_device_put(sdev_rpmb);
6798 6799 6800

	sdev_boot = __scsi_add_device(hba->host, 0, 0,
		ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6801
	if (IS_ERR(sdev_boot)) {
6802
		dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6803 6804
	} else {
		ufshcd_blk_pm_runtime_init(sdev_boot);
6805
		scsi_device_put(sdev_boot);
6806
	}
6807 6808 6809 6810 6811 6812 6813 6814
	goto out;

remove_sdev_ufs_device:
	scsi_remove_device(hba->sdev_ufs_device);
out:
	return ret;
}

6815 6816
static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
{
6817 6818 6819
	u8 lun;
	u32 d_lu_wb_buf_alloc;

6820 6821 6822 6823 6824 6825
	if (!ufshcd_is_wb_allowed(hba))
		return;

	if (hba->desc_size.dev_desc < DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
		goto wb_disabled;

6826 6827 6828
	hba->dev_info.d_ext_ufs_feature_sup =
		get_unaligned_be32(desc_buf +
				   DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
6829 6830 6831 6832

	if (!(hba->dev_info.d_ext_ufs_feature_sup & UFS_DEV_WRITE_BOOSTER_SUP))
		goto wb_disabled;

6833 6834 6835 6836 6837 6838 6839 6840 6841 6842 6843 6844
	/*
	 * WB may be supported but not configured while provisioning.
	 * The spec says, in dedicated wb buffer mode,
	 * a max of 1 lun would have wb buffer configured.
	 * Now only shared buffer mode is supported.
	 */
	hba->dev_info.b_wb_buffer_type =
		desc_buf[DEVICE_DESC_PARAM_WB_TYPE];

	hba->dev_info.b_presrv_uspc_en =
		desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];

6845 6846 6847 6848 6849 6850 6851 6852 6853 6854 6855 6856 6857 6858 6859 6860 6861 6862 6863
	if (hba->dev_info.b_wb_buffer_type == WB_BUF_MODE_SHARED) {
		hba->dev_info.d_wb_alloc_units =
		get_unaligned_be32(desc_buf +
				   DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS);
		if (!hba->dev_info.d_wb_alloc_units)
			goto wb_disabled;
	} else {
		for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
			d_lu_wb_buf_alloc = 0;
			ufshcd_read_unit_desc_param(hba,
					lun,
					UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
					(u8 *)&d_lu_wb_buf_alloc,
					sizeof(d_lu_wb_buf_alloc));
			if (d_lu_wb_buf_alloc) {
				hba->dev_info.wb_dedicated_lu = lun;
				break;
			}
		}
6864

6865 6866 6867
		if (!d_lu_wb_buf_alloc)
			goto wb_disabled;
	}
6868 6869 6870 6871 6872 6873
	return;

wb_disabled:
	hba->caps &= ~UFSHCD_CAP_WB_EN;
}

6874
void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
6875 6876 6877 6878
{
	struct ufs_dev_fix *f;
	struct ufs_dev_info *dev_info = &hba->dev_info;

6879 6880 6881 6882
	if (!fixups)
		return;

	for (f = fixups; f->quirk; f++) {
6883 6884 6885 6886 6887 6888 6889
		if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
		     f->wmanufacturerid == UFS_ANY_VENDOR) &&
		     ((dev_info->model &&
		       STR_PRFX_EQUAL(f->model, dev_info->model)) ||
		      !strcmp(f->model, UFS_ANY_MODEL)))
			hba->dev_quirks |= f->quirk;
	}
6890
}
6891
EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
6892

6893 6894 6895
static void ufs_fixup_device_setup(struct ufs_hba *hba)
{
	/* fix by general quirk table */
6896
	ufshcd_fixup_dev_quirks(hba, ufs_fixups);
6897 6898 6899 6900 6901

	/* allow vendors to fix quirks */
	ufshcd_vops_fixup_dev_quirks(hba);
}

B
Bean Huo 已提交
6902
static int ufs_get_device_desc(struct ufs_hba *hba)
6903 6904
{
	int err;
K
Kees Cook 已提交
6905
	size_t buff_len;
6906
	u8 model_index;
K
Kees Cook 已提交
6907
	u8 *desc_buf;
B
Bean Huo 已提交
6908
	struct ufs_dev_info *dev_info = &hba->dev_info;
6909

K
Kees Cook 已提交
6910 6911 6912 6913 6914 6915 6916
	buff_len = max_t(size_t, hba->desc_size.dev_desc,
			 QUERY_DESC_MAX_SIZE + 1);
	desc_buf = kmalloc(buff_len, GFP_KERNEL);
	if (!desc_buf) {
		err = -ENOMEM;
		goto out;
	}
6917

6918 6919
	err = ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, desc_buf,
			hba->desc_size.dev_desc);
6920 6921 6922 6923 6924 6925 6926 6927 6928 6929
	if (err) {
		dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
			__func__, err);
		goto out;
	}

	/*
	 * getting vendor (manufacturerID) and Bank Index in big endian
	 * format
	 */
B
Bean Huo 已提交
6930
	dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
6931 6932
				     desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];

6933 6934 6935 6936
	/* getting Specification Version in big endian format */
	dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
				      desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];

6937
	model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6938

6939
	err = ufshcd_read_string_desc(hba, model_index,
B
Bean Huo 已提交
6940
				      &dev_info->model, SD_ASCII_STD);
6941
	if (err < 0) {
6942 6943 6944 6945 6946
		dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
			__func__, err);
		goto out;
	}

6947 6948 6949 6950 6951 6952 6953
	ufs_fixup_device_setup(hba);

	/*
	 * Probe WB only for UFS-3.1 devices or UFS devices with quirk
	 * UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES enabled
	 */
	if (dev_info->wspecversion >= 0x310 ||
6954
	    dev_info->wspecversion == 0x220 ||
6955 6956 6957
	    (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES))
		ufshcd_wb_probe(hba, desc_buf);

6958 6959 6960 6961 6962
	/*
	 * ufshcd_read_string_desc returns size of the string
	 * reset the error value
	 */
	err = 0;
6963 6964

out:
K
Kees Cook 已提交
6965
	kfree(desc_buf);
6966 6967 6968
	return err;
}

B
Bean Huo 已提交
6969
static void ufs_put_device_desc(struct ufs_hba *hba)
6970
{
B
Bean Huo 已提交
6971 6972 6973 6974
	struct ufs_dev_info *dev_info = &hba->dev_info;

	kfree(dev_info->model);
	dev_info->model = NULL;
6975 6976
}

6977 6978 6979 6980 6981 6982 6983 6984 6985 6986 6987 6988 6989 6990 6991 6992 6993 6994 6995 6996 6997 6998 6999 7000 7001 7002 7003 7004 7005 7006 7007 7008 7009 7010 7011 7012 7013 7014 7015 7016 7017 7018 7019 7020 7021 7022 7023 7024 7025 7026 7027 7028 7029 7030 7031 7032 7033 7034 7035 7036 7037 7038 7039 7040 7041 7042 7043 7044 7045 7046 7047 7048 7049 7050 7051 7052 7053
/**
 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
 * @hba: per-adapter instance
 *
 * PA_TActivate parameter can be tuned manually if UniPro version is less than
 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
 * the hibern8 exit latency.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
{
	int ret = 0;
	u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;

	ret = ufshcd_dme_peer_get(hba,
				  UIC_ARG_MIB_SEL(
					RX_MIN_ACTIVATETIME_CAPABILITY,
					UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
				  &peer_rx_min_activatetime);
	if (ret)
		goto out;

	/* make sure proper unit conversion is applied */
	tuned_pa_tactivate =
		((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
		 / PA_TACTIVATE_TIME_UNIT_US);
	ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
			     tuned_pa_tactivate);

out:
	return ret;
}

/**
 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
 * @hba: per-adapter instance
 *
 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
 * This optimal value can help reduce the hibern8 exit latency.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
{
	int ret = 0;
	u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
	u32 max_hibern8_time, tuned_pa_hibern8time;

	ret = ufshcd_dme_get(hba,
			     UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
					UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
				  &local_tx_hibern8_time_cap);
	if (ret)
		goto out;

	ret = ufshcd_dme_peer_get(hba,
				  UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
					UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
				  &peer_rx_hibern8_time_cap);
	if (ret)
		goto out;

	max_hibern8_time = max(local_tx_hibern8_time_cap,
			       peer_rx_hibern8_time_cap);
	/* make sure proper unit conversion is applied */
	tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
				/ PA_HIBERN8_TIME_UNIT_US);
	ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
			     tuned_pa_hibern8time);
out:
	return ret;
}

7054 7055 7056 7057 7058 7059 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 7078 7079 7080 7081 7082 7083 7084 7085 7086 7087 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097 7098 7099 7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110 7111 7112 7113 7114 7115 7116 7117 7118 7119 7120 7121 7122 7123
/**
 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
 * less than device PA_TACTIVATE time.
 * @hba: per-adapter instance
 *
 * Some UFS devices require host PA_TACTIVATE to be lower than device
 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
 * for such devices.
 *
 * Returns zero on success, non-zero error value on failure.
 */
static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
{
	int ret = 0;
	u32 granularity, peer_granularity;
	u32 pa_tactivate, peer_pa_tactivate;
	u32 pa_tactivate_us, peer_pa_tactivate_us;
	u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};

	ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
				  &granularity);
	if (ret)
		goto out;

	ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
				  &peer_granularity);
	if (ret)
		goto out;

	if ((granularity < PA_GRANULARITY_MIN_VAL) ||
	    (granularity > PA_GRANULARITY_MAX_VAL)) {
		dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
			__func__, granularity);
		return -EINVAL;
	}

	if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
	    (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
		dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
			__func__, peer_granularity);
		return -EINVAL;
	}

	ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
	if (ret)
		goto out;

	ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
				  &peer_pa_tactivate);
	if (ret)
		goto out;

	pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
	peer_pa_tactivate_us = peer_pa_tactivate *
			     gran_to_us_table[peer_granularity - 1];

	if (pa_tactivate_us > peer_pa_tactivate_us) {
		u32 new_peer_pa_tactivate;

		new_peer_pa_tactivate = pa_tactivate_us /
				      gran_to_us_table[peer_granularity - 1];
		new_peer_pa_tactivate++;
		ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
					  new_peer_pa_tactivate);
	}

out:
	return ret;
}

B
Bean Huo 已提交
7124
static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
7125 7126 7127 7128 7129 7130
{
	if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
		ufshcd_tune_pa_tactivate(hba);
		ufshcd_tune_pa_hibern8time(hba);
	}

7131 7132
	ufshcd_vops_apply_dev_quirks(hba);

7133 7134 7135
	if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
		/* set 1ms timeout for PA_TACTIVATE */
		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
7136 7137 7138

	if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
		ufshcd_quirk_tune_host_pa_tactivate(hba);
7139 7140
}

7141 7142 7143 7144
static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
{
	hba->ufs_stats.hibern8_exit_cnt = 0;
	hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
7145
	hba->req_abort_count = 0;
7146 7147
}

7148 7149 7150 7151 7152 7153 7154 7155 7156 7157 7158 7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170 7171 7172 7173 7174 7175 7176 7177 7178 7179 7180
static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
{
	int err;

	err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
		&hba->desc_size.dev_desc);
	if (err)
		hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;

	err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
		&hba->desc_size.pwr_desc);
	if (err)
		hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;

	err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
		&hba->desc_size.interc_desc);
	if (err)
		hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;

	err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
		&hba->desc_size.conf_desc);
	if (err)
		hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;

	err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
		&hba->desc_size.unit_desc);
	if (err)
		hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;

	err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
		&hba->desc_size.geom_desc);
	if (err)
		hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
7181

7182 7183 7184 7185
	err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
		&hba->desc_size.hlth_desc);
	if (err)
		hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
7186 7187
}

7188 7189 7190 7191 7192 7193 7194 7195 7196 7197 7198 7199 7200 7201 7202 7203 7204 7205 7206 7207 7208 7209 7210 7211 7212 7213 7214 7215 7216 7217 7218
static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
{
	int err;
	size_t buff_len;
	u8 *desc_buf;

	buff_len = hba->desc_size.geom_desc;
	desc_buf = kmalloc(buff_len, GFP_KERNEL);
	if (!desc_buf) {
		err = -ENOMEM;
		goto out;
	}

	err = ufshcd_read_desc(hba, QUERY_DESC_IDN_GEOMETRY, 0,
			desc_buf, buff_len);
	if (err) {
		dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
				__func__, err);
		goto out;
	}

	if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
		hba->dev_info.max_lu_supported = 32;
	else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
		hba->dev_info.max_lu_supported = 8;

out:
	kfree(desc_buf);
	return err;
}

7219 7220 7221 7222 7223 7224 7225 7226 7227 7228 7229 7230 7231 7232 7233 7234 7235 7236 7237 7238 7239 7240 7241 7242 7243 7244 7245 7246 7247 7248 7249 7250 7251 7252 7253 7254 7255 7256 7257 7258 7259 7260 7261 7262 7263 7264 7265 7266 7267 7268 7269 7270 7271 7272 7273 7274 7275 7276 7277 7278 7279 7280 7281 7282 7283 7284 7285 7286
static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
	{19200000, REF_CLK_FREQ_19_2_MHZ},
	{26000000, REF_CLK_FREQ_26_MHZ},
	{38400000, REF_CLK_FREQ_38_4_MHZ},
	{52000000, REF_CLK_FREQ_52_MHZ},
	{0, REF_CLK_FREQ_INVAL},
};

static enum ufs_ref_clk_freq
ufs_get_bref_clk_from_hz(unsigned long freq)
{
	int i;

	for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
		if (ufs_ref_clk_freqs[i].freq_hz == freq)
			return ufs_ref_clk_freqs[i].val;

	return REF_CLK_FREQ_INVAL;
}

void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
{
	unsigned long freq;

	freq = clk_get_rate(refclk);

	hba->dev_ref_clk_freq =
		ufs_get_bref_clk_from_hz(freq);

	if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
		dev_err(hba->dev,
		"invalid ref_clk setting = %ld\n", freq);
}

static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
{
	int err;
	u32 ref_clk;
	u32 freq = hba->dev_ref_clk_freq;

	err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
			QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);

	if (err) {
		dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
			err);
		goto out;
	}

	if (ref_clk == freq)
		goto out; /* nothing to update */

	err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
			QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);

	if (err) {
		dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
			ufs_ref_clk_freqs[freq].freq_hz);
		goto out;
	}

	dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
			ufs_ref_clk_freqs[freq].freq_hz);

out:
	return err;
}

7287 7288 7289 7290 7291 7292 7293 7294
static int ufshcd_device_params_init(struct ufs_hba *hba)
{
	bool flag;
	int ret;

	/* Init check for device descriptor sizes */
	ufshcd_init_desc_sizes(hba);

7295 7296 7297 7298 7299
	/* Init UFS geometry descriptor related parameters */
	ret = ufshcd_device_geo_params_init(hba);
	if (ret)
		goto out;

7300 7301 7302 7303 7304 7305 7306 7307
	/* Check and apply UFS device quirks */
	ret = ufs_get_device_desc(hba);
	if (ret) {
		dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
			__func__, ret);
		goto out;
	}

7308 7309
	ufshcd_get_ref_clk_gating_wait(hba);

7310
	if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7311
			QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
7312 7313
		hba->dev_info.f_power_on_wp_en = flag;

7314 7315 7316 7317 7318
	/* Probe maximum power mode co-supported by both UFS host and device */
	if (ufshcd_get_max_pwr_mode(hba))
		dev_err(hba->dev,
			"%s: Failed getting max supported power mode\n",
			__func__);
7319 7320 7321 7322 7323 7324 7325 7326 7327 7328 7329 7330 7331 7332 7333 7334 7335 7336 7337 7338 7339 7340 7341 7342 7343 7344 7345 7346 7347 7348 7349 7350 7351 7352 7353 7354 7355 7356 7357 7358
out:
	return ret;
}

/**
 * ufshcd_add_lus - probe and add UFS logical units
 * @hba: per-adapter instance
 */
static int ufshcd_add_lus(struct ufs_hba *hba)
{
	int ret;

	/* Add required well known logical units to scsi mid layer */
	ret = ufshcd_scsi_add_wlus(hba);
	if (ret)
		goto out;

	/* Initialize devfreq after UFS device is detected */
	if (ufshcd_is_clkscaling_supported(hba)) {
		memcpy(&hba->clk_scaling.saved_pwr_info.info,
			&hba->pwr_info,
			sizeof(struct ufs_pa_layer_attr));
		hba->clk_scaling.saved_pwr_info.is_valid = true;
		if (!hba->devfreq) {
			ret = ufshcd_devfreq_init(hba);
			if (ret)
				goto out;
		}

		hba->clk_scaling.is_allowed = true;
	}

	ufs_bsg_probe(hba);
	scsi_scan_host(hba->host);
	pm_runtime_put_sync(hba->dev);

out:
	return ret;
}

7359
/**
S
Sujit Reddy Thumma 已提交
7360 7361
 * ufshcd_probe_hba - probe hba to detect device and initialize
 * @hba: per-adapter instance
7362
 * @async: asynchronous execution or not
S
Sujit Reddy Thumma 已提交
7363 7364
 *
 * Execute link-startup and verify device initialization
7365
 */
7366
static int ufshcd_probe_hba(struct ufs_hba *hba, bool async)
7367 7368
{
	int ret;
7369
	ktime_t start = ktime_get();
7370 7371

	ret = ufshcd_link_startup(hba);
7372 7373 7374
	if (ret)
		goto out;

7375 7376 7377 7378
	/* set the default level for urgent bkops */
	hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
	hba->is_urgent_bkops_lvl_checked = false;

7379 7380 7381
	/* Debug counters initialization */
	ufshcd_clear_dbg_ufs_stats(hba);

7382 7383
	/* UniPro link is active now */
	ufshcd_set_link_active(hba);
7384

7385
	/* Verify device initialization by sending NOP OUT UPIU */
7386 7387 7388
	ret = ufshcd_verify_dev_init(hba);
	if (ret)
		goto out;
7389

7390
	/* Initiate UFS initialization, and waiting until completion */
7391 7392 7393
	ret = ufshcd_complete_dev_init(hba);
	if (ret)
		goto out;
7394

7395 7396 7397 7398 7399 7400 7401 7402
	/*
	 * Initialize UFS device parameters used by driver, these
	 * parameters are associated with UFS descriptors.
	 */
	if (async) {
		ret = ufshcd_device_params_init(hba);
		if (ret)
			goto out;
7403 7404
	}

B
Bean Huo 已提交
7405
	ufshcd_tune_unipro_params(hba);
7406

7407 7408
	/* UFS device is also active now */
	ufshcd_set_ufs_dev_active(hba);
7409
	ufshcd_force_reset_auto_bkops(hba);
7410 7411
	hba->wlun_dev_clr_ua = true;

7412 7413
	/* Gear up to HS gear if supported */
	if (hba->max_pwr_info.is_valid) {
7414 7415 7416 7417 7418 7419
		/*
		 * Set the right value to bRefClkFreq before attempting to
		 * switch to HS gears.
		 */
		if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
			ufshcd_set_dev_ref_clk(hba);
D
Dolev Raviv 已提交
7420
		ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
7421
		if (ret) {
D
Dolev Raviv 已提交
7422 7423
			dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
					__func__, ret);
7424 7425
			goto out;
		}
7426
		ufshcd_print_pwr_info(hba);
D
Dolev Raviv 已提交
7427
	}
7428

7429 7430 7431 7432 7433 7434 7435 7436
	/*
	 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
	 * and for removable UFS card as well, hence always set the parameter.
	 * Note: Error handler may issue the device reset hence resetting
	 * bActiveICCLevel as well so it is always safe to set this here.
	 */
	ufshcd_set_active_icc_lvl(hba);

7437 7438
	/* set the state as operational after switching to desired gear */
	hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
7439

7440
	ufshcd_wb_config(hba);
7441 7442 7443
	/* Enable Auto-Hibernate if configured */
	ufshcd_auto_hibern8_enable(hba);

7444
out:
S
Sujit Reddy Thumma 已提交
7445

7446 7447
	trace_ufshcd_init(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
7448
		hba->curr_dev_pwr_mode, hba->uic_link_state);
S
Sujit Reddy Thumma 已提交
7449 7450 7451 7452 7453 7454 7455 7456 7457 7458 7459
	return ret;
}

/**
 * ufshcd_async_scan - asynchronous execution for probing hba
 * @data: data pointer to pass to this function
 * @cookie: cookie data
 */
static void ufshcd_async_scan(void *data, async_cookie_t cookie)
{
	struct ufs_hba *hba = (struct ufs_hba *)data;
7460
	int ret;
S
Sujit Reddy Thumma 已提交
7461

7462 7463 7464 7465 7466 7467 7468 7469 7470 7471 7472 7473 7474 7475 7476 7477 7478
	/* Initialize hba, detect and initialize UFS device */
	ret = ufshcd_probe_hba(hba, true);
	if (ret)
		goto out;

	/* Probe and add UFS logical units  */
	ret = ufshcd_add_lus(hba);
out:
	/*
	 * If we failed to initialize the device or the device is not
	 * present, turn off the power/clocks etc.
	 */
	if (ret) {
		pm_runtime_put_sync(hba->dev);
		ufshcd_exit_clk_scaling(hba);
		ufshcd_hba_exit(hba);
	}
7479 7480
}

7481 7482
static const struct attribute_group *ufshcd_driver_groups[] = {
	&ufs_sysfs_unit_descriptor_group,
7483
	&ufs_sysfs_lun_attributes_group,
7484 7485 7486
	NULL,
};

7487 7488
static struct ufs_hba_variant_params ufs_hba_vps = {
	.hba_enable_delay_us		= 1000,
7489
	.wb_flush_threshold		= UFS_WB_BUF_REMAIN_PERCENT(40),
7490 7491 7492 7493 7494 7495 7496
	.devfreq_profile.polling_ms	= 100,
	.devfreq_profile.target		= ufshcd_devfreq_target,
	.devfreq_profile.get_dev_status	= ufshcd_devfreq_get_dev_status,
	.ondemand_data.upthreshold	= 70,
	.ondemand_data.downdifferential	= 5,
};

7497 7498 7499 7500 7501 7502
static struct scsi_host_template ufshcd_driver_template = {
	.module			= THIS_MODULE,
	.name			= UFSHCD,
	.proc_name		= UFSHCD,
	.queuecommand		= ufshcd_queuecommand,
	.slave_alloc		= ufshcd_slave_alloc,
7503
	.slave_configure	= ufshcd_slave_configure,
7504
	.slave_destroy		= ufshcd_slave_destroy,
7505
	.change_queue_depth	= ufshcd_change_queue_depth,
7506
	.eh_abort_handler	= ufshcd_abort,
7507 7508
	.eh_device_reset_handler = ufshcd_eh_device_reset_handler,
	.eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
7509 7510 7511 7512
	.this_id		= -1,
	.sg_tablesize		= SG_ALL,
	.cmd_per_lun		= UFSHCD_CMD_PER_LUN,
	.can_queue		= UFSHCD_CAN_QUEUE,
7513
	.max_segment_size	= PRDT_DATA_BYTE_COUNT_MAX,
7514
	.max_host_blocked	= 1,
7515
	.track_queue_depth	= 1,
7516
	.sdev_groups		= ufshcd_driver_groups,
7517
	.dma_boundary		= PAGE_SIZE - 1,
7518
	.rpm_autosuspend_delay	= RPM_AUTOSUSPEND_DELAY_MS,
7519 7520
};

7521 7522 7523
static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
				   int ua)
{
7524
	int ret;
7525

7526 7527
	if (!vreg)
		return 0;
7528

7529 7530 7531 7532 7533 7534 7535 7536 7537
	/*
	 * "set_load" operation shall be required on those regulators
	 * which specifically configured current limitation. Otherwise
	 * zero max_uA may cause unexpected behavior when regulator is
	 * enabled or set as high power mode.
	 */
	if (!vreg->max_uA)
		return 0;

7538 7539 7540 7541
	ret = regulator_set_load(vreg->reg, ua);
	if (ret < 0) {
		dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
				__func__, vreg->name, ua, ret);
7542 7543 7544 7545 7546 7547 7548 7549
	}

	return ret;
}

static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
					 struct ufs_vreg *vreg)
{
7550
	return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
7551 7552 7553 7554 7555
}

static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
					 struct ufs_vreg *vreg)
{
7556 7557 7558
	if (!vreg)
		return 0;

7559
	return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
7560 7561
}

7562 7563 7564 7565
static int ufshcd_config_vreg(struct device *dev,
		struct ufs_vreg *vreg, bool on)
{
	int ret = 0;
7566 7567
	struct regulator *reg;
	const char *name;
7568 7569 7570 7571
	int min_uV, uA_load;

	BUG_ON(!vreg);

7572 7573 7574
	reg = vreg->reg;
	name = vreg->name;

7575
	if (regulator_count_voltages(reg) > 0) {
7576 7577 7578 7579 7580
		uA_load = on ? vreg->max_uA : 0;
		ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
		if (ret)
			goto out;

7581 7582 7583 7584 7585 7586
		if (vreg->min_uV && vreg->max_uV) {
			min_uV = on ? vreg->min_uV : 0;
			ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
			if (ret) {
				dev_err(dev,
					"%s: %s set voltage failed, err=%d\n",
7587
					__func__, name, ret);
7588 7589
				goto out;
			}
7590 7591 7592 7593 7594 7595 7596 7597 7598 7599
		}
	}
out:
	return ret;
}

static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
{
	int ret = 0;

7600
	if (!vreg || vreg->enabled)
7601 7602 7603 7604 7605 7606 7607 7608 7609 7610 7611 7612 7613 7614 7615 7616 7617 7618 7619
		goto out;

	ret = ufshcd_config_vreg(dev, vreg, true);
	if (!ret)
		ret = regulator_enable(vreg->reg);

	if (!ret)
		vreg->enabled = true;
	else
		dev_err(dev, "%s: %s enable failed, err=%d\n",
				__func__, vreg->name, ret);
out:
	return ret;
}

static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
{
	int ret = 0;

7620
	if (!vreg || !vreg->enabled)
7621 7622 7623 7624 7625 7626 7627 7628 7629 7630 7631 7632 7633 7634 7635 7636 7637 7638 7639 7640 7641 7642 7643 7644 7645 7646 7647 7648 7649 7650 7651 7652 7653 7654 7655 7656 7657 7658 7659 7660 7661 7662 7663
		goto out;

	ret = regulator_disable(vreg->reg);

	if (!ret) {
		/* ignore errors on applying disable config */
		ufshcd_config_vreg(dev, vreg, false);
		vreg->enabled = false;
	} else {
		dev_err(dev, "%s: %s disable failed, err=%d\n",
				__func__, vreg->name, ret);
	}
out:
	return ret;
}

static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
{
	int ret = 0;
	struct device *dev = hba->dev;
	struct ufs_vreg_info *info = &hba->vreg_info;

	ret = ufshcd_toggle_vreg(dev, info->vcc, on);
	if (ret)
		goto out;

	ret = ufshcd_toggle_vreg(dev, info->vccq, on);
	if (ret)
		goto out;

	ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
	if (ret)
		goto out;

out:
	if (ret) {
		ufshcd_toggle_vreg(dev, info->vccq2, false);
		ufshcd_toggle_vreg(dev, info->vccq, false);
		ufshcd_toggle_vreg(dev, info->vcc, false);
	}
	return ret;
}

7664 7665 7666 7667
static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
{
	struct ufs_vreg_info *info = &hba->vreg_info;

7668
	return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7669 7670
}

7671 7672 7673 7674 7675 7676 7677 7678 7679 7680 7681 7682 7683 7684 7685 7686 7687 7688 7689 7690 7691 7692 7693 7694 7695 7696 7697 7698 7699 7700 7701 7702 7703 7704 7705 7706
static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
{
	int ret = 0;

	if (!vreg)
		goto out;

	vreg->reg = devm_regulator_get(dev, vreg->name);
	if (IS_ERR(vreg->reg)) {
		ret = PTR_ERR(vreg->reg);
		dev_err(dev, "%s: %s get failed, err=%d\n",
				__func__, vreg->name, ret);
	}
out:
	return ret;
}

static int ufshcd_init_vreg(struct ufs_hba *hba)
{
	int ret = 0;
	struct device *dev = hba->dev;
	struct ufs_vreg_info *info = &hba->vreg_info;

	ret = ufshcd_get_vreg(dev, info->vcc);
	if (ret)
		goto out;

	ret = ufshcd_get_vreg(dev, info->vccq);
	if (ret)
		goto out;

	ret = ufshcd_get_vreg(dev, info->vccq2);
out:
	return ret;
}

7707 7708 7709 7710 7711 7712 7713 7714 7715 7716
static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
{
	struct ufs_vreg_info *info = &hba->vreg_info;

	if (info)
		return ufshcd_get_vreg(hba->dev, info->vdd_hba);

	return 0;
}

7717 7718
static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
					bool skip_ref_clk)
7719 7720 7721 7722
{
	int ret = 0;
	struct ufs_clk_info *clki;
	struct list_head *head = &hba->clk_list_head;
7723
	unsigned long flags;
7724 7725
	ktime_t start = ktime_get();
	bool clk_state_changed = false;
7726

7727
	if (list_empty(head))
7728 7729
		goto out;

7730 7731 7732
	ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
	if (ret)
		return ret;
7733

7734 7735
	list_for_each_entry(clki, head, list) {
		if (!IS_ERR_OR_NULL(clki->clk)) {
7736 7737 7738
			if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
				continue;

7739
			clk_state_changed = on ^ clki->enabled;
7740 7741 7742 7743 7744 7745 7746 7747 7748 7749 7750 7751 7752 7753 7754
			if (on && !clki->enabled) {
				ret = clk_prepare_enable(clki->clk);
				if (ret) {
					dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
						__func__, clki->name, ret);
					goto out;
				}
			} else if (!on && clki->enabled) {
				clk_disable_unprepare(clki->clk);
			}
			clki->enabled = on;
			dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
					clki->name, on ? "en" : "dis");
		}
	}
7755

7756 7757 7758
	ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
	if (ret)
		return ret;
7759

7760 7761 7762 7763 7764 7765
out:
	if (ret) {
		list_for_each_entry(clki, head, list) {
			if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
				clk_disable_unprepare(clki->clk);
		}
7766
	} else if (!ret && on) {
7767 7768
		spin_lock_irqsave(hba->host->host_lock, flags);
		hba->clk_gating.state = CLKS_ON;
7769 7770
		trace_ufshcd_clk_gating(dev_name(hba->dev),
					hba->clk_gating.state);
7771
		spin_unlock_irqrestore(hba->host->host_lock, flags);
7772
	}
7773

7774 7775 7776 7777
	if (clk_state_changed)
		trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
			(on ? "on" : "off"),
			ktime_to_us(ktime_sub(ktime_get(), start)), ret);
7778 7779 7780
	return ret;
}

7781 7782 7783 7784 7785
static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
{
	return  __ufshcd_setup_clocks(hba, on, false);
}

7786 7787 7788 7789 7790 7791 7792
static int ufshcd_init_clocks(struct ufs_hba *hba)
{
	int ret = 0;
	struct ufs_clk_info *clki;
	struct device *dev = hba->dev;
	struct list_head *head = &hba->clk_list_head;

7793
	if (list_empty(head))
7794 7795 7796 7797 7798 7799 7800 7801 7802 7803 7804 7805 7806 7807
		goto out;

	list_for_each_entry(clki, head, list) {
		if (!clki->name)
			continue;

		clki->clk = devm_clk_get(dev, clki->name);
		if (IS_ERR(clki->clk)) {
			ret = PTR_ERR(clki->clk);
			dev_err(dev, "%s: %s clk get failed, %d\n",
					__func__, clki->name, ret);
			goto out;
		}

7808 7809 7810 7811 7812 7813 7814 7815
		/*
		 * Parse device ref clk freq as per device tree "ref_clk".
		 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
		 * in ufshcd_alloc_host().
		 */
		if (!strcmp(clki->name, "ref_clk"))
			ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);

7816 7817 7818 7819 7820 7821 7822 7823
		if (clki->max_freq) {
			ret = clk_set_rate(clki->clk, clki->max_freq);
			if (ret) {
				dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
					__func__, clki->name,
					clki->max_freq, ret);
				goto out;
			}
7824
			clki->curr_freq = clki->max_freq;
7825 7826 7827 7828 7829 7830 7831 7832
		}
		dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
				clki->name, clk_get_rate(clki->clk));
	}
out:
	return ret;
}

7833 7834 7835 7836 7837 7838 7839
static int ufshcd_variant_hba_init(struct ufs_hba *hba)
{
	int err = 0;

	if (!hba->vops)
		goto out;

7840 7841 7842
	err = ufshcd_vops_init(hba);
	if (err)
		goto out;
7843

7844 7845 7846
	err = ufshcd_vops_setup_regulators(hba, true);
	if (err)
		goto out_exit;
7847 7848 7849 7850

	goto out;

out_exit:
7851
	ufshcd_vops_exit(hba);
7852 7853 7854
out:
	if (err)
		dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7855
			__func__, ufshcd_get_var_name(hba), err);
7856 7857 7858 7859 7860 7861 7862 7863
	return err;
}

static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
{
	if (!hba->vops)
		return;

7864
	ufshcd_vops_setup_regulators(hba, false);
7865

7866
	ufshcd_vops_exit(hba);
7867 7868
}

7869 7870 7871 7872
static int ufshcd_hba_init(struct ufs_hba *hba)
{
	int err;

7873 7874 7875 7876 7877 7878 7879 7880
	/*
	 * Handle host controller power separately from the UFS device power
	 * rails as it will help controlling the UFS host controller power
	 * collapse easily which is different than UFS device power collapse.
	 * Also, enable the host controller power before we go ahead with rest
	 * of the initialization here.
	 */
	err = ufshcd_init_hba_vreg(hba);
7881 7882 7883
	if (err)
		goto out;

7884
	err = ufshcd_setup_hba_vreg(hba, true);
7885 7886 7887
	if (err)
		goto out;

7888 7889 7890 7891 7892 7893 7894 7895
	err = ufshcd_init_clocks(hba);
	if (err)
		goto out_disable_hba_vreg;

	err = ufshcd_setup_clocks(hba, true);
	if (err)
		goto out_disable_hba_vreg;

7896 7897 7898 7899 7900 7901 7902 7903
	err = ufshcd_init_vreg(hba);
	if (err)
		goto out_disable_clks;

	err = ufshcd_setup_vreg(hba, true);
	if (err)
		goto out_disable_clks;

7904 7905 7906 7907
	err = ufshcd_variant_hba_init(hba);
	if (err)
		goto out_disable_vreg;

S
Sujit Reddy Thumma 已提交
7908
	hba->is_powered = true;
7909 7910 7911 7912
	goto out;

out_disable_vreg:
	ufshcd_setup_vreg(hba, false);
7913 7914
out_disable_clks:
	ufshcd_setup_clocks(hba, false);
7915 7916
out_disable_hba_vreg:
	ufshcd_setup_hba_vreg(hba, false);
7917 7918 7919 7920 7921 7922
out:
	return err;
}

static void ufshcd_hba_exit(struct ufs_hba *hba)
{
S
Sujit Reddy Thumma 已提交
7923 7924 7925
	if (hba->is_powered) {
		ufshcd_variant_hba_exit(hba);
		ufshcd_setup_vreg(hba, false);
7926
		ufshcd_suspend_clkscaling(hba);
7927
		if (ufshcd_is_clkscaling_supported(hba))
7928 7929
			if (hba->devfreq)
				ufshcd_suspend_clkscaling(hba);
S
Sujit Reddy Thumma 已提交
7930 7931 7932
		ufshcd_setup_clocks(hba, false);
		ufshcd_setup_hba_vreg(hba, false);
		hba->is_powered = false;
B
Bean Huo 已提交
7933
		ufs_put_device_desc(hba);
S
Sujit Reddy Thumma 已提交
7934
	}
7935 7936
}

7937 7938 7939 7940 7941 7942 7943
static int
ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
{
	unsigned char cmd[6] = {REQUEST_SENSE,
				0,
				0,
				0,
7944
				UFS_SENSE_SIZE,
7945 7946 7947 7948
				0};
	char *buffer;
	int ret;

7949
	buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7950 7951 7952 7953 7954
	if (!buffer) {
		ret = -ENOMEM;
		goto out;
	}

7955
	ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7956
			UFS_SENSE_SIZE, NULL, NULL,
7957
			msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7958 7959 7960 7961 7962 7963 7964 7965 7966 7967 7968 7969 7970 7971 7972 7973 7974 7975 7976 7977 7978 7979
	if (ret)
		pr_err("%s: failed with err %d\n", __func__, ret);

	kfree(buffer);
out:
	return ret;
}

/**
 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
 *			     power mode
 * @hba: per adapter instance
 * @pwr_mode: device power mode to set
 *
 * Returns 0 if requested power mode is set successfully
 * Returns non-zero if failed to set the requested power mode
 */
static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
				     enum ufs_dev_pwr_mode pwr_mode)
{
	unsigned char cmd[6] = { START_STOP };
	struct scsi_sense_hdr sshdr;
7980 7981
	struct scsi_device *sdp;
	unsigned long flags;
7982 7983
	int ret;

7984 7985 7986 7987 7988 7989 7990 7991 7992 7993 7994 7995 7996 7997 7998
	spin_lock_irqsave(hba->host->host_lock, flags);
	sdp = hba->sdev_ufs_device;
	if (sdp) {
		ret = scsi_device_get(sdp);
		if (!ret && !scsi_device_online(sdp)) {
			ret = -ENODEV;
			scsi_device_put(sdp);
		}
	} else {
		ret = -ENODEV;
	}
	spin_unlock_irqrestore(hba->host->host_lock, flags);

	if (ret)
		return ret;
7999 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 8010 8011 8012 8013 8014 8015 8016 8017 8018

	/*
	 * If scsi commands fail, the scsi mid-layer schedules scsi error-
	 * handling, which would wait for host to be resumed. Since we know
	 * we are functional while we are here, skip host resume in error
	 * handling context.
	 */
	hba->host->eh_noresume = 1;
	if (hba->wlun_dev_clr_ua) {
		ret = ufshcd_send_request_sense(hba, sdp);
		if (ret)
			goto out;
		/* Unit attention condition is cleared now */
		hba->wlun_dev_clr_ua = false;
	}

	cmd[4] = pwr_mode << 4;

	/*
	 * Current function would be generally called from the power management
8019
	 * callbacks hence set the RQF_PM flag so that it doesn't resume the
8020 8021
	 * already suspended childs.
	 */
8022 8023
	ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
			START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
8024 8025
	if (ret) {
		sdev_printk(KERN_WARNING, sdp,
H
Hannes Reinecke 已提交
8026 8027
			    "START_STOP failed for power mode: %d, result %x\n",
			    pwr_mode, ret);
8028
		if (driver_byte(ret) == DRIVER_SENSE)
8029
			scsi_print_sense_hdr(sdp, NULL, &sshdr);
8030 8031 8032 8033 8034
	}

	if (!ret)
		hba->curr_dev_pwr_mode = pwr_mode;
out:
8035
	scsi_device_put(sdp);
8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047 8048 8049 8050 8051 8052 8053 8054 8055 8056 8057 8058 8059 8060
	hba->host->eh_noresume = 0;
	return ret;
}

static int ufshcd_link_state_transition(struct ufs_hba *hba,
					enum uic_link_state req_link_state,
					int check_for_bkops)
{
	int ret = 0;

	if (req_link_state == hba->uic_link_state)
		return 0;

	if (req_link_state == UIC_LINK_HIBERN8_STATE) {
		ret = ufshcd_uic_hibern8_enter(hba);
		if (!ret)
			ufshcd_set_link_hibern8(hba);
		else
			goto out;
	}
	/*
	 * If autobkops is enabled, link can't be turned off because
	 * turning off the link would also turn off the device.
	 */
	else if ((req_link_state == UIC_LINK_OFF_STATE) &&
D
Dan Carpenter 已提交
8061
		 (!check_for_bkops || !hba->auto_bkops_enabled)) {
8062 8063 8064 8065 8066 8067 8068 8069 8070 8071
		/*
		 * Let's make sure that link is in low power mode, we are doing
		 * this currently by putting the link in Hibern8. Otherway to
		 * put the link in low power mode is to send the DME end point
		 * to device and then send the DME reset command to local
		 * unipro. But putting the link in hibern8 is much faster.
		 */
		ret = ufshcd_uic_hibern8_enter(hba);
		if (ret)
			goto out;
8072 8073 8074 8075
		/*
		 * Change controller state to "reset state" which
		 * should also put the link in off/reset state
		 */
8076
		ufshcd_hba_stop(hba);
8077 8078 8079 8080 8081 8082 8083 8084 8085 8086 8087 8088 8089
		/*
		 * TODO: Check if we need any delay to make sure that
		 * controller is reset
		 */
		ufshcd_set_link_off(hba);
	}

out:
	return ret;
}

static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
{
8090 8091 8092 8093 8094 8095 8096 8097 8098 8099
	/*
	 * It seems some UFS devices may keep drawing more than sleep current
	 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
	 * To avoid this situation, add 2ms delay before putting these UFS
	 * rails in LPM mode.
	 */
	if (!ufshcd_is_link_active(hba) &&
	    hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
		usleep_range(2000, 2100);

8100 8101 8102 8103 8104 8105 8106 8107 8108 8109 8110
	/*
	 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
	 * power.
	 *
	 * If UFS device and link is in OFF state, all power supplies (VCC,
	 * VCCQ, VCCQ2) can be turned off if power on write protect is not
	 * required. If UFS link is inactive (Hibern8 or OFF state) and device
	 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
	 *
	 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
	 * in low power state which would save some power.
8111 8112 8113
	 *
	 * If Write Booster is enabled and the device needs to flush the WB
	 * buffer OR if bkops status is urgent for WB, keep Vcc on.
8114 8115 8116 8117 8118
	 */
	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
	    !hba->dev_info.is_lu_power_on_wp) {
		ufshcd_setup_vreg(hba, false);
	} else if (!ufshcd_is_ufs_dev_active(hba)) {
8119
		ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8120 8121 8122 8123 8124 8125 8126 8127 8128 8129 8130 8131 8132 8133 8134 8135 8136 8137 8138 8139 8140 8141 8142
		if (!ufshcd_is_link_active(hba)) {
			ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
			ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
		}
	}
}

static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
{
	int ret = 0;

	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
	    !hba->dev_info.is_lu_power_on_wp) {
		ret = ufshcd_setup_vreg(hba, true);
	} else if (!ufshcd_is_ufs_dev_active(hba)) {
		if (!ret && !ufshcd_is_link_active(hba)) {
			ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
			if (ret)
				goto vcc_disable;
			ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
			if (ret)
				goto vccq_lpm;
		}
8143
		ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
8144 8145 8146 8147 8148 8149 8150 8151 8152 8153 8154 8155 8156 8157 8158 8159 8160 8161 8162 8163 8164 8165 8166
	}
	goto out;

vccq_lpm:
	ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
vcc_disable:
	ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
out:
	return ret;
}

static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
{
	if (ufshcd_is_link_off(hba))
		ufshcd_setup_hba_vreg(hba, false);
}

static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
{
	if (ufshcd_is_link_off(hba))
		ufshcd_setup_hba_vreg(hba, true);
}

8167
/**
8168
 * ufshcd_suspend - helper function for suspend operations
8169
 * @hba: per adapter instance
8170 8171 8172 8173 8174 8175 8176 8177
 * @pm_op: desired low power operation type
 *
 * This function will try to put the UFS device and link into low power
 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
 * (System PM level).
 *
 * If this function is called during shutdown, it will make sure that
 * both UFS device and UFS link is powered off.
8178
 *
8179 8180 8181
 * NOTE: UFS device & link must be active before we enter in this function.
 *
 * Returns 0 for success and non-zero for failure
8182
 */
8183
static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8184
{
8185 8186 8187 8188 8189 8190 8191 8192 8193 8194 8195 8196 8197 8198 8199 8200
	int ret = 0;
	enum ufs_pm_level pm_lvl;
	enum ufs_dev_pwr_mode req_dev_pwr_mode;
	enum uic_link_state req_link_state;

	hba->pm_op_in_progress = 1;
	if (!ufshcd_is_shutdown_pm(pm_op)) {
		pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
			 hba->rpm_lvl : hba->spm_lvl;
		req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
		req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
	} else {
		req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
		req_link_state = UIC_LINK_OFF_STATE;
	}

8201
	/*
8202 8203
	 * If we can't transition into any of the low power modes
	 * just gate the clocks.
8204
	 */
8205 8206 8207
	ufshcd_hold(hba, false);
	hba->clk_gating.is_suspended = true;

8208 8209 8210 8211 8212
	if (hba->clk_scaling.is_allowed) {
		cancel_work_sync(&hba->clk_scaling.suspend_work);
		cancel_work_sync(&hba->clk_scaling.resume_work);
		ufshcd_suspend_clkscaling(hba);
	}
8213

8214 8215 8216 8217
	if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
			req_link_state == UIC_LINK_ACTIVE_STATE) {
		goto disable_clks;
	}
8218

8219 8220
	if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
	    (req_link_state == hba->uic_link_state))
8221
		goto enable_gating;
8222 8223 8224 8225

	/* UFS device & link must be active before we enter in this function */
	if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
		ret = -EINVAL;
8226
		goto enable_gating;
8227 8228 8229
	}

	if (ufshcd_is_runtime_pm(pm_op)) {
8230 8231 8232 8233 8234 8235 8236 8237 8238 8239 8240 8241 8242
		if (ufshcd_can_autobkops_during_suspend(hba)) {
			/*
			 * The device is idle with no requests in the queue,
			 * allow background operations if bkops status shows
			 * that performance might be impacted.
			 */
			ret = ufshcd_urgent_bkops(hba);
			if (ret)
				goto enable_gating;
		} else {
			/* make sure that auto bkops is disabled */
			ufshcd_disable_auto_bkops(hba);
		}
8243
		/*
8244 8245 8246
		 * If device needs to do BKOP or WB buffer flush during
		 * Hibern8, keep device power mode as "active power mode"
		 * and VCC supply.
8247
		 */
8248 8249 8250 8251 8252 8253 8254 8255 8256 8257 8258 8259 8260 8261
		hba->dev_info.b_rpm_dev_flush_capable =
			hba->auto_bkops_enabled ||
			(((req_link_state == UIC_LINK_HIBERN8_STATE) ||
			((req_link_state == UIC_LINK_ACTIVE_STATE) &&
			ufshcd_is_auto_hibern8_enabled(hba))) &&
			ufshcd_wb_need_flush(hba));
	}

	if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
		if ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
		    !ufshcd_is_runtime_pm(pm_op)) {
			/* ensure that bkops is disabled */
			ufshcd_disable_auto_bkops(hba);
		}
8262

8263 8264 8265 8266 8267
		if (!hba->dev_info.b_rpm_dev_flush_capable) {
			ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
			if (ret)
				goto enable_gating;
		}
8268 8269
	}

8270
	flush_work(&hba->eeh_work);
8271 8272 8273 8274 8275 8276 8277 8278 8279 8280 8281 8282
	ret = ufshcd_link_state_transition(hba, req_link_state, 1);
	if (ret)
		goto set_dev_active;

	ufshcd_vreg_set_lpm(hba);

disable_clks:
	/*
	 * Call vendor specific suspend callback. As these callbacks may access
	 * vendor specific host controller register space call them before the
	 * host clocks are ON.
	 */
8283 8284 8285
	ret = ufshcd_vops_suspend(hba, pm_op);
	if (ret)
		goto set_link_active;
8286 8287 8288 8289 8290
	/*
	 * Disable the host irq as host controller as there won't be any
	 * host controller transaction expected till resume.
	 */
	ufshcd_disable_irq(hba);
8291 8292 8293 8294 8295 8296 8297

	if (!ufshcd_is_link_active(hba))
		ufshcd_setup_clocks(hba, false);
	else
		/* If link is active, device ref_clk can't be switched off */
		__ufshcd_setup_clocks(hba, false, true);

8298
	hba->clk_gating.state = CLKS_OFF;
8299
	trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
8300

8301 8302 8303 8304 8305
	/* Put the host controller in low power mode if possible */
	ufshcd_hba_vreg_set_lpm(hba);
	goto out;

set_link_active:
8306 8307
	if (hba->clk_scaling.is_allowed)
		ufshcd_resume_clkscaling(hba);
8308 8309 8310 8311 8312 8313 8314 8315
	ufshcd_vreg_set_hpm(hba);
	if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
		ufshcd_set_link_active(hba);
	else if (ufshcd_is_link_off(hba))
		ufshcd_host_reset_and_restore(hba);
set_dev_active:
	if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
		ufshcd_disable_auto_bkops(hba);
8316
enable_gating:
8317 8318
	if (hba->clk_scaling.is_allowed)
		ufshcd_resume_clkscaling(hba);
8319
	hba->clk_gating.is_suspended = false;
8320
	hba->dev_info.b_rpm_dev_flush_capable = false;
8321
	ufshcd_release(hba);
8322
out:
8323 8324 8325 8326 8327
	if (hba->dev_info.b_rpm_dev_flush_capable) {
		schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
			msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
	}

8328
	hba->pm_op_in_progress = 0;
8329

8330 8331
	if (ret)
		ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
8332
	return ret;
8333 8334 8335
}

/**
8336
 * ufshcd_resume - helper function for resume operations
8337
 * @hba: per adapter instance
8338
 * @pm_op: runtime PM or system PM
8339
 *
8340 8341 8342 8343
 * This function basically brings the UFS device, UniPro link and controller
 * to active state.
 *
 * Returns 0 for success and non-zero for failure
8344
 */
8345
static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8346
{
8347 8348 8349 8350 8351 8352 8353 8354 8355 8356 8357 8358 8359
	int ret;
	enum uic_link_state old_link_state;

	hba->pm_op_in_progress = 1;
	old_link_state = hba->uic_link_state;

	ufshcd_hba_vreg_set_hpm(hba);
	/* Make sure clocks are enabled before accessing controller */
	ret = ufshcd_setup_clocks(hba, true);
	if (ret)
		goto out;

	/* enable the host irq as host controller would be active soon */
C
Can Guo 已提交
8360
	ufshcd_enable_irq(hba);
8361 8362 8363 8364 8365

	ret = ufshcd_vreg_set_hpm(hba);
	if (ret)
		goto disable_irq_and_vops_clks;

8366
	/*
8367 8368 8369
	 * Call vendor specific resume callback. As these callbacks may access
	 * vendor specific host controller register space call them when the
	 * host clocks are ON.
8370
	 */
8371 8372 8373
	ret = ufshcd_vops_resume(hba, pm_op);
	if (ret)
		goto disable_vreg;
8374 8375 8376 8377 8378 8379 8380 8381 8382

	if (ufshcd_is_link_hibern8(hba)) {
		ret = ufshcd_uic_hibern8_exit(hba);
		if (!ret)
			ufshcd_set_link_active(hba);
		else
			goto vendor_suspend;
	} else if (ufshcd_is_link_off(hba)) {
		/*
8383 8384 8385 8386 8387 8388
		 * A full initialization of the host and the device is
		 * required since the link was put to off during suspend.
		 */
		ret = ufshcd_reset_and_restore(hba);
		/*
		 * ufshcd_reset_and_restore() should have already
8389 8390 8391 8392 8393 8394 8395 8396 8397 8398 8399 8400
		 * set the link state as active
		 */
		if (ret || !ufshcd_is_link_active(hba))
			goto vendor_suspend;
	}

	if (!ufshcd_is_ufs_dev_active(hba)) {
		ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
		if (ret)
			goto set_old_link_state;
	}

8401 8402 8403 8404 8405 8406 8407 8408 8409
	if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
		ufshcd_enable_auto_bkops(hba);
	else
		/*
		 * If BKOPs operations are urgently needed at this moment then
		 * keep auto-bkops enabled or else disable it.
		 */
		ufshcd_urgent_bkops(hba);

8410 8411
	hba->clk_gating.is_suspended = false;

8412 8413
	if (hba->clk_scaling.is_allowed)
		ufshcd_resume_clkscaling(hba);
8414

8415 8416 8417
	/* Enable Auto-Hibernate if configured */
	ufshcd_auto_hibern8_enable(hba);

8418 8419 8420 8421 8422
	if (hba->dev_info.b_rpm_dev_flush_capable) {
		hba->dev_info.b_rpm_dev_flush_capable = false;
		cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
	}

8423 8424 8425
	/* Schedule clock gating in case of no access to UFS device yet */
	ufshcd_release(hba);

8426 8427 8428 8429 8430
	goto out;

set_old_link_state:
	ufshcd_link_state_transition(hba, old_link_state, 0);
vendor_suspend:
8431
	ufshcd_vops_suspend(hba, pm_op);
8432 8433 8434 8435
disable_vreg:
	ufshcd_vreg_set_lpm(hba);
disable_irq_and_vops_clks:
	ufshcd_disable_irq(hba);
8436 8437
	if (hba->clk_scaling.is_allowed)
		ufshcd_suspend_clkscaling(hba);
8438 8439 8440
	ufshcd_setup_clocks(hba, false);
out:
	hba->pm_op_in_progress = 0;
8441 8442
	if (ret)
		ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
8443 8444 8445 8446 8447 8448 8449 8450 8451 8452 8453 8454 8455 8456
	return ret;
}

/**
 * ufshcd_system_suspend - system suspend routine
 * @hba: per adapter instance
 *
 * Check the description of ufshcd_suspend() function for more details.
 *
 * Returns 0 for success and non-zero for failure
 */
int ufshcd_system_suspend(struct ufs_hba *hba)
{
	int ret = 0;
8457
	ktime_t start = ktime_get();
8458 8459

	if (!hba || !hba->is_powered)
8460
		return 0;
8461

8462 8463 8464 8465 8466
	if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
	     hba->curr_dev_pwr_mode) &&
	    (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
	     hba->uic_link_state))
		goto out;
8467

8468
	if (pm_runtime_suspended(hba->dev)) {
8469 8470 8471 8472 8473 8474 8475 8476 8477 8478 8479 8480 8481 8482 8483
		/*
		 * UFS device and/or UFS link low power states during runtime
		 * suspend seems to be different than what is expected during
		 * system suspend. Hence runtime resume the devic & link and
		 * let the system suspend low power states to take effect.
		 * TODO: If resume takes longer time, we might have optimize
		 * it in future by not resuming everything if possible.
		 */
		ret = ufshcd_runtime_resume(hba);
		if (ret)
			goto out;
	}

	ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
out:
8484 8485
	trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
8486
		hba->curr_dev_pwr_mode, hba->uic_link_state);
D
Dolev Raviv 已提交
8487 8488
	if (!ret)
		hba->is_sys_suspended = true;
8489 8490 8491 8492 8493 8494 8495 8496 8497 8498
	return ret;
}
EXPORT_SYMBOL(ufshcd_system_suspend);

/**
 * ufshcd_system_resume - system resume routine
 * @hba: per adapter instance
 *
 * Returns 0 for success and non-zero for failure
 */
8499

8500 8501
int ufshcd_system_resume(struct ufs_hba *hba)
{
8502 8503 8504
	int ret = 0;
	ktime_t start = ktime_get();

8505 8506 8507 8508
	if (!hba)
		return -EINVAL;

	if (!hba->is_powered || pm_runtime_suspended(hba->dev))
8509 8510 8511 8512
		/*
		 * Let the runtime resume take care of resuming
		 * if runtime suspended.
		 */
8513 8514 8515 8516 8517 8518
		goto out;
	else
		ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
out:
	trace_ufshcd_system_resume(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
8519
		hba->curr_dev_pwr_mode, hba->uic_link_state);
8520 8521
	if (!ret)
		hba->is_sys_suspended = false;
8522
	return ret;
8523
}
8524
EXPORT_SYMBOL(ufshcd_system_resume);
8525

8526 8527 8528 8529 8530 8531 8532 8533
/**
 * ufshcd_runtime_suspend - runtime suspend routine
 * @hba: per adapter instance
 *
 * Check the description of ufshcd_suspend() function for more details.
 *
 * Returns 0 for success and non-zero for failure
 */
8534 8535
int ufshcd_runtime_suspend(struct ufs_hba *hba)
{
8536 8537 8538
	int ret = 0;
	ktime_t start = ktime_get();

8539 8540 8541 8542
	if (!hba)
		return -EINVAL;

	if (!hba->is_powered)
8543 8544 8545 8546 8547 8548
		goto out;
	else
		ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
out:
	trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
8549
		hba->curr_dev_pwr_mode, hba->uic_link_state);
8550
	return ret;
8551 8552 8553
}
EXPORT_SYMBOL(ufshcd_runtime_suspend);

8554 8555 8556 8557 8558 8559 8560 8561 8562 8563 8564 8565 8566 8567 8568 8569 8570 8571 8572 8573 8574
/**
 * ufshcd_runtime_resume - runtime resume routine
 * @hba: per adapter instance
 *
 * This function basically brings the UFS device, UniPro link and controller
 * to active state. Following operations are done in this function:
 *
 * 1. Turn on all the controller related clocks
 * 2. Bring the UniPro link out of Hibernate state
 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
 *    to active state.
 * 4. If auto-bkops is enabled on the device, disable it.
 *
 * So following would be the possible power state after this function return
 * successfully:
 *	S1: UFS device in Active state with VCC rail ON
 *	    UniPro link in Active state
 *	    All the UFS/UniPro controller clocks are ON
 *
 * Returns 0 for success and non-zero for failure
 */
8575 8576
int ufshcd_runtime_resume(struct ufs_hba *hba)
{
8577 8578 8579
	int ret = 0;
	ktime_t start = ktime_get();

8580 8581 8582 8583
	if (!hba)
		return -EINVAL;

	if (!hba->is_powered)
8584 8585 8586 8587 8588 8589
		goto out;
	else
		ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
out:
	trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
		ktime_to_us(ktime_sub(ktime_get(), start)),
8590
		hba->curr_dev_pwr_mode, hba->uic_link_state);
8591
	return ret;
8592 8593 8594 8595 8596 8597 8598 8599 8600
}
EXPORT_SYMBOL(ufshcd_runtime_resume);

int ufshcd_runtime_idle(struct ufs_hba *hba)
{
	return 0;
}
EXPORT_SYMBOL(ufshcd_runtime_idle);

8601 8602 8603 8604 8605 8606 8607 8608 8609 8610 8611 8612
/**
 * ufshcd_shutdown - shutdown routine
 * @hba: per adapter instance
 *
 * This function would power off both UFS device and UFS link.
 *
 * Returns 0 always to allow force shutdown even in case of errors.
 */
int ufshcd_shutdown(struct ufs_hba *hba)
{
	int ret = 0;

8613 8614 8615
	if (!hba->is_powered)
		goto out;

8616 8617 8618 8619 8620 8621 8622 8623 8624 8625 8626 8627 8628 8629 8630 8631 8632 8633
	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
		goto out;

	if (pm_runtime_suspended(hba->dev)) {
		ret = ufshcd_runtime_resume(hba);
		if (ret)
			goto out;
	}

	ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
out:
	if (ret)
		dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
	/* allow force shutdown even in case of errors */
	return 0;
}
EXPORT_SYMBOL(ufshcd_shutdown);

8634
/**
8635
 * ufshcd_remove - de-allocate SCSI host and host memory space
8636
 *		data structure memory
8637
 * @hba: per adapter instance
8638
 */
8639
void ufshcd_remove(struct ufs_hba *hba)
8640
{
8641
	ufs_bsg_remove(hba);
8642
	ufs_sysfs_remove_nodes(hba->dev);
8643 8644
	blk_cleanup_queue(hba->tmf_queue);
	blk_mq_free_tag_set(&hba->tmf_tag_set);
8645
	blk_cleanup_queue(hba->cmd_queue);
8646
	scsi_remove_host(hba->host);
8647
	/* disable interrupts */
8648
	ufshcd_disable_intr(hba, hba->intr_mask);
8649
	ufshcd_hba_stop(hba);
8650

8651
	ufshcd_exit_clk_scaling(hba);
8652
	ufshcd_exit_clk_gating(hba);
8653 8654
	if (ufshcd_is_clkscaling_supported(hba))
		device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
8655
	ufshcd_hba_exit(hba);
8656 8657 8658
}
EXPORT_SYMBOL_GPL(ufshcd_remove);

8659 8660 8661 8662 8663 8664 8665 8666 8667 8668
/**
 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
 * @hba: pointer to Host Bus Adapter (HBA)
 */
void ufshcd_dealloc_host(struct ufs_hba *hba)
{
	scsi_host_put(hba->host);
}
EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);

A
Akinobu Mita 已提交
8669 8670 8671 8672 8673 8674 8675 8676 8677 8678 8679 8680 8681 8682 8683 8684
/**
 * ufshcd_set_dma_mask - Set dma mask based on the controller
 *			 addressing capability
 * @hba: per adapter instance
 *
 * Returns 0 for success, non-zero for failure
 */
static int ufshcd_set_dma_mask(struct ufs_hba *hba)
{
	if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
		if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
			return 0;
	}
	return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
}

8685
/**
8686
 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
8687 8688
 * @dev: pointer to device handle
 * @hba_handle: driver private handle
8689 8690
 * Returns 0 on success, non-zero value on failure
 */
8691
int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
8692 8693 8694
{
	struct Scsi_Host *host;
	struct ufs_hba *hba;
8695
	int err = 0;
8696

8697 8698 8699 8700
	if (!dev) {
		dev_err(dev,
		"Invalid memory reference for dev is NULL\n");
		err = -ENODEV;
8701 8702 8703 8704 8705 8706
		goto out_error;
	}

	host = scsi_host_alloc(&ufshcd_driver_template,
				sizeof(struct ufs_hba));
	if (!host) {
8707
		dev_err(dev, "scsi_host_alloc failed\n");
8708
		err = -ENOMEM;
8709
		goto out_error;
8710 8711 8712
	}
	hba = shost_priv(host);
	hba->host = host;
8713
	hba->dev = dev;
8714
	*hba_handle = hba;
8715
	hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
8716

8717 8718
	INIT_LIST_HEAD(&hba->clk_list_head);

8719 8720 8721 8722 8723
out_error:
	return err;
}
EXPORT_SYMBOL(ufshcd_alloc_host);

8724 8725 8726 8727 8728 8729 8730 8731 8732 8733 8734 8735
/* This function exists because blk_mq_alloc_tag_set() requires this. */
static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
				     const struct blk_mq_queue_data *qd)
{
	WARN_ON_ONCE(true);
	return BLK_STS_NOTSUPP;
}

static const struct blk_mq_ops ufshcd_tmf_ops = {
	.queue_rq = ufshcd_queue_tmf,
};

8736 8737 8738 8739 8740 8741 8742 8743 8744 8745 8746 8747 8748 8749 8750 8751 8752 8753 8754 8755
/**
 * ufshcd_init - Driver initialization routine
 * @hba: per-adapter instance
 * @mmio_base: base register address
 * @irq: Interrupt line of device
 * Returns 0 on success, non-zero value on failure
 */
int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
{
	int err;
	struct Scsi_Host *host = hba->host;
	struct device *dev = hba->dev;

	if (!mmio_base) {
		dev_err(hba->dev,
		"Invalid memory reference for mmio_base is NULL\n");
		err = -ENODEV;
		goto out_error;
	}

8756 8757
	hba->mmio_base = mmio_base;
	hba->irq = irq;
8758
	hba->vps = &ufs_hba_vps;
8759

8760
	err = ufshcd_hba_init(hba);
8761 8762 8763
	if (err)
		goto out_error;

8764 8765 8766 8767 8768 8769
	/* Read capabilities registers */
	ufshcd_hba_capabilities(hba);

	/* Get UFS version supported by the controller */
	hba->ufs_version = ufshcd_get_ufs_version(hba);

8770 8771 8772 8773 8774 8775 8776
	if ((hba->ufs_version != UFSHCI_VERSION_10) &&
	    (hba->ufs_version != UFSHCI_VERSION_11) &&
	    (hba->ufs_version != UFSHCI_VERSION_20) &&
	    (hba->ufs_version != UFSHCI_VERSION_21))
		dev_err(hba->dev, "invalid UFS version 0x%x\n",
			hba->ufs_version);

8777 8778 8779
	/* Get Interrupt bit mask per version */
	hba->intr_mask = ufshcd_get_intr_mask(hba);

A
Akinobu Mita 已提交
8780 8781 8782 8783 8784 8785
	err = ufshcd_set_dma_mask(hba);
	if (err) {
		dev_err(hba->dev, "set dma mask failed\n");
		goto out_disable;
	}

8786 8787 8788
	/* Allocate memory for host memory space */
	err = ufshcd_memory_alloc(hba);
	if (err) {
8789 8790
		dev_err(hba->dev, "Memory allocation failed\n");
		goto out_disable;
8791 8792 8793 8794 8795 8796 8797 8798
	}

	/* Configure LRB */
	ufshcd_host_memory_configure(hba);

	host->can_queue = hba->nutrs;
	host->cmd_per_lun = hba->nutrs;
	host->max_id = UFSHCD_MAX_ID;
8799
	host->max_lun = UFS_MAX_LUNS;
8800 8801
	host->max_channel = UFSHCD_MAX_CHANNEL;
	host->unique_id = host->host_no;
8802
	host->max_cmd_len = UFS_CDB_SIZE;
8803

D
Dolev Raviv 已提交
8804 8805
	hba->max_pwr_info.is_valid = false;

8806
	/* Initialize work queues */
8807
	INIT_WORK(&hba->eh_work, ufshcd_err_handler);
8808
	INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
8809

8810 8811 8812
	/* Initialize UIC command mutex */
	mutex_init(&hba->uic_cmd_mutex);

8813 8814 8815
	/* Initialize mutex for device management commands */
	mutex_init(&hba->dev_cmd.lock);

8816 8817
	init_rwsem(&hba->clk_scaling_lock);

8818
	ufshcd_init_clk_gating(hba);
8819

8820 8821
	ufshcd_init_clk_scaling(hba);

8822 8823 8824 8825 8826 8827 8828 8829 8830 8831 8832 8833 8834 8835
	/*
	 * In order to avoid any spurious interrupt immediately after
	 * registering UFS controller interrupt handler, clear any pending UFS
	 * interrupt status and disable all the UFS interrupts.
	 */
	ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
		      REG_INTERRUPT_STATUS);
	ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
	/*
	 * Make sure that UFS interrupts are disabled and any pending interrupt
	 * status is cleared before registering UFS interrupt handler.
	 */
	mb();

8836
	/* IRQ registration */
8837
	err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
8838
	if (err) {
8839
		dev_err(hba->dev, "request irq failed\n");
8840
		goto exit_gating;
8841 8842
	} else {
		hba->is_irq_enabled = true;
8843 8844
	}

8845
	err = scsi_add_host(host, hba->dev);
8846
	if (err) {
8847
		dev_err(hba->dev, "scsi_add_host failed\n");
8848
		goto exit_gating;
8849 8850
	}

8851 8852 8853 8854 8855 8856
	hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
	if (IS_ERR(hba->cmd_queue)) {
		err = PTR_ERR(hba->cmd_queue);
		goto out_remove_scsi_host;
	}

8857 8858 8859 8860 8861 8862 8863 8864 8865 8866 8867 8868 8869 8870 8871
	hba->tmf_tag_set = (struct blk_mq_tag_set) {
		.nr_hw_queues	= 1,
		.queue_depth	= hba->nutmrs,
		.ops		= &ufshcd_tmf_ops,
		.flags		= BLK_MQ_F_NO_SCHED,
	};
	err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
	if (err < 0)
		goto free_cmd_queue;
	hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
	if (IS_ERR(hba->tmf_queue)) {
		err = PTR_ERR(hba->tmf_queue);
		goto free_tmf_tag_set;
	}

8872 8873 8874
	/* Reset the attached device */
	ufshcd_vops_device_reset(hba);

8875 8876
	/* Host controller enable */
	err = ufshcd_hba_enable(hba);
8877
	if (err) {
8878
		dev_err(hba->dev, "Host controller enable failed\n");
8879
		ufshcd_print_host_regs(hba);
8880
		ufshcd_print_host_state(hba);
8881
		goto free_tmf_queue;
8882
	}
8883

8884 8885 8886 8887 8888 8889 8890 8891 8892 8893 8894 8895
	/*
	 * Set the default power management level for runtime and system PM.
	 * Default power saving mode is to keep UFS link in Hibern8 state
	 * and UFS device in sleep state.
	 */
	hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
						UFS_SLEEP_PWR_MODE,
						UIC_LINK_HIBERN8_STATE);
	hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
						UFS_SLEEP_PWR_MODE,
						UIC_LINK_HIBERN8_STATE);

8896 8897 8898
	INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
			  ufshcd_rpm_dev_flush_recheck_work);

8899
	/* Set the default auto-hiberate idle timer value to 150 ms */
8900
	if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
8901 8902 8903 8904
		hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
			    FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
	}

8905 8906
	/* Hold auto suspend until async scan completes */
	pm_runtime_get_sync(dev);
8907
	atomic_set(&hba->scsi_block_reqs_cnt, 0);
8908
	/*
8909 8910 8911 8912
	 * We are assuming that device wasn't put in sleep/power-down
	 * state exclusively during the boot stage before kernel.
	 * This assumption helps avoid doing link startup twice during
	 * ufshcd_probe_hba().
8913
	 */
8914
	ufshcd_set_ufs_dev_active(hba);
8915

8916
	async_schedule(ufshcd_async_scan, hba);
8917
	ufs_sysfs_add_nodes(hba->dev);
8918

8919 8920
	return 0;

8921 8922 8923 8924
free_tmf_queue:
	blk_cleanup_queue(hba->tmf_queue);
free_tmf_tag_set:
	blk_mq_free_tag_set(&hba->tmf_tag_set);
8925 8926
free_cmd_queue:
	blk_cleanup_queue(hba->cmd_queue);
8927 8928
out_remove_scsi_host:
	scsi_remove_host(hba->host);
8929
exit_gating:
8930
	ufshcd_exit_clk_scaling(hba);
8931
	ufshcd_exit_clk_gating(hba);
8932
out_disable:
8933
	hba->is_irq_enabled = false;
8934
	ufshcd_hba_exit(hba);
8935 8936 8937 8938 8939 8940 8941
out_error:
	return err;
}
EXPORT_SYMBOL_GPL(ufshcd_init);

MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8942
MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8943 8944
MODULE_LICENSE("GPL");
MODULE_VERSION(UFSHCD_DRIVER_VERSION);