gpio-pca953x.c 32.4 KB
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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 *  PCA953x 4/8/16/24/40 bit I/O ports
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 *
 *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
 *  Copyright (C) 2007 Marvell International Ltd.
 *
 *  Derived from drivers/i2c/chips/pca9539.c
 */

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#include <linux/acpi.h>
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#include <linux/bitmap.h>
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#include <linux/gpio/driver.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of_platform.h>
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#include <linux/platform_data/pca953x.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <asm/unaligned.h>
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#define PCA953X_INPUT		0x00
#define PCA953X_OUTPUT		0x01
#define PCA953X_INVERT		0x02
#define PCA953X_DIRECTION	0x03
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#define REG_ADDR_MASK		GENMASK(5, 0)
#define REG_ADDR_EXT		BIT(6)
#define REG_ADDR_AI		BIT(7)
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#define PCA957X_IN		0x00
#define PCA957X_INVRT		0x01
#define PCA957X_BKEN		0x02
#define PCA957X_PUPD		0x03
#define PCA957X_CFG		0x04
#define PCA957X_OUT		0x05
#define PCA957X_MSK		0x06
#define PCA957X_INTS		0x07
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#define PCAL953X_OUT_STRENGTH	0x20
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#define PCAL953X_IN_LATCH	0x22
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#define PCAL953X_PULL_EN	0x23
#define PCAL953X_PULL_SEL	0x24
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#define PCAL953X_INT_MASK	0x25
#define PCAL953X_INT_STAT	0x26
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#define PCAL953X_OUT_CONF	0x27
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#define PCAL6524_INT_EDGE	0x28
#define PCAL6524_INT_CLR	0x2a
#define PCAL6524_IN_STATUS	0x2b
#define PCAL6524_OUT_INDCONF	0x2c
#define PCAL6524_DEBOUNCE	0x2d

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#define PCA_GPIO_MASK		GENMASK(7, 0)
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#define PCAL_GPIO_MASK		GENMASK(4, 0)
#define PCAL_PINCTRL_MASK	GENMASK(6, 5)
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#define PCA_INT			BIT(8)
#define PCA_PCAL		BIT(9)
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#define PCA_LATCH_INT		(PCA_PCAL | PCA_INT)
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#define PCA953X_TYPE		BIT(12)
#define PCA957X_TYPE		BIT(13)
#define PCA_TYPE_MASK		GENMASK(15, 12)
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#define PCA_CHIP_TYPE(x)	((x) & PCA_TYPE_MASK)
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static const struct i2c_device_id pca953x_id[] = {
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	{ "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
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	{ "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
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	{ "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
	{ "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
	{ "pca9536", 4  | PCA953X_TYPE, },
	{ "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
	{ "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
	{ "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
	{ "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
	{ "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
	{ "pca9556", 8  | PCA953X_TYPE, },
	{ "pca9557", 8  | PCA953X_TYPE, },
	{ "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
	{ "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
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	{ "pca9698", 40 | PCA953X_TYPE, },
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	{ "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
	{ "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
	{ "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
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	{ "max7310", 8  | PCA953X_TYPE, },
	{ "max7312", 16 | PCA953X_TYPE | PCA_INT, },
	{ "max7313", 16 | PCA953X_TYPE | PCA_INT, },
	{ "max7315", 8  | PCA953X_TYPE | PCA_INT, },
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	{ "max7318", 16 | PCA953X_TYPE | PCA_INT, },
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	{ "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
	{ "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
	{ "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
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	{ "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
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	{ "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
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	{ "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
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	{ "xra1202", 8  | PCA953X_TYPE },
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	{ }
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};
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MODULE_DEVICE_TABLE(i2c, pca953x_id);
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static const struct acpi_device_id pca953x_acpi_ids[] = {
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	{ "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
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	{ }
};
MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);

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#define MAX_BANK 5
#define BANK_SZ 8
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#define MAX_LINE	(MAX_BANK * BANK_SZ)
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#define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
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struct pca953x_reg_config {
	int direction;
	int output;
	int input;
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	int invert;
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};

static const struct pca953x_reg_config pca953x_regs = {
	.direction = PCA953X_DIRECTION,
	.output = PCA953X_OUTPUT,
	.input = PCA953X_INPUT,
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	.invert = PCA953X_INVERT,
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};

static const struct pca953x_reg_config pca957x_regs = {
	.direction = PCA957X_CFG,
	.output = PCA957X_OUT,
	.input = PCA957X_IN,
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	.invert = PCA957X_INVRT,
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};

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struct pca953x_chip {
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	unsigned gpio_start;
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	struct mutex i2c_lock;
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	struct regmap *regmap;
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#ifdef CONFIG_GPIO_PCA953X_IRQ
	struct mutex irq_lock;
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	DECLARE_BITMAP(irq_mask, MAX_LINE);
	DECLARE_BITMAP(irq_stat, MAX_LINE);
	DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
	DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
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	struct irq_chip irq_chip;
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#endif
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	atomic_t wakeup_path;
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	struct i2c_client *client;
	struct gpio_chip gpio_chip;
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	const char *const *names;
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	unsigned long driver_data;
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	struct regulator *regulator;
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	const struct pca953x_reg_config *regs;
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};

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static int pca953x_bank_shift(struct pca953x_chip *chip)
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{
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	return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
}
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#define PCA953x_BANK_INPUT	BIT(0)
#define PCA953x_BANK_OUTPUT	BIT(1)
#define PCA953x_BANK_POLARITY	BIT(2)
#define PCA953x_BANK_CONFIG	BIT(3)
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#define PCA957x_BANK_INPUT	BIT(0)
#define PCA957x_BANK_POLARITY	BIT(1)
#define PCA957x_BANK_BUSHOLD	BIT(2)
#define PCA957x_BANK_CONFIG	BIT(4)
#define PCA957x_BANK_OUTPUT	BIT(5)

#define PCAL9xxx_BANK_IN_LATCH	BIT(8 + 2)
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#define PCAL9xxx_BANK_PULL_EN	BIT(8 + 3)
#define PCAL9xxx_BANK_PULL_SEL	BIT(8 + 4)
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#define PCAL9xxx_BANK_IRQ_MASK	BIT(8 + 5)
#define PCAL9xxx_BANK_IRQ_STAT	BIT(8 + 6)

/*
 * We care about the following registers:
 * - Standard set, below 0x40, each port can be replicated up to 8 times
 *   - PCA953x standard
 *     Input port			0x00 + 0 * bank_size	R
 *     Output port			0x00 + 1 * bank_size	RW
 *     Polarity Inversion port		0x00 + 2 * bank_size	RW
 *     Configuration port		0x00 + 3 * bank_size	RW
 *   - PCA957x with mixed up registers
 *     Input port			0x00 + 0 * bank_size	R
 *     Polarity Inversion port		0x00 + 1 * bank_size	RW
 *     Bus hold port			0x00 + 2 * bank_size	RW
 *     Configuration port		0x00 + 4 * bank_size	RW
 *     Output port			0x00 + 5 * bank_size	RW
 *
 * - Extended set, above 0x40, often chip specific.
 *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
 *     Input latch register		0x40 + 2 * bank_size	RW
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 *     Pull-up/pull-down enable reg	0x40 + 3 * bank_size    RW
 *     Pull-up/pull-down select reg	0x40 + 4 * bank_size    RW
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 *     Interrupt mask register		0x40 + 5 * bank_size	RW
 *     Interrupt status register	0x40 + 6 * bank_size	R
 *
 * - Registers with bit 0x80 set, the AI bit
 *   The bit is cleared and the registers fall into one of the
 *   categories above.
 */

static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
				   u32 checkbank)
{
	int bank_shift = pca953x_bank_shift(chip);
	int bank = (reg & REG_ADDR_MASK) >> bank_shift;
	int offset = reg & (BIT(bank_shift) - 1);

	/* Special PCAL extended register check. */
	if (reg & REG_ADDR_EXT) {
		if (!(chip->driver_data & PCA_PCAL))
			return false;
		bank += 8;
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	}

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	/* Register is not in the matching bank. */
	if (!(BIT(bank) & checkbank))
		return false;

	/* Register is not within allowed range of bank. */
	if (offset >= NBANK(chip))
		return false;

	return true;
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}

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static bool pca953x_readable_register(struct device *dev, unsigned int reg)
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{
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	struct pca953x_chip *chip = dev_get_drvdata(dev);
	u32 bank;
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	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
		bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
		       PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
	} else {
		bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
		       PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
		       PCA957x_BANK_BUSHOLD;
	}
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	if (chip->driver_data & PCA_PCAL) {
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		bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
			PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
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			PCAL9xxx_BANK_IRQ_STAT;
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	}

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	return pca953x_check_register(chip, reg, bank);
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}

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static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
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{
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	struct pca953x_chip *chip = dev_get_drvdata(dev);
	u32 bank;
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	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
		bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
			PCA953x_BANK_CONFIG;
	} else {
		bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
			PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
	}
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	if (chip->driver_data & PCA_PCAL)
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		bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
			PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
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	return pca953x_check_register(chip, reg, bank);
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}

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static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
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{
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	struct pca953x_chip *chip = dev_get_drvdata(dev);
	u32 bank;
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	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
		bank = PCA953x_BANK_INPUT;
	else
		bank = PCA957x_BANK_INPUT;

	if (chip->driver_data & PCA_PCAL)
		bank |= PCAL9xxx_BANK_IRQ_STAT;
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	return pca953x_check_register(chip, reg, bank);
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}
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static const struct regmap_config pca953x_i2c_regmap = {
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	.reg_bits = 8,
	.val_bits = 8,

	.readable_reg = pca953x_readable_register,
	.writeable_reg = pca953x_writeable_register,
	.volatile_reg = pca953x_volatile_register,

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	.disable_locking = true,
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	.cache_type = REGCACHE_RBTREE,
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	.max_register = 0x7f,
};

static const struct regmap_config pca953x_ai_i2c_regmap = {
	.reg_bits = 8,
	.val_bits = 8,

	.read_flag_mask = REG_ADDR_AI,
	.write_flag_mask = REG_ADDR_AI,

	.readable_reg = pca953x_readable_register,
	.writeable_reg = pca953x_writeable_register,
	.volatile_reg = pca953x_volatile_register,

	.cache_type = REGCACHE_RBTREE,
	.max_register = 0x7f,
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};

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static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off)
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{
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	int bank_shift = pca953x_bank_shift(chip);
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	int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
	int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
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	u8 regaddr = pinctrl | addr | (off / BANK_SZ);

	return regaddr;
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}

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static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
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{
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	u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
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	u8 value[MAX_BANK];
	int i, ret;

	for (i = 0; i < NBANK(chip); i++)
		value[i] = bitmap_get_value8(val, i * BANK_SZ);
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	ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
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	if (ret < 0) {
		dev_err(&chip->client->dev, "failed writing register\n");
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		return ret;
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	}

	return 0;
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}

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static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
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{
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	u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
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	u8 value[MAX_BANK];
	int i, ret;
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	ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
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	if (ret < 0) {
		dev_err(&chip->client->dev, "failed reading register\n");
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		return ret;
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	}

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	for (i = 0; i < NBANK(chip); i++)
		bitmap_set_value8(val, value[i], i * BANK_SZ);

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	return 0;
}

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static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
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{
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	struct pca953x_chip *chip = gpiochip_get_data(gc);
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	u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
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	u8 bit = BIT(off % BANK_SZ);
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	int ret;
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	mutex_lock(&chip->i2c_lock);
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	ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
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	mutex_unlock(&chip->i2c_lock);
	return ret;
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}

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static int pca953x_gpio_direction_output(struct gpio_chip *gc,
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		unsigned off, int val)
{
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	struct pca953x_chip *chip = gpiochip_get_data(gc);
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	u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
	u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
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	u8 bit = BIT(off % BANK_SZ);
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	int ret;
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	mutex_lock(&chip->i2c_lock);
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	/* set output level */
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	ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
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	if (ret)
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		goto exit;
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	/* then direction */
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	ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
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exit:
	mutex_unlock(&chip->i2c_lock);
	return ret;
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}

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static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
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{
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	struct pca953x_chip *chip = gpiochip_get_data(gc);
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	u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off);
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	u8 bit = BIT(off % BANK_SZ);
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	u32 reg_val;
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	int ret;
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	mutex_lock(&chip->i2c_lock);
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	ret = regmap_read(chip->regmap, inreg, &reg_val);
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	mutex_unlock(&chip->i2c_lock);
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	if (ret < 0) {
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		/*
		 * NOTE:
		 * diagnostic already emitted; that's all we should
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		 * do unless gpio_*_value_cansleep() calls become different
		 * from their nonsleeping siblings (and report faults).
		 */
		return 0;
	}

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	return !!(reg_val & bit);
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}

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static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
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{
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	struct pca953x_chip *chip = gpiochip_get_data(gc);
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	u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
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	u8 bit = BIT(off % BANK_SZ);
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	mutex_lock(&chip->i2c_lock);
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	regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
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	mutex_unlock(&chip->i2c_lock);
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}

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static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
{
	struct pca953x_chip *chip = gpiochip_get_data(gc);
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	u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
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	u8 bit = BIT(off % BANK_SZ);
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	u32 reg_val;
	int ret;

	mutex_lock(&chip->i2c_lock);
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	ret = regmap_read(chip->regmap, dirreg, &reg_val);
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	mutex_unlock(&chip->i2c_lock);
	if (ret < 0)
		return ret;

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	if (reg_val & bit)
		return GPIO_LINE_DIRECTION_IN;

	return GPIO_LINE_DIRECTION_OUT;
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}

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static int pca953x_gpio_get_multiple(struct gpio_chip *gc,
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				     unsigned long *mask, unsigned long *bits)
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{
	struct pca953x_chip *chip = gpiochip_get_data(gc);
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	DECLARE_BITMAP(reg_val, MAX_LINE);
	int ret;

	mutex_lock(&chip->i2c_lock);
	ret = pca953x_read_regs(chip, chip->regs->input, reg_val);
	mutex_unlock(&chip->i2c_lock);
	if (ret)
		return ret;

	bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
	return 0;
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}

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static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
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				      unsigned long *mask, unsigned long *bits)
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{
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	struct pca953x_chip *chip = gpiochip_get_data(gc);
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	DECLARE_BITMAP(reg_val, MAX_LINE);
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	int ret;
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	mutex_lock(&chip->i2c_lock);
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	ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
	if (ret)
		goto exit;

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	bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
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	pca953x_write_regs(chip, chip->regs->output, reg_val);
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exit:
	mutex_unlock(&chip->i2c_lock);
}

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static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
					 unsigned int offset,
					 unsigned long config)
{
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	u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset);
	u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset);
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	u8 bit = BIT(offset % BANK_SZ);
	int ret;

	/*
	 * pull-up/pull-down configuration requires PCAL extended
	 * registers
	 */
	if (!(chip->driver_data & PCA_PCAL))
		return -ENOTSUPP;

	mutex_lock(&chip->i2c_lock);

	/* Disable pull-up/pull-down */
	ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
	if (ret)
		goto exit;

	/* Configure pull-up/pull-down */
	if (config == PIN_CONFIG_BIAS_PULL_UP)
		ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
	else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
		ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
	if (ret)
		goto exit;

	/* Enable pull-up/pull-down */
	ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);

exit:
	mutex_unlock(&chip->i2c_lock);
	return ret;
}

static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
				   unsigned long config)
{
	struct pca953x_chip *chip = gpiochip_get_data(gc);

	switch (config) {
	case PIN_CONFIG_BIAS_PULL_UP:
	case PIN_CONFIG_BIAS_PULL_DOWN:
		return pca953x_gpio_set_pull_up_down(chip, offset, config);
	default:
		return -ENOTSUPP;
	}
}

554
static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
555 556 557 558 559
{
	struct gpio_chip *gc;

	gc = &chip->gpio_chip;

560 561 562 563
	gc->direction_input  = pca953x_gpio_direction_input;
	gc->direction_output = pca953x_gpio_direction_output;
	gc->get = pca953x_gpio_get_value;
	gc->set = pca953x_gpio_set_value;
564
	gc->get_direction = pca953x_gpio_get_direction;
565
	gc->get_multiple = pca953x_gpio_get_multiple;
566
	gc->set_multiple = pca953x_gpio_set_multiple;
567
	gc->set_config = pca953x_gpio_set_config;
568
	gc->can_sleep = true;
569 570

	gc->base = chip->gpio_start;
571
	gc->ngpio = gpios;
572
	gc->label = dev_name(&chip->client->dev);
573
	gc->parent = &chip->client->dev;
574
	gc->owner = THIS_MODULE;
575
	gc->names = chip->names;
576 577
}

578
#ifdef CONFIG_GPIO_PCA953X_IRQ
579
static void pca953x_irq_mask(struct irq_data *d)
580
{
581
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
582
	struct pca953x_chip *chip = gpiochip_get_data(gc);
583
	irq_hw_number_t hwirq = irqd_to_hwirq(d);
584

585
	clear_bit(hwirq, chip->irq_mask);
586 587
}

588
static void pca953x_irq_unmask(struct irq_data *d)
589
{
590
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
591
	struct pca953x_chip *chip = gpiochip_get_data(gc);
592
	irq_hw_number_t hwirq = irqd_to_hwirq(d);
593

594
	set_bit(hwirq, chip->irq_mask);
595 596
}

597 598 599 600 601
static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct pca953x_chip *chip = gpiochip_get_data(gc);

602 603 604 605 606
	if (on)
		atomic_inc(&chip->wakeup_path);
	else
		atomic_dec(&chip->wakeup_path);

607 608 609
	return irq_set_irq_wake(chip->client->irq, on);
}

610
static void pca953x_irq_bus_lock(struct irq_data *d)
611
{
612
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
613
	struct pca953x_chip *chip = gpiochip_get_data(gc);
614 615 616 617

	mutex_lock(&chip->irq_lock);
}

618
static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
619
{
620
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
621
	struct pca953x_chip *chip = gpiochip_get_data(gc);
622 623 624
	DECLARE_BITMAP(irq_mask, MAX_LINE);
	DECLARE_BITMAP(reg_direction, MAX_LINE);
	int level;
625

626
	pca953x_read_regs(chip, chip->regs->direction, reg_direction);
627 628 629 630 631

	if (chip->driver_data & PCA_PCAL) {
		/* Enable latch on interrupt-enabled inputs */
		pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);

632
		bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
633 634

		/* Unmask enabled interrupts */
635
		pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
636
	}
637

638 639 640
	bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
	bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);

641
	/* Look for any newly setup interrupt */
642 643
	for_each_set_bit(level, irq_mask, gc->ngpio)
		pca953x_gpio_direction_input(&chip->gpio_chip, level);
644 645 646 647

	mutex_unlock(&chip->irq_lock);
}

648
static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
649
{
650
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
651
	struct pca953x_chip *chip = gpiochip_get_data(gc);
652
	irq_hw_number_t hwirq = irqd_to_hwirq(d);
653 654 655

	if (!(type & IRQ_TYPE_EDGE_BOTH)) {
		dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
656
			d->irq, type);
657 658 659
		return -EINVAL;
	}

660 661
	assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
	assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
662

663
	return 0;
664 665
}

666 667
static void pca953x_irq_shutdown(struct irq_data *d)
{
668 669
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct pca953x_chip *chip = gpiochip_get_data(gc);
670
	irq_hw_number_t hwirq = irqd_to_hwirq(d);
671

672 673
	clear_bit(hwirq, chip->irq_trig_raise);
	clear_bit(hwirq, chip->irq_trig_fall);
674 675
}

676
static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
677
{
678 679 680 681 682 683 684
	struct gpio_chip *gc = &chip->gpio_chip;
	DECLARE_BITMAP(reg_direction, MAX_LINE);
	DECLARE_BITMAP(old_stat, MAX_LINE);
	DECLARE_BITMAP(cur_stat, MAX_LINE);
	DECLARE_BITMAP(new_stat, MAX_LINE);
	DECLARE_BITMAP(trigger, MAX_LINE);
	int ret;
685

686 687 688 689 690 691 692
	if (chip->driver_data & PCA_PCAL) {
		/* Read the current interrupt status from the device */
		ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
		if (ret)
			return false;

		/* Check latched inputs and clear interrupt status */
693
		ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
694 695 696
		if (ret)
			return false;

697 698 699 700
		/* Apply filter for rising/falling edge selection */
		bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);

		bitmap_and(pending, new_stat, trigger, gc->ngpio);
701

702
		return !bitmap_empty(pending, gc->ngpio);
703 704
	}

B
Bartosz Golaszewski 已提交
705
	ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
706
	if (ret)
707
		return false;
708 709

	/* Remove output pins from the equation */
710
	pca953x_read_regs(chip, chip->regs->direction, reg_direction);
711

712
	bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
713

714 715 716
	bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
	bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
	bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
717

718
	if (bitmap_empty(trigger, gc->ngpio))
719
		return false;
720

721
	bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
722

723 724 725 726
	bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
	bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
	bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
	bitmap_and(pending, new_stat, trigger, gc->ngpio);
727

728
	return !bitmap_empty(pending, gc->ngpio);
729 730 731 732 733
}

static irqreturn_t pca953x_irq_handler(int irq, void *devid)
{
	struct pca953x_chip *chip = devid;
734 735 736
	struct gpio_chip *gc = &chip->gpio_chip;
	DECLARE_BITMAP(pending, MAX_LINE);
	int level;
737

738
	if (!pca953x_irq_pending(chip, pending))
739
		return IRQ_NONE;
740

741 742
	for_each_set_bit(level, pending, gc->ngpio)
		handle_nested_irq(irq_find_mapping(gc->irq.domain, level));
743

744
	return IRQ_HANDLED;
745 746
}

747
static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
748 749
{
	struct i2c_client *client = chip->client;
750
	struct irq_chip *irq_chip = &chip->irq_chip;
751 752 753
	DECLARE_BITMAP(reg_direction, MAX_LINE);
	DECLARE_BITMAP(irq_stat, MAX_LINE);
	int ret;
754

755 756
	if (!client->irq)
		return 0;
757

758 759
	if (irq_base == -1)
		return 0;
760

761 762
	if (!(chip->driver_data & PCA_INT))
		return 0;
763

764
	ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
765 766 767 768 769 770 771 772
	if (ret)
		return ret;

	/*
	 * There is no way to know which GPIO line generated the
	 * interrupt.  We have to rely on the previous read for
	 * this purpose.
	 */
773
	pca953x_read_regs(chip, chip->regs->direction, reg_direction);
774
	bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
775 776 777 778
	mutex_init(&chip->irq_lock);

	ret = devm_request_threaded_irq(&client->dev, client->irq,
					NULL, pca953x_irq_handler,
779
					IRQF_ONESHOT | IRQF_SHARED,
780 781 782 783 784
					dev_name(&client->dev), chip);
	if (ret) {
		dev_err(&client->dev, "failed to request irq %d\n",
			client->irq);
		return ret;
785 786
	}

787 788 789
	irq_chip->name = dev_name(&chip->client->dev);
	irq_chip->irq_mask = pca953x_irq_mask;
	irq_chip->irq_unmask = pca953x_irq_unmask;
790
	irq_chip->irq_set_wake = pca953x_irq_set_wake;
791 792 793 794 795
	irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
	irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
	irq_chip->irq_set_type = pca953x_irq_set_type;
	irq_chip->irq_shutdown = pca953x_irq_shutdown;

796 797 798
	ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
					  irq_base, handle_simple_irq,
					  IRQ_TYPE_NONE);
799 800 801 802 803 804
	if (ret) {
		dev_err(&client->dev,
			"could not connect irqchip to gpiochip\n");
		return ret;
	}

805
	gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
806

807 808 809 810 811
	return 0;
}

#else /* CONFIG_GPIO_PCA953X_IRQ */
static int pca953x_irq_setup(struct pca953x_chip *chip,
812
			     int irq_base)
813 814 815
{
	struct i2c_client *client = chip->client;

816
	if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
817 818 819 820 821 822
		dev_warn(&client->dev, "interrupt support not compiled in\n");

	return 0;
}
#endif

823
static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
824
{
825
	DECLARE_BITMAP(val, MAX_LINE);
826 827
	int ret;

828 829
	ret = regcache_sync_region(chip->regmap, chip->regs->output,
				   chip->regs->output + NBANK(chip));
830
	if (ret)
831 832
		goto out;

833 834
	ret = regcache_sync_region(chip->regmap, chip->regs->direction,
				   chip->regs->direction + NBANK(chip));
835
	if (ret)
836 837 838
		goto out;

	/* set platform specific polarity inversion */
839
	if (invert)
840
		bitmap_fill(val, MAX_LINE);
841
	else
842
		bitmap_zero(val, MAX_LINE);
843

844
	ret = pca953x_write_regs(chip, chip->regs->invert, val);
845 846 847 848
out:
	return ret;
}

B
Bill Pemberton 已提交
849
static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
850
{
851
	DECLARE_BITMAP(val, MAX_LINE);
852 853
	int ret;

854
	ret = device_pca95xx_init(chip, invert);
855 856
	if (ret)
		goto out;
857

858
	/* To enable register 6, 7 to control pull up and pull down */
859
	memset(val, 0x02, NBANK(chip));
860 861 862
	ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
	if (ret)
		goto out;
863 864 865 866 867 868

	return 0;
out:
	return ret;
}

B
Bill Pemberton 已提交
869
static int pca953x_probe(struct i2c_client *client,
870
			 const struct i2c_device_id *i2c_id)
871
{
872 873
	struct pca953x_platform_data *pdata;
	struct pca953x_chip *chip;
874
	int irq_base = 0;
875
	int ret;
876
	u32 invert = 0;
877
	struct regulator *reg;
878
	const struct regmap_config *regmap_config;
879

880
	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
881 882 883
	if (chip == NULL)
		return -ENOMEM;

J
Jingoo Han 已提交
884
	pdata = dev_get_platdata(&client->dev);
885 886 887 888 889 890
	if (pdata) {
		irq_base = pdata->irq_base;
		chip->gpio_start = pdata->gpio_base;
		invert = pdata->invert;
		chip->names = pdata->names;
	} else {
891 892
		struct gpio_desc *reset_gpio;

893 894
		chip->gpio_start = -1;
		irq_base = 0;
895

896 897 898 899 900 901 902
		/*
		 * See if we need to de-assert a reset pin.
		 *
		 * There is no known ACPI-enabled platforms that are
		 * using "reset" GPIO. Otherwise any of those platform
		 * must use _DSD method with corresponding property.
		 */
903 904 905 906
		reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
						     GPIOD_OUT_LOW);
		if (IS_ERR(reset_gpio))
			return PTR_ERR(reset_gpio);
907
	}
908 909 910

	chip->client = client;

911 912 913 914 915 916 917 918 919 920 921 922 923 924
	reg = devm_regulator_get(&client->dev, "vcc");
	if (IS_ERR(reg)) {
		ret = PTR_ERR(reg);
		if (ret != -EPROBE_DEFER)
			dev_err(&client->dev, "reg get err: %d\n", ret);
		return ret;
	}
	ret = regulator_enable(reg);
	if (ret) {
		dev_err(&client->dev, "reg en err: %d\n", ret);
		return ret;
	}
	chip->regulator = reg;

925 926
	if (i2c_id) {
		chip->driver_data = i2c_id->driver_data;
927
	} else {
928 929 930 931 932 933
		const void *match;

		match = device_get_match_data(&client->dev);
		if (!match) {
			ret = -ENODEV;
			goto err_exit;
934
		}
935 936

		chip->driver_data = (uintptr_t)match;
937 938
	}

939 940
	i2c_set_clientdata(client, chip);

941 942 943 944 945 946 947 948 949 950 951
	pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);

	if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
		dev_info(&client->dev, "using AI\n");
		regmap_config = &pca953x_ai_i2c_regmap;
	} else {
		dev_info(&client->dev, "using no AI\n");
		regmap_config = &pca953x_i2c_regmap;
	}

	chip->regmap = devm_regmap_init_i2c(client, regmap_config);
952 953 954 955 956
	if (IS_ERR(chip->regmap)) {
		ret = PTR_ERR(chip->regmap);
		goto err_exit;
	}

957 958
	regcache_mark_dirty(chip->regmap);

959
	mutex_init(&chip->i2c_lock);
960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975
	/*
	 * In case we have an i2c-mux controlled by a GPIO provided by an
	 * expander using the same driver higher on the device tree, read the
	 * i2c adapter nesting depth and use the retrieved value as lockdep
	 * subclass for chip->i2c_lock.
	 *
	 * REVISIT: This solution is not complete. It protects us from lockdep
	 * false positives when the expander controlling the i2c-mux is on
	 * a different level on the device tree, but not when it's on the same
	 * level on a different branch (in which case the subclass number
	 * would be the same).
	 *
	 * TODO: Once a correct solution is developed, a similar fix should be
	 * applied to all other i2c-controlled GPIO expanders (and potentially
	 * regmap-i2c).
	 */
976 977
	lockdep_set_subclass(&chip->i2c_lock,
			     i2c_adapter_depth(client->adapter));
978

979 980 981
	/* initialize cached registers from their original values.
	 * we can't share this chip with another i2c master.
	 */
982

983 984 985
	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
		chip->regs = &pca953x_regs;
		ret = device_pca95xx_init(chip, invert);
986
	} else {
987
		chip->regs = &pca957x_regs;
988
		ret = device_pca957x_init(chip, invert);
989
	}
990
	if (ret)
991
		goto err_exit;
992

993
	ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
994
	if (ret)
995
		goto err_exit;
996

997
	ret = pca953x_irq_setup(chip, irq_base);
998
	if (ret)
999
		goto err_exit;
1000

1001
	if (pdata && pdata->setup) {
1002
		ret = pdata->setup(client, chip->gpio_chip.base,
1003
				   chip->gpio_chip.ngpio, pdata->context);
1004 1005 1006 1007 1008
		if (ret < 0)
			dev_warn(&client->dev, "setup failed, %d\n", ret);
	}

	return 0;
1009 1010 1011 1012

err_exit:
	regulator_disable(chip->regulator);
	return ret;
1013 1014
}

1015
static int pca953x_remove(struct i2c_client *client)
1016
{
J
Jingoo Han 已提交
1017
	struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1018
	struct pca953x_chip *chip = i2c_get_clientdata(client);
1019
	int ret;
1020

1021
	if (pdata && pdata->teardown) {
1022
		ret = pdata->teardown(client, chip->gpio_chip.base,
1023
				      chip->gpio_chip.ngpio, pdata->context);
1024
		if (ret < 0)
1025
			dev_err(&client->dev, "teardown failed, %d\n", ret);
1026 1027
	} else {
		ret = 0;
1028 1029
	}

1030 1031 1032
	regulator_disable(chip->regulator);

	return ret;
1033 1034
}

1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046
#ifdef CONFIG_PM_SLEEP
static int pca953x_regcache_sync(struct device *dev)
{
	struct pca953x_chip *chip = dev_get_drvdata(dev);
	int ret;

	/*
	 * The ordering between direction and output is important,
	 * sync these registers first and only then sync the rest.
	 */
	ret = regcache_sync_region(chip->regmap, chip->regs->direction,
				   chip->regs->direction + NBANK(chip));
1047
	if (ret) {
1048 1049 1050 1051 1052 1053
		dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
		return ret;
	}

	ret = regcache_sync_region(chip->regmap, chip->regs->output,
				   chip->regs->output + NBANK(chip));
1054
	if (ret) {
1055 1056 1057 1058 1059 1060 1061 1062
		dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
		return ret;
	}

#ifdef CONFIG_GPIO_PCA953X_IRQ
	if (chip->driver_data & PCA_PCAL) {
		ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
					   PCAL953X_IN_LATCH + NBANK(chip));
1063
		if (ret) {
1064 1065 1066 1067 1068 1069 1070
			dev_err(dev, "Failed to sync INT latch registers: %d\n",
				ret);
			return ret;
		}

		ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
					   PCAL953X_INT_MASK + NBANK(chip));
1071
		if (ret) {
1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087
			dev_err(dev, "Failed to sync INT mask registers: %d\n",
				ret);
			return ret;
		}
	}
#endif

	return 0;
}

static int pca953x_suspend(struct device *dev)
{
	struct pca953x_chip *chip = dev_get_drvdata(dev);

	regcache_cache_only(chip->regmap, true);

1088 1089 1090 1091
	if (atomic_read(&chip->wakeup_path))
		device_set_wakeup_path(dev);
	else
		regulator_disable(chip->regulator);
1092 1093 1094 1095 1096 1097 1098 1099 1100

	return 0;
}

static int pca953x_resume(struct device *dev)
{
	struct pca953x_chip *chip = dev_get_drvdata(dev);
	int ret;

1101 1102
	if (!atomic_read(&chip->wakeup_path)) {
		ret = regulator_enable(chip->regulator);
1103
		if (ret) {
1104 1105 1106
			dev_err(dev, "Failed to enable regulator: %d\n", ret);
			return 0;
		}
1107 1108 1109 1110 1111 1112 1113 1114 1115
	}

	regcache_cache_only(chip->regmap, false);
	regcache_mark_dirty(chip->regmap);
	ret = pca953x_regcache_sync(dev);
	if (ret)
		return ret;

	ret = regcache_sync(chip->regmap);
1116
	if (ret) {
1117 1118 1119 1120 1121 1122 1123 1124
		dev_err(dev, "Failed to restore register map: %d\n", ret);
		return ret;
	}

	return 0;
}
#endif

1125 1126 1127 1128
/* convenience to stop overlong match-table lines */
#define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
#define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)

1129
static const struct of_device_id pca953x_dt_ids[] = {
1130
	{ .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145
	{ .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
	{ .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
	{ .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
	{ .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
	{ .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
	{ .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
	{ .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
	{ .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
	{ .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
	{ .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
	{ .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
	{ .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
	{ .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
	{ .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },

1146
	{ .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1147 1148
	{ .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
	{ .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1149

1150 1151 1152 1153
	{ .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
	{ .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
	{ .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
	{ .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1154
	{ .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1155 1156

	{ .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1157
	{ .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1158 1159 1160
	{ .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
	{ .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
	{ .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1161
	{ .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1162

1163
	{ .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1164
	{ .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1165 1166

	{ .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1167 1168 1169 1170 1171
	{ }
};

MODULE_DEVICE_TABLE(of, pca953x_dt_ids);

1172 1173
static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);

1174
static struct i2c_driver pca953x_driver = {
1175
	.driver = {
1176
		.name	= "pca953x",
1177
		.pm	= &pca953x_pm_ops,
1178
		.of_match_table = pca953x_dt_ids,
1179
		.acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1180
	},
1181 1182
	.probe		= pca953x_probe,
	.remove		= pca953x_remove,
1183
	.id_table	= pca953x_id,
1184 1185
};

1186
static int __init pca953x_init(void)
1187
{
1188
	return i2c_add_driver(&pca953x_driver);
1189
}
1190 1191 1192 1193
/* register after i2c postcore initcall and before
 * subsys initcalls that may rely on these GPIOs
 */
subsys_initcall(pca953x_init);
1194

1195
static void __exit pca953x_exit(void)
1196
{
1197
	i2c_del_driver(&pca953x_driver);
1198
}
1199
module_exit(pca953x_exit);
1200 1201

MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1202
MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1203
MODULE_LICENSE("GPL");