sdhci.c 47.2 KB
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/*
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Pierre Ossman 已提交
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 *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
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 *
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 *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
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 *
 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
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 *
 * Thanks to the following companies for their support:
 *
 *     - JMicron (hardware and technical support)
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 */

#include <linux/delay.h>
#include <linux/highmem.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include <linux/scatterlist.h>
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#include <linux/leds.h>

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#include <linux/mmc/host.h>

#include "sdhci.h"

#define DRIVER_NAME "sdhci"

#define DBG(f, x...) \
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	pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
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#if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
	defined(CONFIG_MMC_SDHCI_MODULE))
#define SDHCI_USE_LEDS_CLASS
#endif

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static unsigned int debug_quirks = 0;
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static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
static void sdhci_finish_data(struct sdhci_host *);

static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
static void sdhci_finish_command(struct sdhci_host *);

static void sdhci_dumpregs(struct sdhci_host *host)
{
	printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");

	printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
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		sdhci_readl(host, SDHCI_DMA_ADDRESS),
		sdhci_readw(host, SDHCI_HOST_VERSION));
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	printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
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		sdhci_readw(host, SDHCI_BLOCK_SIZE),
		sdhci_readw(host, SDHCI_BLOCK_COUNT));
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	printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
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		sdhci_readl(host, SDHCI_ARGUMENT),
		sdhci_readw(host, SDHCI_TRANSFER_MODE));
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	printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
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		sdhci_readl(host, SDHCI_PRESENT_STATE),
		sdhci_readb(host, SDHCI_HOST_CONTROL));
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	printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
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		sdhci_readb(host, SDHCI_POWER_CONTROL),
		sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
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	printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
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		sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
		sdhci_readw(host, SDHCI_CLOCK_CONTROL));
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	printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
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		sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
		sdhci_readl(host, SDHCI_INT_STATUS));
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	printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
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		sdhci_readl(host, SDHCI_INT_ENABLE),
		sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
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	printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
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		sdhci_readw(host, SDHCI_ACMD12_ERR),
		sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
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	printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
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		sdhci_readl(host, SDHCI_CAPABILITIES),
		sdhci_readl(host, SDHCI_MAX_CURRENT));
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	if (host->flags & SDHCI_USE_ADMA)
		printk(KERN_DEBUG DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n",
		       readl(host->ioaddr + SDHCI_ADMA_ERROR),
		       readl(host->ioaddr + SDHCI_ADMA_ADDRESS));

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	printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
}

/*****************************************************************************\
 *                                                                           *
 * Low level functions                                                       *
 *                                                                           *
\*****************************************************************************/

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static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
{
	u32 ier;

	ier = sdhci_readl(host, SDHCI_INT_ENABLE);
	ier &= ~clear;
	ier |= set;
	sdhci_writel(host, ier, SDHCI_INT_ENABLE);
	sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
}

static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs)
{
	sdhci_clear_set_irqs(host, 0, irqs);
}

static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs)
{
	sdhci_clear_set_irqs(host, irqs, 0);
}

static void sdhci_set_card_detection(struct sdhci_host *host, bool enable)
{
	u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT;

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	if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
		return;

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	if (enable)
		sdhci_unmask_irqs(host, irqs);
	else
		sdhci_mask_irqs(host, irqs);
}

static void sdhci_enable_card_detection(struct sdhci_host *host)
{
	sdhci_set_card_detection(host, true);
}

static void sdhci_disable_card_detection(struct sdhci_host *host)
{
	sdhci_set_card_detection(host, false);
}

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static void sdhci_reset(struct sdhci_host *host, u8 mask)
{
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	unsigned long timeout;
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	u32 uninitialized_var(ier);
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	if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
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		if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) &
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			SDHCI_CARD_PRESENT))
			return;
	}

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	if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
		ier = sdhci_readl(host, SDHCI_INT_ENABLE);

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	sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
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	if (mask & SDHCI_RESET_ALL)
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		host->clock = 0;

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	/* Wait max 100 ms */
	timeout = 100;

	/* hw clears the bit when it's done */
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	while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
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		if (timeout == 0) {
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			printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
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				mmc_hostname(host->mmc), (int)mask);
			sdhci_dumpregs(host);
			return;
		}
		timeout--;
		mdelay(1);
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	}
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	if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
		sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier);
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}

static void sdhci_init(struct sdhci_host *host)
{
	sdhci_reset(host, SDHCI_RESET_ALL);

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	sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK,
		SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
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		SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
		SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
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		SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE);
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}
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static void sdhci_reinit(struct sdhci_host *host)
{
	sdhci_init(host);
	sdhci_enable_card_detection(host);
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}

static void sdhci_activate_led(struct sdhci_host *host)
{
	u8 ctrl;

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	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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	ctrl |= SDHCI_CTRL_LED;
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	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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}

static void sdhci_deactivate_led(struct sdhci_host *host)
{
	u8 ctrl;

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	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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	ctrl &= ~SDHCI_CTRL_LED;
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	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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}

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#ifdef SDHCI_USE_LEDS_CLASS
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static void sdhci_led_control(struct led_classdev *led,
	enum led_brightness brightness)
{
	struct sdhci_host *host = container_of(led, struct sdhci_host, led);
	unsigned long flags;

	spin_lock_irqsave(&host->lock, flags);

	if (brightness == LED_OFF)
		sdhci_deactivate_led(host);
	else
		sdhci_activate_led(host);

	spin_unlock_irqrestore(&host->lock, flags);
}
#endif

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/*****************************************************************************\
 *                                                                           *
 * Core functions                                                            *
 *                                                                           *
\*****************************************************************************/

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static void sdhci_read_block_pio(struct sdhci_host *host)
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{
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	unsigned long flags;
	size_t blksize, len, chunk;
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	u32 uninitialized_var(scratch);
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	u8 *buf;
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	DBG("PIO reading\n");
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	blksize = host->data->blksz;
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	chunk = 0;
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	local_irq_save(flags);
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	while (blksize) {
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		if (!sg_miter_next(&host->sg_miter))
			BUG();
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		len = min(host->sg_miter.length, blksize);
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		blksize -= len;
		host->sg_miter.consumed = len;
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		buf = host->sg_miter.addr;
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		while (len) {
			if (chunk == 0) {
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				scratch = sdhci_readl(host, SDHCI_BUFFER);
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				chunk = 4;
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			}
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			*buf = scratch & 0xFF;

			buf++;
			scratch >>= 8;
			chunk--;
			len--;
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		}
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	}
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	sg_miter_stop(&host->sg_miter);

	local_irq_restore(flags);
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}
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static void sdhci_write_block_pio(struct sdhci_host *host)
{
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	unsigned long flags;
	size_t blksize, len, chunk;
	u32 scratch;
	u8 *buf;
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	DBG("PIO writing\n");

	blksize = host->data->blksz;
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	chunk = 0;
	scratch = 0;
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	local_irq_save(flags);
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	while (blksize) {
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		if (!sg_miter_next(&host->sg_miter))
			BUG();
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		len = min(host->sg_miter.length, blksize);

		blksize -= len;
		host->sg_miter.consumed = len;

		buf = host->sg_miter.addr;
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		while (len) {
			scratch |= (u32)*buf << (chunk * 8);

			buf++;
			chunk++;
			len--;

			if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
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				sdhci_writel(host, scratch, SDHCI_BUFFER);
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				chunk = 0;
				scratch = 0;
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			}
		}
	}
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	sg_miter_stop(&host->sg_miter);

	local_irq_restore(flags);
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}

static void sdhci_transfer_pio(struct sdhci_host *host)
{
	u32 mask;

	BUG_ON(!host->data);

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	if (host->blocks == 0)
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		return;

	if (host->data->flags & MMC_DATA_READ)
		mask = SDHCI_DATA_AVAILABLE;
	else
		mask = SDHCI_SPACE_AVAILABLE;

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	/*
	 * Some controllers (JMicron JMB38x) mess up the buffer bits
	 * for transfers < 4 bytes. As long as it is just one block,
	 * we can ignore the bits.
	 */
	if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) &&
		(host->data->blocks == 1))
		mask = ~0;

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	while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
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		if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY)
			udelay(100);

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		if (host->data->flags & MMC_DATA_READ)
			sdhci_read_block_pio(host);
		else
			sdhci_write_block_pio(host);
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		host->blocks--;
		if (host->blocks == 0)
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			break;
	}
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	DBG("PIO transfer complete.\n");
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}

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static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
{
	local_irq_save(*flags);
	return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
}

static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
{
	kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
	local_irq_restore(*flags);
}

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static int sdhci_adma_table_pre(struct sdhci_host *host,
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	struct mmc_data *data)
{
	int direction;

	u8 *desc;
	u8 *align;
	dma_addr_t addr;
	dma_addr_t align_addr;
	int len, offset;

	struct scatterlist *sg;
	int i;
	char *buffer;
	unsigned long flags;

	/*
	 * The spec does not specify endianness of descriptor table.
	 * We currently guess that it is LE.
	 */

	if (data->flags & MMC_DATA_READ)
		direction = DMA_FROM_DEVICE;
	else
		direction = DMA_TO_DEVICE;

	/*
	 * The ADMA descriptor table is mapped further down as we
	 * need to fill it with data first.
	 */

	host->align_addr = dma_map_single(mmc_dev(host->mmc),
		host->align_buffer, 128 * 4, direction);
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	if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
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		goto fail;
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	BUG_ON(host->align_addr & 0x3);

	host->sg_count = dma_map_sg(mmc_dev(host->mmc),
		data->sg, data->sg_len, direction);
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	if (host->sg_count == 0)
		goto unmap_align;
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	desc = host->adma_desc;
	align = host->align_buffer;

	align_addr = host->align_addr;

	for_each_sg(data->sg, sg, host->sg_count, i) {
		addr = sg_dma_address(sg);
		len = sg_dma_len(sg);

		/*
		 * The SDHCI specification states that ADMA
		 * addresses must be 32-bit aligned. If they
		 * aren't, then we use a bounce buffer for
		 * the (up to three) bytes that screw up the
		 * alignment.
		 */
		offset = (4 - (addr & 0x3)) & 0x3;
		if (offset) {
			if (data->flags & MMC_DATA_WRITE) {
				buffer = sdhci_kmap_atomic(sg, &flags);
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				WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
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				memcpy(align, buffer, offset);
				sdhci_kunmap_atomic(buffer, &flags);
			}

			desc[7] = (align_addr >> 24) & 0xff;
			desc[6] = (align_addr >> 16) & 0xff;
			desc[5] = (align_addr >> 8) & 0xff;
			desc[4] = (align_addr >> 0) & 0xff;

			BUG_ON(offset > 65536);

			desc[3] = (offset >> 8) & 0xff;
			desc[2] = (offset >> 0) & 0xff;

			desc[1] = 0x00;
			desc[0] = 0x21; /* tran, valid */

			align += 4;
			align_addr += 4;

			desc += 8;

			addr += offset;
			len -= offset;
		}

		desc[7] = (addr >> 24) & 0xff;
		desc[6] = (addr >> 16) & 0xff;
		desc[5] = (addr >> 8) & 0xff;
		desc[4] = (addr >> 0) & 0xff;

		BUG_ON(len > 65536);

		desc[3] = (len >> 8) & 0xff;
		desc[2] = (len >> 0) & 0xff;

		desc[1] = 0x00;
		desc[0] = 0x21; /* tran, valid */

		desc += 8;

		/*
		 * If this triggers then we have a calculation bug
		 * somewhere. :/
		 */
		WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
	}

	/*
	 * Add a terminating entry.
	 */
	desc[7] = 0;
	desc[6] = 0;
	desc[5] = 0;
	desc[4] = 0;

	desc[3] = 0;
	desc[2] = 0;

	desc[1] = 0x00;
	desc[0] = 0x03; /* nop, end, valid */

	/*
	 * Resync align buffer as we might have changed it.
	 */
	if (data->flags & MMC_DATA_WRITE) {
		dma_sync_single_for_device(mmc_dev(host->mmc),
			host->align_addr, 128 * 4, direction);
	}

	host->adma_addr = dma_map_single(mmc_dev(host->mmc),
		host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
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	if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
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		goto unmap_entries;
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	BUG_ON(host->adma_addr & 0x3);
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	return 0;

unmap_entries:
	dma_unmap_sg(mmc_dev(host->mmc), data->sg,
		data->sg_len, direction);
unmap_align:
	dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
		128 * 4, direction);
fail:
	return -EINVAL;
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}

static void sdhci_adma_table_post(struct sdhci_host *host,
	struct mmc_data *data)
{
	int direction;

	struct scatterlist *sg;
	int i, size;
	u8 *align;
	char *buffer;
	unsigned long flags;

	if (data->flags & MMC_DATA_READ)
		direction = DMA_FROM_DEVICE;
	else
		direction = DMA_TO_DEVICE;

	dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
		(128 * 2 + 1) * 4, DMA_TO_DEVICE);

	dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
		128 * 4, direction);

	if (data->flags & MMC_DATA_READ) {
		dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg,
			data->sg_len, direction);

		align = host->align_buffer;

		for_each_sg(data->sg, sg, host->sg_count, i) {
			if (sg_dma_address(sg) & 0x3) {
				size = 4 - (sg_dma_address(sg) & 0x3);

				buffer = sdhci_kmap_atomic(sg, &flags);
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				WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
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				memcpy(buffer, align, size);
				sdhci_kunmap_atomic(buffer, &flags);

				align += 4;
			}
		}
	}

	dma_unmap_sg(mmc_dev(host->mmc), data->sg,
		data->sg_len, direction);
}

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static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
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{
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	u8 count;
	unsigned target_timeout, current_timeout;
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	/*
	 * If the host controller provides us with an incorrect timeout
	 * value, just skip the check and use 0xE.  The hardware may take
	 * longer to time out, but that's much better than having a too-short
	 * timeout value.
	 */
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	if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL)
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		return 0xE;
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	/* timeout in us */
	target_timeout = data->timeout_ns / 1000 +
		data->timeout_clks / host->clock;
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	/*
	 * Figure out needed cycles.
	 * We do this in steps in order to fit inside a 32 bit int.
	 * The first step is the minimum timeout, which will have a
	 * minimum resolution of 6 bits:
	 * (1) 2^13*1000 > 2^22,
	 * (2) host->timeout_clk < 2^16
	 *     =>
	 *     (1) / (2) > 2^6
	 */
	count = 0;
	current_timeout = (1 << 13) * 1000 / host->timeout_clk;
	while (current_timeout < target_timeout) {
		count++;
		current_timeout <<= 1;
		if (count >= 0xF)
			break;
	}

	if (count >= 0xF) {
		printk(KERN_WARNING "%s: Too large timeout requested!\n",
			mmc_hostname(host->mmc));
		count = 0xE;
	}

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	return count;
}

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static void sdhci_set_transfer_irqs(struct sdhci_host *host)
{
	u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
	u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;

	if (host->flags & SDHCI_REQ_USE_DMA)
		sdhci_clear_set_irqs(host, pio_irqs, dma_irqs);
	else
		sdhci_clear_set_irqs(host, dma_irqs, pio_irqs);
}

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static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
{
	u8 count;
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	u8 ctrl;
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	int ret;
638 639 640 641 642 643 644 645 646 647 648 649 650 651 652

	WARN_ON(host->data);

	if (data == NULL)
		return;

	/* Sanity checks */
	BUG_ON(data->blksz * data->blocks > 524288);
	BUG_ON(data->blksz > host->mmc->max_blk_size);
	BUG_ON(data->blocks > 65535);

	host->data = data;
	host->data_early = 0;

	count = sdhci_calc_timeout(host, data);
653
	sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
654

655 656 657
	if (host->flags & SDHCI_USE_DMA)
		host->flags |= SDHCI_REQ_USE_DMA;

658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685
	/*
	 * FIXME: This doesn't account for merging when mapping the
	 * scatterlist.
	 */
	if (host->flags & SDHCI_REQ_USE_DMA) {
		int broken, i;
		struct scatterlist *sg;

		broken = 0;
		if (host->flags & SDHCI_USE_ADMA) {
			if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
				broken = 1;
		} else {
			if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE)
				broken = 1;
		}

		if (unlikely(broken)) {
			for_each_sg(data->sg, sg, data->sg_len, i) {
				if (sg->length & 0x3) {
					DBG("Reverting to PIO because of "
						"transfer size (%d)\n",
						sg->length);
					host->flags &= ~SDHCI_REQ_USE_DMA;
					break;
				}
			}
		}
686 687 688 689 690 691
	}

	/*
	 * The assumption here being that alignment is the same after
	 * translation to device address space.
	 */
692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721
	if (host->flags & SDHCI_REQ_USE_DMA) {
		int broken, i;
		struct scatterlist *sg;

		broken = 0;
		if (host->flags & SDHCI_USE_ADMA) {
			/*
			 * As we use 3 byte chunks to work around
			 * alignment problems, we need to check this
			 * quirk.
			 */
			if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
				broken = 1;
		} else {
			if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR)
				broken = 1;
		}

		if (unlikely(broken)) {
			for_each_sg(data->sg, sg, data->sg_len, i) {
				if (sg->offset & 0x3) {
					DBG("Reverting to PIO because of "
						"bad alignment\n");
					host->flags &= ~SDHCI_REQ_USE_DMA;
					break;
				}
			}
		}
	}

722 723 724 725 726 727 728 729 730
	if (host->flags & SDHCI_REQ_USE_DMA) {
		if (host->flags & SDHCI_USE_ADMA) {
			ret = sdhci_adma_table_pre(host, data);
			if (ret) {
				/*
				 * This only happens when someone fed
				 * us an invalid request.
				 */
				WARN_ON(1);
731
				host->flags &= ~SDHCI_REQ_USE_DMA;
732
			} else {
733 734
				sdhci_writel(host, host->adma_addr,
					SDHCI_ADMA_ADDRESS);
735 736
			}
		} else {
737
			int sg_cnt;
738

739
			sg_cnt = dma_map_sg(mmc_dev(host->mmc),
740 741 742 743
					data->sg, data->sg_len,
					(data->flags & MMC_DATA_READ) ?
						DMA_FROM_DEVICE :
						DMA_TO_DEVICE);
744
			if (sg_cnt == 0) {
745 746 747 748 749
				/*
				 * This only happens when someone fed
				 * us an invalid request.
				 */
				WARN_ON(1);
750
				host->flags &= ~SDHCI_REQ_USE_DMA;
751
			} else {
752
				WARN_ON(sg_cnt != 1);
753 754
				sdhci_writel(host, sg_dma_address(data->sg),
					SDHCI_DMA_ADDRESS);
755 756 757 758
			}
		}
	}

759 760 761 762 763 764
	/*
	 * Always adjust the DMA selection as some controllers
	 * (e.g. JMicron) can't do PIO properly when the selection
	 * is ADMA.
	 */
	if (host->version >= SDHCI_SPEC_200) {
765
		ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
766 767 768 769 770 771
		ctrl &= ~SDHCI_CTRL_DMA_MASK;
		if ((host->flags & SDHCI_REQ_USE_DMA) &&
			(host->flags & SDHCI_USE_ADMA))
			ctrl |= SDHCI_CTRL_ADMA32;
		else
			ctrl |= SDHCI_CTRL_SDMA;
772
		sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
773 774
	}

775
	if (!(host->flags & SDHCI_REQ_USE_DMA)) {
776 777 778
		sg_miter_start(&host->sg_miter,
			data->sg, data->sg_len, SG_MITER_ATOMIC);
		host->blocks = data->blocks;
779
	}
780

781 782
	sdhci_set_transfer_irqs(host);

783
	/* We do not handle DMA boundaries, so set it to max (512 KiB) */
784 785
	sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE);
	sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
786 787 788 789 790 791 792 793 794 795
}

static void sdhci_set_transfer_mode(struct sdhci_host *host,
	struct mmc_data *data)
{
	u16 mode;

	if (data == NULL)
		return;

796 797
	WARN_ON(!host->data);

798 799 800 801 802
	mode = SDHCI_TRNS_BLK_CNT_EN;
	if (data->blocks > 1)
		mode |= SDHCI_TRNS_MULTI;
	if (data->flags & MMC_DATA_READ)
		mode |= SDHCI_TRNS_READ;
803
	if (host->flags & SDHCI_REQ_USE_DMA)
804 805
		mode |= SDHCI_TRNS_DMA;

806
	sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
807 808 809 810 811 812 813 814 815 816 817
}

static void sdhci_finish_data(struct sdhci_host *host)
{
	struct mmc_data *data;

	BUG_ON(!host->data);

	data = host->data;
	host->data = NULL;

818
	if (host->flags & SDHCI_REQ_USE_DMA) {
819 820 821 822 823 824 825
		if (host->flags & SDHCI_USE_ADMA)
			sdhci_adma_table_post(host, data);
		else {
			dma_unmap_sg(mmc_dev(host->mmc), data->sg,
				data->sg_len, (data->flags & MMC_DATA_READ) ?
					DMA_FROM_DEVICE : DMA_TO_DEVICE);
		}
826 827 828
	}

	/*
829 830 831 832 833
	 * The specification states that the block count register must
	 * be updated, but it does not specify at what point in the
	 * data flow. That makes the register entirely useless to read
	 * back so we have to assume that nothing made it to the card
	 * in the event of an error.
834
	 */
835 836
	if (data->error)
		data->bytes_xfered = 0;
837
	else
838
		data->bytes_xfered = data->blksz * data->blocks;
839 840 841 842 843 844

	if (data->stop) {
		/*
		 * The controller needs a reset of internal state machines
		 * upon error conditions.
		 */
P
Pierre Ossman 已提交
845
		if (data->error) {
846 847 848 849 850 851 852 853 854 855 856 857
			sdhci_reset(host, SDHCI_RESET_CMD);
			sdhci_reset(host, SDHCI_RESET_DATA);
		}

		sdhci_send_command(host, data->stop);
	} else
		tasklet_schedule(&host->finish_tasklet);
}

static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
{
	int flags;
858
	u32 mask;
859
	unsigned long timeout;
860 861 862 863

	WARN_ON(host->cmd);

	/* Wait max 10 ms */
864
	timeout = 10;
865 866 867 868 869 870 871 872 873 874

	mask = SDHCI_CMD_INHIBIT;
	if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
		mask |= SDHCI_DATA_INHIBIT;

	/* We shouldn't wait for data inihibit for stop commands, even
	   though they might use busy signaling */
	if (host->mrq->data && (cmd == host->mrq->data->stop))
		mask &= ~SDHCI_DATA_INHIBIT;

875
	while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
876
		if (timeout == 0) {
877
			printk(KERN_ERR "%s: Controller never released "
P
Pierre Ossman 已提交
878
				"inhibit bit(s).\n", mmc_hostname(host->mmc));
879
			sdhci_dumpregs(host);
P
Pierre Ossman 已提交
880
			cmd->error = -EIO;
881 882 883
			tasklet_schedule(&host->finish_tasklet);
			return;
		}
884 885 886
		timeout--;
		mdelay(1);
	}
887 888 889 890 891 892 893

	mod_timer(&host->timer, jiffies + 10 * HZ);

	host->cmd = cmd;

	sdhci_prepare_data(host, cmd->data);

894
	sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT);
895

896 897
	sdhci_set_transfer_mode(host, cmd->data);

898
	if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
P
Pierre Ossman 已提交
899
		printk(KERN_ERR "%s: Unsupported response type!\n",
900
			mmc_hostname(host->mmc));
P
Pierre Ossman 已提交
901
		cmd->error = -EINVAL;
902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921
		tasklet_schedule(&host->finish_tasklet);
		return;
	}

	if (!(cmd->flags & MMC_RSP_PRESENT))
		flags = SDHCI_CMD_RESP_NONE;
	else if (cmd->flags & MMC_RSP_136)
		flags = SDHCI_CMD_RESP_LONG;
	else if (cmd->flags & MMC_RSP_BUSY)
		flags = SDHCI_CMD_RESP_SHORT_BUSY;
	else
		flags = SDHCI_CMD_RESP_SHORT;

	if (cmd->flags & MMC_RSP_CRC)
		flags |= SDHCI_CMD_CRC;
	if (cmd->flags & MMC_RSP_OPCODE)
		flags |= SDHCI_CMD_INDEX;
	if (cmd->data)
		flags |= SDHCI_CMD_DATA;

922
	sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
923 924 925 926 927 928 929 930 931 932 933 934
}

static void sdhci_finish_command(struct sdhci_host *host)
{
	int i;

	BUG_ON(host->cmd == NULL);

	if (host->cmd->flags & MMC_RSP_PRESENT) {
		if (host->cmd->flags & MMC_RSP_136) {
			/* CRC is stripped so we need to do some shifting. */
			for (i = 0;i < 4;i++) {
935
				host->cmd->resp[i] = sdhci_readl(host,
936 937 938
					SDHCI_RESPONSE + (3-i)*4) << 8;
				if (i != 3)
					host->cmd->resp[i] |=
939
						sdhci_readb(host,
940 941 942
						SDHCI_RESPONSE + (3-i)*4-1);
			}
		} else {
943
			host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE);
944 945 946
		}
	}

P
Pierre Ossman 已提交
947
	host->cmd->error = 0;
948

949 950 951 952
	if (host->data && host->data_early)
		sdhci_finish_data(host);

	if (!host->cmd->data)
953 954 955 956 957 958 959 960 961
		tasklet_schedule(&host->finish_tasklet);

	host->cmd = NULL;
}

static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
{
	int div;
	u16 clk;
962
	unsigned long timeout;
963 964 965 966

	if (clock == host->clock)
		return;

967 968 969 970 971 972
	if (host->ops->set_clock) {
		host->ops->set_clock(host, clock);
		if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK)
			return;
	}

973
	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
974 975 976 977 978 979 980 981 982 983 984 985

	if (clock == 0)
		goto out;

	for (div = 1;div < 256;div *= 2) {
		if ((host->max_clk / div) <= clock)
			break;
	}
	div >>= 1;

	clk = div << SDHCI_DIVIDER_SHIFT;
	clk |= SDHCI_CLOCK_INT_EN;
986
	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
987 988

	/* Wait max 10 ms */
989
	timeout = 10;
990
	while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
991 992
		& SDHCI_CLOCK_INT_STABLE)) {
		if (timeout == 0) {
P
Pierre Ossman 已提交
993 994
			printk(KERN_ERR "%s: Internal clock never "
				"stabilised.\n", mmc_hostname(host->mmc));
995 996 997
			sdhci_dumpregs(host);
			return;
		}
998 999 1000
		timeout--;
		mdelay(1);
	}
1001 1002

	clk |= SDHCI_CLOCK_CARD_EN;
1003
	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
1004 1005 1006 1007 1008

out:
	host->clock = clock;
}

1009 1010 1011 1012
static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
{
	u8 pwr;

1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033
	if (power == (unsigned short)-1)
		pwr = 0;
	else {
		switch (1 << power) {
		case MMC_VDD_165_195:
			pwr = SDHCI_POWER_180;
			break;
		case MMC_VDD_29_30:
		case MMC_VDD_30_31:
			pwr = SDHCI_POWER_300;
			break;
		case MMC_VDD_32_33:
		case MMC_VDD_33_34:
			pwr = SDHCI_POWER_330;
			break;
		default:
			BUG();
		}
	}

	if (host->pwr == pwr)
1034 1035
		return;

1036 1037 1038
	host->pwr = pwr;

	if (pwr == 0) {
1039
		sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1040
		return;
1041 1042 1043 1044 1045 1046
	}

	/*
	 * Spec says that we should clear the power reg before setting
	 * a new value. Some controllers don't seem to like this though.
	 */
1047
	if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
1048
		sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1049

1050
	/*
1051
	 * At least the Marvell CaFe chip gets confused if we set the voltage
1052 1053
	 * and set turn on power at the same time, so set the voltage first.
	 */
1054
	if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER)
1055
		sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1056

1057
	pwr |= SDHCI_POWER_ON;
1058

1059
	sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1060 1061 1062 1063 1064

	/*
	 * Some controllers need an extra 10ms delay of 10ms before they
	 * can apply clock after applying power
	 */
1065
	if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER)
1066
		mdelay(10);
1067 1068
}

1069 1070 1071 1072 1073 1074 1075 1076 1077
/*****************************************************************************\
 *                                                                           *
 * MMC callbacks                                                             *
 *                                                                           *
\*****************************************************************************/

static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
	struct sdhci_host *host;
1078
	bool present;
1079 1080 1081 1082 1083 1084 1085 1086
	unsigned long flags;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

	WARN_ON(host->mrq != NULL);

1087
#ifndef SDHCI_USE_LEDS_CLASS
1088
	sdhci_activate_led(host);
1089
#endif
1090 1091 1092

	host->mrq = mrq;

1093 1094 1095 1096 1097 1098 1099 1100
	/* If polling, assume that the card is always present. */
	if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
		present = true;
	else
		present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
				SDHCI_CARD_PRESENT;

	if (!present || host->flags & SDHCI_DEVICE_DEAD) {
P
Pierre Ossman 已提交
1101
		host->mrq->cmd->error = -ENOMEDIUM;
1102 1103 1104 1105
		tasklet_schedule(&host->finish_tasklet);
	} else
		sdhci_send_command(host, mrq->cmd);

1106
	mmiowb();
1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119
	spin_unlock_irqrestore(&host->lock, flags);
}

static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
	struct sdhci_host *host;
	unsigned long flags;
	u8 ctrl;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1120 1121 1122
	if (host->flags & SDHCI_DEVICE_DEAD)
		goto out;

1123 1124 1125 1126 1127
	/*
	 * Reset the chip on each power off.
	 * Should clear out any weird states.
	 */
	if (ios->power_mode == MMC_POWER_OFF) {
1128
		sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
1129
		sdhci_reinit(host);
1130 1131 1132 1133 1134
	}

	sdhci_set_clock(host, ios->clock);

	if (ios->power_mode == MMC_POWER_OFF)
1135
		sdhci_set_power(host, -1);
1136
	else
1137
		sdhci_set_power(host, ios->vdd);
1138

1139
	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1140

1141 1142 1143 1144
	if (ios->bus_width == MMC_BUS_WIDTH_4)
		ctrl |= SDHCI_CTRL_4BITBUS;
	else
		ctrl &= ~SDHCI_CTRL_4BITBUS;
1145 1146 1147 1148 1149 1150

	if (ios->timing == MMC_TIMING_SD_HS)
		ctrl |= SDHCI_CTRL_HISPD;
	else
		ctrl &= ~SDHCI_CTRL_HISPD;

1151
	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1152

1153 1154 1155 1156 1157
	/*
	 * Some (ENE) controllers go apeshit on some ios operation,
	 * signalling timeout and CRC errors even on CMD0. Resetting
	 * it on each ios seems to solve the problem.
	 */
1158
	if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1159 1160
		sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);

P
Pierre Ossman 已提交
1161
out:
1162
	mmiowb();
1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175
	spin_unlock_irqrestore(&host->lock, flags);
}

static int sdhci_get_ro(struct mmc_host *mmc)
{
	struct sdhci_host *host;
	unsigned long flags;
	int present;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1176 1177 1178
	if (host->flags & SDHCI_DEVICE_DEAD)
		present = 0;
	else
1179
		present = sdhci_readl(host, SDHCI_PRESENT_STATE);
1180 1181 1182

	spin_unlock_irqrestore(&host->lock, flags);

1183 1184
	if (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT)
		return !!(present & SDHCI_WRITE_PROTECT);
1185 1186 1187
	return !(present & SDHCI_WRITE_PROTECT);
}

P
Pierre Ossman 已提交
1188 1189 1190 1191 1192 1193 1194 1195 1196
static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = mmc_priv(mmc);

	spin_lock_irqsave(&host->lock, flags);

P
Pierre Ossman 已提交
1197 1198 1199
	if (host->flags & SDHCI_DEVICE_DEAD)
		goto out;

P
Pierre Ossman 已提交
1200
	if (enable)
1201 1202 1203
		sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT);
	else
		sdhci_mask_irqs(host, SDHCI_INT_CARD_INT);
P
Pierre Ossman 已提交
1204
out:
P
Pierre Ossman 已提交
1205 1206 1207 1208 1209
	mmiowb();

	spin_unlock_irqrestore(&host->lock, flags);
}

1210
static const struct mmc_host_ops sdhci_ops = {
1211 1212 1213
	.request	= sdhci_request,
	.set_ios	= sdhci_set_ios,
	.get_ro		= sdhci_get_ro,
P
Pierre Ossman 已提交
1214
	.enable_sdio_irq = sdhci_enable_sdio_irq,
1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231
};

/*****************************************************************************\
 *                                                                           *
 * Tasklets                                                                  *
 *                                                                           *
\*****************************************************************************/

static void sdhci_tasklet_card(unsigned long param)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = (struct sdhci_host*)param;

	spin_lock_irqsave(&host->lock, flags);

1232
	if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1233 1234 1235 1236 1237 1238 1239 1240 1241
		if (host->mrq) {
			printk(KERN_ERR "%s: Card removed during transfer!\n",
				mmc_hostname(host->mmc));
			printk(KERN_ERR "%s: Resetting controller.\n",
				mmc_hostname(host->mmc));

			sdhci_reset(host, SDHCI_RESET_CMD);
			sdhci_reset(host, SDHCI_RESET_DATA);

P
Pierre Ossman 已提交
1242
			host->mrq->cmd->error = -ENOMEDIUM;
1243 1244 1245 1246 1247 1248
			tasklet_schedule(&host->finish_tasklet);
		}
	}

	spin_unlock_irqrestore(&host->lock, flags);

P
Pierre Ossman 已提交
1249
	mmc_detect_change(host->mmc, msecs_to_jiffies(200));
1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269
}

static void sdhci_tasklet_finish(unsigned long param)
{
	struct sdhci_host *host;
	unsigned long flags;
	struct mmc_request *mrq;

	host = (struct sdhci_host*)param;

	spin_lock_irqsave(&host->lock, flags);

	del_timer(&host->timer);

	mrq = host->mrq;

	/*
	 * The controller needs a reset of internal state machines
	 * upon error conditions.
	 */
P
Pierre Ossman 已提交
1270 1271 1272 1273 1274
	if (!(host->flags & SDHCI_DEVICE_DEAD) &&
		(mrq->cmd->error ||
		 (mrq->data && (mrq->data->error ||
		  (mrq->data->stop && mrq->data->stop->error))) ||
		   (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
1275 1276

		/* Some controllers need this kick or reset won't work here */
1277
		if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1278 1279 1280 1281 1282 1283 1284 1285 1286 1287
			unsigned int clock;

			/* This is to force an update */
			clock = host->clock;
			host->clock = 0;
			sdhci_set_clock(host, clock);
		}

		/* Spec says we should do both at the same time, but Ricoh
		   controllers do not like that. */
1288 1289 1290 1291 1292 1293 1294 1295
		sdhci_reset(host, SDHCI_RESET_CMD);
		sdhci_reset(host, SDHCI_RESET_DATA);
	}

	host->mrq = NULL;
	host->cmd = NULL;
	host->data = NULL;

1296
#ifndef SDHCI_USE_LEDS_CLASS
1297
	sdhci_deactivate_led(host);
1298
#endif
1299

1300
	mmiowb();
1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315
	spin_unlock_irqrestore(&host->lock, flags);

	mmc_request_done(host->mmc, mrq);
}

static void sdhci_timeout_timer(unsigned long data)
{
	struct sdhci_host *host;
	unsigned long flags;

	host = (struct sdhci_host*)data;

	spin_lock_irqsave(&host->lock, flags);

	if (host->mrq) {
P
Pierre Ossman 已提交
1316 1317
		printk(KERN_ERR "%s: Timeout waiting for hardware "
			"interrupt.\n", mmc_hostname(host->mmc));
1318 1319 1320
		sdhci_dumpregs(host);

		if (host->data) {
P
Pierre Ossman 已提交
1321
			host->data->error = -ETIMEDOUT;
1322 1323 1324
			sdhci_finish_data(host);
		} else {
			if (host->cmd)
P
Pierre Ossman 已提交
1325
				host->cmd->error = -ETIMEDOUT;
1326
			else
P
Pierre Ossman 已提交
1327
				host->mrq->cmd->error = -ETIMEDOUT;
1328 1329 1330 1331 1332

			tasklet_schedule(&host->finish_tasklet);
		}
	}

1333
	mmiowb();
1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347
	spin_unlock_irqrestore(&host->lock, flags);
}

/*****************************************************************************\
 *                                                                           *
 * Interrupt handling                                                        *
 *                                                                           *
\*****************************************************************************/

static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
{
	BUG_ON(intmask == 0);

	if (!host->cmd) {
1348 1349 1350
		printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
			"though no command operation was in progress.\n",
			mmc_hostname(host->mmc), (unsigned)intmask);
1351 1352 1353 1354
		sdhci_dumpregs(host);
		return;
	}

1355
	if (intmask & SDHCI_INT_TIMEOUT)
P
Pierre Ossman 已提交
1356 1357 1358 1359
		host->cmd->error = -ETIMEDOUT;
	else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
			SDHCI_INT_INDEX))
		host->cmd->error = -EILSEQ;
1360

1361
	if (host->cmd->error) {
1362
		tasklet_schedule(&host->finish_tasklet);
1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380
		return;
	}

	/*
	 * The host can send and interrupt when the busy state has
	 * ended, allowing us to wait without wasting CPU cycles.
	 * Unfortunately this is overloaded on the "data complete"
	 * interrupt, so we need to take some care when handling
	 * it.
	 *
	 * Note: The 1.0 specification is a bit ambiguous about this
	 *       feature so there might be some problems with older
	 *       controllers.
	 */
	if (host->cmd->flags & MMC_RSP_BUSY) {
		if (host->cmd->data)
			DBG("Cannot wait for busy signal when also "
				"doing a data transfer");
1381
		else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ))
1382
			return;
1383 1384 1385

		/* The controller does not support the end-of-busy IRQ,
		 * fall through and take the SDHCI_INT_RESPONSE */
1386 1387 1388
	}

	if (intmask & SDHCI_INT_RESPONSE)
1389
		sdhci_finish_command(host);
1390 1391
}

1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420
#ifdef DEBUG
static void sdhci_show_adma_error(struct sdhci_host *host)
{
	const char *name = mmc_hostname(host->mmc);
	u8 *desc = host->adma_desc;
	__le32 *dma;
	__le16 *len;
	u8 attr;

	sdhci_dumpregs(host);

	while (true) {
		dma = (__le32 *)(desc + 4);
		len = (__le16 *)(desc + 2);
		attr = *desc;

		DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n",
		    name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr);

		desc += 8;

		if (attr & 2)
			break;
	}
}
#else
static void sdhci_show_adma_error(struct sdhci_host *host) { }
#endif

1421 1422 1423 1424 1425 1426
static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
{
	BUG_ON(intmask == 0);

	if (!host->data) {
		/*
1427 1428 1429
		 * The "data complete" interrupt is also used to
		 * indicate that a busy state has ended. See comment
		 * above in sdhci_cmd_irq().
1430
		 */
1431 1432 1433 1434 1435 1436
		if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
			if (intmask & SDHCI_INT_DATA_END) {
				sdhci_finish_command(host);
				return;
			}
		}
1437

1438 1439 1440
		printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
			"though no data operation was in progress.\n",
			mmc_hostname(host->mmc), (unsigned)intmask);
1441 1442 1443 1444 1445 1446
		sdhci_dumpregs(host);

		return;
	}

	if (intmask & SDHCI_INT_DATA_TIMEOUT)
P
Pierre Ossman 已提交
1447 1448 1449
		host->data->error = -ETIMEDOUT;
	else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
		host->data->error = -EILSEQ;
1450 1451 1452
	else if (intmask & SDHCI_INT_ADMA_ERROR) {
		printk(KERN_ERR "%s: ADMA error\n", mmc_hostname(host->mmc));
		sdhci_show_adma_error(host);
1453
		host->data->error = -EIO;
1454
	}
1455

P
Pierre Ossman 已提交
1456
	if (host->data->error)
1457 1458
		sdhci_finish_data(host);
	else {
P
Pierre Ossman 已提交
1459
		if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1460 1461
			sdhci_transfer_pio(host);

1462 1463 1464 1465 1466 1467
		/*
		 * We currently don't do anything fancy with DMA
		 * boundaries, but as we can't disable the feature
		 * we need to at least restart the transfer.
		 */
		if (intmask & SDHCI_INT_DMA_END)
1468 1469
			sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS),
				SDHCI_DMA_ADDRESS);
1470

1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482
		if (intmask & SDHCI_INT_DATA_END) {
			if (host->cmd) {
				/*
				 * Data managed to finish before the
				 * command completed. Make sure we do
				 * things in the proper order.
				 */
				host->data_early = 1;
			} else {
				sdhci_finish_data(host);
			}
		}
1483 1484 1485
	}
}

1486
static irqreturn_t sdhci_irq(int irq, void *dev_id)
1487 1488 1489 1490
{
	irqreturn_t result;
	struct sdhci_host* host = dev_id;
	u32 intmask;
P
Pierre Ossman 已提交
1491
	int cardint = 0;
1492 1493 1494

	spin_lock(&host->lock);

1495
	intmask = sdhci_readl(host, SDHCI_INT_STATUS);
1496

1497
	if (!intmask || intmask == 0xffffffff) {
1498 1499 1500 1501
		result = IRQ_NONE;
		goto out;
	}

1502 1503
	DBG("*** %s got interrupt: 0x%08x\n",
		mmc_hostname(host->mmc), intmask);
1504

1505
	if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1506 1507
		sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
			SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS);
1508
		tasklet_schedule(&host->card_tasklet);
1509
	}
1510

1511
	intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1512

1513
	if (intmask & SDHCI_INT_CMD_MASK) {
1514 1515
		sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK,
			SDHCI_INT_STATUS);
1516
		sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1517 1518 1519
	}

	if (intmask & SDHCI_INT_DATA_MASK) {
1520 1521
		sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK,
			SDHCI_INT_STATUS);
1522
		sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1523 1524 1525 1526
	}

	intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);

1527 1528
	intmask &= ~SDHCI_INT_ERROR;

1529
	if (intmask & SDHCI_INT_BUS_POWER) {
1530
		printk(KERN_ERR "%s: Card is consuming too much power!\n",
1531
			mmc_hostname(host->mmc));
1532
		sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS);
1533 1534
	}

1535
	intmask &= ~SDHCI_INT_BUS_POWER;
1536

P
Pierre Ossman 已提交
1537 1538 1539 1540 1541
	if (intmask & SDHCI_INT_CARD_INT)
		cardint = 1;

	intmask &= ~SDHCI_INT_CARD_INT;

1542
	if (intmask) {
P
Pierre Ossman 已提交
1543
		printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1544
			mmc_hostname(host->mmc), intmask);
1545 1546
		sdhci_dumpregs(host);

1547
		sdhci_writel(host, intmask, SDHCI_INT_STATUS);
1548
	}
1549 1550 1551

	result = IRQ_HANDLED;

1552
	mmiowb();
1553 1554 1555
out:
	spin_unlock(&host->lock);

P
Pierre Ossman 已提交
1556 1557 1558 1559 1560 1561
	/*
	 * We have to delay this as it calls back into the driver.
	 */
	if (cardint)
		mmc_signal_sdio_irq(host->mmc);

1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572
	return result;
}

/*****************************************************************************\
 *                                                                           *
 * Suspend/resume                                                            *
 *                                                                           *
\*****************************************************************************/

#ifdef CONFIG_PM

1573
int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1574
{
1575
	int ret;
1576

1577 1578
	sdhci_disable_card_detection(host);

1579 1580 1581
	ret = mmc_suspend_host(host->mmc, state);
	if (ret)
		return ret;
1582

1583
	free_irq(host->irq, host);
1584 1585 1586 1587

	return 0;
}

1588
EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1589

1590 1591 1592
int sdhci_resume_host(struct sdhci_host *host)
{
	int ret;
1593

1594 1595 1596 1597
	if (host->flags & SDHCI_USE_DMA) {
		if (host->ops->enable_dma)
			host->ops->enable_dma(host);
	}
1598

1599 1600
	ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
			  mmc_hostname(host->mmc), host);
1601 1602
	if (ret)
		return ret;
1603

1604 1605 1606 1607 1608 1609
	sdhci_init(host);
	mmiowb();

	ret = mmc_resume_host(host->mmc);
	if (ret)
		return ret;
1610

1611 1612
	sdhci_enable_card_detection(host);

1613 1614 1615
	return 0;
}

1616
EXPORT_SYMBOL_GPL(sdhci_resume_host);
1617 1618 1619 1620 1621

#endif /* CONFIG_PM */

/*****************************************************************************\
 *                                                                           *
1622
 * Device allocation/registration                                            *
1623 1624 1625
 *                                                                           *
\*****************************************************************************/

1626 1627
struct sdhci_host *sdhci_alloc_host(struct device *dev,
	size_t priv_size)
1628 1629 1630 1631
{
	struct mmc_host *mmc;
	struct sdhci_host *host;

1632
	WARN_ON(dev == NULL);
1633

1634
	mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1635
	if (!mmc)
1636
		return ERR_PTR(-ENOMEM);
1637 1638 1639 1640

	host = mmc_priv(mmc);
	host->mmc = mmc;

1641 1642
	return host;
}
1643

1644
EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1645

1646 1647 1648 1649 1650
int sdhci_add_host(struct sdhci_host *host)
{
	struct mmc_host *mmc;
	unsigned int caps;
	int ret;
1651

1652 1653 1654
	WARN_ON(host == NULL);
	if (host == NULL)
		return -EINVAL;
1655

1656
	mmc = host->mmc;
1657

1658 1659
	if (debug_quirks)
		host->quirks = debug_quirks;
1660

1661 1662
	sdhci_reset(host, SDHCI_RESET_ALL);

1663
	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
1664 1665 1666
	host->version = (host->version & SDHCI_SPEC_VER_MASK)
				>> SDHCI_SPEC_VER_SHIFT;
	if (host->version > SDHCI_SPEC_200) {
1667
		printk(KERN_ERR "%s: Unknown controller version (%d). "
1668
			"You may experience problems.\n", mmc_hostname(mmc),
1669
			host->version);
1670 1671
	}

1672
	caps = sdhci_readl(host, SDHCI_CAPABILITIES);
1673

1674
	if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1675
		host->flags |= SDHCI_USE_DMA;
1676 1677 1678
	else if (!(caps & SDHCI_CAN_DO_DMA))
		DBG("Controller doesn't have DMA capability\n");
	else
1679 1680
		host->flags |= SDHCI_USE_DMA;

1681
	if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1682
		(host->flags & SDHCI_USE_DMA)) {
R
Rolf Eike Beer 已提交
1683
		DBG("Disabling DMA as it is marked broken\n");
1684 1685 1686
		host->flags &= ~SDHCI_USE_DMA;
	}

1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698
	if (host->flags & SDHCI_USE_DMA) {
		if ((host->version >= SDHCI_SPEC_200) &&
				(caps & SDHCI_CAN_DO_ADMA2))
			host->flags |= SDHCI_USE_ADMA;
	}

	if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
		(host->flags & SDHCI_USE_ADMA)) {
		DBG("Disabling ADMA as it is marked broken\n");
		host->flags &= ~SDHCI_USE_ADMA;
	}

1699
	if (host->flags & SDHCI_USE_DMA) {
1700 1701 1702 1703 1704
		if (host->ops->enable_dma) {
			if (host->ops->enable_dma(host)) {
				printk(KERN_WARNING "%s: No suitable DMA "
					"available. Falling back to PIO.\n",
					mmc_hostname(mmc));
1705
				host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA);
1706
			}
1707 1708 1709
		}
	}

1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727
	if (host->flags & SDHCI_USE_ADMA) {
		/*
		 * We need to allocate descriptors for all sg entries
		 * (128) and potentially one alignment transfer for
		 * each of those entries.
		 */
		host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
		host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
		if (!host->adma_desc || !host->align_buffer) {
			kfree(host->adma_desc);
			kfree(host->align_buffer);
			printk(KERN_WARNING "%s: Unable to allocate ADMA "
				"buffers. Falling back to standard DMA.\n",
				mmc_hostname(mmc));
			host->flags &= ~SDHCI_USE_ADMA;
		}
	}

1728 1729 1730 1731 1732 1733 1734 1735 1736
	/*
	 * If we use DMA, then it's up to the caller to set the DMA
	 * mask, but PIO does not need the hw shim so we set a new
	 * mask here in that case.
	 */
	if (!(host->flags & SDHCI_USE_DMA)) {
		host->dma_mask = DMA_BIT_MASK(64);
		mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
	}
1737

1738 1739
	host->max_clk =
		(caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1740
	host->max_clk *= 1000000;
1741
	if (host->max_clk == 0) {
1742 1743 1744 1745 1746 1747 1748
		if (!host->ops->get_max_clock) {
			printk(KERN_ERR
			       "%s: Hardware doesn't specify base clock "
			       "frequency.\n", mmc_hostname(mmc));
			return -ENODEV;
		}
		host->max_clk = host->ops->get_max_clock(host);
1749
	}
1750

1751 1752 1753
	host->timeout_clk =
		(caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
	if (host->timeout_clk == 0) {
1754 1755 1756 1757 1758 1759 1760
		if (!host->ops->get_timeout_clock) {
			printk(KERN_ERR
			       "%s: Hardware doesn't specify timeout clock "
			       "frequency.\n", mmc_hostname(mmc));
			return -ENODEV;
		}
		host->timeout_clk = host->ops->get_timeout_clock(host);
1761 1762 1763
	}
	if (caps & SDHCI_TIMEOUT_CLK_UNIT)
		host->timeout_clk *= 1000;
1764 1765 1766 1767 1768

	/*
	 * Set host parameters.
	 */
	mmc->ops = &sdhci_ops;
1769 1770 1771 1772
	if (host->ops->get_min_clock)
		mmc->f_min = host->ops->get_min_clock(host);
	else
		mmc->f_min = host->max_clk / 256;
1773
	mmc->f_max = host->max_clk;
1774 1775 1776 1777
	mmc->caps = MMC_CAP_SDIO_IRQ;

	if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
		mmc->caps |= MMC_CAP_4_BIT_DATA;
1778

1779
	if (caps & SDHCI_CAN_DO_HISPD)
1780 1781
		mmc->caps |= MMC_CAP_SD_HIGHSPEED;

1782 1783 1784
	if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
		mmc->caps |= MMC_CAP_NEEDS_POLL;

1785 1786 1787
	mmc->ocr_avail = 0;
	if (caps & SDHCI_CAN_VDD_330)
		mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
P
Pierre Ossman 已提交
1788
	if (caps & SDHCI_CAN_VDD_300)
1789
		mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
P
Pierre Ossman 已提交
1790
	if (caps & SDHCI_CAN_VDD_180)
1791
		mmc->ocr_avail |= MMC_VDD_165_195;
1792 1793 1794

	if (mmc->ocr_avail == 0) {
		printk(KERN_ERR "%s: Hardware doesn't report any "
1795
			"support voltages.\n", mmc_hostname(mmc));
1796
		return -ENODEV;
1797 1798
	}

1799 1800 1801
	spin_lock_init(&host->lock);

	/*
1802 1803
	 * Maximum number of segments. Depends on if the hardware
	 * can do scatter/gather or not.
1804
	 */
1805 1806 1807
	if (host->flags & SDHCI_USE_ADMA)
		mmc->max_hw_segs = 128;
	else if (host->flags & SDHCI_USE_DMA)
1808
		mmc->max_hw_segs = 1;
1809 1810 1811
	else /* PIO */
		mmc->max_hw_segs = 128;
	mmc->max_phys_segs = 128;
1812 1813

	/*
1814
	 * Maximum number of sectors in one transfer. Limited by DMA boundary
1815
	 * size (512KiB).
1816
	 */
1817
	mmc->max_req_size = 524288;
1818 1819 1820

	/*
	 * Maximum segment size. Could be one segment with the maximum number
1821 1822
	 * of bytes. When doing hardware scatter/gather, each entry cannot
	 * be larger than 64 KiB though.
1823
	 */
1824 1825 1826 1827
	if (host->flags & SDHCI_USE_ADMA)
		mmc->max_seg_size = 65536;
	else
		mmc->max_seg_size = mmc->max_req_size;
1828

1829 1830 1831 1832
	/*
	 * Maximum block size. This varies from controller to controller and
	 * is specified in the capabilities register.
	 */
1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845
	if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
		mmc->max_blk_size = 2;
	} else {
		mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >>
				SDHCI_MAX_BLOCK_SHIFT;
		if (mmc->max_blk_size >= 3) {
			printk(KERN_WARNING "%s: Invalid maximum block size, "
				"assuming 512 bytes\n", mmc_hostname(mmc));
			mmc->max_blk_size = 0;
		}
	}

	mmc->max_blk_size = 512 << mmc->max_blk_size;
1846

1847 1848 1849
	/*
	 * Maximum block count.
	 */
1850
	mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535;
1851

1852 1853 1854 1855 1856 1857 1858 1859
	/*
	 * Init tasklets.
	 */
	tasklet_init(&host->card_tasklet,
		sdhci_tasklet_card, (unsigned long)host);
	tasklet_init(&host->finish_tasklet,
		sdhci_tasklet_finish, (unsigned long)host);

1860
	setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1861

1862
	ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1863
		mmc_hostname(mmc), host);
1864
	if (ret)
1865
		goto untasklet;
1866 1867 1868 1869 1870 1871 1872

	sdhci_init(host);

#ifdef CONFIG_MMC_DEBUG
	sdhci_dumpregs(host);
#endif

1873
#ifdef SDHCI_USE_LEDS_CLASS
H
Helmut Schaa 已提交
1874 1875 1876
	snprintf(host->led_name, sizeof(host->led_name),
		"%s::", mmc_hostname(mmc));
	host->led.name = host->led_name;
1877 1878 1879 1880
	host->led.brightness = LED_OFF;
	host->led.default_trigger = mmc_hostname(mmc);
	host->led.brightness_set = sdhci_led_control;

1881
	ret = led_classdev_register(mmc_dev(mmc), &host->led);
1882 1883 1884 1885
	if (ret)
		goto reset;
#endif

1886 1887
	mmiowb();

1888 1889
	mmc_add_host(mmc);

1890
	printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n",
1891
		mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
1892
		(host->flags & SDHCI_USE_ADMA)?"A":"",
1893 1894
		(host->flags & SDHCI_USE_DMA)?"DMA":"PIO");

1895 1896
	sdhci_enable_card_detection(host);

1897 1898
	return 0;

1899
#ifdef SDHCI_USE_LEDS_CLASS
1900 1901 1902 1903
reset:
	sdhci_reset(host, SDHCI_RESET_ALL);
	free_irq(host->irq, host);
#endif
1904
untasklet:
1905 1906 1907 1908 1909 1910
	tasklet_kill(&host->card_tasklet);
	tasklet_kill(&host->finish_tasklet);

	return ret;
}

1911
EXPORT_SYMBOL_GPL(sdhci_add_host);
1912

P
Pierre Ossman 已提交
1913
void sdhci_remove_host(struct sdhci_host *host, int dead)
1914
{
P
Pierre Ossman 已提交
1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932
	unsigned long flags;

	if (dead) {
		spin_lock_irqsave(&host->lock, flags);

		host->flags |= SDHCI_DEVICE_DEAD;

		if (host->mrq) {
			printk(KERN_ERR "%s: Controller removed during "
				" transfer!\n", mmc_hostname(host->mmc));

			host->mrq->cmd->error = -ENOMEDIUM;
			tasklet_schedule(&host->finish_tasklet);
		}

		spin_unlock_irqrestore(&host->lock, flags);
	}

1933 1934
	sdhci_disable_card_detection(host);

1935
	mmc_remove_host(host->mmc);
1936

1937
#ifdef SDHCI_USE_LEDS_CLASS
1938 1939 1940
	led_classdev_unregister(&host->led);
#endif

P
Pierre Ossman 已提交
1941 1942
	if (!dead)
		sdhci_reset(host, SDHCI_RESET_ALL);
1943 1944 1945 1946 1947 1948 1949

	free_irq(host->irq, host);

	del_timer_sync(&host->timer);

	tasklet_kill(&host->card_tasklet);
	tasklet_kill(&host->finish_tasklet);
1950 1951 1952 1953 1954 1955

	kfree(host->adma_desc);
	kfree(host->align_buffer);

	host->adma_desc = NULL;
	host->align_buffer = NULL;
1956 1957
}

1958
EXPORT_SYMBOL_GPL(sdhci_remove_host);
1959

1960
void sdhci_free_host(struct sdhci_host *host)
1961
{
1962
	mmc_free_host(host->mmc);
1963 1964
}

1965
EXPORT_SYMBOL_GPL(sdhci_free_host);
1966 1967 1968 1969 1970 1971 1972 1973 1974 1975

/*****************************************************************************\
 *                                                                           *
 * Driver init/exit                                                          *
 *                                                                           *
\*****************************************************************************/

static int __init sdhci_drv_init(void)
{
	printk(KERN_INFO DRIVER_NAME
1976
		": Secure Digital Host Controller Interface driver\n");
1977 1978
	printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");

1979
	return 0;
1980 1981 1982 1983 1984 1985 1986 1987 1988
}

static void __exit sdhci_drv_exit(void)
{
}

module_init(sdhci_drv_init);
module_exit(sdhci_drv_exit);

1989
module_param(debug_quirks, uint, 0444);
1990

1991
MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1992
MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1993
MODULE_LICENSE("GPL");
1994

1995
MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");