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config IRQCHIP
	def_bool y
	depends on OF_IRQ

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config ARM_GIC
	bool
	select IRQ_DOMAIN
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	select IRQ_DOMAIN_HIERARCHY
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	select MULTI_IRQ_HANDLER

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config ARM_GIC_MAX_NR
	int
	default 2 if ARCH_REALVIEW
	default 1

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config ARM_GIC_V2M
	bool
	depends on ARM_GIC
	depends on PCI && PCI_MSI
	select PCI_MSI_IRQ_DOMAIN

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config GIC_NON_BANKED
	bool

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config ARM_GIC_V3
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
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	select IRQ_DOMAIN_HIERARCHY
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config ARM_GIC_V3_ITS
	bool
	select PCI_MSI_IRQ_DOMAIN
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config HISILICON_IRQ_MBIGEN
	bool "Support mbigen interrupt controller"
	default n
	depends on ARM_GIC_V3 && ARM_GIC_V3_ITS && GENERIC_MSI_IRQ_DOMAIN
	help
	 Enable the mbigen interrupt controller used on
	 Hisilicon platform.

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config ARM_NVIC
	bool
	select IRQ_DOMAIN
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	select IRQ_DOMAIN_HIERARCHY
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	select GENERIC_IRQ_CHIP

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config ARM_VIC
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config ARM_VIC_NR
	int
	default 4 if ARCH_S5PV210
	default 2
	depends on ARM_VIC
	help
	  The maximum number of VICs available in the system, for
	  power management.

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config ARMADA_370_XP_IRQ
	bool
	select GENERIC_IRQ_CHIP
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	select PCI_MSI_IRQ_DOMAIN if PCI_MSI
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config ATMEL_AIC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config ATMEL_AIC5_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

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config I8259
	bool
	select IRQ_DOMAIN

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config BCM6345_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

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config BCM7038_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

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config BCM7120_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

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config BRCMSTB_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

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config DW_APB_ICTL
	bool
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	select GENERIC_IRQ_CHIP
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	select IRQ_DOMAIN

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config IMGPDC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

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config IRQ_MIPS_CPU
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

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config CLPS711X_IRQCHIP
	bool
	depends on ARCH_CLPS711X
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ
	default y

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config OR1K_PIC
	bool
	select IRQ_DOMAIN

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config OMAP_IRQCHIP
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

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config ORION_IRQCHIP
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

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config PIC32_EVIC
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

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config RENESAS_INTC_IRQPIN
	bool
	select IRQ_DOMAIN

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config RENESAS_IRQC
	bool
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	select GENERIC_IRQ_CHIP
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	select IRQ_DOMAIN

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config ST_IRQCHIP
	bool
	select REGMAP
	select MFD_SYSCON
	help
	  Enables SysCfg Controlled IRQs on STi based platforms.

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config TANGO_IRQ
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

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config TB10X_IRQC
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

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config TS4800_IRQ
	tristate "TS-4800 IRQ controller"
	select IRQ_DOMAIN
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	depends on HAS_IOMEM
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	depends on SOC_IMX51 || COMPILE_TEST
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	help
	  Support for the TS-4800 FPGA IRQ controller

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config VERSATILE_FPGA_IRQ
	bool
	select IRQ_DOMAIN

config VERSATILE_FPGA_IRQ_NR
       int
       default 4
       depends on VERSATILE_FPGA_IRQ
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config XTENSA_MX
	bool
	select IRQ_DOMAIN
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config IRQ_CROSSBAR
	bool
	help
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	  Support for a CROSSBAR ip that precedes the main interrupt controller.
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	  The primary irqchip invokes the crossbar's callback which inturn allocates
	  a free irq and configures the IP. Thus the peripheral interrupts are
	  routed to one of the free irqchip interrupt lines.
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config KEYSTONE_IRQ
	tristate "Keystone 2 IRQ controller IP"
	depends on ARCH_KEYSTONE
	help
		Support for Texas Instruments Keystone 2 IRQ controller IP which
		is part of the Keystone 2 IPC mechanism
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config MIPS_GIC
	bool
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	select GENERIC_IRQ_IPI
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	select IRQ_DOMAIN_HIERARCHY
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	select MIPS_CM
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config INGENIC_IRQ
	bool
	depends on MACH_INGENIC
	default y
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config RENESAS_H8300H_INTC
        bool
	select IRQ_DOMAIN

config RENESAS_H8S_INTC
        bool
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	select IRQ_DOMAIN
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config IMX_GPCV2
	bool
	select IRQ_DOMAIN
	help
	  Enables the wakeup IRQs for IMX platforms with GPCv2 block
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config IRQ_MXS
	def_bool y if MACH_ASM9260 || ARCH_MXS
	select IRQ_DOMAIN
	select STMP_DEVICE
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config MVEBU_ODMI
	bool
	select GENERIC_MSI_IRQ_DOMAIN