The code for performing the calculation was only in the SH-4 probe
path, move it out to the common path so the other parts get this
right too.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This tidies up some of the rts7751r2d mess and gets it booting
again. Update the defconfig, too.
Signed-off-by: NMasayuki Hosokawa <hosokawa@ace-jp.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch does the following:
- remove the make_ipr_irq stuff from dma-sh.c and replace it
  with a simple channel<->irq mapping table.
- add DMTEx_IRQ constants for sh4 cpus
- fix sh7751 DMAE irq number

The SH7780 uses the same IRQs for DMA as other SH4 types, so
I put the constants on top of the dma.h file.

Other CPU types need to #define their own DMTEx_IRQ contants
in their appropriate header.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.

With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.

And finally, explicitly disable the lazy writeback on SMP (SH-4A).
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds CPU support for the SH7722.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

A couple of these were missed.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Register the RTC resources for the sh775x subtype so that the new
generic RTC support in drivers/rtc/rtc-sh.c will work.
Signed-off-by: NJamie Lenehan <lenehan@twibble.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Replace all uses of kmem_cache_t with struct kmem_cache.

The patch was generated using the following script:

	#!/bin/sh
	#
	# Replace one string by another in all the kernel sources.
	#

	set -e

	for file in `find * -name "*.c" -o -name "*.h"|xargs grep -l $1`; do
		quilt add $file
		sed -e "1,\$s/$1/$2/g" $file >/tmp/$$
		mv /tmp/$$ $file
		quilt refresh
	done

The script was run like this

	sh replace kmem_cache_t "struct kmem_cache"
Signed-off-by: NChristoph Lameter <clameter@sgi.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

The following moves the creation of IPR interupts into setup-7750.c
and updates a few other things to make it all work after the "Drop
CPU subtype IRQ headers" commit. It boots and runs fine on my titan
board.

 - adds an ipr_idx to the ipr_data and uses a function in the subtype
   code to calculate the address of the IPR registers

 - adds a function to enable individual interrupt mode for externals
   in the subtype code and calls that from the titan board code
   instead of doing it directly.

 - I changed the shift in the ipr_data to be the actual # of bits to
   shift, instead of the numnber / 4 - made it easier to match with
   the manual.
Signed-off-by: NJamie Lenehan <lenehan@twibble.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This syncs up the SH clock framework with the linux/clk.h API,
for which there were only some minor changes required, namely
the clk_get() dev_id and subsequent callsites.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The end of the store queue bitmap is miscalculated when searching
for a free range in sq_remap(), missing the PAGE_SHIFT shift that's
done in sq_api_init(). This runs in to workloads where we can scan
beyond the end of the bitmap.

Spotted by Paul Jackson:

	http://marc.theaimsgroup.com/?l=linux-kernel&m=116493191224097&wSigned-off-by: NPaul Mundt <lethal@linux-sh.org>

Handle simple TLB miss faults which can be resolved completely
from the page table in assembler.
Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Remove the previous saving of fault codes into the thread_struct
as they are never used, and appeared to be inherited from x86.
Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This fixes up the kernel for gcc4. The existing exception handlers
needed some wrapping for pt_regs access, acessing the registers
via a RELOC_HIDE() pointer.

The strcpy() issues popped up here too, so add -ffreestanding and
kill off the symbol export.
Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This drops the various IRQ headers that were floating around
and primarily providing hardcoded IRQ definitions for the
various CPU subtypes. This quickly got to be an unmaintainable
mess, made even more evident by the subtle breakage introduced
by the SH-2 and SH-2A changes.

Now that subtypes are able to register IRQ maps directly, just
rip all of the headers out.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

All of the various CPU subtypes currently hardcode TIMER_IRQ,
switch this to a config option in the few places we need this.

This allows further removal of hardcoded IRQ headers..
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This splits out common bits from the existing exception handler for
use between SH-2/SH-2A and SH-3/4, and adds support for the SH-2/2A
exceptions.
Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Currently the INTC2 code contains a fixed IRQ table that it
iterates through to set the handler type, we move this in to
the CPU subtype setup code instead and allow for submitting
the table that way.

This drops the ST40 tables, as nothing has been happening
with those processors, while converting the only existing
users to use the new table directly (SH7760 and SH7780).
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

With the recent change ripping out interrupt_table, explicit
padding of the table was missing, causing bad things to happen
when manually inserting handlers in to the table. This problem
particularly showed up in relation to do_fpu_state_restore()
which was inserted quite deeply in to the table and ended up
scribbling over a slab object.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Kill off interrupt_table for all of the CPU subtypes, we now
default in to stepping in to do_IRQ() for _all_ IRQ exceptions
and counting the spurious ones, rather than simply flipping on
the ones we cared about. This and enabling the IRQ by default
automatically has already uncovered a couple of bugs and IRQs
that weren't being caught, as well as some that are being
generated far too often (SCI Tx Data Empty, for example).

The general rationale is to use a marker for interrupt exceptions,
test for it in the handle_exception() path, and skip out to
do_IRQ() if it's found. Everything else follows the same behaviour
of finding the cached EXPEVT value in r2/r2_bank, we just rip out
the INTEVT read from entry.S entirely (except for in the kGDB NMI
case, which is another matter).

Note that while this changes the do_IRQ() semantics regarding r4
handling, they were fundamentally broken anyways (relying entirely
on r2_bank for the cached code). With this, we do the INTEVT read
from do_IRQ() itself (in the CONFIG_CPU_HAS_INTEVT case), or fall
back on r4 for the muxed IRQ number, which should also be closer
to what SH-2 and SH-2A want anyways.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Figure out the cache desc entry_mask at runtime, and remove
hard-coded assumption about the cacheline size.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This implements preliminary support for the L2 caches found
on newer SH-4A CPUs.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Encode processor flags in AT_HWCAP in the ELF auxiliary vector.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds support for the aforementioned CPU subtypes, and cleans
up some build issues encountered as a result.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds some simple setup code for most of the CPU subtypes,
primarily simple platform device registration.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This cleans up quite a lot of the PCI mess that we
currently have, and attempts to consolidate the
duplication in the SH7780 and SH7751 PCI controllers.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Rewrite the store queue API for a per-cpu interface in the driver
model. The old miscdevice is dropped, due to TASK_SIZE limitations,
and no one was using it anyways.

Carve up and allocate store queue space with a bitmap, back sq
mapping objects with a slab cache, and let userspace worry about
its own prefetching.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add CPU_HAS_PTEA, refactor some of the cpu flag settings.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Merge support for SH7770 and SH7780 SH-4A subtypes.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Newer SH7760 cuts have a range of acceptable PRR values..
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This reworks some of the SH-4 cache handling code to more easily
accomodate newer-style caches (particularly for the > direct-mapped
case), as well as optimizing some of the old code.
Signed-off-by: NRichard Curnow <richard.curnow@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

We had quite a bit of whitespace damage, clean most of it up..
Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
Signed-off-by: NArthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Clean up proc file removal in sq module for superh arch.  currently on a
failed module load or on module unload a proc file is left registered which
can cause a random memory execution or oopses if read after unload.  This
patch cleans up that deregistration.
Signed-off-by: NNeil Horman <nhorman@tuxdriver.com>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: NAdrian Bunk <bunk@stusta.de>

Also fixes all drivers that set this field.
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This adds a relatively simplistic clock framework for sh.  The initial goal
behind this is to clean up the arch/sh/kernel/time.c mess and to get the CPU
subtype-specific frequency setting and calculation code moved somewhere more
sensible.

This only deals with the core clocks at the moment, though it's trivial for
other drivers to define their own clocks as desired.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
Cc: john stultz <johnstul@us.ibm.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

This moves the various IRQ controller drivers into a new subdirectory, and
also extends the INTC2 IRQ handler to also deal with SH7760 and SH7780
interrupts, rather than just ST-40.

The old CONFIG_SH_GENERIC has also been removed from the IRQ definitions, as
new ports are expected to be based off of CONFIG_SH_UNKNOWN.  Since there are
plenty of incompatible machvecs, CONFIG_SH_GENERIC doesn't make sense anymore.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Convert the initializers of hw_interrupt_type structures to C99 initializers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>