1. 01 5月, 2014 2 次提交
  2. 08 4月, 2014 5 次提交
  3. 07 4月, 2014 1 次提交
    • M
      arm64: fix !CONFIG_COMPAT build failures · ff268ff7
      Mark Salter 提交于
      Recent arm64 builds using CONFIG_ARM64_64K_PAGES are failing with:
      
        arch/arm64/kernel/perf_regs.c: In function ‘perf_reg_abi’:
        arch/arm64/kernel/perf_regs.c:41:2: error: implicit declaration of function ‘is_compat_thread’
      
        arch/arm64/kernel/perf_event.c:1398:2: error: unknown type name ‘compat_uptr_t’
      
      This is due to some recent arm64 perf commits with compat support:
      
        commit 23c7d70d:
          ARM64: perf: add support for frame pointer unwinding in compat mode
      
        commit 2ee0d7fd:
          ARM64: perf: add support for perf registers API
      
      Those patches make the arm64 kernel unbuildable if CONFIG_COMPAT is not
      defined and CONFIG_ARM64_64K_PAGES depends on !CONFIG_COMPAT. This patch
      allows the arm64 kernel to build with and without CONFIG_COMPAT.
      Signed-off-by: NMark Salter <msalter@redhat.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      ff268ff7
  4. 05 4月, 2014 2 次提交
  5. 03 4月, 2014 2 次提交
  6. 24 3月, 2014 3 次提交
  7. 21 3月, 2014 1 次提交
  8. 20 3月, 2014 2 次提交
    • S
      arm64, debug-monitors: Fix CPU hotplug callback registration · 4b0b68af
      Srivatsa S. Bhat 提交于
      Subsystems that want to register CPU hotplug callbacks, as well as perform
      initialization for the CPUs that are already online, often do it as shown
      below:
      
      	get_online_cpus();
      
      	for_each_online_cpu(cpu)
      		init_cpu(cpu);
      
      	register_cpu_notifier(&foobar_cpu_notifier);
      
      	put_online_cpus();
      
      This is wrong, since it is prone to ABBA deadlocks involving the
      cpu_add_remove_lock and the cpu_hotplug.lock (when running concurrently
      with CPU hotplug operations).
      
      Instead, the correct and race-free way of performing the callback
      registration is:
      
      	cpu_notifier_register_begin();
      
      	for_each_online_cpu(cpu)
      		init_cpu(cpu);
      
      	/* Note the use of the double underscored version of the API */
      	__register_cpu_notifier(&foobar_cpu_notifier);
      
      	cpu_notifier_register_done();
      
      Fix the debug-monitors code in arm64 by using this latter form of callback
      registration.
      
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Cc: Ingo Molnar <mingo@kernel.org>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      4b0b68af
    • S
      arm64, hw_breakpoint.c: Fix CPU hotplug callback registration · 3d0dc643
      Srivatsa S. Bhat 提交于
      Subsystems that want to register CPU hotplug callbacks, as well as perform
      initialization for the CPUs that are already online, often do it as shown
      below:
      
      	get_online_cpus();
      
      	for_each_online_cpu(cpu)
      		init_cpu(cpu);
      
      	register_cpu_notifier(&foobar_cpu_notifier);
      
      	put_online_cpus();
      
      This is wrong, since it is prone to ABBA deadlocks involving the
      cpu_add_remove_lock and the cpu_hotplug.lock (when running concurrently
      with CPU hotplug operations).
      
      Instead, the correct and race-free way of performing the callback
      registration is:
      
      	cpu_notifier_register_begin();
      
      	for_each_online_cpu(cpu)
      		init_cpu(cpu);
      
      	/* Note the use of the double underscored version of the API */
      	__register_cpu_notifier(&foobar_cpu_notifier);
      
      	cpu_notifier_register_done();
      
      Fix the hw-breakpoint code in arm64 by using this latter form of callback
      registration.
      
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      3d0dc643
  9. 19 3月, 2014 1 次提交
  10. 18 3月, 2014 2 次提交
  11. 15 3月, 2014 3 次提交
  12. 13 3月, 2014 9 次提交
  13. 10 3月, 2014 1 次提交
  14. 04 3月, 2014 5 次提交
    • M
      arm64: topology: Implement basic CPU topology support · f6e763b9
      Mark Brown 提交于
      Add basic CPU topology support to arm64, based on the existing pre-v8
      code and some work done by Mark Hambleton.  This patch does not
      implement any topology discovery support since that should be based on
      information from firmware, it merely implements the scaffolding for
      integration of topology support in the architecture.
      
      No locking of the topology data is done since it is only modified during
      CPU bringup with external serialisation from the SMP code.
      
      The goal is to separate the architecture hookup for providing topology
      information from the DT parsing in order to ease review and avoid
      blocking the architecture code (which will be built on by other work)
      with the DT code review by providing something simple and basic.
      
      Following patches will implement support for interpreting topology
      information from MPIDR and for parsing the DT topology bindings for ARM,
      similar patches will be needed for ACPI.
      Signed-off-by: NMark Brown <broonie@linaro.org>
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      [catalin.marinas@arm.com: removed CONFIG_CPU_TOPOLOGY, always on if SMP]
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      f6e763b9
    • A
      arm64: advertise ARMv8 extensions to 32-bit compat ELF binaries · 4cf761cd
      Ard Biesheuvel 提交于
      This adds support for advertising the presence of ARMv8 Crypto
      Extensions in the Aarch32 execution state to 32-bit ELF binaries
      running in 32-bit compat mode under the arm64 kernel.
      Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      4cf761cd
    • A
      arm64: add AT_HWCAP2 support for 32-bit compat · 28964d32
      Ard Biesheuvel 提交于
      Add support for the ELF auxv entry AT_HWCAP2 when running 32-bit
      ELF binaries in compat mode.
      Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      28964d32
    • H
      compat: let architectures define __ARCH_WANT_COMPAT_SYS_GETDENTS64 · 0473c9b5
      Heiko Carstens 提交于
      For architecture dependent compat syscalls in common code an architecture
      must define something like __ARCH_WANT_<WHATEVER> if it wants to use the
      code.
      This however is not true for compat_sys_getdents64 for which architectures
      must define __ARCH_OMIT_COMPAT_SYS_GETDENTS64 if they do not want the code.
      
      This leads to the situation where all architectures, except mips, get the
      compat code but only x86_64, arm64 and the generic syscall architectures
      actually use it.
      
      So invert the logic, so that architectures actively must do something to
      get the compat code.
      
      This way a couple of architectures get rid of otherwise dead code.
      Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      0473c9b5
    • M
      arm64: remove unnecessary cache flush at boot · bff70595
      Mark Rutland 提交于
      Currently we flush the entire dcache at boot within __cpu_setup, but
      this is unnecessary as the booting protocol demands that the dcache is
      invalid and off upon entering the kernel. The presence of the cache
      flush only serves to hide bugs in bootloaders, and is not safe in the
      presence of SMP.
      
      In an SMP boot scenario the CPUs enter coherency outside of the kernel,
      and the primary CPU enables its caches before bringing up secondary
      CPUs. Therefore if any secondary CPU has an entry in its cache (in
      violation of the boot protocol), the primary CPU might snoop it even if
      the secondary CPU's cache is disabled. The boot-time cache flush only
      serves to hide a firmware bug, and slows down a cpu boot unnecessarily.
      
      This patch removes the unnecessary boot-time cache flush.
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      [catalin.marinas@arm.com: make __flush_dcache_all local only]
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      bff70595
  15. 03 3月, 2014 1 次提交