1. 04 8月, 2015 2 次提交
  2. 03 8月, 2015 1 次提交
  3. 23 7月, 2015 1 次提交
  4. 20 7月, 2015 4 次提交
  5. 19 7月, 2015 2 次提交
  6. 18 7月, 2015 8 次提交
  7. 17 7月, 2015 17 次提交
  8. 15 7月, 2015 4 次提交
    • A
      ARM: dts: Correct audio input route & set mic bias for am335x-pepper · 9908ac3d
      Adam YH Lee 提交于
      Audio-in was incorrectly routed to Line In. It should be Mic3L as per
      schematic.
      
      Using mic-bias voltage at 2.0v (<0x1>) does not work for some reason. There
      is no voltage seen on micbias (R127). Mic-bias voltage of 2.5v (<0x2>) works.
      I see voltage of 2.475v across GND and micbias.
      
      With these changes, I can record audio with a pair of proliferate TRRS earbuds.
      Signed-off-by: NAdam YH Lee <adam.yh.lee@gmail.com>
      Acked-by: NAsh Charles <ashcharles@gmail.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      9908ac3d
    • D
      ARM: OMAP2+: Add HAVE_ARM_SCU for AM43XX · f87d089d
      Dave Gerlach 提交于
      CONFIG_HAVE_ARM_SCU only gets selected if CONFIG_SMP is selected in an OMAP
      system, however AM43XX needs this option regardless of CONFIG_SMP and also
      for an AM43XX only build as it is important for controlling power in the SoC.
      Without this we cannot suspend the CPU for SoC suspend or cpuidle. The
      ARM Cortex A9 needs SCU CPU Power Status bits to be set to off mode in order
      for the PRCM to transition the MPU to low power modes.
      Signed-off-by: NDave Gerlach <d-gerlach@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      f87d089d
    • T
      genirq: Revert sparse irq locking around __cpu_up() and move it to x86 for now · ce0d3c0a
      Thomas Gleixner 提交于
      Boris reported that the sparse_irq protection around __cpu_up() in the
      generic code causes a regression on Xen. Xen allocates interrupts and
      some more in the xen_cpu_up() function, so it deadlocks on the
      sparse_irq_lock.
      
      There is no simple fix for this and we really should have the
      protection for all architectures, but for now the only solution is to
      move it to x86 where actual wreckage due to the lack of protection has
      been observed.
      Reported-and-tested-by: NBoris Ostrovsky <boris.ostrovsky@oracle.com>
      Fixes: a8994181 'hotplug: Prevent alloc/free of irq descriptors during cpu up/down'
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: xiao jin <jin.xiao@intel.com>
      Cc: Joerg Roedel <jroedel@suse.de>
      Cc: Borislav Petkov <bp@suse.de>
      Cc: Yanmin Zhang <yanmin_zhang@linux.intel.com>
      Cc: xen-devel <xen-devel@lists.xenproject.org>
      ce0d3c0a
    • R
      MIPS: SB1: Remove support for Pass 1 parts. · dd0bc75e
      Ralf Baechle 提交于
      Pass 1 parts had a number of significant erratas and were only available
      in small numbers and under NDA.  Full support also required the use of a
      special toolchain that kept branches properly aligned.  These workarounds
      were never upstreamed and the only toolchain known to have them is
      Montavista's GCC 3.0-based toolchain which completly obsoleted if not
      useless these days.
      
      So now that automated testing has tripped over the user of the
      -msb1-pass1-workarounds option, rather than fixing it remove support for
      pass 1 parts.
      
      Probably nobody will notice.  I seem to own the last know pass 1 board
      and I haven't noticed another one in the wild in the past decade, at
      least.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      dd0bc75e
  9. 14 7月, 2015 1 次提交
    • P
      MIPS: Require O32 FP64 support for MIPS64 with O32 compat · 4e9d324d
      Paul Burton 提交于
      MIPS32r6 code requires FP64 (ie. FR=1) support. Building a kernel with
      support for MIPS32r6 binaries but without support for O32 with FP64 is
      therefore a problem which can lead to incorrectly executed userland.
      
      CONFIG_MIPS_O32_FP64_SUPPORT is already selected when the kernel is
      configured for MIPS32r6, but not when the kernel is configured for
      MIPS64r6 with O32 compat support. Select CONFIG_MIPS_O32_FP64_SUPPORT in
      such configurations to prevent building kernels which execute MIPS32r6
      userland incorrectly.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: <stable@vger.kernel.org> # v4.0-
      Cc: linux-mips@linux-mips.org
      Cc: Matthew Fortune <matthew.fortune@imgtec.com>
      Cc: stable@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/10674/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      4e9d324d