- 20 5月, 2010 5 次提交
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由 manjugk manjugk 提交于
Under certain rare conditions, I2C_STAT[13].RDR bit may be set and the corresponding interrupt fire, even there is no data in the receive FIFO, or the I2C data transfer is still ongoing. These spurious RDR events must be ignored by the software. This patch handles and ignores RDR spurious interrupts. The below sequence is required in interrupt handler for handling this errata: 1. If RDR is set to 1, clear RDR 2. Read I2C status register and check for BusBusy bit. If BusBusy bit is set, skip remaining steps. 3. If BusBusy bit is not set, perform read operation on I2C status register. 4. If RDR is set, clear the same. Check RDR again and clear if it sets RDR bit again. 5. Perform I2C Data Read operation N number of times(where N is value read from the register BUFSTAT-RXSTAT bit fields). Note: This errata is not applicable for omap2420 and omap4. It is applicable for: 1. omap2430 2. omap34xx(including omap3630). Signed-off-by: NManjunatha GK <manjugk@ti.com> Cc: Hema Kalliguddi <hemahk@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Aaro Koskinen <Aaro.Koskinen@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Alexander Shishkin 提交于
The errata 1.153 workaround is busy waiting on XUDF bit in interrupt context, which may lead to kernel hangs. The problem can be reproduced by running the bus with wrong (too high) speed. Signed-off-by: NAlexander Shishkin <virtuoso@slind.org> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Alexander Shishkin 提交于
This is to avoid insanely long lines and levels of indentation. Signed-off-by: NAlexander Shishkin <virtuoso@slind.org> Cc: Nishant Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Kalle Jokiniemi 提交于
While waiting for completion of the i2c transfer, the MPU could hit OFF mode and cause several msecs of delay that made i2c transfers fail more often. The extra delays and subsequent re-trys cause i2c clocks to be active more often. This has also an negative effect on power consumption. Created a mechanism for passing and using the constraint setting function in driver code. The used mpu wake up latency constraints are now set individually per bus, and they are calculated based on clock rate and fifo size. Thanks to Jarkko Nikula, Moiz Sonasath, Paul Walmsley, and Nishanth Menon for tuning out the details of this patch. Updates by Kevin as requested by Tony: - Remove omap_set_i2c_constraint_func() in favor of conditionally adding the flag in omap_i2c_add_bus() in order to keep all the OMAP conditional checking in a single location. - Update set_mpu_wkup_lat prototypes to match OMAP PM layer so OMAP PM function can be used directly in pdata. Cc: Moiz Sonasath <m-sonasath@ti.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Santosh Shilimkar 提交于
This patch is rebased version of earlier post to add I2C driver support to OMAP4 platform. On OMAP4, all I2C register address offsets are changed from OMAP1/2/3 I2C. In order to not have #ifdef's at various places in code, as well as to support multi-OMAP build, an array is created to hold the register addresses with it's offset. This patch was submitted, reviewed and acked on mailing list already. For more details refer below link http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html This updated verion has a depedancy on "Add support for 16-bit registers" posted on linux-omap. Below is the patch-works link for the same http://patchwork.kernel.org/patch/72295/Signed-off-by: NSyed Rafiuddin <rafiuddin.syed@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Reviewed-by: NPaul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 20 4月, 2010 1 次提交
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由 Mika Westerberg 提交于
Commit d84d3ea3 added register shift to allow also 16-bit register access. However, omap_i2c_unidle() is called before these are set which causes the following OOPS: Unhandled fault: alignment exception (0x801) at 0xfa070009 Internal error: : 801 [#1] last sysfs file: Modules linked in: CPU: 0 Not tainted (2.6.34-rc2-00052-gae6be51e #3) PC is at omap_i2c_unidle+0x44/0x138 LR is at trace_hardirqs_on_caller+0x158/0x18c pc : [<c01cd2c4>] lr : [<c00743f8>] psr: 20000013 sp : cfc2bf10 ip : 00000009 fp : 00000000 r10: 00000000 r9 : 00000000 r8 : c0378560 r7 : c0378b88 r6 : c0378558 r5 : cfcadc00 r4 : cfcadc00 r3 : 00000009 r2 : fa070000 r1 : 00000000 r0 : 00000000 Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387f Table: 80004019 DAC: 00000017 Process swapper (pid: 1, stack limit = 0xcfc2a2e8) Stack: (0xcfc2bf10 to 0xcfc2c000) bf00: c0372cf8 c027225c 00000000 c0a69678 bf20: cfc3e508 c0500898 c0378560 c0378560 c0500898 cfcac8c0 c04fc280 c017d4f4 bf40: c0378560 c017c63c c0378560 c0378594 c0500898 cfcac8c0 c04fc280 c017c754 bf60: 00000000 c017c6f4 c0500898 c017beac cfc16a5c cfc3fd94 c0023448 c0500898 bf80: c0500898 c017b7d4 c032dc7f 00000093 cfc28d40 c0023448 00000000 c0500898 bfa0: 00000000 00000000 00000000 c017ca48 c0023448 00000000 c001d274 00000000 bfc0: 00000000 c002b344 00000031 00000000 00000000 00000192 00000000 c0023448 bfe0: 00000000 00000000 00000000 c0008578 00000000 c002c304 ffdfffff ffffffff [<c01cd2c4>] (omap_i2c_unidle+0x44/0x138) from [<c027225c>] (omap_i2c_probe+0x1a4/0x398) [<c027225c>] (omap_i2c_probe+0x1a4/0x398) from [<c017d4f4>] (platform_drv_probe+0x18/0x1c) [<c017d4f4>] (platform_drv_probe+0x18/0x1c) from [<c017c63c>] (driver_probe_device+0xc0/0x178) [<c017c63c>] (driver_probe_device+0xc0/0x178) from [<c017c754>] (__driver_attach+0x60/0x84) [<c017c754>] (__driver_attach+0x60/0x84) from [<c017beac>] (bus_for_each_dev+0x44/0x74) [<c017beac>] (bus_for_each_dev+0x44/0x74) from [<c017b7d4>] (bus_add_driver+0x9c/0x218) [<c017b7d4>] (bus_add_driver+0x9c/0x218) from [<c017ca48>] (driver_register+0xa8/0x130) [<c017ca48>] (driver_register+0xa8/0x130) from [<c002b344>] (do_one_initcall+0x5c/0x1b8) [<c002b344>] (do_one_initcall+0x5c/0x1b8) from [<c0008578>] (kernel_init+0x90/0x144) [<c0008578>] (kernel_init+0x90/0x144) from [<c002c304>] (kernel_thread_exit+0x0/0x8) Code: e5942004 e3a0c009 e1a0331c e3a01000 (e18210b3) ---[ end trace 1b75b31a2719ed1c ]--- This patch moves register shift setting before any register accesses are done. Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 08 3月, 2010 2 次提交
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由 Uwe Kleine-König 提交于
A pointer to omap_i2c_probe is passed to the core via platform_driver_register and so the function must not disappear when the .init sections are discarded. Otherwise (if also having HOTPLUG=y) unbinding and binding a device to the driver via sysfs will result in an oops as does a device being registered late. An alternative to this patch is using platform_driver_probe instead of platform_driver_register plus removing the pointer to the probe function from the struct platform_driver. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: chandra shekhar <x0044955@ti.com> Cc: Jason P Marini <jason.marini@gmail.com> Cc: Syed Mohammed Khasim <x0khasim@ti.com> Cc: Jarkko Nikula <jarkko.nikula@nokia.com> Cc: Juha Yrjola <juha.yrjola@solidboot.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Cory Maccarrone 提交于
The current i2c-omap driver is set up for 32-bit registers, which corresponds to most OMAP devices. However, OMAP730/850 based devices use a 16-bit register size. This change modifies the driver to perform a runtime CPU type check to determine the register sizes, and uses a bit shift of either 1 or 2 bits to compute the proper register sizes for all registers. Signed-off-by: NCory Maccarrone <darkstar6262@gmail.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 24 12月, 2009 2 次提交
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由 Manjunatha GK 提交于
Current OMAP3 I2C driver code does not follow the correct sequence for soft reset. Due to this, lock up issues are reported during timeout/error cases. This patch fixes above issue by disabling I2C controller as per OMAP3430 TRM for soft reset. As per TRM, I2C controller needs to be disabled as a first step during soft reset. Here is correct soft reset sequence: a. Ensure that the module is disabled (clear the I2Ci.I2C_CON[15] I2C_EN bit to 0). b. Set the I2Ci.I2C_SYSC[1] SRST bit to 1. c. Enable the module by setting I2Ci.I2C_CON[15] I2C_EN bit to 1. d. Check the I2Ci.I2C_SYSS[0] RDONE bit until it is set to 1 to indicate the software reset is complete. Tested on Zoom2, Zoom3, 3430SDP and 3630SDP Signed-off-by: NManjunatha GK <manjugk@ti.com> Signed-off-by: George, Harith<harith@ti.com> Acked-by: Varadarajan, Charu Latha<charu@ti.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Cory Maccarrone 提交于
Commit ef871432... (i2c-omap: OMAP3: PM: (re)init for every transfer to support off-mode) introduced a change which make the dev->iestate contents be written to the OMAP_I2C_IE_REG every time omap_i2c_unidle is called. Previously, the state was only written if it wasn't equal to zero. In omap_i2c_probe, omap_i2c_unidle() is called prior to omap_i2c_init(), in which case dev->iestate has not yet been initialized and will be set to zero. Having this value written to the registers causes deadlock while booting. As such, this change restores the original functionality. Signed-off-by: NCory Maccarrone <darkstar6262@gmail.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 09 12月, 2009 1 次提交
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由 Rajendra Nayak 提交于
Because of OMAP off-mode, powerdomain can go off when I2C is idle. Save enough state, and do a re-init for each transfer. Additional save/restore state added by Jagadeesh Bhaskar Pakaravoor (SYSC_REG) and Aaro Koskinen (wakeup sources.) Also, The OMAP3430 TRM states: "During active mode (I2Ci.I2C_CON[15] I2C_EN bit is set to 1), make no changes to the I2Ci.I2C_SCLL and I2Ci.I2C_SCLH registers. Changes may result in unpredictable behavior." Hence, the I2C_EN bit should be clearer when modifying these registers. Please note that clearing the entire I2C_CON register to disable the I2C module is safe, because the I2C_CON register is re-configured for each transfer. Signed-off-by: NJouni Hogander <jouni.hogander@nokia.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Cc: Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: Jon Hunter <jon-hunter@ti.com> Cc: Hu Tao <taohu@motorola.com> Cc: Xiaolong Chen <A21785@motorola.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 21 8月, 2009 3 次提交
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由 Moiz Sonasath 提交于
Silicon Errata 1.153 has been fixed on OMAP 3630|4430 with the use of a later version of I2C IP block. The errata impacts OMAP 2420|2430|3430, enable the workaround for these based on I2C IP block revision number instead of OMAP CPU type Signed-off-by: NMoiz Sonasath <m-sonasath@ti.com> Signed-off-by: Vikram Pandita <vikram.pandita@ti.com Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Moiz Sonasath 提交于
ACK any pending read/write interrupts before exiting the ISR either after completing the operation [ARDY interrupt] or in case of an error [NACK|AL interrupt] Signed-off-by: NMoiz Sonasath <m-sonasath@ti.com> Signed-off-by: NVikram Pandita <vikram.pandita@ti.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Nishanth Menon 提交于
I2C status ack for [RX]RDR and [RX]RDY could cause race conditions of clearing the event twice and a violation of the programing sequence as defined in TRM This patch fixes the same. Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NMoiz Sonasath <m-sonasath@ti.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 30 7月, 2009 4 次提交
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由 Sonasath, Moiz 提交于
When an XRDY/XDR is hit, wait for XUDF before writing data to DATA_REG. Otherwise some data bytes can be lost while transferring them from the memory to the I2C interface. Do a Busy-wait for XUDF, before writing data to DATA_REG. While waiting if there is NACK | AL, set the appropriate error flags, ack the pending interrupts and return from the ISR. Signed-off-by: NMoiz Sonasath <m-sonasath@ti.com> Signed-off-by: NVikram pandita <vikram.pandita@ti.com> [ben-linux@fluff.org: fixed mail format and added i2c-omap to subject] Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Sonasath, Moiz 提交于
In case of a NACK or ARDY or AL interrupt, complete the request. There is no need to service the RRDY/RDR or XRDY/XDR interrupts. Refer TRM SWPU114: Figure 18-31.I2C Master Transmitter Mode, Interrupt Method, in F/S and HS Modes http://focus.ti.com/pdfs/wtbu/SWPU114T_PrelimFinalEPDF_06_25_2009.pdfSigned-off-by: NMoiz Sonasath <m-sonasath@ti.com> Signed-off-by: NVikram pandita <vikram.pandita@ti.com> [ben-linux@fluff.org: fixed mail format and added i2c-omap to subject] Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Sonasath, Moiz 提交于
Fix bug in reading the I2C_BUFFSTAT register for getting byte count on RX/TX interrupt. On Interrupt: I2C_STAT[RDR], read 'RXSTAT' from I2C_BUFFSTAT[8-13] On Interrupt: I2C_STAT[XDR] read 'TXSTAT' from I2C_BUFFSTAT[0-5] Signed-off-by: NJagadeesh Pakaravoor <j-pakaravoor@ti.com> Signed-off-by: NMoiz Sonasath <m-sonasath@ti.com> Signed-off-by: NVikram pandita <vikram.pandita@ti.com> [ben-linux@fluff.org: fixed mail format and added i2c-omap to subject] Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Roel Kluin 提交于
strlcpy() will always null terminate the string. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 15 7月, 2009 1 次提交
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由 Julia Lawall 提交于
Use the function resource_size, which reduces the chance of introducing off-by-one errors in calculating the resource size. The semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @@ struct resource *res; @@ - (res->end - res->start) + 1 + resource_size(res) // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 22 6月, 2009 1 次提交
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由 Tony Lindgren 提交于
Hi Ben, Can you please queue this fix? Thanks, Tony >From ffe2b2cdf6283770b70a197e3748c6b40a1006be Mon Sep 17 00:00:00 2001 From: Tony Lindgren <tony@atomide.com> Date: Wed, 17 Jun 2009 13:14:23 +0300 Subject: [PATCH] i2c-omap: Fix build breaking typo in cpu_is_omap_2430 Commit 84bf2c86 introduced a typo, it should be cpu_is_omap2430 instead. The typo was probably caused by a mismerge. Without this patch all omaps fail to build with: error: implicit declaration of function 'cpu_is_omap_2430' Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 17 6月, 2009 1 次提交
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由 Linus Walleij 提交于
This replace all instances in the i2c busses tree of res->end - res->start + 1 with the handy macro resource_size(res) from ioport.h (coming in from platform_device.h). This was created with a simple sed -i -e 's/\([a-z]*\)->end *- *[a-z]*->start *+ *1/resource_size(\1)/g' Then manually replacing the PXA redefiniton of the same kind of macro manually. Recompiled some ARM defconfigs I could find to make a rough test so it shouldn't break anything, though I couldn't see exactly which configs you need for all the drivers. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 13 6月, 2009 2 次提交
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由 Aaro Koskinen 提交于
Use longer noise filter period for fast and standard mode. Based on an earlier patch by Eero Nurkkala. Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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由 Aaro Koskinen 提交于
Fix scll/sclh calculations for HS and fast modes. Currently the driver uses equal (roughly) low/high times which will result in too short low time. OMAP3430 TRM gives the following equations: F/S: tLow = (scll + 7) * internal_clk tHigh = (sclh + 5) * internal_clk HS: tLow = (scll + 7) * fclk tHigh = (sclh + 5) * fclk Furthermore, the I2C specification sets the following minimum values for HS tLow/tHigh for capacitive bus loads 100 pF (maximum speed 3400) and 400 pF (maximum speed 1700): speed tLow tHigh 3400 160 ns 60 ns 1700 320 ns 120 ns and for F/S: speed tLow tHigh 400 1300 ns 600 ns 100 4700 ns 4000 ns By using duty cycles 33/66 (HS, F) and 50/50 (S) we stay above these minimum values. Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 09 2月, 2009 3 次提交
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由 Russell King 提交于
By providing a dummy ick for OMAP1510 and OMAP310, we avoid having SoC conditional clock information in i2c-omap.c. Also, fix the error handling by making sure we propagate the error returned via clk_get(). Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
On OMAP1, the I2C functional clock (fck) is the armxor_ck, so there's no need to get "armxor_ck" separately. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 12月, 2008 1 次提交
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由 Ben Dooks 提交于
The probe function used a pointer to the interrupt handler to register as a 'void *', change it to the proper type of irq_handler_t. Signed-off-by: NBen Dooks <ben-linux@fluff.org>
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- 22 11月, 2008 12 次提交
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由 Kalle Jokiniemi 提交于
I2C_WE registers were not configured, which caused huge delays in I2C operations while cpu idle was enabled and omap entered WFI. This patch enables all I2C wakeup sources. Signed-off-by: NKalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
The I2C controller clears its OCP_SYSCONFIG register after an OCP soft reset. Reprogram OCP_SYSCONFIG for maximum power savings on rev3.6 controllers and beyond. On 2430, this involves setting the module AUTOIDLE bit. On 3430, this includes module AUTOIDLE, wakeup enable, slave smart-idle, and considers only the module functional clock state for idle-ack. Boot-tested on 2430SDP and 3430SDP. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
i2c-omap discriminates only between "revision 1" or "greater than revision 1." A following patch introduces code that must also discriminate between rev2.x, rev3.6, and rev3.12 controllers. Support this by storing the full revision data from the I2C_REV register, rather than just a single bit. The revision definitions may need to be extended for other ES levels that aren't currently available here. rev3.6 is what's present on the 2430SDP here (unknown ES revision); rev3.12 is used on the 3430ES2 here. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
omap_i2c_unidle() and omap_i2c_idle() are called recursively during omap_i2c_probe(). This is evidently unexpected and will wipe out the I2C interrupt enable register the second time that omap_i2c_idle() is called consecutively. Any I2C transactions following a probe of a bus with at least one device on it will then time out. Fix by moving omap_i2c_idle() further up in omap_i2c_probe(). Ensure the I2C controller is marked as idle before the probe starts. Also attempt to catch future reappearances of this bug early in development by warning in omap_i2c_{un,}idle() when they are called recursively. Problem reported by David Brownell <david-b@pacbell.net>. Tested on 3430SDP and 2430SDP. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: David Brownell <david-b@pacbell.net> Cc: Richard Woodruff <r-woodruff2@ti.com> Acked-by; Steve Sakoman <steve@sakoman.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Minor sparse, checkpatch and formatting clean-up. Also update copyrights. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
Skip compiling OMAP15xx I2C ISR for non-OMAP15xx builds. Saves 400 bytes of text for most OMAP builds. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
Mark functions called only at init time as __init. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Chandra shekhar 提交于
Add support for omap34xx Signed-off-by: Nchandra shekhar <x0044955@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Nishanth Menon 提交于
Based on an earlier patch from Nishant Menon: - Transfers can use FIFO on FIFO capable devices - Prevents errors for HSI2C if FIFO is not used - Implemented errenous handling of STT-STP handling on SDP2430 Also merged in is a fix from Jaron Marini to fix occasional i2c hang if OMAP_I2C_CON_STT remains asserted. Signed-off-by: NJason P Marini <jason.marini@gmail.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Syed Mohammed Khasim 提交于
Omap2430 has additional support for high-speed I2C. This patch moves I2C speed parameter (from module) to platform data. Also added basic High Speed support based on I2C bus speed. This patch is tested for high speed I2C (with TWL4030 Keypad) and works as expected. Also change the 2430 i2chs_fck names to use the standard naming. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NSyed Mohammed Khasim <x0khasim@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
omap_i2c_idle() sets an internal flag, "dev->idle", instructing its ISR to decline interrupts. It sets this flag before it actually masks the interrupts on the I2C controller. This is problematic, since an I2C interrupt could arrive after dev->idle is set, but before the interrupt source is masked. When this happens, Linux disables the I2C controller's IRQ, causing all future transactions on the bus to fail. Symptoms, happening on about 7% of boots: irq 56: nobody cared (try booting with the "irqpoll" option) <warning traceback here> Disabling IRQ #56 i2c_omap i2c_omap.1: controller timed out In omap_i2c_idle(), this patch sets dev->idle only after the interrupt mask write to the I2C controller has left the ARM write buffer. That's probably the major offender. For additional prophylaxis, in omap_i2c_unidle(), the patch clears the dev->idle flag before interrupts are enabled, rather than afterwards. The patch has survived twenty-two reboots on the 3430SDP here without wedging I2C1. Not absolutely dispositive, but promising! Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jarkko Nikula 提交于
If there is a signal pending and wait_for_completion_interruptible_timeout terminates with -ERESTARTSYS, we return and disable the i2c clocks in omap_i2c_xfer. If we terminate before sending last i2c message with a stop condition, the bus remains busy and we are not able to send new messages into bus with successive omap_i2c_xfer calls. Therefore a pending signal is not caught here and we return only because of timeout or i2c error. Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: NJuha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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