Fix scll/sclh calculations for HS and fast modes. Currently the driver
uses equal (roughly) low/high times which will result in too short
low time.

OMAP3430 TRM gives the following equations:

	F/S: tLow  = (scll + 7) * internal_clk
	     tHigh = (sclh + 5) * internal_clk
	HS:  tLow  = (scll + 7) * fclk
	     tHigh = (sclh + 5) * fclk

Furthermore, the I2C specification sets the following minimum values
for HS tLow/tHigh for capacitive bus loads 100 pF (maximum speed 3400)
and 400 pF (maximum speed 1700):

	speed	tLow		tHigh
	3400	160 ns		60 ns
	1700	320 ns		120 ns

and for F/S:

	speed	tLow		tHigh
	400	1300 ns		600 ns
	100	4700 ns		4000 ns

By using duty cycles 33/66 (HS, F) and 50/50 (S) we stay above these
minimum values.
Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>