- 28 4月, 2008 2 次提交
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由 Jordan Crouse 提交于
While running in flatpanel mode it is important to change the FP sync bits (VG register 0x408) rather then the CRT sync bits (VG register 0x008). This patch keeps the CRT sync bits at default when a flatpanel exists. Note that this also fixes inverted logic; we want CRT_VSYNC_POL to be set (ie, vsync is normally high) when FB_SYNC_VERT_HIGH_ACT is unset. Signed-off-by: NJordan Crouse <jordan.crouse@amd.com> Signed-off-by: NAndres Salomon <dilinger@debian.org> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Andres Salomon 提交于
This cleans up a few MSR-using drivers in the following manner: - Ensures MSRs are all defined in asm/geode.h, rather than in misc places - Makes the naming consistent; cs553[56] ones begin with MSR_, GX-specific ones start with MSR_GX_, and LX-specific ones start with MSR_LX_. Also, make the names match the data sheet. - Use MSR names rather than numbers in source code - Document the fact that the LX's MSR_PADSEL has the wrong value in the data sheet. That's, uh, good to note. Signed-off-by: NAndres Salomon <dilinger@debian.org> Acked-by: NJordan Crouse <jordan.crouse@amd.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 20 10月, 2007 1 次提交
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由 Mike Travis 提交于
cpu_data is currently an array defined using NR_CPUS. This means that we overallocate since we will rarely really use maximum configured cpus. When NR_CPU count is raised to 4096 the size of cpu_data becomes 3,145,728 bytes. These changes were adopted from the sparc64 (and ia64) code. An additional field was added to cpuinfo_x86 to be a non-ambiguous cpu index. This corresponds to the index into a cpumask_t as well as the per_cpu index. It's used in various places like show_cpuinfo(). cpu_data is defined to be the boot_cpu_data structure for the NON-SMP case. Signed-off-by: NMike Travis <travis@sgi.com> Acked-by: NChristoph Lameter <clameter@sgi.com> Cc: Andi Kleen <ak@suse.de> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Dmitry Torokhov <dtor@mail.ru> Cc: "Antonino A. Daplas" <adaplas@pol.net> Cc: Mark M. Hoffman <mhoffman@lightlink.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 09 12月, 2006 3 次提交
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由 Jordan Crouse 提交于
For Geode devices without a flatpanel aware BIOS, this enables the flatpanel power and data. Signed-off-by: NJordan Crouse <jordan.crouse@amd.com> Cc: "Antonino A. Daplas" <adaplas@pol.net> Acked-by: NJames Simmons <jsimmons@infradead.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Jordan Crouse 提交于
Support TFT panels by correctly setting up the flat panel registers [akpm@osdl.org: cleanups] Signed-off-by: NJordan Crouse <jordan.crouse@amd.com> Cc: "Antonino A. Daplas" <adaplas@pol.net> Acked-by: NJames Simmons <jsimmons@infradead.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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由 Jordan Crouse 提交于
We cannot assume that the BIOS will be correctly setting up the hardware, so set some bits in various display registers to enable video output. Allow an advanced user to specify a frambuffer size, rather then probing the BIOS. All of these fixes were prompted by the OLPC effort. [akpm@osdl.org: cleanups] Signed-off-by: NJordan Crouse <jordan.crouse@amd.com> Cc: "Antonino A. Daplas" <adaplas@pol.net> Acked-by: NJames Simmons <jsimmons@infradead.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 28 3月, 2006 1 次提交
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由 David Vrabel 提交于
A framebuffer driver for the display controller in AMD Geode GX processors (Geode GX533, Geode GX500 etc.). Tested at 640x480, 800x600, 1024x768 and 1280x1024 at 8, 16, and 24 bpp with both CRT and TFT. No accelerated features currently implemented and compression remains disabled. This driver requires that the BIOS (or the SoftVG/Firmbase code in the BIOS) has created an appropriate virtual PCI header. Signed-off-by: NDavid Vrabel <dvrabel@arcom.com> Signed-off-by: NAntonino Daplas <adaplas@pol.net> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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