提交 f0a0c1f2 编写于 作者: J Jordan Crouse 提交者: Linus Torvalds

gxfb: set the right registers to tweak the sync polarity

While running in flatpanel mode it is important to change the FP sync bits (VG
register 0x408) rather then the CRT sync bits (VG register 0x008).  This patch
keeps the CRT sync bits at default when a flatpanel exists.

Note that this also fixes inverted logic; we want CRT_VSYNC_POL to be set (ie,
vsync is normally high) when FB_SYNC_VERT_HIGH_ACT is unset.
Signed-off-by: NJordan Crouse <jordan.crouse@amd.com>
Signed-off-by: NAndres Salomon <dilinger@debian.org>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
上级 e9338364
......@@ -208,7 +208,7 @@ gx_configure_tft(struct fb_info *info)
fp = 0x0F100000;
/* Add sync polarity */
/* Configure sync polarity */
if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
fp |= GX_FP_PT2_VSP;
......@@ -269,11 +269,15 @@ static void gx_configure_display(struct fb_info *info)
/* Enable hsync and vsync. */
dcfg |= GX_DCFG_HSYNC_EN | GX_DCFG_VSYNC_EN;
/* Sync polarities. */
if (info->var.sync & FB_SYNC_HOR_HIGH_ACT)
dcfg |= GX_DCFG_CRT_HSYNC_POL;
if (info->var.sync & FB_SYNC_VERT_HIGH_ACT)
dcfg |= GX_DCFG_CRT_VSYNC_POL;
/* Only change the sync polarities if we are running
* in CRT mode. The FP polarities will be handled in
* gxfb_configure_tft */
if (par->enable_crt) {
if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
dcfg |= GX_DCFG_CRT_HSYNC_POL;
if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
dcfg |= GX_DCFG_CRT_VSYNC_POL;
}
/* Enable the display logic */
/* Set up the DACS to blank normally */
......
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