- 31 8月, 2013 7 次提交
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由 Ezequiel Garcia 提交于
This is just a cosmetic change, to make the code more readable. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
The ONFI command 'parameter page read' needs a non-standard length. Therefore, we enable the 'length override' field in NDCB0 and set a non-zero 'length count' in NDCB3. Additionally, the 'spare enable' bit must be disabled for any command that sets a non-zero 'length count' in NDCB3. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
Some newer controllers support a fourth command buffer. This additional command buffer allows to set an arbitrary length count, using the NDCB3.NDLENCNT field, to perform non-standard length operations such as the ONFI parameter page read. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
Some commands (such as the ONFI parameter page read) need to clear the 'spare enable' bit. This commit allows to set/clear depending on the prepared command, instead of having it always set. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
When ECC is not selected, the ECC enable bit must be cleared in the NAND control register. Same applies to DMA. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
This driver supports NFCv1 (as found in PXA SoC) and NFCv2 (as found in Armada 370/XP SoC). As both controller has a few differences, a way of distinguishing between the two is needed. This commit introduces a new compatible string 'marvell,armada370-nand' and assigns a compatible data of type enum pxa3xx_nand_variant to allow such distinction. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NDaniel Mack <zonque@gmail.com> Cc: devicetree@vger.kernel.org Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Jingoo Han 提交于
Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 06 8月, 2013 12 次提交
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由 Jingoo Han 提交于
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d063 (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
This command is required to identify ONFI-compliant devices. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
This allows to support READID ONFI command which sends 0x20 as address together with the 0x90 READID command. This is required to detect ONFI compliant devices. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
This module's device table is incorrectly declared using i2c_pxa_dt_ids, instead of pxa3xx_nand_dt_ids. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
This patch replaces cpu_is_pxa3xx() with of_machine_is_compatible() which allows to build this driver for other platforms than ARCH_PXA. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
Currently, the variable info->use_dma is never set and always zero-valued which means the driver never does DMA transfers. We fix this by simply setting info->use_dma to the module parameter, also named 'use_dma'. Note that the module parameter has the same name, but different semantics. This fixes a regression introduced by the below commit which removed the info->use_dma variable set. commit 4eb2da89 Author: Lei Wen <leiwen@marvell.com> Date: Mon Feb 28 10:32:13 2011 +0800 mtd: pxa3xx_nand: unify prepare command Before the above commit, the driver had use_dma=1 on all NAND commands except on CMD_STATUS. This behavior is long lost and we are not recovering in this patch, either. This was spotted and verified by human inspection. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
Create a function to release the buffer and the dma channel, thus undoing what pxa3xx_nand_init_buff() did. This commit makes the code more readable and will allow to handle non-DMA capable platforms easier. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
clk_prepare_enable() can fail due to unknown reason. Add a check for this and return the error code if it fails. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
This patch converts the module to use clk_prepare_enable and clk_disable_unprepare variants as required by common clock framework. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
Replacing clk_get by managed devm_clk_get, the error path can be greatly simplified. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
Using the new devm_ioremap_resource() we can greatly simplify resource handling. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ezequiel Garcia 提交于
Replace regular kzalloc with managed devm_kzalloc which simplifies the error path. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 05 4月, 2013 1 次提交
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由 Artem Bityutskiy 提交于
The 'id' is a bit confusing name because NAND IDs are multi-byte. Re-name it to 'dev_id' to make it clear that this is the "device ID" part (the second byte). While on it, clean-up the commentary for 'struct nand_flash_dev'. Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Acked-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 29 9月, 2012 1 次提交
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由 Huang Shijie 提交于
Just as Artem suggested: "Both UBI and JFFS2 are able to read verify what they wrote already. There are also MTD tests which do this verification. So I think there is no reason to keep this in the NAND layer, let alone wasting RAM in the driver to support this feature. Besides, it does not work for sub-pages and many drivers have it broken. It hurts more than it provides benefits." So kill MTD_NAND_VERIFY_WRITE entirely. Signed-off-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 14 9月, 2012 1 次提交
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由 Arnd Bergmann 提交于
Platform data for device drivers should be defined in include/linux/platform_data/*.h, not in the architecture and platform specific directories. This moves such data out of the pxa include directories Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: NNicolas Pitre <nico@linaro.org> Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Acked-by: NJeff Garzik <jgarzik@redhat.com> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr> Acked-by: NPaul Parsons <lost.distance@yahoo.com> Acked-by: NVinod Koul <vinod.koul@linux.intel.com> Acked-By: NStefan Schmidt <stefan@openezx.org> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Daniel Ribeiro <drwyrm@gmail.com> Cc: Harald Welte <laforge@openezx.org> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Tomas Cech <sleep_walker@suse.cz> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Jonathan Cameron <jic23@cam.ac.uk> Cc: Dan Williams <djbw@fb.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Chris Ball <cjb@laptop.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Samuel Ortiz <samuel@sortiz.org> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Liam Girdwood <lrg@ti.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Cc: openezx-devel@lists.openezx.org
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- 20 8月, 2012 1 次提交
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由 Haojian Zhuang 提交于
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
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- 16 8月, 2012 1 次提交
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由 Daniel Mack 提交于
This patch contains a hack to get the DMA resources of the device when probed from a devicetree node. This can be removed once a generic DMA controller framework lands. A mtd_part_parser_data is passed mtd_device_parse_register which contains a reference to the device node, so MTD partitions can be added as children. Signed-off-by: NDaniel Mack <zonque@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
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- 07 7月, 2012 2 次提交
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由 Josh Wu 提交于
There is an implemention of hardware ECC write page function which may return an error indication. For instance, using Atmel HW PMECC to write one page into a nand flash, the hardware engine will compute the BCH ecc code for this page. so we need read a the status register to theck whether the ecc code is generated. But we cannot assume the status register always can be ready, for example, incorrect hardware configuration or hardware issue, in such case we need write_page() to return a error code. Since the definition of 'write_page' function in struct nand_ecc_ctrl is 'void'. So this patch will: 1. add return 'int' value for 'write_page' function. 2. to be consitent, add return 'int' value for 'write_page_raw' fuctions too. 3. add code to test the return value, and if negative, indicate an error happend when write page with ECC. 4. fix the compile warning in all impacted nand flash driver. Note: I couldn't compile-test all of these easily, as some had ARCH dependencies. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Brian Norris 提交于
According to its documentation, the NAND_NO_READRDY option is always used when autoincrement is not supported. Autoincrement support was recently dropped, so we can drop this options as well (defaulting to "no read ready check"). Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 14 5月, 2012 2 次提交
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由 Brian Norris 提交于
New NAND controllers can perform read/write via HW engines which don't expose OOB data in their DMA mode. To reflect this, we should rework the nand_chip / nand_ecc_ctrl interfaces that assume that drivers will always read/write OOB data in the nand_chip.oob_poi buffer. A better interface includes a boolean argument that explicitly tells the callee when OOB data is requested by the calling layer (for reading/writing to/from nand_chip.oob_poi). This patch adds the 'oob_required' parameter to each relevant {read,write}_page interface; all 'oob_required' parameters are left unused for now. The next patch will set the parameter properly in the nand_base.c callers, and follow-up patches will make use of 'oob_required' in some of the callee functions. Note that currently, there is no harm in ignoring the 'oob_required' parameter and *always* utilizing nand_chip.oob_poi, but there can be performance/complexity/design benefits from avoiding filling oob_poi in the common case. I will try to implement this for some drivers which can be ported easily. Note: I couldn't compile-test all of these easily, as some had ARCH dependencies. [dwmw2: Merge later 1/0 vs. true/false cleanup] Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Reviewed-by: NShmulik Ladkani <shmulik.ladkani@gmail.com> Acked-by: NJiandong Zheng <jdzheng@broadcom.com> Acked-by: NMike Dunn <mikedunn@newsguy.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Brian Norris 提交于
No drivers use auto-increment NAND, so kill the NO_AUTOINCR option entirely. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 27 3月, 2012 2 次提交
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由 Mike Dunn 提交于
Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the maximum number of bit errors that can be corrected in one writesize region. Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl, which is the maximum number of bit errors that can be corrected in one ecc step. Nand infrastructure code translates this to 'ecc_strength'. Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the driver for all other modes. Signed-off-by: NMike Dunn <mikedunn@newsguy.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Artem Bityutskiy 提交于
The first 3 arguments of 'mtd_device_parse_register()' are pointers, but many callers pass '0' instead of 'NULL'. Fix this globally. Thanks to coccinelle for making it easy to do with the following semantic patch: @@ expression mtd, types, parser_data, parts, nr_parts; @@ ( -mtd_device_parse_register(mtd, 0, parser_data, parts, nr_parts) +mtd_device_parse_register(mtd, NULL, parser_data, parts, nr_parts) | -mtd_device_parse_register(mtd, types, 0, parts, nr_parts) +mtd_device_parse_register(mtd, types, NULL, parts, nr_parts) | -mtd_device_parse_register(mtd, types, parser_data, 0, nr_parts) +mtd_device_parse_register(mtd, types, parser_data, NULL, nr_parts) ) Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 13 1月, 2012 1 次提交
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由 Rusty Russell 提交于
module_param(bool) used to counter-intuitively take an int. In fddd5201 (mid-2009) we allowed bool or int/unsigned int using a messy trick. It's time to remove the int/unsigned int option. For this version it'll simply give a warning, but it'll break next kernel version. Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
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- 10 1月, 2012 3 次提交
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由 Artem Bityutskiy 提交于
Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Artem Bityutskiy 提交于
Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Axel Lin 提交于
This patch converts the drivers in drivers/mtd/* to use the module_platform_driver() macro which makes the code smaller and a bit simpler. Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 11 9月, 2011 6 次提交
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由 Lei Wen 提交于
Current pxa3xx_nand controller has two chip select which both be workable. This patch enable this feature. Update platform driver to support this feature. Another notice should be taken that: When you want to use this feature, you should not enable the keep configuration feature, for two chip select could be attached with different nand chip. The different page size and timing requirement make the keep configuration impossible. Signed-off-by: NLei Wen <leiwen@marvell.com>
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由 Lei Wen 提交于
For support two chip select, we seperate chip specific info in this patch. Signed-off-by: NLei Wen <leiwen@marvell.com>
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由 Lei Wen 提交于
Also add missed warning message. Signed-off-by: NLei Wen <leiwen@marvell.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@intel.com>
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由 Lei Wen 提交于
This patch add protection on the suspend&resume path to prevent some unexpected behavior, like interrupt occur at the very second of resume back and it don't follow normal command path, which lead to bug. Signed-off-by: NLei Wen <leiwen@marvell.com>
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由 Dmitry Eremin-Solenikov 提交于
Replace custom invocations of parse_mtd_partitions and mtd_device_register with common mtd_device_parse_register call. This would bring: standard handling of all errors, fallback to default partitions, etc. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
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由 Daniel Mack 提交于
This bug was introduced in f8155a40 ("mtd: pxa3xx_nand: rework irq logic") and causes the PXA3xx NAND controller fail to operate with NAND flash that has empty pages. According to the comment in this block, the hardware controller will report a double-bit error for empty pages, which can and must be ignored. This patch restores the original behaviour of the driver. Signed-off-by: NDaniel Mack <zonque@gmail.com> Acked-by: NLei Wen <leiwen@marvell.com> Cc: Haojian Zhuang <haojian.zhuang@marvell.com> Cc: David Woodhouse <David.Woodhouse@intel.com> Cc: stable@kernel.org [2.6.38+] Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
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