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  1. 13 5月, 2009 5 次提交
    • P
      OMAP3 SRAM: renumber registers to make space for argument passing · b2abb271
      由 Paul Walmsley 提交于 
      Renumber registers in omap3_sram_configure_core_dpll() assembly code to
make space for additional parameters.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      b2abb271
    • P
      OMAP3 SDRC: initialize SDRC_POWER at boot · 98cfe5ab
      由 Paul Walmsley 提交于 
      Initialize SDRC_POWER to a known-good setting when the kernel boots.
Necessary since some bootloaders don't initialize SDRC_POWER properly.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      98cfe5ab
    • P
      OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change · fa0406a8
      由 Paul Walmsley 提交于 
      Clear the SDRC_POWER.PWRENA bit before putting the SDRAM into self-refresh
mode.  This prevents the SDRC from attempting to power off the SDRAM,
which can cause the system to hang.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      fa0406a8
    • P
      OMAP3 clock: add interconnect barriers to CORE DPLL M2 change · d75d9e73
      由 Paul Walmsley 提交于 
      Where necessary, add interconnect barriers to force posted writes to
complete before continuing.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      d75d9e73
    • P
      OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll · 69d4255b
      由 Paul Walmsley 提交于 
      Add more barriers in the SRAM CORE DPLL M2 divider change code.

- Add a DSB SY after the function's entry point to flush all cached
  and buffered writes and wait for the interconnect to claim that they
  have completed[1].  The idea here is to force all delayed write
  traffic going to the SDRAM to at least post to the L3 interconnect
  before continuing.  If these writes are allowed to occur after the
  SDRC is idled, the writes will not be acknowledged and the ARM will
  stall.

  Note that in this case, it does not matter if the writes actually
  complete to the SDRAM - it is only necessary for the writes to leave
  the ARM itself.  If the writes are posted by the interconnect when
  the SDRC goes into idle, the writes will be delayed until the SDRC
  returns from idle[2].  If the SDRC is in the middle of a write when
  it is requested to enter idle, the SDRC will not acknowledge the
  idle request until the writes complete to the SDRAM.[3]

  The old-style DMB in sdram_in_selfrefresh is now superfluous, so,
  remove it.

- Add an ISB before the function's exit point to prevent the ARM from
  speculatively executing into SDRAM before the SDRAM is enabled[4].

...

1. ARMv7 ARM (DDI 0406A) A3-47, A3-48.

2. Private communication with Richard Woodruff <r-woodruff2@ti.com>.

3. Private communication with Richard Woodruff <r-woodruff2@ti.com>.

4. ARMv7 ARM (DDI 0406A) A3-48.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
      69d4255b
  3. 24 4月, 2009 8 次提交
    • P
      OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c files · f248076c
      由 Paul Walmsley 提交于 
      Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12.  Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management.  GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management.  GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator.  But on HS devices, it
may not be available for Linux use.

It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below.  Modify board-omap3beagle.c to use GPTIMER12.

This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.

Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.

Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>
      f248076c
    • S
      OMAP3: clock: Camera module doesn't have IDLEST bit · 9e53dd71
      由 Sergio Aguirre 提交于 
      This patch avoids waiting for the camera module to become ready,
since it doesn't have IDLEST bit.

Based on a earlier hack done by Paul Walmsley on Sep 9 2008 on
linux-omap tree.
Signed-off-by: NSergio Aguirre <saaguirre@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      9e53dd71
    • P
      OMAP2xxx clock: fix broken cpu_mask code · 15ca78f7
      由 Paul Walmsley 提交于 
      Commit 8ad8ff65 breaks the OMAP2xxx
cpu_mask code, which causes OMAP2xxx to panic on boot.  Fix by
removing the cpu_mask auto variable and by changing CK_242X
and CK_243X to use RATE_IN_242X/RATE_IN_243X.

Resolves

<1>Unable to handle kernel NULL pointer dereference at virtual address 0000000c
<1>pgd = c0004000
<1>[0000000c] *pgd=00000000
Internal error: Oops: 5 [#1]
Modules linked in:
CPU: 0    Not tainted  (2.6.29-omap1 #32)
PC is at omap2_clk_set_parent+0x104/0x120
LR is at omap2_clk_set_parent+0x28/0x120
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NJarkko Nikula <jarkko.nikula@nokia.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      15ca78f7
    • R
      ARM: OMAP3: Clean up spurious interrupt check logic · 846c29f1
      由 Roger Quadros 提交于 
      SPURIOUSIRQ is contained in bits 31:7 of INTC_SIR, so
INTC_SIR must be right shifted by 7, not 6.

No change in logic, only changes for better readability.
Refer to register definition of INTCPS_SIR_IRQ in OMAP3 Manual.
Signed-off-by: NRoger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      846c29f1
    • H
      ARM: OMAP3: remove duplicated #include · c485ab50
      由 Huang Weiyi 提交于 
      Removed duplicated #include in arch/arm/mach-omap2/board-rx51.c.
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      c485ab50
    • R
      ARM: OMAP2: possible division by 0 · d94a2edd
      由 Roel Kluin 提交于 
      In linus' git tree the functions can be found at:
vi arch/arm/mach-omap2/usb-tusb6010.c +200	- tusb6010_platform_retime()
vi arch/arm/mach-omap2/gpmc.c +94		- gpmc_get_fclk_period()
vi arch/arm/mach-omap2/usb-tusb6010.c +53	- tusb_set_async_mode()
vi arch/arm/mach-omap2/usb-tusb6010.c +111	- tusb_set_sync_mode()

is -ENODEV appropriate when sysclk_ps == 0?

This was found by code analysis, please review.
------------------------------>8-------------8<---------------------------------
gpmc_get_fclk_period() may return 0 when gpmc_l3_clk is not enabled. This is
not checked in tusb6010_platform_retime() nor in tusb_set_async_mode() it
seems. In tusb_set_sync_mode() this may result in a division by zero.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      d94a2edd
    • J
      ARM: OMAP2: Remove defines and resource init for OMAP24XX EAC · 6b7bff31
      由 Jarkko Nikula 提交于 
      There is no anymore legacy driver for OMAP24XX Enhanced Audio Controller
in linux-omap and it was newer in mainline so cleanup these unneeded
defines and initialization code.
Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      6b7bff31
    • T
      ARM: OMAP: Remove old dead gpio expander code · ba16ec7c
      由 Tony Lindgren 提交于 
      This should be done with GPIO calls. Patches against the
mainline tree welcome to add the necessary working functionality
back.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      ba16ec7c
  5. 23 4月, 2009 1 次提交
    • P
      OMAP2xxx clock: pre-initialize struct clks early · c8088112
      由 Paul Walmsley 提交于 
      Commit 3f0a820c breaks OMAP2xxx boot
during initial propagate_rate() on osc_ck and sys_ck.  Fix by
pre-initializing all struct clks before running any other clock init
code.  Incorporates review comments from Russell King
<rmk+kernel@arm.linux.org.uk>.

Resolves

<1>Unable to handle kernel NULL pointer dereference at virtual address 00000000
<1>pgd = c0004000
<1>[00000000] *pgd=00000000
Internal error: Oops: 5 [#1]
Modules linked in:
CPU: 0    Not tainted  (2.6.29-omap1 #37)
PC is at propagate_rate+0x10/0x60
LR is at omap2_clk_init+0x30/0x218
...
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NJarkko Nikula <jarkko.nikula@nokia.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      c8088112
  7. 22 4月, 2009 1 次提交
  9. 14 4月, 2009 1 次提交
  11. 03 4月, 2009 2 次提交
  13. 02 4月, 2009 1 次提交
  15. 26 3月, 2009 1 次提交
  17. 25 3月, 2009 2 次提交
  19. 24 3月, 2009 18 次提交