提交 9e53dd71 编写于 作者: S Sergio Aguirre 提交者: paul

OMAP3: clock: Camera module doesn't have IDLEST bit

This patch avoids waiting for the camera module to become ready,
since it doesn't have IDLEST bit.

Based on a earlier hack done by Paul Walmsley on Sep 9 2008 on
linux-omap tree.
Signed-off-by: NSergio Aguirre <saaguirre@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
上级 15ca78f7
......@@ -2052,7 +2052,7 @@ static struct clk dss_ick = {
static struct clk cam_mclk = {
.name = "cam_mclk",
.ops = &clkops_omap2_dflt_wait,
.ops = &clkops_omap2_dflt,
.parent = &dpll4_m5x2_ck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_CAM_SHIFT,
......@@ -2063,7 +2063,7 @@ static struct clk cam_mclk = {
static struct clk cam_ick = {
/* Handles both L3 and L4 clocks */
.name = "cam_ick",
.ops = &clkops_omap2_dflt_wait,
.ops = &clkops_omap2_dflt,
.parent = &l4_ick,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
......@@ -2074,7 +2074,7 @@ static struct clk cam_ick = {
static struct clk csi2_96m_fck = {
.name = "csi2_96m_fck",
.ops = &clkops_omap2_dflt_wait,
.ops = &clkops_omap2_dflt,
.parent = &core_96m_fck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
......
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