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  1. 26 12月, 2008 1 次提交
  3. 23 12月, 2008 1 次提交
  5. 19 12月, 2008 3 次提交
  7. 29 11月, 2008 1 次提交
  9. 26 11月, 2008 3 次提交
  11. 21 11月, 2008 1 次提交
  13. 20 11月, 2008 1 次提交
  15. 15 11月, 2008 2 次提交
  17. 13 11月, 2008 1 次提交
    • D
      niu: Fix readq implementation when architecture does not provide one. · e23a59e1
      由 David S. Miller 提交于 
      This fixes a TX hang reported by Jesper Dangaard Brouer.

When an architecutre cannot provide a fully functional
64-bit atomic readq/writeq, the driver must implement
it's own.  This is because only the driver can say whether
doing something like using two 32-bit reads to implement
the full 64-bit read will actually work properly.

In particular one of the issues is whether the top 32-bits
or the bottom 32-bits of the 64-bit register should be read
first.  There could be side effects, and in fact that is
exactly the problem here.

The TX_CS register has counters in the upper 32-bits and
state bits in the lower 32-bits.  A read clears the state
bits.

We would read the counter half before the state bit half.
That first read would clear the state bits, and then the
driver thinks that no interrupts are pending because the
interrupt indication state bits are seen clear every time.

Fix this by reading the bottom half before the upper half.
Tested-by: NJesper Dangaard Brouer <jdb@comx.dk>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e23a59e1
  19. 04 11月, 2008 2 次提交
  21. 28 10月, 2008 1 次提交
  23. 13 9月, 2008 1 次提交
  25. 31 8月, 2008 1 次提交
  27. 30 7月, 2008 1 次提交
  29. 18 7月, 2008 1 次提交
  31. 02 7月, 2008 1 次提交
  33. 12 5月, 2008 1 次提交
  35. 04 5月, 2008 1 次提交
  37. 25 4月, 2008 2 次提交
  39. 29 2月, 2008 1 次提交
  41. 20 2月, 2008 1 次提交
  43. 19 2月, 2008 2 次提交
  45. 29 1月, 2008 1 次提交
  47. 17 1月, 2008 1 次提交
  49. 10 1月, 2008 1 次提交
    • M
      [NIU]: Support for Marvell PHY · b0de8e40
      由 Mirko Lindner 提交于 
      From: Mirko Lindner <mlindner@marvell.com>

This patch makes necessary changes in the Neptune driver to support 
the new Marvell PHY. It also adds support for the LED blinking
on Neptune cards with Marvell PHY. All registers are using defines
in the niu.h header file as is already done for the BCM8704 registers.

[ Coding style, etc. cleanups -DaveM ]
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b0de8e40
  51. 09 1月, 2008 4 次提交
    • D
      [NIU]: Update driver version and release date. · cb77df3e
      由 David S. Miller 提交于 
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cb77df3e
    • D
      [NIU]: Fix potentially stuck TCP socket send queues. · 3ebebccf
      由 David S. Miller 提交于 
      It is possible for the TX ring to have packets sit in it for unbounded
amounts of time.

The only way to defer TX interrupts in the chip is to periodically set
"mark" bits, when processing of a TX descriptor with the mark bit set
is complete it triggers the interrupt for the TX queue's LDG.

A consequence of this kind of scheme is that if packet flow suddenly
stops, the remaining TX packets will just sit there.

If this happens, since those packets could be charged to TCP socket
send queues, such sockets could get stuck.

The simplest solution is to divorce the socket ownership of the packet
once the device takes the SKB, by using skb_orphan() in
niu_start_xmit().

In hindsight, it would have been much nicer if the chip provided two
interrupt sources for TX (like basically every other ethernet chip
does).  Namely, keep the "mark" bit, but also signal the LDG when the
TX queue becomes completely empty.  That way there is no need to have
a deadlock breaker like this.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3ebebccf
    • D
      [NIU]: Missing ->last_rx update. · 792dd90f
      由 David S. Miller 提交于 
      Noticed by Paul Lodridge.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      792dd90f
    • M
      [NIU]: Fix slowpath interrupt handling. · 406f353c
      由 Matheos Worku 提交于 
      niu_slowpath_interrupt() expects values to be setup in lp->{v0,v1,v2}
but they aren't.  That's only done by niu_schedule_napi() which is
done later in the interrupt path.

If niu_rx_error() returns zero, and v0 is clear, hit the
RX_DMA_CTL_STATE register with a RX_DMA_CTL_STAT_MEX.

Only emit verbose RX error logs if a fatal channel or port error is
signalled.  Other cases will be recorded into statistics by
niu_log_rxchan_errors().
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      406f353c
  53. 07 12月, 2007 1 次提交
  55. 22 10月, 2007 1 次提交
    • O
      [NIU]: Cleanup PAGE_SIZE checks a bit · 81429973
      由 Olof Johansson 提交于 
      I get the following warning from a powerpc allyesconfig of current
mainline:

drivers/net/niu.c: In function 'niu_size_rbr':
drivers/net/niu.c:3113: warning: large integer implicitly truncated to unsigned type

PAGE_SIZE in this case is 64KB, so I don't quite get why gcc can't
tell that the line in question will never be reached.

I suggest the following instead, but I can unfortunately not do
anything but build test it.

Also, the driver does some other checks to make sure that PAGE_SIZE is
a power of two (BUILD_BUG_ON() in niu_init()), doesn't seem like that
could ever be untrue? Or are there really archs with non-power-of-two
PAGE_SIZE?
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      81429973
  57. 16 10月, 2007 1 次提交