Implementing discard counters for the NIU driver turned out to be more
complicated than first assumed.

The discard counters for the NIU neptune chip are only 16-bit (even
though this is a 64-bit chip).  These 16-bit counters can overflow
quickly, especially considering this is a 10Gbit/s ethernet card.

The overflow indication bit is, unfortunatly, not usable as the
counter value does not wrap, but remains at max value 0xFFFF.
Resulting in lost counts until the counter is reset.

The read and reset scheme also poses a problem. Both in theory and in
practice counters can be lost in between reading nr64() and clearing
the counter nw64().  For this reason, the number of counter clearings
nw64() is limited/reduced.  On the fast-path the counters are only
syncronized once it exceeds 0x7FFF.  When read by userspace, its
syncronized fully.
Signed-off-by: NJesper Dangaard Brouer <hawk@comx.dk>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>