1. 01 3月, 2016 2 次提交
  2. 26 10月, 2015 1 次提交
  3. 30 9月, 2015 1 次提交
  4. 16 8月, 2015 1 次提交
  5. 11 8月, 2015 1 次提交
  6. 04 2月, 2015 1 次提交
    • D
      drm: remove DRM_FORMAT_NV12MT · 083500ba
      Daniel Vetter 提交于
      So this has been merged originally in
      
      commit 83052d4d
      Author: Seung-Woo Kim <sw0312.kim@samsung.com>
      Date:   Thu Dec 15 15:40:55 2011 +0900
      
          drm: Add multi buffer plane pixel formats
      
      which hasn't seen a lot of review really. The problem is that it's not
      a real pixel format, but just a different way to lay out NV12 pixels
      in macroblocks, i.e. a tiling format.
      
      The new way of doing this is with the soon-to-be-merged fb modifiers.
      
      This was brough up in some long irc discussion around the entire
      topic, as an example of where things have gone wrong. Luckily we can
      correct the mistake:
      - The kms side support for NV12MT is all dead code because
        format_check in drm_crtc.c never accepted NV12MT.
      - The gem side for the gsc support doesn't look better: The code
        forgets to set the pixel format and makes a big mess with the tiling
        mode bits, inadvertedly setting them all.
      
      Conclusion: This never really worked (at least not in upstream) and
      hence we can safely correct our mistake here.
      
      Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
      Cc: Inki Dae <inki.dae@samsung.com>
      Cc: Kyungmin Park <kyungmin.park@samsung.com>
      Cc: Rob Clark <robclark@freedesktop.org>
      Cc: Daniel Stone <daniel@fooishbar.org>
      Cc: Damien Lespiau <damien.lespiau@intel.com>
      Reviewed-by: NRob Clark <robclark@freedesktop.org>
      Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
      Acked-by: NJoonyoung Shim <jy0922.shim@samsung.com>
      Acked-by: NSeung-Woo Kim <sw0312.kim@samsung.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      083500ba
  7. 04 12月, 2014 1 次提交
  8. 19 9月, 2014 5 次提交
  9. 04 8月, 2014 1 次提交
  10. 02 6月, 2014 6 次提交
  11. 19 12月, 2013 1 次提交
  12. 05 9月, 2013 3 次提交
  13. 30 7月, 2013 1 次提交
  14. 28 6月, 2013 2 次提交
  15. 23 5月, 2013 3 次提交
  16. 29 4月, 2013 3 次提交
    • S
      drm/exynos: add device tree support for fimc ipp driver · 5186fc5e
      Sylwester Nawrocki 提交于
      This patch adds OF initialization support for the FIMC driver.
      The binding documentation can be found at Documentation/devicetree/
      bindings/media/samsung-fimc.txt.
      
      The syscon regmap interface is used to serialize access to the
      shared CAMBLK registers from within the V4L2 FIMC-IS and the DRM
      FIMC drivers. The DRM driver uses this interface for setting up
      the FIFO data link between FIMD and FIMC IP blocks, while the V4L2
      one for setting up a data link between the camera ISP and FIMC for
      camera capture. The CAMBLK registers are not accessed any more
      through a statically mapped IO. Synchronized access to these
      registers is required for simultaneous operation of the camera
      ISP and the DRM IPP on Exynos4x12.
      
      The driver data and driver_ids static data structures are removed
      since Exynos4 is going to be a dt-only platform and there is
      currently no board file in mainline that defines platform data
      for the FIMC IPP, i.e. uses it.
      
      Camera input signal polarities are not currently parsed from the
      device tree.
      Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Signed-off-by: NInki Dae <inki.dae@samsung.com>
      5186fc5e
    • S
      drm/exynos: rework fimc clocks handling · e5f86839
      Sylwester Nawrocki 提交于
      The clocks handling is refactored and a "mux" clock handling is
      added to account for changes in the clocks driver. After switching
      to the common clock framework the sclk_fimc clock is now split
      into two clocks: a gate and a mux clock. In order to retain the
      exisiting functionality two additional consumer clocks are passed
      to the driver from device tree: "mux" and "parent". Then the driver
      sets "parent" clock as a parent clock of the "mux" clock. These two
      additional clocks are optional, and should go away when there is a
      standard way of setting up parent clocks on DT platforms.
      Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Signed-off-by: NInki Dae <inki.dae@samsung.com>
      e5f86839
    • S
      drm/exynos: remove redundant devm_kfree() · 4c30cbc0
      Sylwester Nawrocki 提交于
      There is no need for explicit calls of devm_kfree(), as
      the allocated memory will be freed during driver's detach.
      Remove the redundant devm_kfree() calls from probe() and
      remove() callbacks.
      Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
      Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
      Signed-off-by: NInki Dae <inki.dae@samsung.com>
      4c30cbc0
  17. 26 1月, 2013 1 次提交
  18. 04 1月, 2013 6 次提交