- 01 3月, 2016 21 次提交
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由 Andrzej Hajda 提交于
Polarization was never configured for DRM-FIMC device, so fimc_set_polarity function did nothing. In fact DRM does not use camera interface so there is no point in configuring it. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
struct exynos_drm_panel_info is not used anymore, except exynos_dp, which can integrate useful fields directly into its context. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Chanho Park 提交于
This patch adds a exynos5420 driver data to support mic_bypass option to bypass the mic from display out path. The mic(Mobile image compressor) compresses RGB data from fimd and send the compressed data to the mipi dsi. The bypass option can be founded from system register and the bit is 11. The option bit has been introduced since exynos5420. The only difference between exynos5250 and exynos5420/exynos5422 is existence of the bit. Until the MIC is defined and enabled from device tree, the bypass mic will be default option. Signed-off-by: NChanho Park <chanho61.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Chanho Park 提交于
This patch uses DIV_ROUND_CLOSEST instead of DIV_ROUND_UP The DIV_ROUND_CLOSEST can be used to find the closest integer value when we divide some integers. Signed-off-by: NChanho Park <chanho61.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
Include directories are provided by core already, adding them in driver is redundand and causes warnings in case of out-of-tree build. v2: - fixed include in exynos_drm_iommu.c - typo in commit message Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The function is used only locally. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
The variable is unused for long time. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
All global variables are read only. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
Functions are preferred over macros as more type-safe. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Chanho Park 提交于
This patch supports mipi dsi for exynos5422. The dsi register offsets of the exynos5422 are similar with exynos5433. However, the values of the registers are quite different from the exynos5433. For example, the exynos5422 uses sw reset like previous chips. Signed-off-by: NChanho Park <chanho61.park@samsung.com> Reviewed-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Andrzej Hajda 提交于
Decon requires that clocks should be disabled in reverse order. Otherwise system hangs. Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
dma_mmap_attrs() should be called with cpu address returned by dma_alloc_attrs(). Existing code however passed pages array base as cpu address. This worked only by a pure luck on ARM architecture. This patch fixes this issue. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
BIT_IRQS_ENABLED was never set because of incorrect test in decon_vlank_enable() function, what resulted in lack of enabling vblank support. This patch fixes this issue. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
Patch ebf3fd40 ("drm/exynos: add pm_runtime to DECON 5433") removed some code from decon_enable() function, but it left set_bit(BIT_SUSPENDED, &ctx->flags) call, which was earlier called only in error path. This patch removes it, what finally lets driver to go out of suspended state. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
This patch fixes issue introduced by commit cf67cc9a ("drm/exynos: remove struct exynos_drm_display"), which removed assigning of drm bridge to drm encoder. Lack of it caused that no bridge callbacks were called on encoder enable/disable actions. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
There is no point exposing all internal functions to global kernel name space, so make all internals functions static. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
MIC is SoC component and important part of kms pipeline on Exynos5433, so convert it to use component framework like other KMS/CRTC drivers. MIC driver is already listed on KMS component driver list in Exynos DRM core, so without this conversion, initialization of Exynos DRM core fails on Exynos 5433 SoC. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
Drivers should use devm_clk* interface instead of of_clk* functions. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
This patch fixes compilation warnings (on 64bit architectures) and bugs related to casting pointers through 32bit integers. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
Drivers should use %p for printing pointers instead of hardcoding them as hexadecimal integers. This patch fixes compilation warnings on 64bit architectures. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Joonyoung Shim 提交于
Because PLAT_SAMSUNG isn't include exynos SoCs for arm64, but ARCH_EXYNOS can do it. And it also needs to add ARCH_S3C64XX instead of PLAT_SAMSUNG. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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- 28 2月, 2016 3 次提交
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由 Oded Gabbay 提交于
amdgpu must load only after amdkfd's loading has been completed. If that is not enforced, then amdgpu's call into amdkfd's functions will cause a kernel BUG. When amdgpu and amdkfd are built as kernel modules, that rule is enforced by the kernel's modules loading mechanism. When amdgpu and amdkfd are built inside the kernel image, that rule is enforced by ordering in the drm Makefile (amdkfd before amdgpu). Instead of using drm Makefile ordering, we can now use deferred loading as amdkfd now returns -EPROBE_DEFER in kgd2kfd_init() when it is not yet loaded. This patch defers amdgpu loading by propagating -EPROBE_DEFER to the kernel's drivers loading infrastructure. That will put amdgpu into the pending drivers list (see description in dd.c). Once amdkfd is loaded, a call to kgd2kfd_init() will return successfully and amdgpu will be able to load. Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Oded Gabbay 提交于
radeon must load only after amdkfd's loading has been completed. If that is not enforced, then radeon's call into amdkfd's functions will cause a kernel BUG. When radeon and amdkfd are built as kernel modules, that rule is enforced by the kernel's modules loading mechanism. When radeon and amdkfd are built inside the kernel image, that rule is enforced by ordering in the drm Makefile (amdkfd before radeon). Instead of using drm Makefile ordering, we can now use deferred loading as amdkfd now returns -EPROBE_DEFER in kgd2kfd_init() when it is not yet loaded. This patch defers radeon loading by propagating -EPROBE_DEFER to the kernel's drivers loading infrastructure. That will put radeon into the pending drivers list (see description in dd.c). Once amdkfd is loaded, a call to kgd2kfd_init() will return successfully and radeon will be able to load. Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Oded Gabbay 提交于
Current dependencies between amdkfd and radeon/amdgpu force the loading of amdkfd _before_ radeon and/or amdgpu are loaded. When all these kernel drivers are built as modules, this ordering is enforced by the kernel built-in mechanism of loading dependent modules. However, there is no such mechanism in case where all these drivers are compiled inside the kernel image (not as modules). The current way to enforce loading of amdkfd before radeon/amdgpu, is to put amdkfd before radeon/amdgpu in the drm Makefile, but that method is way too fragile. In addition, there is no kernel mechanism to check whether a kernel driver that is built inside the kernel image, has already been loaded. To solve this, this patch adds to kfd_module.c a new static variable, amdkfd_init_completed, that is set to 1 only when amdkfd's module initialization function has been completed (successfully). kgd2kfd_init(), which is the initialization function of the kgd-->kfd interface, and which is the first function in amdkfd called by radeon/amdgpu, will return successfully only if amdkfd_init_completed is equal 1. If amdkfd_init_completed is not equal to 1, kgd2kfd_init() will return -EPROBE_DEFER to signal radeon/amdgpu they need to defer their loading until amdkfd is loaded. Signed-off-by: NOded Gabbay <oded.gabbay@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 2月, 2016 9 次提交
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由 Stefan Agner 提交于
The layer enumeration start with 0 (0-15 for LS1021a and 0-63 for Vybrid) whereas the register enumeration start from 1 (1-10 for LS1021a and 1-9 for Vybrid). The loop started off from 0 for both iterations and initialized the number of layers inclusive, which is one layer too many. All extensively written registers seem to be unassigned, it seems that the write to those registers did not do any harm in practice. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
The current default configuration is as follows: - Invert VSYNC signal (active LOW) - Invert HSYNC signal (active LOW) The mode flags allow to specify the required polarity per mode. Furthermore, none of the current driver settings is actually a standard polarity. This patch applies the current driver default polarities as explicit flags to the display which has been introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b"). The driver now also parses the flags field and applies the configuration accordingly, by using the following values as standard polarities: (e.g. when no flags are specified): - VSYNC signal not inverted (active HIGH) - HSYNC signal not inverted (active HIGH) Acked-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
Fix alpha blending by enabling alpha blending for the whole frame if a color mode with alpha channel is selected (DRM_FORMAT_ARGB*). Also support color modes without alpha channel (DRM_FORMAT_XRGB*) by just not enabling alpha blending on layer level. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
The state of the interrupt mask register on initialization is unknown, e.g. U-Boot could already used the DCU. So depending on the boot loader, the outcome of the interrupt mask register could be different. A defined state is much more preferable. Also, there is no value in keeping interrupts enabled which we don't need. Therefor, mask all interrupts on initialization. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
If initialization fails (e.g. due to missing panel node or deferred probe) make sure to roll-back all operations and return the error code. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
Improve error handling during CRTC initialization. Especially avoid memory leaks in the primary plane initialization error path. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
It is not common to do regmap return value checks, especially not for memory mapped device. We can rule out most error returns since the conditions are static and we know they are ok (e.g. offset aligned to register stride). Also without proper error handling they are not really valuable for the user. Hence remove most of them. The check in the interrupt handler is worth keeping since a volatile register won't be readable in case register caching is still enabled. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Stefan Agner 提交于
Since we are using cached registers, we need to specify volatile registers explicitly to avoid reading their value from the cache. This allows to read the correct interrupt status in fsl_dcu_drm_irq and clear the asserted bits only. Signed-off-by: NStefan Agner <stefan@agner.ch>
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由 Meng Yi 提交于
For state->fb or state->crtc may be NULL in fsl_dcu_drm_plane_atomic_check function, if so, return 0. Signed-off-by: NMeng Yi <meng.yi@nxp.com> Signed-off-by: NJianwei Wang <jianwei.wang.chn@gmail.com> Signed-off-by: NStefan Agner <stefan@agner.ch>
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- 23 2月, 2016 7 次提交
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由 Laurent Pinchart 提交于
Those formats are supported on Gen3 only. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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由 Laurent Pinchart 提交于
Print a message when the HDMI I2C slave encoder can't be found to help debugging probe deferral issues. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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由 Koji Matsuoka 提交于
The LVDS encoder differs slightly in Gen3 SoCs in its PLL configuration. Add support for the Gen3 LVDS PLL parameters and startup procedure. Signed-off-by: NKoji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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由 Laurent Pinchart 提交于
The bit is named PLLON in the datasheet, rename it. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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由 Laurent Pinchart 提交于
The frequency checks don't match the datasheet, fix them. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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由 Laurent Pinchart 提交于
Replace the duplicate code by a single central function. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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由 Laurent Pinchart 提交于
Document the R8A7795-specific DT bindings and support them in the driver. The HDMI and LVDS outputs are currently not supported. Signed-off-by: NKoji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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