1. 29 3月, 2014 1 次提交
    • C
      x86, CMCI: Add proper detection of end of CMCI storms · 27f6c573
      Chen, Gong 提交于
      When CMCI storm persists for a long time(at least beyond predefined
      threshold. It's 30 seconds for now), we can watch CMCI storm is
      detected immediately after it subsides.
      
      ...
      Dec 10 22:04:29 kernel: CMCI storm detected: switching to poll mode
      Dec 10 22:04:59 kernel: CMCI storm subsided: switching to interrupt mode
      Dec 10 22:04:59 kernel: CMCI storm detected: switching to poll mode
      Dec 10 22:05:29 kernel: CMCI storm subsided: switching to interrupt mode
      ...
      
      The problem is that our logic that determines that the storm has
      ended is incorrect. We announce the end, re-enable interrupts and
      realize that the storm is still going on, so we switch back to
      polling mode. Rinse, repeat.
      
      When a storm happens we disable signaling of errors via CMCI and begin
      polling machine check banks instead. If we find any logged errors,
      then we need to set a per-cpu flag so that our per-cpu tests that
      check whether the storm is ongoing will see that errors are still
      being logged independently of whether mce_notify_irq() says that the
      error has been fully processed.
      
      cmci_clear() is not the right tool to disable a bank. It disables the
      interrupt for the bank as desired, but it also clears the bit for
      this bank in "mce_banks_owned" so we will skip the bank when polling
      (so we fail to see that the storm continues because we stop looking).
      New cmci_storm_disable_banks() just disables the interrupt while
      allowing polling to continue.
      Reported-by: NWilliam Dauchy <wdauchy@gmail.com>
      Signed-off-by: NChen, Gong <gong.chen@linux.intel.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      27f6c573
  2. 25 3月, 2014 1 次提交
  3. 24 3月, 2014 1 次提交
  4. 23 3月, 2014 2 次提交
  5. 20 3月, 2014 3 次提交
    • J
      MIPS: Make local_irq_disable macro safe for non-Mipsr2 · 71ca7588
      Jim Quinlan 提交于
      For non-mipsr2 processors, the local_irq_disable contains an mfc0-mtc0
      pair with instructions inbetween.  With preemption enabled, this sequence
      may get preempted and effect a stale value of CP0_STATUS when executing
      the mtc0 instruction.  This commit avoids this scenario by incrementing
      the preempt count before the mfc0 and decrementing it after the mtc9.
      
      [ralf@linux-mips.org: This patch is sorting out the part that were missed
      by e97c5b60 [MIPS: Make irqflags.h functions preempt-safe for non-mipsr2
      cpus.]  I also re-enabled the inclusion of <asm/asm-offsets.h> at the top
      of <asm/asmmacro.h>].
      Signed-off-by: NJim Quinlan <jim2101024@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: cernekee@gmail.com
      Patchwork: https://patchwork.linux-mips.org/patch/6164/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      71ca7588
    • A
      MIPS: Octeon: Fix warning in of_device_alloc on cn3xxx · 2eddb708
      Andreas Herrmann 提交于
      Starting with commit 3da52787 (of/irq:
      Rework of_irq_count()) the following warning is triggered on octeon
      cn3xxx:
      
      [    0.887281] WARNING: CPU: 0 PID: 1 at drivers/of/platform.c:171 of_device_alloc+0x228/0x230()
      [    0.895642] Modules linked in:
      [    0.898689] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.0-rc7-00012-g9ae51f2-dirty #41
      [    0.906860] Stack : c8b439581166d96e ffffffff816b0000 0000000040808000 ffffffff81185ddc
      [    0.906860] 	  0000000000000000 0000000000000000 0000000000000000 000000000000000b
      [    0.906860] 	  000000000000000a 000000000000000a 0000000000000000 0000000000000000
      [    0.906860] 	  ffffffff81740000 ffffffff81720000 ffffffff81615900 ffffffff816b0177
      [    0.906860] 	  ffffffff81727d10 800000041f868fb0 0000000000000001 0000000000000000
      [    0.906860] 	  0000000000000000 0000000000000038 0000000000000001 ffffffff81568484
      [    0.906860] 	  800000041f86faa8 ffffffff81145ddc 0000000000000000 ffffffff811873f4
      [    0.906860] 	  800000041f868b88 800000041f86f9c0 0000000000000000 ffffffff81569c9c
      [    0.906860] 	  0000000000000000 0000000000000000 0000000000000000 0000000000000000
      [    0.906860] 	  0000000000000000 ffffffff811205e0 0000000000000000 0000000000000000
      [    0.906860] 	  ...
      [    0.971695] Call Trace:
      [    0.974139] [<ffffffff811205e0>] show_stack+0x68/0x80
      [    0.979183] [<ffffffff81569c9c>] dump_stack+0x8c/0xe0
      [    0.984196] [<ffffffff81145efc>] warn_slowpath_common+0x84/0xb8
      [    0.990110] [<ffffffff81436888>] of_device_alloc+0x228/0x230
      [    0.995726] [<ffffffff814368d8>] of_platform_device_create_pdata+0x48/0xd0
      [    1.002593] [<ffffffff81436a94>] of_platform_bus_create+0x134/0x1e8
      [    1.008837] [<ffffffff81436af8>] of_platform_bus_create+0x198/0x1e8
      [    1.015064] [<ffffffff81436cc4>] of_platform_bus_probe+0xa4/0x100
      [    1.021149] [<ffffffff81100570>] do_one_initcall+0xd8/0x128
      [    1.026701] [<ffffffff816e2a10>] kernel_init_freeable+0x144/0x210
      [    1.032753] [<ffffffff81564bc4>] kernel_init+0x14/0x110
      [    1.037973] [<ffffffff8111bb44>] ret_from_kernel_thread+0x14/0x1c
      
      With this commit the kernel starts mapping the interrupts listed for
      gpio-controller node. irq_domain_ops for CIU (octeon_irq_ciu_map and
      octeon_irq_ciu_xlat) refuse to handle the GPIO lines (returning -EINVAL)
      and this is causing above warning in of_device_alloc().
      
      Modify irq_domain_ops for CIU and CIU2 to "gracefully handle" GPIO
      lines (neither return error code nor call octeon_irq_set_ciu_mapping
      for it). This should avoid the warning.
      
      (As before the real setup for GPIO lines will happen using
      irq_domain_ops of gpio-controller.)
      
      This patch is based on Wei's patch v2 (see
      http://marc.info/?l=linux-mips&m=139511814813247).
      Signed-off-by: NAndreas Herrmann <andreas.herrmann@caviumnetworks.com>
      Reported-by: NYang Wei <wei.yang@windriver.com>
      Acked-by: NDavid Daney <david.daney@cavium.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/6624/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      2eddb708
    • V
      MIPS: ftrace: Tweak safe_load()/safe_store() macros · b08ac66b
      Viller Hsiao 提交于
      Due to name collision in ftrace safe_load and safe_store macros,
      these macros cannot take expressions as operands.
      
      For example, compiler will complain for a macro call like the following:
        safe_store_code(new_code2, ip + 4, faulted);
      
        arch/mips/include/asm/ftrace.h:61:6: note: in definition of macro 'safe_store'
           : [dst] "r" (dst), [src] "r" (src)\
              ^
        arch/mips/kernel/ftrace.c:118:2: note: in expansion of macro 'safe_store_code'
          safe_store_code(new_code2, ip + 4, faulted);
          ^
        arch/mips/kernel/ftrace.c:118:32: error: undefined named operand 'ip + 4'
          safe_store_code(new_code2, ip + 4, faulted);
                                        ^
        arch/mips/include/asm/ftrace.h:61:6: note: in definition of macro 'safe_store'
           : [dst] "r" (dst), [src] "r" (src)\
              ^
        arch/mips/kernel/ftrace.c:118:2: note: in expansion of macro 'safe_store_code'
          safe_store_code(new_code2, ip + 4, faulted);
          ^
      
      This build error is triggered by a4671094 [MIPS: ftrace: Fix icache flush
      range error].  Tweak variable naming in those macros to allow flexible
      operands.
      Signed-off-by: NViller Hsiao <villerhsiao@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: rostedt@goodmis.org
      Cc: fweisbec@gmail.com
      Cc: mingo@redhat.com
      Cc: Qais.Yousef@imgtec.com
      Patchwork: https://patchwork.linux-mips.org/patch/6622/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b08ac66b
  6. 19 3月, 2014 2 次提交
  7. 18 3月, 2014 3 次提交
  8. 17 3月, 2014 4 次提交
  9. 15 3月, 2014 3 次提交
  10. 14 3月, 2014 1 次提交
  11. 13 3月, 2014 3 次提交
  12. 12 3月, 2014 5 次提交
  13. 11 3月, 2014 3 次提交
  14. 08 3月, 2014 6 次提交
  15. 07 3月, 2014 2 次提交
    • A
      powerpc: Align p_dyn, p_rela and p_st symbols · a5b2cf5b
      Anton Blanchard 提交于
      The 64bit relocation code places a few symbols in the text segment.
      These symbols are only 4 byte aligned where they need to be 8 byte
      aligned. Add an explicit alignment.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Cc: stable@vger.kernel.org
      Tested-by: NLaurent Dufour <ldufour@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a5b2cf5b
    • M
      powerpc/tm: Fix crash when forking inside a transaction · 621b5060
      Michael Neuling 提交于
      When we fork/clone we currently don't copy any of the TM state to the new
      thread.  This results in a TM bad thing (program check) when the new process is
      switched in as the kernel does a tmrechkpt with TEXASR FS not set.  Also, since
      R1 is from userspace, we trigger the bad kernel stack pointer detection.  So we
      end up with something like this:
      
         Bad kernel stack pointer 0 at c0000000000404fc
         cpu 0x2: Vector: 700 (Program Check) at [c00000003ffefd40]
             pc: c0000000000404fc: restore_gprs+0xc0/0x148
             lr: 0000000000000000
             sp: 0
            msr: 9000000100201030
           current = 0xc000001dd1417c30
           paca    = 0xc00000000fe00800   softe: 0        irq_happened: 0x01
             pid   = 0, comm = swapper/2
         WARNING: exception is not recoverable, can't continue
      
      The below fixes this by flushing the TM state before we copy the task_struct to
      the clone.  To do this we go through the tmreclaim patch, which removes the
      checkpointed registers from the CPU and transitions the CPU out of TM suspend
      mode.  Hence we need to call tmrechkpt after to restore the checkpointed state
      and the TM mode for the current task.
      
      To make this fail from userspace is simply:
      	tbegin
      	li	r0, 2
      	sc
      	<boom>
      
      Kudos to Adhemerval Zanella Neto for finding this.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      cc: Adhemerval Zanella Neto <azanella@br.ibm.com>
      cc: stable@vger.kernel.org
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      621b5060