- 07 4月, 2012 14 次提交
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Jon Mason <jdmason@kudzu.us>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Jay Cliburn <jcliburn@gmail.com> Cc: Chris Snook <chris.snook@gmail.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Jon Mason <jdmason@kudzu.us>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: David Lv <DavidLv@viatech.com.cn>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: David Lv <DavidLv@viatech.com.cn>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Jay Cliburn <jcliburn@gmail.com> Cc: Chris Snook <chris.snook@gmail.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Andy Gospodarek <andy@greyhouse.net>
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由 Francois Romieu 提交于
Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com>
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- 06 4月, 2012 3 次提交
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由 Giuseppe Cavallaro 提交于
Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
Reported-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
Reported-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 4月, 2012 23 次提交
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由 RongQing.Li 提交于
The conditional which decides to skip inactive filters does not change with the change of loop index, so it is unnecessary to check them many times. Signed-off-by: NRongQing.Li <roy.qing.li@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Eric Dumazet 提交于
Since commit 3e4d3af5 (mm: stack based kmap_atomic()) we dont have to disable BH anymore while mapping skb frags. We can remove kmap_skb_frag() / kunmap_skb_frag() helpers and use kmap_atomic() / kunmap_atomic() Signed-off-by: NEric Dumazet <eric.dumazet@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Amir Vadai 提交于
This patch is using the DCB netlink to set rate limit per ETS TC Values are accepted in Kbps and rounded up to the nearest multiply of 100Mbps. Signed-off-by: NAmir Vadai <amirv@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Amir Vadai 提交于
Although not specified in 8021Qaz spec, it could be useful to enable drivers whose HW supports setting a rate limit for an ETS TC. This patch adds this optional attribute to DCB netlink. To use it, drivers should implement and register the callbacks ieee_setmaxrate and ieee_getmaxrate. The units are 64 bits long and specified in Kbps to enable usage over both slow and very fast networks. Signed-off-by: NAmir Vadai <amirv@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Amir Vadai 提交于
Both tagged traffic and untagged traffic use tc tool mapping. Treat RDMA TOS same as IP TOS when mapping to SL Signed-off-by: NAmir Vadai <amirv@mellanox.com> CC: Sean Hefty <sean.hefty@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Amir Vadai 提交于
Need to export this to enable drivers use rt_tos2priority() Signed-off-by: NAmir Vadai <amirv@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Amir Vadai 提交于
Since vlan egress map is only good for tagged traffic, need to have other mapping to be used by untagged traffic. For that, the driver uses sch_mqprio mapping. This mapping could be set by using tc tool from iproute2 package. Mapped UP will be used by the HW for QoS purposes, but won't go out on the wire. Signed-off-by: NAmir Vadai <amirv@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Amir Vadai 提交于
Set TSA, promised BW and PFC using IEEE 802.1qaz netlink commands. Signed-off-by: NAmir Vadai <amirv@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Amir Vadai 提交于
Adding QoS firmware commands: - mlx4_en_SET_PORT_PRIO2TC - set UP <=> TC - mlx4_en_SET_PORT_SCHEDULER - set promised BW, max BW and PG number Signed-off-by: NAmir Vadai <amirv@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Amir Vadai 提交于
Instead of relying on HW to change schedule queue by UP, schedule queue is fixed for a tx_ring, and UP in WQE is ignored in this aspect. This resolves two issues with untagged traffic: 1. untagged traffic has no UP in packet which is needed for QoS. The change above allows setting the schedule queue (and by that the UP) of such a stream. 2. BlueFlame uses the same field used by vlan tag. So forcing UP from QPC allows using BF for untagged but prioritized traffic. In old firmware that force UP is not supported, untagged traffic will not subject to QoS. Because UP is set by QP, need to always have a tx ring per UP, even if pfcrx module paramter is false. Signed-off-by: NAmir Vadai <amirv@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Yoshihiro Shimoda 提交于
The R8A7740 has a Gigabit Ethernet MAC. This patch supports it. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mike Sinkovsky 提交于
Based on original driver from chip manufacturer, but nearly full rewite. Tested and used in production with Blackfin BF531 embedded processor. Signed-off-by: NMike Sinkovsky <msink@permonline.ru> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Mike Sinkovsky 提交于
Based on original driver from chip manufacturer, but nearly full rewite. Tested and used in production with Blackfin BF531 embedded processor. Signed-off-by: NMike Sinkovsky <msink@permonline.ru> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Joe Perches 提交于
Convert the macro to inline function to check the arguments. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jiri Pirko 提交于
This patch introduces new team mode. It's TX port is selected by user-set BPF hash function. Signed-off-by: NJiri Pirko <jpirko@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jiri Pirko 提交于
For transfering generic binary data (e.g. BPF code), introduce new binary option type. Signed-off-by: NJiri Pirko <jpirko@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Giuseppe CAVALLARO 提交于
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Giuseppe CAVALLARO 提交于
If a specific clk_csr value is passed from the platform this means that the CSR Clock Range selection cannot be changed at run-time and it is fixed (as reported in the driver documentation). Viceversa the driver will try to set the MDC clock dynamically according to the actual clock input. Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Reviewed-by: NFrancesco Virlinzi <francesco.virlinzi@st.com> Reviewed-by: NDavid Laight <david.laight@aculab.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Giuseppe CAVALLARO 提交于
The CSR Clock Range has been reworked and new macros has been added in the platform header to allow the CSR Clock Range selection in the GMII Address Register. The previous work didn't add the other fields that can be used to achieve MDC clock of frequency higher than the IEEE 802.3 specified frequency limit of 2.5 MHz and program a clock divider of lower value. On such platforms, these are used indeed so this patch adds them. Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Giuseppe CAVALLARO 提交于
this patch adds the way to enable/disable the MAC clock when call the open/close and resume/restore functions. This has been tested on ST platforms and SPEAr; thanks to Francesco and Deepak. Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Tested-by: NFrancesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Deepak SIKRI 提交于
This patch removes the infinite waits from the mdio read and write interfaces. These infinite waits have been replaced by the timeout handling. In case if a time out occurs, an error is returned. Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Acked-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Deepak SIKRI 提交于
This patch re-works the internal GMAC DMA parameters passed from the platform. In the past, we only passed the pbl but, with new core, other parameters can be passed and are mandatory on some platforms. New parameters are documented in stmmac.txt because this patch has an impact for many platforms. Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com> Signed-off-by: NVikas Manocha <vikas.manocha@st.com> Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Hacked-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Deepak SIKRI 提交于
The patch adds the macros to be used for MDC clock selection. The MDC clock frequency is based on scaled system clock, and has to be confined to a range of 1-2.5 MHz. Based on the input CSR clock, the scaling factor has to be selected. The platform specific code will provide the default value of this scaling factor, based on the input CSR clock. There is an option to set MDC clock higher than the IEEE 802.3 specified frequency limit of 2.5 MHz. This applies for the interfacing chips that support higher MDC clocks. The resultant higher clock of 12.5 MHz requires additional Macros to be defined for the clock divider corresponding to the to the following selection. ----------------------------------------- Selection MDC Clock ----------------------------------------- 1000 clk_csr_i/4 1001 clk_csr_i/6 1010 clk_csr_i/8 1011 clk_csr_i/10 1100 clk_csr_i/12 1101 clk_csr_i/14 1110 clk_csr_i/16 1111 clk_csr_i/18 This support has to be added both in the include file, as well as driver. The driver need to program the registers based on the interfacing chips. This would be more board specific information and needs to be passed through the platform code to the driver. This work would be carried out in the future patch set release. Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Acked-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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