- 05 5月, 2015 1 次提交
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由 Christian König 提交于
Hardware doesn't seem to work correctly, just block userspace in this case. v2: add missing defines Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=85320Signed-off-by: NChristian König <christian.koenig@amd.com> CC: stable@vger.kernel.org Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 3月, 2015 15 次提交
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由 Alex Deucher 提交于
Registers that can be fetched from the info ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Registers that can be fetched from the info ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Registers that can be fetched from the info ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Registers that can be fetched from the info ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Registers that can be fetched from the info ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Will be used for exposing current clocks via INFO ioctl. Tested-by: NMarek Olšák <marek.olsak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 1月, 2015 1 次提交
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由 Michel Dänzer 提交于
get_page_entry calculates the GART page table entry, which is just written to the GART page table by set_page_entry. This is a prerequisite for the following fix. Reviewed-by: NChristian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 1月, 2015 5 次提交
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由 Slava Grigorev 提交于
Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NSlava Grigorev <slava.grigorev@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Slava Grigorev 提交于
Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NSlava Grigorev <slava.grigorev@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Slava Grigorev 提交于
Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NSlava Grigorev <slava.grigorev@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This adds a possibility to control fan on SI parts via exported hwmon variables. Note that automatic ucode fan management pauses if you choose to enable manual fan control. Use with caution! Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Oleg Chernovskiy 提交于
This adds a possibility to control fan on CI parts via exported hwmon variables. Note that automatic ucode fan management pauses if you choose to enable manual fan control. Use with caution! v2: agd5f: fix formatting, squash in: minor fix for pwm1_enable exposed value Track smc control in addition to fan mode This fixes pwm1_enable being constantly set to 1 because of enabled smc control also handle the case where smc fan control is disabled. Signed-off-by: NOleg Chernovskiy <algonkvel@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 11月, 2014 1 次提交
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由 Christian König 提交于
Use ring structure instead of index and provide vm_id and pd_addr separately. Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 01 10月, 2014 1 次提交
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由 Alex Deucher 提交于
Most of that functionality is only used by r600_hdmi.c and I'm planning to change that further. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 9月, 2014 1 次提交
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由 Michel Dänzer 提交于
It was causing display corruption with R300 generation GPUs at least. Reported-and-Tested-by: NMikael Pettersson <mikpelinux@gmail.com> Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 9月, 2014 1 次提交
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由 Christian König 提交于
This allows us to specify if we want to sync to the shared fences of a reservation object or not. Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 8月, 2014 1 次提交
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由 Christian König 提交于
v2: cleanup R600 support v3: rebased on current drm-fixes-3.12 v4: rebased on drm-next-3.14 Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 8月, 2014 4 次提交
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由 Christian König 提交于
Move the decision what to use into the common VM code. Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Michel Dänzer 提交于
This ensures the GPU sees all previous CPU writes to VRAM, which makes it safe: * For userspace to stream data from CPU to GPU via VRAM instead of GTT * For IBs to be stored in VRAM instead of GTT * For ring buffers to be stored in VRAM instead of GTT, if the HPD flush is performed via MMIO Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Michel Dänzer 提交于
And clean up the function comment a little. Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Michel Dänzer 提交于
Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 10 6月, 2014 1 次提交
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由 Christian König 提交于
We never check the return value anyway and if the index isn't valid would crash way before calling the functions. Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 6月, 2014 3 次提交
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
They are doing the same on all generations anyway. Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rafał Miłecki 提交于
DCE 3.1 and 3.2 should be programmed in a different way than DCE 2 and DCE 3. The order of setting registers and sets of registers are different. It's still unsure how we will handle DCE 3.1 vs. DCE 3.2, since they have few differences as well. For now separate DCE 2 and DCE 3 path, so we can work on it without a risk of breaking DCE 3.1+. This has been tested for possible regressions on DCE32 HD4550 (RV710). Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 18 2月, 2014 2 次提交
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Only VCE 2.0 support so far. v2: squashing multiple patches into this one v3: add IRQ support for CIK, major cleanups, basic code documentation v4: remove HAINAN from chipset list Signed-off-by: NChristian König <christian.koenig@amd.com>
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- 07 2月, 2014 1 次提交
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由 Alex Deucher 提交于
For btc and newer, we may modify the power state depending on the circumstances. Use the modified state rather than the base state. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 12月, 2013 2 次提交
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由 Alex Deucher 提交于
Fill in asic family specific versions rather than using the generic version. This lets us handle asic specific differences more easily. In this case, we disable sw swapping of the rtpr writeback value on r6xx+ since the hw does it for us. Fixes bogus rptr readback on BE systems. v2: remove missed cpu_to_le32(), add comments Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Make sure interrupts are enabled before we enable thermal interrupts. Also, don't powergate uvd, etc. until after the ring tests. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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