提交 483202d5 编写于 作者: J Jitendra Kalsaria 提交者: David S. Miller

qlcnic: helper routine to handle async events

Create a helper routine to handle async events, as it is being called
from multiple places
Signed-off-by: NJitendra Kalsaria <jitendra.kalsaria@qlogic.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 3d73b5fd
master alk-4.19.24 alk-4.19.30 alk-4.19.34 alk-4.19.36 alk-4.19.43 alk-4.19.48 alk-4.19.57 ck-4.19.67 ck-4.19.81 ck-4.19.91 github/fork/deepanshu1422/fix-typo-in-comment github/fork/haosdent/fix-typo linux-next v4.19.91 v4.19.90 v4.19.89 v4.19.88 v4.19.87 v4.19.86 v4.19.85 v4.19.84 v4.19.83 v4.19.82 v4.19.81 v4.19.80 v4.19.79 v4.19.78 v4.19.77 v4.19.76 v4.19.75 v4.19.74 v4.19.73 v4.19.72 v4.19.71 v4.19.70 v4.19.69 v4.19.68 v4.19.67 v4.19.66 v4.19.65 v4.19.64 v4.19.63 v4.19.62 v4.19.61 v4.19.60 v4.19.59 v4.19.58 v4.19.57 v4.19.56 v4.19.55 v4.19.54 v4.19.53 v4.19.52 v4.19.51 v4.19.50 v4.19.49 v4.19.48 v4.19.47 v4.19.46 v4.19.45 v4.19.44 v4.19.43 v4.19.42 v4.19.41 v4.19.40 v4.19.39 v4.19.38 v4.19.37 v4.19.36 v4.19.35 v4.19.34 v4.19.33 v4.19.32 v4.19.31 v4.19.30 v4.19.29 v4.19.28 v4.19.27 v4.19.26 v4.19.25 v4.19.24 v4.19.23 v4.19.22 v4.19.21 v4.19.20 v4.19.19 v4.19.18 v4.19.17 v4.19.16 v4.19.15 v4.19.14 v4.19.13 v4.19.12 v4.19.11 v4.19.10 v4.19.9 v4.19.8 v4.19.7 v4.19.6 v4.19.5 v4.19.4 v4.19.3 v4.19.2 v4.19.1 v4.19 v4.19-rc8 v4.19-rc7 v4.19-rc6 v4.19-rc5 v4.19-rc4 v4.19-rc3 v4.19-rc2 v4.19-rc1 ck-release-21 ck-release-20 ck-release-19.2 ck-release-19.1 ck-release-19 ck-release-18 ck-release-17.2 ck-release-17.1 ck-release-17 ck-release-16 ck-release-15.1 ck-release-15 ck-release-14 ck-release-13.2 ck-release-13 ck-release-12 ck-release-11 ck-release-10 ck-release-9 ck-release-7 alk-release-15 alk-release-14 alk-release-13.2 alk-release-13 alk-release-12 alk-release-11 alk-release-10 alk-release-9 alk-release-7
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......@@ -12,13 +12,6 @@
#include <linux/interrupt.h>
#define QLCNIC_MAX_TX_QUEUES 1
#define QLCNIC_MBX_RSP(reg) LSW(reg)
#define QLCNIC_MBX_NUM_REGS(reg) (MSW(reg) & 0x1FF)
#define QLCNIC_MBX_STATUS(reg) (((reg) >> 25) & 0x7F)
#define QLCNIC_MBX_HOST(ahw, i) ((ahw)->pci_base0 + ((i) * 4))
#define QLCNIC_MBX_FW(ahw, i) ((ahw)->pci_base0 + 0x800 + ((i) * 4))
#define RSS_HASHTYPE_IP_TCP 0x3
/* status descriptor mailbox data
......@@ -696,7 +689,7 @@ int qlcnic_83xx_mbx_op(struct qlcnic_adapter *adapter,
int i;
u16 opcode;
u8 mbx_err_code, mac_cmd_rcode;
u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, temp, fw[8];
u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd;
struct qlcnic_hardware_context *ahw = adapter->ahw;
opcode = LSW(cmd->req.arg[0]);
......@@ -738,42 +731,8 @@ int qlcnic_83xx_mbx_op(struct qlcnic_adapter *adapter,
opcode = QLCNIC_MBX_RSP(fw_data);
if (rsp != QLCNIC_RCODE_TIMEOUT) {
if (opcode == QLCNIC_MBX_LINK_EVENT) {
for (i = 0; i < rsp_num; i++) {
temp = readl(QLCNIC_MBX_FW(ahw, i));
fw[i] = temp;
}
qlcnic_83xx_handle_link_aen(adapter, fw);
/* clear fw mbx control register */
QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
if (mbx_val)
goto poll;
} else if (opcode == QLCNIC_MBX_COMP_EVENT) {
for (i = 0; i < rsp_num; i++) {
temp = readl(QLCNIC_MBX_FW(ahw, i));
fw[i] = temp;
}
qlcnic_83xx_handle_idc_comp_aen(adapter, fw);
/* clear fw mbx control register */
QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
if (mbx_val)
goto poll;
} else if (opcode == QLCNIC_MBX_REQUEST_EVENT) {
/* IDC Request Notification */
for (i = 0; i < rsp_num; i++) {
temp = readl(QLCNIC_MBX_FW(ahw, i));
fw[i] = temp;
}
for (i = 0; i < QLC_83XX_MBX_AEN_CNT; i++) {
temp = QLCNIC_MBX_RSP(fw[i]);
adapter->ahw->mbox_aen[i] = temp;
}
queue_delayed_work(adapter->qlcnic_wq,
&adapter->idc_aen_work, 0);
/* clear fw mbx control register */
QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
if (fw_data & QLCNIC_MBX_ASYNC_EVENT) {
qlcnic_83xx_process_aen(adapter);
mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
if (mbx_val)
goto poll;
......@@ -875,20 +834,10 @@ static void qlcnic_83xx_handle_idc_comp_aen(struct qlcnic_adapter *adapter,
void qlcnic_83xx_process_aen(struct qlcnic_adapter *adapter)
{
u32 mask, resp, event[QLC_83XX_MBX_AEN_CNT];
u32 event[QLC_83XX_MBX_AEN_CNT];
int i;
struct qlcnic_hardware_context *ahw = adapter->ahw;
if (!spin_trylock(&ahw->mbx_lock)) {
mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK);
writel(0, adapter->ahw->pci_base0 + mask);
return;
}
resp = QLCRDX(ahw, QLCNIC_FW_MBX_CTRL);
if (!(resp & QLCNIC_SET_OWNER))
goto out;
for (i = 0; i < QLC_83XX_MBX_AEN_CNT; i++)
event[i] = readl(QLCNIC_MBX_FW(ahw, i));
......@@ -923,10 +872,6 @@ void qlcnic_83xx_process_aen(struct qlcnic_adapter *adapter)
}
QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
out:
mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK);
writel(0, adapter->ahw->pci_base0 + mask);
spin_unlock(&ahw->mbx_lock);
}
static int qlcnic_83xx_add_rings(struct qlcnic_adapter *adapter)
......@@ -1620,7 +1565,21 @@ static void qlcnic_83xx_handle_link_aen(struct qlcnic_adapter *adapter,
irqreturn_t qlcnic_83xx_handle_aen(int irq, void *data)
{
struct qlcnic_adapter *adapter = data;
unsigned long flags;
u32 mask, resp, event;
spin_lock_irqsave(&adapter->ahw->mbx_lock, flags);
resp = QLCRDX(adapter->ahw, QLCNIC_FW_MBX_CTRL);
if (!(resp & QLCNIC_SET_OWNER))
goto out;
event = readl(QLCNIC_MBX_FW(adapter->ahw, 0));
if (event & QLCNIC_MBX_ASYNC_EVENT)
qlcnic_83xx_process_aen(adapter);
out:
mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK);
writel(0, adapter->ahw->pci_base0 + mask);
spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
return IRQ_HANDLED;
}
......
......@@ -137,9 +137,6 @@ struct qlc_83xx_reset {
#define QLC_83XX_IDC_MINOR_VERSION 0
#define QLC_83XX_IDC_FLASH_PARAM_ADDR 0x3e8020
/* Mailbox process AEN count */
#define QLC_83XX_MBX_AEN_CNT 5
struct qlcnic_adapter;
struct qlc_83xx_idc {
int (*state_entry) (struct qlcnic_adapter *);
......@@ -156,6 +153,12 @@ struct qlc_83xx_idc {
char **name;
};
#define QLCNIC_MBX_RSP(reg) LSW(reg)
#define QLCNIC_MBX_NUM_REGS(reg) (MSW(reg) & 0x1FF)
#define QLCNIC_MBX_STATUS(reg) (((reg) >> 25) & 0x7F)
#define QLCNIC_MBX_HOST(ahw, i) ((ahw)->pci_base0 + ((i) * 4))
#define QLCNIC_MBX_FW(ahw, i) ((ahw)->pci_base0 + 0x800 + ((i) * 4))
/* Mailbox process AEN count */
#define QLC_83XX_IDC_COMP_AEN 3
#define QLC_83XX_MBX_AEN_CNT 5
......
......@@ -135,6 +135,7 @@ struct qlcnic_mailbox_metadata {
#define QLCNIC_MBX_RSP_OK 1
#define QLCNIC_MBX_PORT_RSP_OK 0x1a
#define QLCNIC_MBX_ASYNC_EVENT BIT_15
struct qlcnic_pci_info;
struct qlcnic_info;
......
......@@ -1553,6 +1553,24 @@ static int qlcnic_83xx_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring,
return count;
}
static void qlcnic_83xx_poll_process_aen(struct qlcnic_adapter *adapter)
{
unsigned long flags;
u32 mask, resp, event;
spin_lock_irqsave(&adapter->ahw->mbx_lock, flags);
resp = QLCRDX(adapter->ahw, QLCNIC_FW_MBX_CTRL);
if (!(resp & QLCNIC_SET_OWNER))
goto out;
event = readl(QLCNIC_MBX_FW(adapter->ahw, 0));
if (event & QLCNIC_MBX_ASYNC_EVENT)
qlcnic_83xx_process_aen(adapter);
out:
mask = QLCRDX(adapter->ahw, QLCNIC_DEF_INT_MASK);
writel(0, adapter->ahw->pci_base0 + mask);
spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
}
static int qlcnic_83xx_poll(struct napi_struct *napi, int budget)
{
int tx_complete;
......@@ -1567,7 +1585,7 @@ static int qlcnic_83xx_poll(struct napi_struct *napi, int budget)
tx_ring = adapter->tx_ring;
if (!(adapter->flags & QLCNIC_MSIX_ENABLED))
qlcnic_83xx_process_aen(adapter);
qlcnic_83xx_poll_process_aen(adapter);
tx_complete = qlcnic_process_cmd_ring(adapter, tx_ring, budget);
work_done = qlcnic_83xx_process_rcv_ring(sds_ring, budget);
......
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