hda_intel.c 75.4 KB
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/*
 *
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 *  hda_intel.c - Implementation of primary alsa driver code base
 *                for Intel HD Audio.
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 *
 *  Copyright(c) 2004 Intel Corporation. All rights reserved.
 *
 *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
 *                     PeiSen Hou <pshou@realtek.com.tw>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License as published by the Free
 *  Software Foundation; either version 2 of the License, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 *  more details.
 *
 *  You should have received a copy of the GNU General Public License along with
 *  this program; if not, write to the Free Software Foundation, Inc., 59
 *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 *
 *  CONTACTS:
 *
 *  Matt Jared		matt.jared@intel.com
 *  Andy Kopp		andy.kopp@intel.com
 *  Dan Kogan		dan.d.kogan@intel.com
 *
 *  CHANGES:
 *
 *  2004.12.01	Major rewrite by tiwai, merged the work of pshou
 * 
 */

#include <linux/delay.h>
#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/dma-mapping.h>
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#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/pci.h>
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#include <linux/mutex.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/clocksource.h>
#include <linux/time.h>
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#include <linux/completion.h>
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#ifdef CONFIG_X86
/* for snoop control */
#include <asm/pgtable.h>
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#include <asm/set_memory.h>
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#include <asm/cpufeature.h>
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#endif
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#include <sound/core.h>
#include <sound/initval.h>
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#include <sound/hdaudio.h>
#include <sound/hda_i915.h>
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#include <linux/vgaarb.h>
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#include <linux/vga_switcheroo.h>
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#include <linux/firmware.h>
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#include "hda_codec.h"
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#include "hda_controller.h"
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#include "hda_intel.h"
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#define CREATE_TRACE_POINTS
#include "hda_intel_trace.h"

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/* position fix mode */
enum {
	POS_FIX_AUTO,
	POS_FIX_LPIB,
	POS_FIX_POSBUF,
	POS_FIX_VIACOMBO,
	POS_FIX_COMBO,
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	POS_FIX_SKL,
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};

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/* Defines for ATI HD Audio support in SB450 south bridge */
#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
#define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02

/* Defines for Nvidia HDA support */
#define NVIDIA_HDA_TRANSREG_ADDR      0x4e
#define NVIDIA_HDA_ENABLE_COHBITS     0x0f
#define NVIDIA_HDA_ISTRM_COH          0x4d
#define NVIDIA_HDA_OSTRM_COH          0x4c
#define NVIDIA_HDA_ENABLE_COHBIT      0x01

/* Defines for Intel SCH HDA snoop control */
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#define INTEL_HDA_CGCTL	 0x48
#define INTEL_HDA_CGCTL_MISCBDCGE        (0x1 << 6)
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#define INTEL_SCH_HDA_DEVC      0x78
#define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)

/* Define IN stream 0 FIFO size offset in VIA controller */
#define VIA_IN_STREAM0_FIFO_SIZE_OFFSET	0x90
/* Define VIA HD Audio Device ID*/
#define VIA_HDAC_DEVICE_ID		0x3288

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/* max number of SDs */
/* ICH, ATI and VIA have 4 playback and 4 capture */
#define ICH6_NUM_CAPTURE	4
#define ICH6_NUM_PLAYBACK	4

/* ULI has 6 playback and 5 capture */
#define ULI_NUM_CAPTURE		5
#define ULI_NUM_PLAYBACK	6

/* ATI HDMI may have up to 8 playbacks and 0 capture */
#define ATIHDMI_NUM_CAPTURE	0
#define ATIHDMI_NUM_PLAYBACK	8

/* TERA has 4 playback and 3 capture */
#define TERA_NUM_CAPTURE	3
#define TERA_NUM_PLAYBACK	4

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static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
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static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
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static char *model[SNDRV_CARDS];
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static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int probe_only[SNDRV_CARDS];
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static int jackpoll_ms[SNDRV_CARDS];
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static int single_cmd = -1;
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static int enable_msi = -1;
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#ifdef CONFIG_SND_HDA_PATCH_LOADER
static char *patch[SNDRV_CARDS];
#endif
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#ifdef CONFIG_SND_HDA_INPUT_BEEP
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static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
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					CONFIG_SND_HDA_INPUT_BEEP_MODE};
#endif
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module_param_array(index, int, NULL, 0444);
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MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
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module_param_array(id, charp, NULL, 0444);
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MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
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module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
module_param_array(model, charp, NULL, 0444);
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MODULE_PARM_DESC(model, "Use the given board model.");
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module_param_array(position_fix, int, NULL, 0444);
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MODULE_PARM_DESC(position_fix, "DMA pointer read method."
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		 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO, 5 = SKL+).");
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module_param_array(bdl_pos_adj, int, NULL, 0644);
MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
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module_param_array(probe_mask, int, NULL, 0444);
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MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
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module_param_array(probe_only, int, NULL, 0444);
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MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
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module_param_array(jackpoll_ms, int, NULL, 0444);
MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
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module_param(single_cmd, bint, 0444);
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MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
		 "(for debugging only).");
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module_param(enable_msi, bint, 0444);
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MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
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#ifdef CONFIG_SND_HDA_PATCH_LOADER
module_param_array(patch, charp, NULL, 0444);
MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
#endif
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#ifdef CONFIG_SND_HDA_INPUT_BEEP
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module_param_array(beep_mode, bool, NULL, 0444);
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MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
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			    "(0=off, 1=on) (default=1).");
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#endif
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#ifdef CONFIG_PM
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static int param_set_xint(const char *val, const struct kernel_param *kp);
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static const struct kernel_param_ops param_ops_xint = {
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	.set = param_set_xint,
	.get = param_get_int,
};
#define param_check_xint param_check_int

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static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
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module_param(power_save, xint, 0644);
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MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
		 "(in second, 0 = disable).");
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static bool pm_blacklist = true;
module_param(pm_blacklist, bool, 0644);
MODULE_PARM_DESC(pm_blacklist, "Enable power-management blacklist");

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/* reset the HD-audio controller in power save mode.
 * this may give more power-saving, but will take longer time to
 * wake up.
 */
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static bool power_save_controller = 1;
module_param(power_save_controller, bool, 0644);
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MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
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#else
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#define power_save	0
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#endif /* CONFIG_PM */
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static int align_buffer_size = -1;
module_param(align_buffer_size, bint, 0644);
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MODULE_PARM_DESC(align_buffer_size,
		"Force buffer and period sizes to be multiple of 128 bytes.");

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#ifdef CONFIG_X86
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static int hda_snoop = -1;
module_param_named(snoop, hda_snoop, bint, 0444);
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MODULE_PARM_DESC(snoop, "Enable/disable snooping");
#else
#define hda_snoop		true
#endif


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MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
			 "{Intel, ICH6M},"
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			 "{Intel, ICH7},"
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			 "{Intel, ESB2},"
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			 "{Intel, ICH8},"
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			 "{Intel, ICH9},"
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			 "{Intel, ICH10},"
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			 "{Intel, PCH},"
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			 "{Intel, CPT},"
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			 "{Intel, PPT},"
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			 "{Intel, LPT},"
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			 "{Intel, LPT_LP},"
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			 "{Intel, WPT_LP},"
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			 "{Intel, SPT},"
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			 "{Intel, SPT_LP},"
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			 "{Intel, HPT},"
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			 "{Intel, PBG},"
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			 "{Intel, SCH},"
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			 "{ATI, SB450},"
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			 "{ATI, SB600},"
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			 "{ATI, RS600},"
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			 "{ATI, RS690},"
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			 "{ATI, RS780},"
			 "{ATI, R600},"
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			 "{ATI, RV630},"
			 "{ATI, RV610},"
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			 "{ATI, RV670},"
			 "{ATI, RV635},"
			 "{ATI, RV620},"
			 "{ATI, RV770},"
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			 "{VIA, VT8251},"
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			 "{VIA, VT8237A},"
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			 "{SiS, SIS966},"
			 "{ULI, M5461}}");
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MODULE_DESCRIPTION("Intel HDA driver");

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#if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
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#if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
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#define SUPPORT_VGA_SWITCHEROO
#endif
#endif


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/*
 */

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/* driver types */
enum {
	AZX_DRIVER_ICH,
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	AZX_DRIVER_PCH,
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	AZX_DRIVER_SCH,
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	AZX_DRIVER_SKL,
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	AZX_DRIVER_HDMI,
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	AZX_DRIVER_ATI,
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	AZX_DRIVER_ATIHDMI,
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	AZX_DRIVER_ATIHDMI_NS,
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	AZX_DRIVER_VIA,
	AZX_DRIVER_SIS,
	AZX_DRIVER_ULI,
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	AZX_DRIVER_NVIDIA,
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	AZX_DRIVER_TERA,
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	AZX_DRIVER_CTX,
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	AZX_DRIVER_CTHDA,
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	AZX_DRIVER_CMEDIA,
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	AZX_DRIVER_GENERIC,
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	AZX_NUM_DRIVERS, /* keep this as last entry */
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};

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#define azx_get_snoop_type(chip) \
	(((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
#define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)

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/* quirks for old Intel chipsets */
#define AZX_DCAPS_INTEL_ICH \
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	(AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
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/* quirks for Intel PCH */
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#define AZX_DCAPS_INTEL_PCH_BASE \
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	(AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
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	 AZX_DCAPS_SNOOP_TYPE(SCH))
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/* PCH up to IVB; no runtime PM; bind with i915 gfx */
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#define AZX_DCAPS_INTEL_PCH_NOPM \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT)
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/* PCH for HSW/BDW; with runtime PM */
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/* no i915 binding for this as HSW/BDW has another controller for HDMI */
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#define AZX_DCAPS_INTEL_PCH \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
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/* HSW HDMI */
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#define AZX_DCAPS_INTEL_HASWELL \
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	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
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	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
	 AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
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/* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
#define AZX_DCAPS_INTEL_BROADWELL \
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	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
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	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
	 AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
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#define AZX_DCAPS_INTEL_BAYTRAIL \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT |\
	 AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_BRASWELL \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
	 AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_SKYLAKE \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
	 AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
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	 AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_BROXTON \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
	 AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
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	 AZX_DCAPS_I915_POWERWELL)

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/* quirks for ATI SB / AMD Hudson */
#define AZX_DCAPS_PRESET_ATI_SB \
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	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
	 AZX_DCAPS_SNOOP_TYPE(ATI))
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/* quirks for ATI/AMD HDMI */
#define AZX_DCAPS_PRESET_ATI_HDMI \
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	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
	 AZX_DCAPS_NO_MSI64)
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/* quirks for ATI HDMI with snoop off */
#define AZX_DCAPS_PRESET_ATI_HDMI_NS \
	(AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)

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/* quirks for Nvidia */
#define AZX_DCAPS_PRESET_NVIDIA \
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	(AZX_DCAPS_NO_MSI | AZX_DCAPS_CORBRP_SELF_CLEAR |\
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	 AZX_DCAPS_SNOOP_TYPE(NVIDIA))
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#define AZX_DCAPS_PRESET_CTHDA \
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	(AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
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	 AZX_DCAPS_NO_64BIT |\
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	 AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
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/*
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 * vga_switcheroo support
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 */
#ifdef SUPPORT_VGA_SWITCHEROO
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#define use_vga_switcheroo(chip)	((chip)->use_vga_switcheroo)
#else
#define use_vga_switcheroo(chip)	0
#endif

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#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
					((pci)->device == 0x0c0c) || \
					((pci)->device == 0x0d0c) || \
					((pci)->device == 0x160c))

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#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
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#define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
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static char *driver_short_names[] = {
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	[AZX_DRIVER_ICH] = "HDA Intel",
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	[AZX_DRIVER_PCH] = "HDA Intel PCH",
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	[AZX_DRIVER_SCH] = "HDA Intel MID",
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	[AZX_DRIVER_SKL] = "HDA Intel PCH", /* kept old name for compatibility */
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	[AZX_DRIVER_HDMI] = "HDA Intel HDMI",
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	[AZX_DRIVER_ATI] = "HDA ATI SB",
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	[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
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	[AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
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	[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
	[AZX_DRIVER_SIS] = "HDA SIS966",
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	[AZX_DRIVER_ULI] = "HDA ULI M5461",
	[AZX_DRIVER_NVIDIA] = "HDA NVidia",
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	[AZX_DRIVER_TERA] = "HDA Teradici", 
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	[AZX_DRIVER_CTX] = "HDA Creative", 
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	[AZX_DRIVER_CTHDA] = "HDA Creative",
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	[AZX_DRIVER_CMEDIA] = "HDA C-Media",
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	[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
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};

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#ifdef CONFIG_X86
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static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
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{
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	int pages;

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	if (azx_snoop(chip))
		return;
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	if (!dmab || !dmab->area || !dmab->bytes)
		return;

#ifdef CONFIG_SND_DMA_SGBUF
	if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
		struct snd_sg_buf *sgbuf = dmab->private_data;
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		if (chip->driver_type == AZX_DRIVER_CMEDIA)
			return; /* deal with only CORB/RIRB buffers */
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		if (on)
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			set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
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		else
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			set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
		return;
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	}
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#endif

	pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
	if (on)
		set_memory_wc((unsigned long)dmab->area, pages);
	else
		set_memory_wb((unsigned long)dmab->area, pages);
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}

static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
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	__mark_pages_wc(chip, buf, on);
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}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
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				   struct snd_pcm_substream *substream, bool on)
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{
	if (azx_dev->wc_marked != on) {
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		__mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
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		azx_dev->wc_marked = on;
	}
}
#else
/* NOP for other archs */
static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
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				   struct snd_pcm_substream *substream, bool on)
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{
}
#endif

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static int azx_acquire_irq(struct azx *chip, int do_disconnect);
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/*
 * initialize the PCI registers
 */
/* update bits in a PCI register byte */
static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
			    unsigned char mask, unsigned char val)
{
	unsigned char data;

	pci_read_config_byte(pci, reg, &data);
	data &= ~mask;
	data |= (val & mask);
	pci_write_config_byte(pci, reg, data);
}

static void azx_init_pci(struct azx *chip)
{
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	int snoop_type = azx_get_snoop_type(chip);

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	/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
	 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
	 * Ensuring these bits are 0 clears playback static on some HD Audio
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	 * codecs.
	 * The PCI register TCSEL is defined in the Intel manuals.
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	 */
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	if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
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		dev_dbg(chip->card->dev, "Clearing TCSEL\n");
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		update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
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	}
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	/* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
	 * we need to enable snoop.
	 */
490
	if (snoop_type == AZX_SNOOP_TYPE_ATI) {
491 492
		dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
			azx_snoop(chip));
493
		update_pci_byte(chip->pci,
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Takashi Iwai 已提交
494 495
				ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
				azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
496 497 498
	}

	/* For NVIDIA HDA, enable snoop */
499
	if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
500 501
		dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
			azx_snoop(chip));
502 503 504
		update_pci_byte(chip->pci,
				NVIDIA_HDA_TRANSREG_ADDR,
				0x0f, NVIDIA_HDA_ENABLE_COHBITS);
505 506 507 508 509 510
		update_pci_byte(chip->pci,
				NVIDIA_HDA_ISTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
		update_pci_byte(chip->pci,
				NVIDIA_HDA_OSTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
511 512 513
	}

	/* Enable SCH/PCH snoop if needed */
514
	if (snoop_type == AZX_SNOOP_TYPE_SCH) {
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Takashi Iwai 已提交
515
		unsigned short snoop;
T
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516
		pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
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517 518 519 520 521 522
		if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
		    (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
			snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
			if (!azx_snoop(chip))
				snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
			pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
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Takashi Iwai 已提交
523 524 525
			pci_read_config_word(chip->pci,
				INTEL_SCH_HDA_DEVC, &snoop);
		}
526 527 528
		dev_dbg(chip->card->dev, "SCH snoop: %s\n",
			(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
			"Disabled" : "Enabled");
V
Vinod G 已提交
529
        }
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530 531
}

532 533 534 535 536 537 538 539 540 541 542
/*
 * In BXT-P A0, HD-Audio DMA requests is later than expected,
 * and makes an audio stream sensitive to system latencies when
 * 24/32 bits are playing.
 * Adjusting threshold of DMA fifo to force the DMA request
 * sooner to improve latency tolerance at the expense of power.
 */
static void bxt_reduce_dma_latency(struct azx *chip)
{
	u32 val;

543
	val = azx_readl(chip, VS_EM4L);
544
	val &= (0x3 << 20);
545
	azx_writel(chip, VS_EM4L, val);
546 547
}

548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639
/*
 * ML_LCAP bits:
 *  bit 0: 6 MHz Supported
 *  bit 1: 12 MHz Supported
 *  bit 2: 24 MHz Supported
 *  bit 3: 48 MHz Supported
 *  bit 4: 96 MHz Supported
 *  bit 5: 192 MHz Supported
 */
static int intel_get_lctl_scf(struct azx *chip)
{
	struct hdac_bus *bus = azx_bus(chip);
	static int preferred_bits[] = { 2, 3, 1, 4, 5 };
	u32 val, t;
	int i;

	val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCAP);

	for (i = 0; i < ARRAY_SIZE(preferred_bits); i++) {
		t = preferred_bits[i];
		if (val & (1 << t))
			return t;
	}

	dev_warn(chip->card->dev, "set audio clock frequency to 6MHz");
	return 0;
}

static int intel_ml_lctl_set_power(struct azx *chip, int state)
{
	struct hdac_bus *bus = azx_bus(chip);
	u32 val;
	int timeout;

	/*
	 * the codecs are sharing the first link setting by default
	 * If other links are enabled for stream, they need similar fix
	 */
	val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
	val &= ~AZX_MLCTL_SPA;
	val |= state << AZX_MLCTL_SPA_SHIFT;
	writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
	/* wait for CPA */
	timeout = 50;
	while (timeout) {
		if (((readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL)) &
		    AZX_MLCTL_CPA) == (state << AZX_MLCTL_CPA_SHIFT))
			return 0;
		timeout--;
		udelay(10);
	}

	return -1;
}

static void intel_init_lctl(struct azx *chip)
{
	struct hdac_bus *bus = azx_bus(chip);
	u32 val;
	int ret;

	/* 0. check lctl register value is correct or not */
	val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
	/* if SCF is already set, let's use it */
	if ((val & ML_LCTL_SCF_MASK) != 0)
		return;

	/*
	 * Before operating on SPA, CPA must match SPA.
	 * Any deviation may result in undefined behavior.
	 */
	if (((val & AZX_MLCTL_SPA) >> AZX_MLCTL_SPA_SHIFT) !=
		((val & AZX_MLCTL_CPA) >> AZX_MLCTL_CPA_SHIFT))
		return;

	/* 1. turn link down: set SPA to 0 and wait CPA to 0 */
	ret = intel_ml_lctl_set_power(chip, 0);
	udelay(100);
	if (ret)
		goto set_spa;

	/* 2. update SCF to select a properly audio clock*/
	val &= ~ML_LCTL_SCF_MASK;
	val |= intel_get_lctl_scf(chip);
	writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);

set_spa:
	/* 4. turn link up: set SPA to 1 and wait CPA to 1 */
	intel_ml_lctl_set_power(chip, 1);
	udelay(100);
}

640 641
static void hda_intel_init_chip(struct azx *chip, bool full_reset)
{
642
	struct hdac_bus *bus = azx_bus(chip);
643
	struct pci_dev *pci = chip->pci;
644
	u32 val;
645 646

	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
647
		snd_hdac_set_codec_wakeup(bus, true);
648
	if (chip->driver_type == AZX_DRIVER_SKL) {
649 650 651 652
		pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
		val = val & ~INTEL_HDA_CGCTL_MISCBDCGE;
		pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
	}
653
	azx_init_chip(chip, full_reset);
654
	if (chip->driver_type == AZX_DRIVER_SKL) {
655 656 657 658
		pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
		val = val | INTEL_HDA_CGCTL_MISCBDCGE;
		pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
	}
659
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
660
		snd_hdac_set_codec_wakeup(bus, false);
661 662

	/* reduce dma latency to avoid noise */
663
	if (IS_BXT(pci))
664
		bxt_reduce_dma_latency(chip);
665 666 667

	if (bus->mlcap != NULL)
		intel_init_lctl(chip);
668 669
}

670 671 672 673
/* calculate runtime delay from LPIB */
static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
				   unsigned int pos)
{
674
	struct snd_pcm_substream *substream = azx_dev->core.substream;
675 676 677 678 679 680 681 682 683
	int stream = substream->stream;
	unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
	int delay;

	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
		delay = pos - lpib_pos;
	else
		delay = lpib_pos - pos;
	if (delay < 0) {
684
		if (delay >= azx_dev->core.delay_negative_threshold)
685 686
			delay = 0;
		else
687
			delay += azx_dev->core.bufsize;
688 689
	}

690
	if (delay >= azx_dev->core.period_bytes) {
691 692
		dev_info(chip->card->dev,
			 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
693
			 delay, azx_dev->core.period_bytes);
694 695 696 697 698 699 700 701
		delay = 0;
		chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
		chip->get_delay[stream] = NULL;
	}

	return bytes_to_frames(substream->runtime, delay);
}

702 703
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);

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704 705 706
/* called from IRQ */
static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
{
707
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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708 709 710 711 712 713
	int ok;

	ok = azx_position_ok(chip, azx_dev);
	if (ok == 1) {
		azx_dev->irq_pending = 0;
		return ok;
714
	} else if (ok == 0) {
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715 716
		/* bogus IRQ, process it later */
		azx_dev->irq_pending = 1;
717
		schedule_work(&hda->irq_pending_work);
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718 719 720 721
	}
	return 0;
}

722 723 724
/* Enable/disable i915 display power for the link */
static int azx_intel_link_power(struct azx *chip, bool enable)
{
725
	struct hdac_bus *bus = azx_bus(chip);
726

727
	return snd_hdac_display_power(bus, enable);
728 729
}

730 731 732 733 734 735 736 737 738 739 740
/*
 * Check whether the current DMA position is acceptable for updating
 * periods.  Returns non-zero if it's OK.
 *
 * Many HD-audio controllers appear pretty inaccurate about
 * the update-IRQ timing.  The IRQ is issued before actually the
 * data is processed.  So, we need to process it afterwords in a
 * workqueue.
 */
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
{
741
	struct snd_pcm_substream *substream = azx_dev->core.substream;
742
	int stream = substream->stream;
743
	u32 wallclk;
744 745
	unsigned int pos;

746 747
	wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
	if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
748 749
		return -1;	/* bogus (too early) interrupt */

750 751 752 753 754 755 756 757
	if (chip->get_position[stream])
		pos = chip->get_position[stream](chip, azx_dev);
	else { /* use the position buffer as default */
		pos = azx_get_pos_posbuf(chip, azx_dev);
		if (!pos || pos == (u32)-1) {
			dev_info(chip->card->dev,
				 "Invalid position buffer, using LPIB read method instead.\n");
			chip->get_position[stream] = azx_get_pos_lpib;
758 759 760
			if (chip->get_position[0] == azx_get_pos_lpib &&
			    chip->get_position[1] == azx_get_pos_lpib)
				azx_bus(chip)->use_posbuf = false;
761 762 763 764 765 766 767 768 769
			pos = azx_get_pos_lpib(chip, azx_dev);
			chip->get_delay[stream] = NULL;
		} else {
			chip->get_position[stream] = azx_get_pos_posbuf;
			if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
				chip->get_delay[stream] = azx_get_delay_from_lpib;
		}
	}

770
	if (pos >= azx_dev->core.bufsize)
771
		pos = 0;
772

773
	if (WARN_ONCE(!azx_dev->core.period_bytes,
774
		      "hda-intel: zero azx_dev->period_bytes"))
775
		return -1; /* this shouldn't happen! */
776 777
	if (wallclk < (azx_dev->core.period_wallclk * 5) / 4 &&
	    pos % azx_dev->core.period_bytes > azx_dev->core.period_bytes / 2)
778
		/* NG - it's below the first next period boundary */
779
		return chip->bdl_pos_adj ? 0 : -1;
780
	azx_dev->core.start_wallclk += wallclk;
781 782 783 784 785 786 787 788
	return 1; /* OK, it's fine */
}

/*
 * The work for pending PCM period updates.
 */
static void azx_irq_pending_work(struct work_struct *work)
{
789 790
	struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
	struct azx *chip = &hda->chip;
791 792 793
	struct hdac_bus *bus = azx_bus(chip);
	struct hdac_stream *s;
	int pending, ok;
794

795
	if (!hda->irq_pending_warned) {
796 797 798
		dev_info(chip->card->dev,
			 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
			 chip->card->number);
799
		hda->irq_pending_warned = 1;
800 801
	}

802 803
	for (;;) {
		pending = 0;
804
		spin_lock_irq(&bus->reg_lock);
805 806
		list_for_each_entry(s, &bus->stream_list, list) {
			struct azx_dev *azx_dev = stream_to_azx_dev(s);
807
			if (!azx_dev->irq_pending ||
808 809
			    !s->substream ||
			    !s->running)
810
				continue;
811 812
			ok = azx_position_ok(chip, azx_dev);
			if (ok > 0) {
813
				azx_dev->irq_pending = 0;
814
				spin_unlock(&bus->reg_lock);
815
				snd_pcm_period_elapsed(s->substream);
816
				spin_lock(&bus->reg_lock);
817 818
			} else if (ok < 0) {
				pending = 0;	/* too early */
819 820 821
			} else
				pending++;
		}
822
		spin_unlock_irq(&bus->reg_lock);
823 824
		if (!pending)
			return;
825
		msleep(1);
826 827 828 829 830 831
	}
}

/* clear irq_pending flags and assure no on-going workq */
static void azx_clear_irq_pending(struct azx *chip)
{
832 833
	struct hdac_bus *bus = azx_bus(chip);
	struct hdac_stream *s;
834

835
	spin_lock_irq(&bus->reg_lock);
836 837 838 839
	list_for_each_entry(s, &bus->stream_list, list) {
		struct azx_dev *azx_dev = stream_to_azx_dev(s);
		azx_dev->irq_pending = 0;
	}
840
	spin_unlock_irq(&bus->reg_lock);
L
Linus Torvalds 已提交
841 842
}

843 844
static int azx_acquire_irq(struct azx *chip, int do_disconnect)
{
845 846
	struct hdac_bus *bus = azx_bus(chip);

847 848
	if (request_irq(chip->pci->irq, azx_interrupt,
			chip->msi ? 0 : IRQF_SHARED,
849
			chip->card->irq_descr, chip)) {
850 851 852
		dev_err(chip->card->dev,
			"unable to grab IRQ %d, disabling device\n",
			chip->pci->irq);
853 854 855 856
		if (do_disconnect)
			snd_card_disconnect(chip->card);
		return -1;
	}
857
	bus->irq = chip->pci->irq;
858
	pci_intx(chip->pci, !chip->msi);
859 860 861
	return 0;
}

862 863 864 865 866 867 868 869
/* get the current DMA position with correction on VIA chips */
static unsigned int azx_via_get_position(struct azx *chip,
					 struct azx_dev *azx_dev)
{
	unsigned int link_pos, mini_pos, bound_pos;
	unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
	unsigned int fifo_size;

870
	link_pos = snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
871
	if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
872 873 874 875 876 877 878 879
		/* Playback, no problem using link position */
		return link_pos;
	}

	/* Capture */
	/* For new chipset,
	 * use mod to get the DMA position just like old chipset
	 */
880 881
	mod_dma_pos = le32_to_cpu(*azx_dev->core.posbuf);
	mod_dma_pos %= azx_dev->core.period_bytes;
882 883 884 885

	/* azx_dev->fifo_size can't get FIFO size of in stream.
	 * Get from base address + offset.
	 */
886 887
	fifo_size = readw(azx_bus(chip)->remap_addr +
			  VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
888 889 890 891 892 893 894 895 896 897

	if (azx_dev->insufficient) {
		/* Link position never gather than FIFO size */
		if (link_pos <= fifo_size)
			return 0;

		azx_dev->insufficient = 0;
	}

	if (link_pos <= fifo_size)
898
		mini_pos = azx_dev->core.bufsize + link_pos - fifo_size;
899 900 901 902
	else
		mini_pos = link_pos - fifo_size;

	/* Find nearest previous boudary */
903 904
	mod_mini_pos = mini_pos % azx_dev->core.period_bytes;
	mod_link_pos = link_pos % azx_dev->core.period_bytes;
905 906 907 908 909
	if (mod_link_pos >= fifo_size)
		bound_pos = link_pos - mod_link_pos;
	else if (mod_dma_pos >= mod_mini_pos)
		bound_pos = mini_pos - mod_mini_pos;
	else {
910 911
		bound_pos = mini_pos - mod_mini_pos + azx_dev->core.period_bytes;
		if (bound_pos >= azx_dev->core.bufsize)
912 913 914 915 916 917 918
			bound_pos = 0;
	}

	/* Calculate real DMA position we want */
	return bound_pos + mod_dma_pos;
}

919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943
static unsigned int azx_skl_get_dpib_pos(struct azx *chip,
					 struct azx_dev *azx_dev)
{
	return _snd_hdac_chip_readl(azx_bus(chip),
				    AZX_REG_VS_SDXDPIB_XBASE +
				    (AZX_REG_VS_SDXDPIB_XINTERVAL *
				     azx_dev->core.index));
}

/* get the current DMA position with correction on SKL+ chips */
static unsigned int azx_get_pos_skl(struct azx *chip, struct azx_dev *azx_dev)
{
	/* DPIB register gives a more accurate position for playback */
	if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
		return azx_skl_get_dpib_pos(chip, azx_dev);

	/* For capture, we need to read posbuf, but it requires a delay
	 * for the possible boundary overlap; the read of DPIB fetches the
	 * actual posbuf
	 */
	udelay(20);
	azx_skl_get_dpib_pos(chip, azx_dev);
	return azx_get_pos_posbuf(chip, azx_dev);
}

944
#ifdef CONFIG_PM
945 946 947 948 949
static DEFINE_MUTEX(card_list_lock);
static LIST_HEAD(card_list);

static void azx_add_card_list(struct azx *chip)
{
950
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
951
	mutex_lock(&card_list_lock);
952
	list_add(&hda->list, &card_list);
953 954 955 956 957
	mutex_unlock(&card_list_lock);
}

static void azx_del_card_list(struct azx *chip)
{
958
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
959
	mutex_lock(&card_list_lock);
960
	list_del_init(&hda->list);
961 962 963 964 965 966
	mutex_unlock(&card_list_lock);
}

/* trigger power-save check at writing parameter */
static int param_set_xint(const char *val, const struct kernel_param *kp)
{
967
	struct hda_intel *hda;
968 969 970 971 972 973 974 975
	struct azx *chip;
	int prev = power_save;
	int ret = param_set_int(val, kp);

	if (ret || prev == power_save)
		return ret;

	mutex_lock(&card_list_lock);
976 977
	list_for_each_entry(hda, &card_list, list) {
		chip = &hda->chip;
978
		if (!hda->probe_continued || chip->disabled)
979
			continue;
980
		snd_hda_set_power_save(&chip->bus, power_save * 1000);
981 982 983 984 985 986 987
	}
	mutex_unlock(&card_list_lock);
	return 0;
}
#else
#define azx_add_card_list(chip) /* NOP */
#define azx_del_card_list(chip) /* NOP */
988
#endif /* CONFIG_PM */
989

990
#ifdef CONFIG_PM_SLEEP
991 992 993
/*
 * power management
 */
994
static int azx_suspend(struct device *dev)
L
Linus Torvalds 已提交
995
{
996
	struct snd_card *card = dev_get_drvdata(dev);
997 998
	struct azx *chip;
	struct hda_intel *hda;
999
	struct hdac_bus *bus;
L
Linus Torvalds 已提交
1000

1001 1002 1003 1004 1005
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1006
	if (chip->disabled || hda->init_failed || !chip->running)
1007 1008
		return 0;

1009
	bus = azx_bus(chip);
T
Takashi Iwai 已提交
1010
	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1011
	azx_clear_irq_pending(chip);
1012
	azx_stop_chip(chip);
1013
	azx_enter_link_reset(chip);
1014 1015 1016
	if (bus->irq >= 0) {
		free_irq(bus->irq, chip);
		bus->irq = -1;
1017
	}
1018

1019
	if (chip->msi)
1020
		pci_disable_msi(chip->pci);
1021
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1022
		&& hda->need_i915_power)
1023
		snd_hdac_display_power(bus, false);
L
Libin Yang 已提交
1024 1025

	trace_azx_suspend(chip);
L
Linus Torvalds 已提交
1026 1027 1028
	return 0;
}

1029
static int azx_resume(struct device *dev)
L
Linus Torvalds 已提交
1030
{
1031 1032
	struct pci_dev *pci = to_pci_dev(dev);
	struct snd_card *card = dev_get_drvdata(dev);
1033 1034
	struct azx *chip;
	struct hda_intel *hda;
1035
	struct hdac_bus *bus;
1036 1037 1038

	if (!card)
		return 0;
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Linus Torvalds 已提交
1039

1040 1041
	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1042
	bus = azx_bus(chip);
1043
	if (chip->disabled || hda->init_failed || !chip->running)
1044 1045
		return 0;

1046 1047 1048 1049
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
		snd_hdac_display_power(bus, true);
		if (hda->need_i915_power)
			snd_hdac_i915_set_bclk(bus);
1050
	}
1051

1052 1053 1054 1055
	if (chip->msi)
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
	if (azx_acquire_irq(chip, 1) < 0)
1056
		return -EIO;
1057
	azx_init_pci(chip);
1058

1059
	hda_intel_init_chip(chip, true);
1060

1061 1062 1063 1064 1065
	/* power down again for link-controlled chips */
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
	    !hda->need_i915_power)
		snd_hdac_display_power(bus, false);

T
Takashi Iwai 已提交
1066
	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
L
Libin Yang 已提交
1067 1068

	trace_azx_resume(chip);
L
Linus Torvalds 已提交
1069 1070
	return 0;
}
1071

1072 1073 1074 1075 1076
/* put codec down to D3 at hibernation for Intel SKL+;
 * otherwise BIOS may still access the codec and screw up the driver
 */
static int azx_freeze_noirq(struct device *dev)
{
1077 1078
	struct snd_card *card = dev_get_drvdata(dev);
	struct azx *chip = card->private_data;
1079 1080
	struct pci_dev *pci = to_pci_dev(dev);

1081
	if (chip->driver_type == AZX_DRIVER_SKL)
1082 1083 1084 1085 1086 1087 1088
		pci_set_power_state(pci, PCI_D3hot);

	return 0;
}

static int azx_thaw_noirq(struct device *dev)
{
1089 1090
	struct snd_card *card = dev_get_drvdata(dev);
	struct azx *chip = card->private_data;
1091 1092
	struct pci_dev *pci = to_pci_dev(dev);

1093
	if (chip->driver_type == AZX_DRIVER_SKL)
1094 1095 1096 1097 1098 1099
		pci_set_power_state(pci, PCI_D0);

	return 0;
}
#endif /* CONFIG_PM_SLEEP */

1100
#ifdef CONFIG_PM
1101 1102 1103
static int azx_runtime_suspend(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1104 1105
	struct azx *chip;
	struct hda_intel *hda;
1106

1107 1108 1109 1110 1111
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1112
	if (chip->disabled || hda->init_failed)
1113 1114
		return 0;

1115
	if (!azx_has_pm_runtime(chip))
1116 1117
		return 0;

1118 1119 1120 1121
	/* enable controller wake up event */
	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
		  STATESTS_INT_MASK);

1122
	azx_stop_chip(chip);
1123
	azx_enter_link_reset(chip);
1124
	azx_clear_irq_pending(chip);
1125
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1126
		&& hda->need_i915_power)
1127
		snd_hdac_display_power(azx_bus(chip), false);
1128

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Libin Yang 已提交
1129
	trace_azx_runtime_suspend(chip);
1130 1131 1132 1133 1134 1135
	return 0;
}

static int azx_runtime_resume(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1136 1137
	struct azx *chip;
	struct hda_intel *hda;
1138
	struct hdac_bus *bus;
1139 1140
	struct hda_codec *codec;
	int status;
1141

1142 1143 1144 1145 1146
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1147
	bus = azx_bus(chip);
1148
	if (chip->disabled || hda->init_failed)
1149 1150
		return 0;

1151
	if (!azx_has_pm_runtime(chip))
1152 1153
		return 0;

1154
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1155 1156
		snd_hdac_display_power(bus, true);
		if (hda->need_i915_power)
1157
			snd_hdac_i915_set_bclk(bus);
1158
	}
1159 1160 1161 1162

	/* Read STATESTS before controller reset */
	status = azx_readw(chip, STATESTS);

1163
	azx_init_pci(chip);
1164
	hda_intel_init_chip(chip, true);
1165

1166 1167
	if (status) {
		list_for_each_codec(codec, &chip->bus)
1168
			if (status & (1 << codec->addr))
1169 1170
				schedule_delayed_work(&codec->jackpoll_work,
						      codec->jackpoll_interval);
1171 1172 1173 1174 1175 1176
	}

	/* disable controller Wake Up event*/
	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
			~STATESTS_INT_MASK);

1177 1178 1179 1180 1181
	/* power down again for link-controlled chips */
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
	    !hda->need_i915_power)
		snd_hdac_display_power(bus, false);

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Libin Yang 已提交
1182
	trace_azx_runtime_resume(chip);
1183 1184
	return 0;
}
1185 1186 1187 1188

static int azx_runtime_idle(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1189 1190 1191 1192 1193
	struct azx *chip;
	struct hda_intel *hda;

	if (!card)
		return 0;
1194

1195 1196
	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1197
	if (chip->disabled || hda->init_failed)
1198 1199
		return 0;

1200
	if (!power_save_controller || !azx_has_pm_runtime(chip) ||
1201
	    azx_bus(chip)->codec_powered || !chip->running)
1202 1203 1204 1205 1206
		return -EBUSY;

	return 0;
}

1207 1208
static const struct dev_pm_ops azx_pm = {
	SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
1209 1210 1211 1212
#ifdef CONFIG_PM_SLEEP
	.freeze_noirq = azx_freeze_noirq,
	.thaw_noirq = azx_thaw_noirq,
#endif
1213
	SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
1214 1215
};

1216 1217 1218
#define AZX_PM_OPS	&azx_pm
#else
#define AZX_PM_OPS	NULL
1219
#endif /* CONFIG_PM */
L
Linus Torvalds 已提交
1220 1221


1222
static int azx_probe_continue(struct azx *chip);
1223

1224
#ifdef SUPPORT_VGA_SWITCHEROO
1225
static struct pci_dev *get_bound_vga(struct pci_dev *pci);
1226 1227 1228 1229 1230 1231

static void azx_vs_set_state(struct pci_dev *pci,
			     enum vga_switcheroo_state state)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
1232
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1233
	struct hda_codec *codec;
1234 1235
	bool disabled;

1236 1237
	wait_for_completion(&hda->probe_wait);
	if (hda->init_failed)
1238 1239 1240 1241 1242 1243
		return;

	disabled = (state == VGA_SWITCHEROO_OFF);
	if (chip->disabled == disabled)
		return;

1244
	if (!hda->probe_continued) {
1245 1246
		chip->disabled = disabled;
		if (!disabled) {
1247 1248
			dev_info(chip->card->dev,
				 "Start delayed initialization\n");
1249
			if (azx_probe_continue(chip) < 0) {
1250
				dev_err(chip->card->dev, "initialization error\n");
1251
				hda->init_failed = true;
1252 1253 1254
			}
		}
	} else {
1255
		dev_info(chip->card->dev, "%s via vga_switcheroo\n",
1256
			 disabled ? "Disabling" : "Enabling");
1257
		if (disabled) {
1258 1259 1260 1261 1262 1263
			list_for_each_codec(codec, &chip->bus) {
				pm_runtime_suspend(hda_codec_dev(codec));
				pm_runtime_disable(hda_codec_dev(codec));
			}
			pm_runtime_suspend(card->dev);
			pm_runtime_disable(card->dev);
1264
			/* when we get suspended by vga_switcheroo we end up in D3cold,
1265 1266 1267
			 * however we have no ACPI handle, so pci/acpi can't put us there,
			 * put ourselves there */
			pci->current_state = PCI_D3cold;
1268
			chip->disabled = true;
1269
			if (snd_hda_lock_devices(&chip->bus))
1270 1271
				dev_warn(chip->card->dev,
					 "Cannot lock devices!\n");
1272
		} else {
1273
			snd_hda_unlock_devices(&chip->bus);
1274
			chip->disabled = false;
1275 1276 1277 1278 1279
			pm_runtime_enable(card->dev);
			list_for_each_codec(codec, &chip->bus) {
				pm_runtime_enable(hda_codec_dev(codec));
				pm_runtime_resume(hda_codec_dev(codec));
			}
1280 1281 1282 1283 1284 1285 1286 1287
		}
	}
}

static bool azx_vs_can_switch(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
1288
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1289

1290 1291
	wait_for_completion(&hda->probe_wait);
	if (hda->init_failed)
1292
		return false;
1293
	if (chip->disabled || !hda->probe_continued)
1294
		return true;
1295
	if (snd_hda_lock_devices(&chip->bus))
1296
		return false;
1297
	snd_hda_unlock_devices(&chip->bus);
1298 1299 1300
	return true;
}

1301
static void init_vga_switcheroo(struct azx *chip)
1302
{
1303
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1304 1305
	struct pci_dev *p = get_bound_vga(chip->pci);
	if (p) {
1306
		dev_info(chip->card->dev,
1307
			 "Handle vga_switcheroo audio client\n");
1308
		hda->use_vga_switcheroo = 1;
1309
		chip->driver_caps |= AZX_DCAPS_PM_RUNTIME;
1310 1311 1312 1313 1314 1315 1316 1317 1318
		pci_dev_put(p);
	}
}

static const struct vga_switcheroo_client_ops azx_vs_ops = {
	.set_gpu_state = azx_vs_set_state,
	.can_switch = azx_vs_can_switch,
};

1319
static int register_vga_switcheroo(struct azx *chip)
1320
{
1321
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1322 1323
	int err;

1324
	if (!hda->use_vga_switcheroo)
1325 1326 1327 1328
		return 0;
	/* FIXME: currently only handling DIS controller
	 * is there any machine with two switchable HDMI audio controllers?
	 */
1329
	err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1330
						   VGA_SWITCHEROO_DIS);
1331 1332
	if (err < 0)
		return err;
1333
	hda->vga_switcheroo_registered = 1;
1334

1335
	return 0;
1336 1337 1338 1339
}
#else
#define init_vga_switcheroo(chip)		/* NOP */
#define register_vga_switcheroo(chip)		0
1340
#define check_hdmi_disabled(pci)	false
1341 1342
#endif /* SUPPORT_VGA_SWITCHER */

L
Linus Torvalds 已提交
1343 1344 1345
/*
 * destructor
 */
1346
static int azx_free(struct azx *chip)
L
Linus Torvalds 已提交
1347
{
W
Wang Xingchao 已提交
1348
	struct pci_dev *pci = chip->pci;
1349
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1350
	struct hdac_bus *bus = azx_bus(chip);
T
Takashi Iwai 已提交
1351

1352
	if (azx_has_pm_runtime(chip) && chip->running)
W
Wang Xingchao 已提交
1353 1354
		pm_runtime_get_noresume(&pci->dev);

1355 1356
	azx_del_card_list(chip);

1357 1358
	hda->init_failed = 1; /* to be sure */
	complete_all(&hda->probe_wait);
1359

1360
	if (use_vga_switcheroo(hda)) {
1361 1362
		if (chip->disabled && hda->probe_continued)
			snd_hda_unlock_devices(&chip->bus);
1363
		if (hda->vga_switcheroo_registered)
1364
			vga_switcheroo_unregister_client(chip->pci);
1365 1366
	}

1367
	if (bus->chip_init) {
1368
		azx_clear_irq_pending(chip);
1369
		azx_stop_all_streams(chip);
1370
		azx_stop_chip(chip);
L
Linus Torvalds 已提交
1371 1372
	}

1373 1374
	if (bus->irq >= 0)
		free_irq(bus->irq, (void*)chip);
1375
	if (chip->msi)
1376
		pci_disable_msi(chip->pci);
1377
	iounmap(bus->remap_addr);
L
Linus Torvalds 已提交
1378

1379
	azx_free_stream_pages(chip);
1380 1381 1382
	azx_free_streams(chip);
	snd_hdac_bus_exit(bus);

1383 1384
	if (chip->region_requested)
		pci_release_regions(chip->pci);
1385

L
Linus Torvalds 已提交
1386
	pci_disable_device(chip->pci);
1387
#ifdef CONFIG_SND_HDA_PATCH_LOADER
1388
	release_firmware(chip->fw);
1389
#endif
1390

1391
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1392
		if (hda->need_i915_power)
1393
			snd_hdac_display_power(bus, false);
1394
	}
1395
	if (chip->driver_caps & AZX_DCAPS_I915_COMPONENT)
1396
		snd_hdac_i915_exit(bus);
1397
	kfree(hda);
L
Linus Torvalds 已提交
1398 1399 1400 1401

	return 0;
}

1402 1403 1404 1405 1406 1407 1408 1409
static int azx_dev_disconnect(struct snd_device *device)
{
	struct azx *chip = device->device_data;

	chip->bus.shutdown = 1;
	return 0;
}

1410
static int azx_dev_free(struct snd_device *device)
L
Linus Torvalds 已提交
1411 1412 1413 1414
{
	return azx_free(device->device_data);
}

1415
#ifdef SUPPORT_VGA_SWITCHEROO
1416
/*
1417
 * Check of disabled HDMI controller by vga_switcheroo
1418
 */
1419
static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431
{
	struct pci_dev *p;

	/* check only discrete GPU */
	switch (pci->vendor) {
	case PCI_VENDOR_ID_ATI:
	case PCI_VENDOR_ID_AMD:
	case PCI_VENDOR_ID_NVIDIA:
		if (pci->devfn == 1) {
			p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
							pci->bus->number, 0);
			if (p) {
1432
				if ((p->class >> 16) == PCI_BASE_CLASS_DISPLAY)
1433 1434 1435 1436 1437 1438 1439 1440 1441
					return p;
				pci_dev_put(p);
			}
		}
		break;
	}
	return NULL;
}

1442
static bool check_hdmi_disabled(struct pci_dev *pci)
1443 1444 1445 1446 1447
{
	bool vga_inactive = false;
	struct pci_dev *p = get_bound_vga(pci);

	if (p) {
1448
		if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1449 1450 1451 1452 1453
			vga_inactive = true;
		pci_dev_put(p);
	}
	return vga_inactive;
}
1454
#endif /* SUPPORT_VGA_SWITCHEROO */
1455

1456 1457 1458
/*
 * white/black-listing for position_fix
 */
1459
static struct snd_pci_quirk position_fix_list[] = {
T
Takashi Iwai 已提交
1460 1461
	SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
	SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1462
	SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
T
Takashi Iwai 已提交
1463
	SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1464
	SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
D
Daniel T Chen 已提交
1465
	SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1466
	SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1467
	SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1468
	SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1469
	SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1470
	SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1471
	SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1472
	SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1473
	SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1474 1475 1476
	{}
};

1477
static int check_position_fix(struct azx *chip, int fix)
1478 1479 1480
{
	const struct snd_pci_quirk *q;

1481
	switch (fix) {
1482
	case POS_FIX_AUTO:
1483 1484
	case POS_FIX_LPIB:
	case POS_FIX_POSBUF:
1485
	case POS_FIX_VIACOMBO:
1486
	case POS_FIX_COMBO:
1487
	case POS_FIX_SKL:
1488 1489 1490 1491 1492
		return fix;
	}

	q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
	if (q) {
1493 1494 1495
		dev_info(chip->card->dev,
			 "position_fix set to %d for device %04x:%04x\n",
			 q->value, q->subvendor, q->subdevice);
1496
		return q->value;
1497
	}
1498 1499

	/* Check VIA/ATI HD Audio Controller exist */
1500
	if (chip->driver_type == AZX_DRIVER_VIA) {
1501
		dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1502
		return POS_FIX_VIACOMBO;
1503 1504
	}
	if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1505
		dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1506
		return POS_FIX_LPIB;
1507
	}
1508
	if (chip->driver_type == AZX_DRIVER_SKL) {
1509 1510 1511
		dev_dbg(chip->card->dev, "Using SKL position fix\n");
		return POS_FIX_SKL;
	}
1512
	return POS_FIX_AUTO;
1513 1514
}

1515 1516 1517 1518 1519 1520 1521 1522
static void assign_position_fix(struct azx *chip, int fix)
{
	static azx_get_pos_callback_t callbacks[] = {
		[POS_FIX_AUTO] = NULL,
		[POS_FIX_LPIB] = azx_get_pos_lpib,
		[POS_FIX_POSBUF] = azx_get_pos_posbuf,
		[POS_FIX_VIACOMBO] = azx_via_get_position,
		[POS_FIX_COMBO] = azx_get_pos_lpib,
1523
		[POS_FIX_SKL] = azx_get_pos_skl,
1524 1525 1526 1527 1528 1529 1530 1531
	};

	chip->get_position[0] = chip->get_position[1] = callbacks[fix];

	/* combo mode uses LPIB only for playback */
	if (fix == POS_FIX_COMBO)
		chip->get_position[1] = NULL;

1532
	if ((fix == POS_FIX_POSBUF || fix == POS_FIX_SKL) &&
1533 1534 1535 1536 1537 1538 1539
	    (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
		chip->get_delay[0] = chip->get_delay[1] =
			azx_get_delay_from_lpib;
	}

}

1540 1541 1542
/*
 * black-lists for probe_mask
 */
1543
static struct snd_pci_quirk probe_mask_list[] = {
1544 1545 1546 1547 1548 1549
	/* Thinkpad often breaks the controller communication when accessing
	 * to the non-working (or non-existing) modem codec slot.
	 */
	SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1550 1551
	/* broken BIOS */
	SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1552 1553
	/* including bogus ALC268 in slot#2 that conflicts with ALC888 */
	SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1554
	/* forced codec slots */
1555
	SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1556
	SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1557 1558
	/* WinFast VP200 H (Teradici) user reported broken communication */
	SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1559 1560 1561
	{}
};

1562 1563
#define AZX_FORCE_CODEC_MASK	0x100

1564
static void check_probe_mask(struct azx *chip, int dev)
1565 1566 1567
{
	const struct snd_pci_quirk *q;

1568 1569
	chip->codec_probe_mask = probe_mask[dev];
	if (chip->codec_probe_mask == -1) {
1570 1571
		q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
		if (q) {
1572 1573 1574
			dev_info(chip->card->dev,
				 "probe_mask set to 0x%x for device %04x:%04x\n",
				 q->value, q->subvendor, q->subdevice);
1575
			chip->codec_probe_mask = q->value;
1576 1577
		}
	}
1578 1579 1580 1581

	/* check forced option */
	if (chip->codec_probe_mask != -1 &&
	    (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1582
		azx_bus(chip)->codec_mask = chip->codec_probe_mask & 0xff;
1583
		dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1584
			 (int)azx_bus(chip)->codec_mask);
1585
	}
1586 1587
}

1588
/*
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Takashi Iwai 已提交
1589
 * white/black-list for enable_msi
1590
 */
1591
static struct snd_pci_quirk msi_black_list[] = {
1592 1593 1594 1595
	SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
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1596
	SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1597
	SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1598
	SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1599
	SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1600
	SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1601
	SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1602 1603 1604
	{}
};

1605
static void check_msi(struct azx *chip)
1606 1607 1608
{
	const struct snd_pci_quirk *q;

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1609 1610
	if (enable_msi >= 0) {
		chip->msi = !!enable_msi;
1611
		return;
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1612 1613 1614
	}
	chip->msi = 1;	/* enable MSI as default */
	q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1615
	if (q) {
1616 1617 1618
		dev_info(chip->card->dev,
			 "msi for device %04x:%04x set to %d\n",
			 q->subvendor, q->subdevice, q->value);
1619
		chip->msi = q->value;
1620 1621 1622 1623
		return;
	}

	/* NVidia chipsets seem to cause troubles with MSI */
1624
	if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1625
		dev_info(chip->card->dev, "Disabling MSI\n");
1626
		chip->msi = 0;
1627 1628 1629
	}
}

1630
/* check the snoop mode availability */
1631
static void azx_check_snoop_available(struct azx *chip)
1632
{
1633
	int snoop = hda_snoop;
1634

1635 1636 1637 1638 1639 1640 1641 1642
	if (snoop >= 0) {
		dev_info(chip->card->dev, "Force to %s mode by module option\n",
			 snoop ? "snoop" : "non-snoop");
		chip->snoop = snoop;
		return;
	}

	snoop = true;
1643 1644
	if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
	    chip->driver_type == AZX_DRIVER_VIA) {
1645 1646 1647
		/* force to non-snoop mode for a new VIA controller
		 * when BIOS is set
		 */
1648 1649
		u8 val;
		pci_read_config_byte(chip->pci, 0x42, &val);
1650 1651
		if (!(val & 0x80) && (chip->pci->revision == 0x30 ||
				      chip->pci->revision == 0x20))
1652
			snoop = false;
1653 1654
	}

1655 1656 1657
	if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
		snoop = false;

1658 1659 1660
	chip->snoop = snoop;
	if (!snoop)
		dev_info(chip->card->dev, "Force to non-snoop mode\n");
1661
}
1662

1663 1664
static void azx_probe_work(struct work_struct *work)
{
1665 1666
	struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
	azx_probe_continue(&hda->chip);
1667 1668
}

1669 1670
static int default_bdl_pos_adj(struct azx *chip)
{
1671 1672 1673 1674 1675 1676 1677 1678 1679
	/* some exceptions: Atoms seem problematic with value 1 */
	if (chip->pci->vendor == PCI_VENDOR_ID_INTEL) {
		switch (chip->pci->device) {
		case 0x0f04: /* Baytrail */
		case 0x2284: /* Braswell */
			return 32;
		}
	}

1680 1681 1682 1683 1684 1685 1686 1687 1688
	switch (chip->driver_type) {
	case AZX_DRIVER_ICH:
	case AZX_DRIVER_PCH:
		return 1;
	default:
		return 32;
	}
}

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1689 1690 1691
/*
 * constructor
 */
1692 1693 1694
static const struct hdac_io_ops pci_hda_io_ops;
static const struct hda_controller_ops pci_hda_ops;

1695 1696 1697
static int azx_create(struct snd_card *card, struct pci_dev *pci,
		      int dev, unsigned int driver_caps,
		      struct azx **rchip)
L
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1698
{
1699
	static struct snd_device_ops ops = {
1700
		.dev_disconnect = azx_dev_disconnect,
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1701 1702
		.dev_free = azx_dev_free,
	};
1703
	struct hda_intel *hda;
1704 1705
	struct azx *chip;
	int err;
L
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1706 1707

	*rchip = NULL;
1708

1709 1710
	err = pci_enable_device(pci);
	if (err < 0)
L
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1711 1712
		return err;

1713 1714
	hda = kzalloc(sizeof(*hda), GFP_KERNEL);
	if (!hda) {
L
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1715 1716 1717 1718
		pci_disable_device(pci);
		return -ENOMEM;
	}

1719
	chip = &hda->chip;
1720
	mutex_init(&chip->open_mutex);
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1721 1722
	chip->card = card;
	chip->pci = pci;
1723
	chip->ops = &pci_hda_ops;
1724 1725
	chip->driver_caps = driver_caps;
	chip->driver_type = driver_caps & 0xff;
1726
	check_msi(chip);
1727
	chip->dev_index = dev;
1728
	chip->jackpoll_ms = jackpoll_ms;
1729
	INIT_LIST_HEAD(&chip->pcm_list);
1730 1731
	INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
	INIT_LIST_HEAD(&hda->list);
1732
	init_vga_switcheroo(chip);
1733
	init_completion(&hda->probe_wait);
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Linus Torvalds 已提交
1734

1735
	assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1736

1737
	check_probe_mask(chip, dev);
1738

1739 1740 1741 1742 1743
	if (single_cmd < 0) /* allow fallback to single_cmd at errors */
		chip->fallback_to_single_cmd = 1;
	else /* explicitly set to single_cmd or not */
		chip->single_cmd = single_cmd;

1744
	azx_check_snoop_available(chip);
1745

1746 1747 1748 1749
	if (bdl_pos_adj[dev] < 0)
		chip->bdl_pos_adj = default_bdl_pos_adj(chip);
	else
		chip->bdl_pos_adj = bdl_pos_adj[dev];
1750

1751 1752 1753 1754
	/* Workaround for a communication error on CFL (bko#199007) */
	if (IS_CFL(pci))
		chip->polling_mode = 1;

1755 1756 1757 1758 1759 1760 1761
	err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
	if (err < 0) {
		kfree(hda);
		pci_disable_device(pci);
		return err;
	}

1762 1763 1764 1765 1766
	if (chip->driver_type == AZX_DRIVER_NVIDIA) {
		dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
		chip->bus.needs_damn_long_delay = 1;
	}

1767 1768
	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
	if (err < 0) {
1769
		dev_err(card->dev, "Error creating device [card]!\n");
1770 1771 1772 1773
		azx_free(chip);
		return err;
	}

1774
	/* continue probing in work context as may trigger request module */
1775
	INIT_WORK(&hda->probe_work, azx_probe_work);
1776

1777
	*rchip = chip;
1778

1779 1780 1781
	return 0;
}

1782
static int azx_first_init(struct azx *chip)
1783 1784 1785 1786
{
	int dev = chip->dev_index;
	struct pci_dev *pci = chip->pci;
	struct snd_card *card = chip->card;
1787
	struct hdac_bus *bus = azx_bus(chip);
1788
	int err;
1789
	unsigned short gcap;
1790
	unsigned int dma_bits = 64;
1791

1792 1793 1794 1795 1796 1797 1798 1799 1800 1801
#if BITS_PER_LONG != 64
	/* Fix up base address on ULI M5461 */
	if (chip->driver_type == AZX_DRIVER_ULI) {
		u16 tmp3;
		pci_read_config_word(pci, 0x40, &tmp3);
		pci_write_config_word(pci, 0x40, tmp3 | 0x10);
		pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
	}
#endif

1802
	err = pci_request_regions(pci, "ICH HD audio");
1803
	if (err < 0)
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1804
		return err;
1805
	chip->region_requested = 1;
L
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1806

1807 1808 1809
	bus->addr = pci_resource_start(pci, 0);
	bus->remap_addr = pci_ioremap_bar(pci, 0);
	if (bus->remap_addr == NULL) {
1810
		dev_err(card->dev, "ioremap error\n");
1811
		return -ENXIO;
L
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1812 1813
	}

1814
	if (chip->driver_type == AZX_DRIVER_SKL)
1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829
		snd_hdac_bus_parse_capabilities(bus);

	/*
	 * Some Intel CPUs has always running timer (ART) feature and
	 * controller may have Global time sync reporting capability, so
	 * check both of these before declaring synchronized time reporting
	 * capability SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME
	 */
	chip->gts_present = false;

#ifdef CONFIG_X86
	if (bus->ppcap && boot_cpu_has(X86_FEATURE_ART))
		chip->gts_present = true;
#endif

1830 1831 1832 1833 1834
	if (chip->msi) {
		if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
			dev_dbg(card->dev, "Disabling 64bit MSI\n");
			pci->no_64bit_msi = true;
		}
1835 1836
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
1837
	}
1838

1839 1840
	if (azx_acquire_irq(chip, 0) < 0)
		return -EBUSY;
L
Linus Torvalds 已提交
1841 1842

	pci_set_master(pci);
1843
	synchronize_irq(bus->irq);
L
Linus Torvalds 已提交
1844

1845
	gcap = azx_readw(chip, GCAP);
1846
	dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1847

1848 1849 1850 1851
	/* AMD devices support 40 or 48bit DMA, take the safe one */
	if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
		dma_bits = 40;

1852
	/* disable SB600 64bit support for safety */
1853
	if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1854
		struct pci_dev *p_smbus;
1855
		dma_bits = 40;
1856 1857 1858 1859 1860
		p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
					 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
					 NULL);
		if (p_smbus) {
			if (p_smbus->revision < 0x30)
T
Takashi Iwai 已提交
1861
				gcap &= ~AZX_GCAP_64OK;
1862 1863 1864
			pci_dev_put(p_smbus);
		}
	}
1865

1866 1867 1868 1869
	/* NVidia hardware normally only supports up to 40 bits of DMA */
	if (chip->pci->vendor == PCI_VENDOR_ID_NVIDIA)
		dma_bits = 40;

1870 1871
	/* disable 64bit DMA address on some devices */
	if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1872
		dev_dbg(card->dev, "Disabling 64bit DMA\n");
T
Takashi Iwai 已提交
1873
		gcap &= ~AZX_GCAP_64OK;
1874
	}
1875

1876
	/* disable buffer size rounding to 128-byte multiples if supported */
1877 1878 1879
	if (align_buffer_size >= 0)
		chip->align_buffer_size = !!align_buffer_size;
	else {
1880
		if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1881 1882 1883 1884
			chip->align_buffer_size = 0;
		else
			chip->align_buffer_size = 1;
	}
1885

1886
	/* allow 64bit DMA address if supported by H/W */
1887 1888
	if (!(gcap & AZX_GCAP_64OK))
		dma_bits = 32;
1889 1890
	if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(dma_bits))) {
		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(dma_bits));
1891
	} else {
1892 1893
		dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
1894
	}
1895

1896 1897 1898 1899 1900 1901
	/* read number of streams from GCAP register instead of using
	 * hardcoded value
	 */
	chip->capture_streams = (gcap >> 8) & 0x0f;
	chip->playback_streams = (gcap >> 12) & 0x0f;
	if (!chip->playback_streams && !chip->capture_streams) {
1902 1903 1904 1905 1906 1907 1908 1909
		/* gcap didn't give any info, switching to old method */

		switch (chip->driver_type) {
		case AZX_DRIVER_ULI:
			chip->playback_streams = ULI_NUM_PLAYBACK;
			chip->capture_streams = ULI_NUM_CAPTURE;
			break;
		case AZX_DRIVER_ATIHDMI:
1910
		case AZX_DRIVER_ATIHDMI_NS:
1911 1912 1913
			chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
			chip->capture_streams = ATIHDMI_NUM_CAPTURE;
			break;
1914
		case AZX_DRIVER_GENERIC:
1915 1916 1917 1918 1919
		default:
			chip->playback_streams = ICH6_NUM_PLAYBACK;
			chip->capture_streams = ICH6_NUM_CAPTURE;
			break;
		}
1920
	}
1921 1922
	chip->capture_index_offset = 0;
	chip->playback_index_offset = chip->capture_streams;
1923 1924
	chip->num_streams = chip->playback_streams + chip->capture_streams;

1925 1926 1927 1928 1929 1930 1931 1932
	/* sanity check for the SDxCTL.STRM field overflow */
	if (chip->num_streams > 15 &&
	    (chip->driver_caps & AZX_DCAPS_SEPARATE_STREAM_TAG) == 0) {
		dev_warn(chip->card->dev, "number of I/O streams is %d, "
			 "forcing separate stream tags", chip->num_streams);
		chip->driver_caps |= AZX_DCAPS_SEPARATE_STREAM_TAG;
	}

1933 1934
	/* initialize streams */
	err = azx_init_streams(chip);
1935
	if (err < 0)
1936
		return err;
L
Linus Torvalds 已提交
1937

1938 1939 1940
	err = azx_alloc_stream_pages(chip);
	if (err < 0)
		return err;
L
Linus Torvalds 已提交
1941 1942

	/* initialize chip */
1943
	azx_init_pci(chip);
1944

1945 1946
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
		snd_hdac_i915_set_bclk(bus);
1947

1948
	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
L
Linus Torvalds 已提交
1949 1950

	/* codec detection */
1951
	if (!azx_bus(chip)->codec_mask) {
1952
		dev_err(card->dev, "no codecs found!\n");
1953
		return -ENODEV;
L
Linus Torvalds 已提交
1954 1955
	}

1956
	strcpy(card->driver, "HDA-Intel");
T
Takashi Iwai 已提交
1957 1958 1959 1960
	strlcpy(card->shortname, driver_short_names[chip->driver_type],
		sizeof(card->shortname));
	snprintf(card->longname, sizeof(card->longname),
		 "%s at 0x%lx irq %i",
1961
		 card->shortname, bus->addr, bus->irq);
1962

L
Linus Torvalds 已提交
1963 1964 1965
	return 0;
}

1966
#ifdef CONFIG_SND_HDA_PATCH_LOADER
1967 1968 1969 1970 1971 1972 1973 1974
/* callback from request_firmware_nowait() */
static void azx_firmware_cb(const struct firmware *fw, void *context)
{
	struct snd_card *card = context;
	struct azx *chip = card->private_data;
	struct pci_dev *pci = chip->pci;

	if (!fw) {
1975
		dev_err(card->dev, "Cannot load firmware, aborting\n");
1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990
		goto error;
	}

	chip->fw = fw;
	if (!chip->disabled) {
		/* continue probing */
		if (azx_probe_continue(chip))
			goto error;
	}
	return; /* OK */

 error:
	snd_card_free(card);
	pci_set_drvdata(pci, NULL);
}
1991
#endif
1992

1993 1994 1995 1996 1997
/*
 * HDA controller ops.
 */

/* PCI register access. */
1998
static void pci_azx_writel(u32 value, u32 __iomem *addr)
1999 2000 2001 2002
{
	writel(value, addr);
}

2003
static u32 pci_azx_readl(u32 __iomem *addr)
2004 2005 2006 2007
{
	return readl(addr);
}

2008
static void pci_azx_writew(u16 value, u16 __iomem *addr)
2009 2010 2011 2012
{
	writew(value, addr);
}

2013
static u16 pci_azx_readw(u16 __iomem *addr)
2014 2015 2016 2017
{
	return readw(addr);
}

2018
static void pci_azx_writeb(u8 value, u8 __iomem *addr)
2019 2020 2021 2022
{
	writeb(value, addr);
}

2023
static u8 pci_azx_readb(u8 __iomem *addr)
2024 2025 2026 2027
{
	return readb(addr);
}

2028 2029
static int disable_msi_reset_irq(struct azx *chip)
{
2030
	struct hdac_bus *bus = azx_bus(chip);
2031 2032
	int err;

2033 2034
	free_irq(bus->irq, chip);
	bus->irq = -1;
2035 2036 2037 2038 2039 2040 2041 2042 2043
	pci_disable_msi(chip->pci);
	chip->msi = 0;
	err = azx_acquire_irq(chip, 1);
	if (err < 0)
		return err;

	return 0;
}

2044
/* DMA page allocation helpers.  */
2045
static int dma_alloc_pages(struct hdac_bus *bus,
2046 2047 2048 2049
			   int type,
			   size_t size,
			   struct snd_dma_buffer *buf)
{
2050
	struct azx *chip = bus_to_azx(bus);
2051 2052 2053
	int err;

	err = snd_dma_alloc_pages(type,
2054
				  bus->dev,
2055 2056 2057 2058 2059 2060 2061
				  size, buf);
	if (err < 0)
		return err;
	mark_pages_wc(chip, buf, true);
	return 0;
}

2062
static void dma_free_pages(struct hdac_bus *bus, struct snd_dma_buffer *buf)
2063
{
2064
	struct azx *chip = bus_to_azx(bus);
2065

2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092
	mark_pages_wc(chip, buf, false);
	snd_dma_free_pages(buf);
}

static int substream_alloc_pages(struct azx *chip,
				 struct snd_pcm_substream *substream,
				 size_t size)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	int ret;

	mark_runtime_wc(chip, azx_dev, substream, false);
	ret = snd_pcm_lib_malloc_pages(substream, size);
	if (ret < 0)
		return ret;
	mark_runtime_wc(chip, azx_dev, substream, true);
	return 0;
}

static int substream_free_pages(struct azx *chip,
				struct snd_pcm_substream *substream)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	mark_runtime_wc(chip, azx_dev, substream, false);
	return snd_pcm_lib_free_pages(substream);
}

2093 2094 2095 2096 2097 2098
static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
			     struct vm_area_struct *area)
{
#ifdef CONFIG_X86
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct azx *chip = apcm->chip;
2099
	if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
2100 2101 2102 2103
		area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
#endif
}

2104
static const struct hdac_io_ops pci_hda_io_ops = {
2105 2106 2107 2108 2109 2110
	.reg_writel = pci_azx_writel,
	.reg_readl = pci_azx_readl,
	.reg_writew = pci_azx_writew,
	.reg_readw = pci_azx_readw,
	.reg_writeb = pci_azx_writeb,
	.reg_readb = pci_azx_readb,
2111 2112
	.dma_alloc_pages = dma_alloc_pages,
	.dma_free_pages = dma_free_pages,
2113 2114 2115 2116
};

static const struct hda_controller_ops pci_hda_ops = {
	.disable_msi_reset_irq = disable_msi_reset_irq,
2117 2118
	.substream_alloc_pages = substream_alloc_pages,
	.substream_free_pages = substream_free_pages,
2119
	.pcm_mmap_prepare = pcm_mmap_prepare,
D
Dylan Reid 已提交
2120
	.position_check = azx_position_check,
2121
	.link_power = azx_intel_link_power,
2122 2123
};

2124 2125
static int azx_probe(struct pci_dev *pci,
		     const struct pci_device_id *pci_id)
L
Linus Torvalds 已提交
2126
{
2127
	static int dev;
2128
	struct snd_card *card;
2129
	struct hda_intel *hda;
2130
	struct azx *chip;
2131
	bool schedule_probe;
2132
	int err;
L
Linus Torvalds 已提交
2133

2134 2135 2136 2137 2138 2139 2140
	if (dev >= SNDRV_CARDS)
		return -ENODEV;
	if (!enable[dev]) {
		dev++;
		return -ENOENT;
	}

2141 2142
	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
			   0, &card);
2143
	if (err < 0) {
2144
		dev_err(&pci->dev, "Error creating card!\n");
2145
		return err;
L
Linus Torvalds 已提交
2146 2147
	}

2148
	err = azx_create(card, pci, dev, pci_id->driver_data, &chip);
W
Wu Fengguang 已提交
2149 2150
	if (err < 0)
		goto out_free;
T
Takashi Iwai 已提交
2151
	card->private_data = chip;
2152
	hda = container_of(chip, struct hda_intel, chip);
2153 2154 2155 2156 2157

	pci_set_drvdata(pci, card);

	err = register_vga_switcheroo(chip);
	if (err < 0) {
2158
		dev_err(card->dev, "Error registering vga_switcheroo client\n");
2159 2160 2161 2162
		goto out_free;
	}

	if (check_hdmi_disabled(pci)) {
2163 2164
		dev_info(card->dev, "VGA controller is disabled\n");
		dev_info(card->dev, "Delaying initialization\n");
2165 2166 2167
		chip->disabled = true;
	}

2168
	schedule_probe = !chip->disabled;
L
Linus Torvalds 已提交
2169

2170 2171
#ifdef CONFIG_SND_HDA_PATCH_LOADER
	if (patch[dev] && *patch[dev]) {
2172 2173
		dev_info(card->dev, "Applying patch firmware '%s'\n",
			 patch[dev]);
2174 2175 2176
		err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
					      &pci->dev, GFP_KERNEL, card,
					      azx_firmware_cb);
2177 2178
		if (err < 0)
			goto out_free;
2179
		schedule_probe = false; /* continued in azx_firmware_cb() */
2180 2181 2182
	}
#endif /* CONFIG_SND_HDA_PATCH_LOADER */

2183
#ifndef CONFIG_SND_HDA_I915
2184 2185
	if (CONTROLLER_IN_GPU(pci))
		dev_err(card->dev, "Haswell/Broadwell HDMI/DP must build in CONFIG_SND_HDA_I915\n");
2186 2187
#endif

2188
	if (schedule_probe)
2189
		schedule_work(&hda->probe_work);
2190 2191

	dev++;
2192
	if (chip->disabled)
2193
		complete_all(&hda->probe_wait);
2194 2195 2196 2197 2198 2199 2200
	return 0;

out_free:
	snd_card_free(card);
	return err;
}

2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211
#ifdef CONFIG_PM
/* On some boards setting power_save to a non 0 value leads to clicking /
 * popping sounds when ever we enter/leave powersaving mode. Ideally we would
 * figure out how to avoid these sounds, but that is not always feasible.
 * So we keep a list of devices where we disable powersaving as its known
 * to causes problems on these devices.
 */
static struct snd_pci_quirk power_save_blacklist[] = {
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
	SND_PCI_QUIRK(0x1849, 0x0c0c, "Asrock B85M-ITX", 0),
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2212 2213
	SND_PCI_QUIRK(0x1849, 0x7662, "Asrock H81M-HDS", 0),
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2214
	SND_PCI_QUIRK(0x1043, 0x8733, "Asus Prime X370-Pro", 0),
2215 2216
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1581607 */
	SND_PCI_QUIRK(0x1558, 0x3501, "Clevo W35xSS_370SS", 0),
2217 2218 2219
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
	/* Note the P55A-UD3 and Z87-D3HP share the subsys id for the HDA dev */
	SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte P55A-UD3 / Z87-D3HP", 0),
2220 2221
	/* https://bugzilla.kernel.org/show_bug.cgi?id=199607 */
	SND_PCI_QUIRK(0x8086, 0x2057, "Intel NUC5i7RYB", 0),
2222 2223
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1520902 */
	SND_PCI_QUIRK(0x8086, 0x2068, "Intel NUC7i3BNB", 0),
2224 2225
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1572975 */
	SND_PCI_QUIRK(0x17aa, 0x36a7, "Lenovo C50 All in one", 0),
2226 2227 2228 2229 2230 2231
	/* https://bugzilla.kernel.org/show_bug.cgi?id=198611 */
	SND_PCI_QUIRK(0x17aa, 0x2227, "Lenovo X1 Carbon 3rd Gen", 0),
	{}
};
#endif /* CONFIG_PM */

2232 2233 2234 2235 2236 2237
/* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
	[AZX_DRIVER_NVIDIA] = 8,
	[AZX_DRIVER_TERA] = 1,
};

2238
static int azx_probe_continue(struct azx *chip)
2239
{
2240
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
2241
	struct hdac_bus *bus = azx_bus(chip);
W
Wang Xingchao 已提交
2242
	struct pci_dev *pci = chip->pci;
2243
	struct hda_codec *codec;
2244
	int dev = chip->dev_index;
2245
	int val;
2246 2247
	int err;

2248
	hda->probe_continued = 1;
2249

2250
	/* bind with i915 if needed */
2251
	if (chip->driver_caps & AZX_DCAPS_I915_COMPONENT) {
2252
		err = snd_hdac_i915_init(bus);
2253 2254 2255 2256 2257 2258
		if (err < 0) {
			/* if the controller is bound only with HDMI/DP
			 * (for HSW and BDW), we need to abort the probe;
			 * for other chips, still continue probing as other
			 * codecs can be on the same link.
			 */
2259 2260 2261
			if (CONTROLLER_IN_GPU(pci)) {
				dev_err(chip->card->dev,
					"HSW/BDW HD-audio HDMI/DP requires binding with gfx driver\n");
2262
				goto out_free;
2263 2264
			} else {
				/* don't bother any longer */
2265 2266
				chip->driver_caps &=
					~(AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL);
2267
			}
2268
		}
2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279
	}

	/* Request display power well for the HDA controller or codec. For
	 * Haswell/Broadwell, both the display HDA controller and codec need
	 * this power. For other platforms, like Baytrail/Braswell, only the
	 * display codec needs the power and it can be released after probe.
	 */
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
		/* HSW/BDW controllers need this power */
		if (CONTROLLER_IN_GPU(pci))
			hda->need_i915_power = 1;
2280

2281
		err = snd_hdac_display_power(bus, true);
2282 2283 2284
		if (err < 0) {
			dev_err(chip->card->dev,
				"Cannot turn on display power on i915\n");
2285
			goto i915_power_fail;
2286
		}
2287 2288
	}

2289 2290 2291 2292
	err = azx_first_init(chip);
	if (err < 0)
		goto out_free;

2293 2294 2295 2296
#ifdef CONFIG_SND_HDA_INPUT_BEEP
	chip->beep_mode = beep_mode[dev];
#endif

L
Linus Torvalds 已提交
2297
	/* create codec instances */
2298
	err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
W
Wu Fengguang 已提交
2299 2300
	if (err < 0)
		goto out_free;
2301

2302
#ifdef CONFIG_SND_HDA_PATCH_LOADER
2303
	if (chip->fw) {
2304
		err = snd_hda_load_patch(&chip->bus, chip->fw->size,
2305
					 chip->fw->data);
2306 2307
		if (err < 0)
			goto out_free;
2308
#ifndef CONFIG_PM
2309 2310
		release_firmware(chip->fw); /* no longer needed */
		chip->fw = NULL;
2311
#endif
2312 2313
	}
#endif
2314
	if ((probe_only[dev] & 1) == 0) {
2315 2316 2317 2318
		err = azx_codec_configure(chip);
		if (err < 0)
			goto out_free;
	}
L
Linus Torvalds 已提交
2319

2320
	err = snd_card_register(chip->card);
W
Wu Fengguang 已提交
2321 2322
	if (err < 0)
		goto out_free;
L
Linus Torvalds 已提交
2323

2324
	chip->running = 1;
2325
	azx_add_card_list(chip);
2326

2327 2328
	val = power_save;
#ifdef CONFIG_PM
2329
	if (pm_blacklist) {
2330 2331 2332 2333 2334 2335 2336 2337 2338 2339
		const struct snd_pci_quirk *q;

		q = snd_pci_quirk_lookup(chip->pci, power_save_blacklist);
		if (q && val) {
			dev_info(chip->card->dev, "device %04x:%04x is on the power_save blacklist, forcing power_save to 0\n",
				 q->subvendor, q->subdevice);
			val = 0;
		}
	}
#endif /* CONFIG_PM */
2340 2341 2342 2343 2344 2345 2346 2347
	/*
	 * The discrete GPU cannot power down unless the HDA controller runtime
	 * suspends, so activate runtime PM on codecs even if power_save == 0.
	 */
	if (use_vga_switcheroo(hda))
		list_for_each_codec(codec, &chip->bus)
			codec->auto_runtime_pm = 1;

2348
	snd_hda_set_power_save(&chip->bus, val * 1000);
2349
	if (azx_has_pm_runtime(chip))
2350
		pm_runtime_put_autosuspend(&pci->dev);
L
Linus Torvalds 已提交
2351

W
Wu Fengguang 已提交
2352
out_free:
2353
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
2354
		&& !hda->need_i915_power)
2355
		snd_hdac_display_power(bus, false);
2356 2357

i915_power_fail:
2358
	if (err < 0)
2359 2360
		hda->init_failed = 1;
	complete_all(&hda->probe_wait);
W
Wu Fengguang 已提交
2361
	return err;
L
Linus Torvalds 已提交
2362 2363
}

2364
static void azx_remove(struct pci_dev *pci)
L
Linus Torvalds 已提交
2365
{
2366
	struct snd_card *card = pci_get_drvdata(pci);
2367 2368 2369 2370
	struct azx *chip;
	struct hda_intel *hda;

	if (card) {
2371
		/* cancel the pending probing work */
2372 2373
		chip = card->private_data;
		hda = container_of(chip, struct hda_intel, chip);
2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385
		/* FIXME: below is an ugly workaround.
		 * Both device_release_driver() and driver_probe_device()
		 * take *both* the device's and its parent's lock before
		 * calling the remove() and probe() callbacks.  The codec
		 * probe takes the locks of both the codec itself and its
		 * parent, i.e. the PCI controller dev.  Meanwhile, when
		 * the PCI controller is unbound, it takes its lock, too
		 * ==> ouch, a deadlock!
		 * As a workaround, we unlock temporarily here the controller
		 * device during cancel_work_sync() call.
		 */
		device_unlock(&pci->dev);
2386
		cancel_work_sync(&hda->probe_work);
2387
		device_lock(&pci->dev);
2388

2389
		snd_card_free(card);
2390
	}
L
Linus Torvalds 已提交
2391 2392
}

2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404
static void azx_shutdown(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip;

	if (!card)
		return;
	chip = card->private_data;
	if (chip && chip->running)
		azx_stop_chip(chip);
}

L
Linus Torvalds 已提交
2405
/* PCI IDs */
2406
static const struct pci_device_id azx_ids[] = {
2407
	/* CPT */
2408
	{ PCI_DEVICE(0x8086, 0x1c20),
2409
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2410
	/* PBG */
2411
	{ PCI_DEVICE(0x8086, 0x1d20),
2412
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2413
	/* Panther Point */
2414
	{ PCI_DEVICE(0x8086, 0x1e20),
2415
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2416 2417
	/* Lynx Point */
	{ PCI_DEVICE(0x8086, 0x8c20),
2418
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2419 2420 2421
	/* 9 Series */
	{ PCI_DEVICE(0x8086, 0x8ca0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2422 2423 2424 2425 2426
	/* Wellsburg */
	{ PCI_DEVICE(0x8086, 0x8d20),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
	{ PCI_DEVICE(0x8086, 0x8d21),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2427 2428
	/* Lewisburg */
	{ PCI_DEVICE(0x8086, 0xa1f0),
2429
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2430
	{ PCI_DEVICE(0x8086, 0xa270),
2431
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2432 2433
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c20),
2434
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2435 2436
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c21),
2437
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2438 2439 2440
	/* Wildcat Point-LP */
	{ PCI_DEVICE(0x8086, 0x9ca0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2441 2442
	/* Sunrise Point */
	{ PCI_DEVICE(0x8086, 0xa170),
2443
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
2444 2445
	/* Sunrise Point-LP */
	{ PCI_DEVICE(0x8086, 0x9d70),
2446
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
V
Vinod Koul 已提交
2447 2448
	/* Kabylake */
	{ PCI_DEVICE(0x8086, 0xa171),
2449
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
V
Vinod Koul 已提交
2450 2451
	/* Kabylake-LP */
	{ PCI_DEVICE(0x8086, 0x9d71),
2452
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
2453 2454
	/* Kabylake-H */
	{ PCI_DEVICE(0x8086, 0xa2f0),
2455
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
M
Megha Dey 已提交
2456 2457
	/* Coffelake */
	{ PCI_DEVICE(0x8086, 0xa348),
2458
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2459 2460 2461
	/* Cannonlake */
	{ PCI_DEVICE(0x8086, 0x9dc8),
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
G
Guneshwor Singh 已提交
2462 2463 2464
	/* Icelake */
	{ PCI_DEVICE(0x8086, 0x34c8),
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2465 2466
	/* Broxton-P(Apollolake) */
	{ PCI_DEVICE(0x8086, 0x5a98),
2467
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_BROXTON },
2468 2469
	/* Broxton-T */
	{ PCI_DEVICE(0x8086, 0x1a98),
2470
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_BROXTON },
V
Vinod Koul 已提交
2471 2472
	/* Gemini-Lake */
	{ PCI_DEVICE(0x8086, 0x3198),
2473
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_BROXTON },
2474
	/* Haswell */
2475
	{ PCI_DEVICE(0x8086, 0x0a0c),
2476
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2477
	{ PCI_DEVICE(0x8086, 0x0c0c),
2478
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2479
	{ PCI_DEVICE(0x8086, 0x0d0c),
2480
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2481 2482
	/* Broadwell */
	{ PCI_DEVICE(0x8086, 0x160c),
2483
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2484 2485
	/* 5 Series/3400 */
	{ PCI_DEVICE(0x8086, 0x3b56),
2486
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2487
	/* Poulsbo */
2488
	{ PCI_DEVICE(0x8086, 0x811b),
2489
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2490
	/* Oaktrail */
2491
	{ PCI_DEVICE(0x8086, 0x080a),
2492
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2493 2494
	/* BayTrail */
	{ PCI_DEVICE(0x8086, 0x0f04),
2495
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BAYTRAIL },
2496 2497
	/* Braswell */
	{ PCI_DEVICE(0x8086, 0x2284),
2498
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BRASWELL },
2499
	/* ICH6 */
2500
	{ PCI_DEVICE(0x8086, 0x2668),
2501 2502
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH7 */
2503
	{ PCI_DEVICE(0x8086, 0x27d8),
2504 2505
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ESB2 */
2506
	{ PCI_DEVICE(0x8086, 0x269a),
2507 2508
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH8 */
2509
	{ PCI_DEVICE(0x8086, 0x284b),
2510 2511
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH9 */
2512
	{ PCI_DEVICE(0x8086, 0x293e),
2513 2514
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH9 */
2515
	{ PCI_DEVICE(0x8086, 0x293f),
2516 2517
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH10 */
2518
	{ PCI_DEVICE(0x8086, 0x3a3e),
2519 2520
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH10 */
2521
	{ PCI_DEVICE(0x8086, 0x3a6e),
2522
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2523 2524 2525 2526
	/* Generic Intel */
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2527
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2528 2529 2530 2531 2532 2533 2534 2535
	/* ATI SB 450/600/700/800/900 */
	{ PCI_DEVICE(0x1002, 0x437b),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	{ PCI_DEVICE(0x1002, 0x4383),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	/* AMD Hudson */
	{ PCI_DEVICE(0x1022, 0x780d),
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
V
Vijendar Mukunda 已提交
2536 2537
	/* AMD Raven */
	{ PCI_DEVICE(0x1022, 0x15e3),
2538 2539
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB |
			 AZX_DCAPS_PM_RUNTIME },
2540
	/* ATI HDMI */
2541 2542
	{ PCI_DEVICE(0x1002, 0x0002),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2543 2544
	{ PCI_DEVICE(0x1002, 0x1308),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2545 2546
	{ PCI_DEVICE(0x1002, 0x157a),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2547 2548
	{ PCI_DEVICE(0x1002, 0x15b3),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2549 2550 2551 2552 2553 2554 2555 2556
	{ PCI_DEVICE(0x1002, 0x793b),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x7919),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x960f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x970f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2557 2558
	{ PCI_DEVICE(0x1002, 0x9840),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578
	{ PCI_DEVICE(0x1002, 0xaa00),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa08),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa10),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa18),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa20),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa28),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa30),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa38),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa40),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa48),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594
	{ PCI_DEVICE(0x1002, 0xaa50),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa58),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa60),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa68),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa80),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa88),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa90),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa98),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2595
	{ PCI_DEVICE(0x1002, 0x9902),
2596
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2597
	{ PCI_DEVICE(0x1002, 0xaaa0),
2598
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2599
	{ PCI_DEVICE(0x1002, 0xaaa8),
2600
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2601
	{ PCI_DEVICE(0x1002, 0xaab0),
2602
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2603 2604
	{ PCI_DEVICE(0x1002, 0xaac0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2605 2606
	{ PCI_DEVICE(0x1002, 0xaac8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2607 2608 2609 2610
	{ PCI_DEVICE(0x1002, 0xaad8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
	{ PCI_DEVICE(0x1002, 0xaae8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2611 2612 2613 2614
	{ PCI_DEVICE(0x1002, 0xaae0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
	{ PCI_DEVICE(0x1002, 0xaaf0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2615
	/* VIA VT8251/VT8237A */
2616
	{ PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
2617 2618 2619 2620
	/* VIA GFX VT7122/VX900 */
	{ PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
	/* VIA GFX VT6122/VX11 */
	{ PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2621 2622 2623 2624 2625
	/* SIS966 */
	{ PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
	/* ULI M5461 */
	{ PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
	/* NVIDIA MCP */
2626 2627 2628
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2629
	  .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2630
	/* Teradici */
2631 2632
	{ PCI_DEVICE(0x6549, 0x1200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2633 2634
	{ PCI_DEVICE(0x6549, 0x2200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2635
	/* Creative X-Fi (CA0110-IBG) */
2636 2637 2638 2639 2640
	/* CTHDA chips */
	{ PCI_DEVICE(0x1102, 0x0010),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
	{ PCI_DEVICE(0x1102, 0x0012),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
T
Takashi Iwai 已提交
2641
#if !IS_ENABLED(CONFIG_SND_CTXFI)
2642 2643 2644 2645
	/* the following entry conflicts with snd-ctxfi driver,
	 * as ctxfi driver mutates from HD-audio to native mode with
	 * a special command sequence.
	 */
2646 2647 2648
	{ PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2649
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2650
	  AZX_DCAPS_NO_64BIT | AZX_DCAPS_POSFIX_LPIB },
2651 2652
#else
	/* this entry seems still valid -- i.e. without emu20kx chip */
2653 2654
	{ PCI_DEVICE(0x1102, 0x0009),
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2655
	  AZX_DCAPS_NO_64BIT | AZX_DCAPS_POSFIX_LPIB },
2656
#endif
2657 2658 2659
	/* CM8888 */
	{ PCI_DEVICE(0x13f6, 0x5011),
	  .driver_data = AZX_DRIVER_CMEDIA |
2660
	  AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2661 2662
	/* Vortex86MX */
	{ PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2663 2664
	/* VMware HDAudio */
	{ PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2665
	/* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2666 2667 2668
	{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2669
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2670 2671 2672
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2673
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
L
Linus Torvalds 已提交
2674 2675 2676 2677 2678
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);

/* pci_driver definition */
2679
static struct pci_driver azx_driver = {
2680
	.name = KBUILD_MODNAME,
L
Linus Torvalds 已提交
2681 2682
	.id_table = azx_ids,
	.probe = azx_probe,
2683
	.remove = azx_remove,
2684
	.shutdown = azx_shutdown,
2685 2686 2687
	.driver = {
		.pm = AZX_PM_OPS,
	},
L
Linus Torvalds 已提交
2688 2689
};

2690
module_pci_driver(azx_driver);