hda_intel.c 67.5 KB
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/*
 *
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 *  hda_intel.c - Implementation of primary alsa driver code base
 *                for Intel HD Audio.
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 *
 *  Copyright(c) 2004 Intel Corporation. All rights reserved.
 *
 *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
 *                     PeiSen Hou <pshou@realtek.com.tw>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License as published by the Free
 *  Software Foundation; either version 2 of the License, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 *  more details.
 *
 *  You should have received a copy of the GNU General Public License along with
 *  this program; if not, write to the Free Software Foundation, Inc., 59
 *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 *
 *  CONTACTS:
 *
 *  Matt Jared		matt.jared@intel.com
 *  Andy Kopp		andy.kopp@intel.com
 *  Dan Kogan		dan.d.kogan@intel.com
 *
 *  CHANGES:
 *
 *  2004.12.01	Major rewrite by tiwai, merged the work of pshou
 * 
 */

#include <linux/delay.h>
#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/dma-mapping.h>
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#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/pci.h>
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#include <linux/mutex.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/clocksource.h>
#include <linux/time.h>
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#include <linux/completion.h>
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#ifdef CONFIG_X86
/* for snoop control */
#include <asm/pgtable.h>
#include <asm/cacheflush.h>
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#include <asm/cpufeature.h>
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#endif
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#include <sound/core.h>
#include <sound/initval.h>
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#include <sound/hdaudio.h>
#include <sound/hda_i915.h>
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#include <linux/vgaarb.h>
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#include <linux/vga_switcheroo.h>
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#include <linux/firmware.h>
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#include "hda_codec.h"
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#include "hda_controller.h"
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#include "hda_intel.h"
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#define CREATE_TRACE_POINTS
#include "hda_intel_trace.h"

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/* position fix mode */
enum {
	POS_FIX_AUTO,
	POS_FIX_LPIB,
	POS_FIX_POSBUF,
	POS_FIX_VIACOMBO,
	POS_FIX_COMBO,
};

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/* Defines for ATI HD Audio support in SB450 south bridge */
#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
#define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02

/* Defines for Nvidia HDA support */
#define NVIDIA_HDA_TRANSREG_ADDR      0x4e
#define NVIDIA_HDA_ENABLE_COHBITS     0x0f
#define NVIDIA_HDA_ISTRM_COH          0x4d
#define NVIDIA_HDA_OSTRM_COH          0x4c
#define NVIDIA_HDA_ENABLE_COHBIT      0x01

/* Defines for Intel SCH HDA snoop control */
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#define INTEL_HDA_CGCTL	 0x48
#define INTEL_HDA_CGCTL_MISCBDCGE        (0x1 << 6)
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#define INTEL_SCH_HDA_DEVC      0x78
#define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)

/* Define IN stream 0 FIFO size offset in VIA controller */
#define VIA_IN_STREAM0_FIFO_SIZE_OFFSET	0x90
/* Define VIA HD Audio Device ID*/
#define VIA_HDAC_DEVICE_ID		0x3288

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/* max number of SDs */
/* ICH, ATI and VIA have 4 playback and 4 capture */
#define ICH6_NUM_CAPTURE	4
#define ICH6_NUM_PLAYBACK	4

/* ULI has 6 playback and 5 capture */
#define ULI_NUM_CAPTURE		5
#define ULI_NUM_PLAYBACK	6

/* ATI HDMI may have up to 8 playbacks and 0 capture */
#define ATIHDMI_NUM_CAPTURE	0
#define ATIHDMI_NUM_PLAYBACK	8

/* TERA has 4 playback and 3 capture */
#define TERA_NUM_CAPTURE	3
#define TERA_NUM_PLAYBACK	4

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static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
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static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
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static char *model[SNDRV_CARDS];
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static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int probe_only[SNDRV_CARDS];
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static int jackpoll_ms[SNDRV_CARDS];
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static bool single_cmd;
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static int enable_msi = -1;
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#ifdef CONFIG_SND_HDA_PATCH_LOADER
static char *patch[SNDRV_CARDS];
#endif
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#ifdef CONFIG_SND_HDA_INPUT_BEEP
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static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
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					CONFIG_SND_HDA_INPUT_BEEP_MODE};
#endif
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module_param_array(index, int, NULL, 0444);
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MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
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module_param_array(id, charp, NULL, 0444);
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MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
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module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
module_param_array(model, charp, NULL, 0444);
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MODULE_PARM_DESC(model, "Use the given board model.");
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module_param_array(position_fix, int, NULL, 0444);
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MODULE_PARM_DESC(position_fix, "DMA pointer read method."
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		 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
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module_param_array(bdl_pos_adj, int, NULL, 0644);
MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
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module_param_array(probe_mask, int, NULL, 0444);
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MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
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module_param_array(probe_only, int, NULL, 0444);
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MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
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module_param_array(jackpoll_ms, int, NULL, 0444);
MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
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module_param(single_cmd, bool, 0444);
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MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
		 "(for debugging only).");
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module_param(enable_msi, bint, 0444);
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MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
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#ifdef CONFIG_SND_HDA_PATCH_LOADER
module_param_array(patch, charp, NULL, 0444);
MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
#endif
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#ifdef CONFIG_SND_HDA_INPUT_BEEP
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module_param_array(beep_mode, bool, NULL, 0444);
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MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
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			    "(0=off, 1=on) (default=1).");
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#endif
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#ifdef CONFIG_PM
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static int param_set_xint(const char *val, const struct kernel_param *kp);
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static const struct kernel_param_ops param_ops_xint = {
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	.set = param_set_xint,
	.get = param_get_int,
};
#define param_check_xint param_check_int

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static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
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module_param(power_save, xint, 0644);
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MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
		 "(in second, 0 = disable).");
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/* reset the HD-audio controller in power save mode.
 * this may give more power-saving, but will take longer time to
 * wake up.
 */
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static bool power_save_controller = 1;
module_param(power_save_controller, bool, 0644);
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MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
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#else
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#define power_save	0
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#endif /* CONFIG_PM */
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static int align_buffer_size = -1;
module_param(align_buffer_size, bint, 0644);
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MODULE_PARM_DESC(align_buffer_size,
		"Force buffer and period sizes to be multiple of 128 bytes.");

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#ifdef CONFIG_X86
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static int hda_snoop = -1;
module_param_named(snoop, hda_snoop, bint, 0444);
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MODULE_PARM_DESC(snoop, "Enable/disable snooping");
#else
#define hda_snoop		true
#endif


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MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
			 "{Intel, ICH6M},"
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			 "{Intel, ICH7},"
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			 "{Intel, ESB2},"
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			 "{Intel, ICH8},"
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			 "{Intel, ICH9},"
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			 "{Intel, ICH10},"
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			 "{Intel, PCH},"
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			 "{Intel, CPT},"
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			 "{Intel, PPT},"
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			 "{Intel, LPT},"
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			 "{Intel, LPT_LP},"
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			 "{Intel, WPT_LP},"
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			 "{Intel, SPT},"
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			 "{Intel, SPT_LP},"
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			 "{Intel, HPT},"
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			 "{Intel, PBG},"
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			 "{Intel, SCH},"
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			 "{ATI, SB450},"
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			 "{ATI, SB600},"
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			 "{ATI, RS600},"
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			 "{ATI, RS690},"
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			 "{ATI, RS780},"
			 "{ATI, R600},"
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			 "{ATI, RV630},"
			 "{ATI, RV610},"
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			 "{ATI, RV670},"
			 "{ATI, RV635},"
			 "{ATI, RV620},"
			 "{ATI, RV770},"
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			 "{VIA, VT8251},"
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			 "{VIA, VT8237A},"
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			 "{SiS, SIS966},"
			 "{ULI, M5461}}");
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MODULE_DESCRIPTION("Intel HDA driver");

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#if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
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#if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
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#define SUPPORT_VGA_SWITCHEROO
#endif
#endif


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/*
 */

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/* driver types */
enum {
	AZX_DRIVER_ICH,
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	AZX_DRIVER_PCH,
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	AZX_DRIVER_SCH,
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	AZX_DRIVER_HDMI,
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	AZX_DRIVER_ATI,
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	AZX_DRIVER_ATIHDMI,
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	AZX_DRIVER_ATIHDMI_NS,
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	AZX_DRIVER_VIA,
	AZX_DRIVER_SIS,
	AZX_DRIVER_ULI,
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	AZX_DRIVER_NVIDIA,
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	AZX_DRIVER_TERA,
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	AZX_DRIVER_CTX,
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	AZX_DRIVER_CTHDA,
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	AZX_DRIVER_CMEDIA,
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	AZX_DRIVER_GENERIC,
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	AZX_NUM_DRIVERS, /* keep this as last entry */
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};

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#define azx_get_snoop_type(chip) \
	(((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
#define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)

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/* quirks for old Intel chipsets */
#define AZX_DCAPS_INTEL_ICH \
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	(AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
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/* quirks for Intel PCH */
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#define AZX_DCAPS_INTEL_PCH_BASE \
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	(AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
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	 AZX_DCAPS_SNOOP_TYPE(SCH))
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/* PCH up to IVB; no runtime PM */
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#define AZX_DCAPS_INTEL_PCH_NOPM \
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	(AZX_DCAPS_INTEL_PCH_BASE)
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/* PCH for HSW/BDW; with runtime PM */
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#define AZX_DCAPS_INTEL_PCH \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
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/* HSW HDMI */
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#define AZX_DCAPS_INTEL_HASWELL \
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	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
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	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
	 AZX_DCAPS_SNOOP_TYPE(SCH))
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/* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
#define AZX_DCAPS_INTEL_BROADWELL \
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	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
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	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
	 AZX_DCAPS_SNOOP_TYPE(SCH))
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#define AZX_DCAPS_INTEL_BAYTRAIL \
	(AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_I915_POWERWELL)

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#define AZX_DCAPS_INTEL_BRASWELL \
	(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)

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#define AZX_DCAPS_INTEL_SKYLAKE \
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	(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
	 AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_BROXTON \
	(AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
	 AZX_DCAPS_I915_POWERWELL)

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/* quirks for ATI SB / AMD Hudson */
#define AZX_DCAPS_PRESET_ATI_SB \
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	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
	 AZX_DCAPS_SNOOP_TYPE(ATI))
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/* quirks for ATI/AMD HDMI */
#define AZX_DCAPS_PRESET_ATI_HDMI \
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	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
	 AZX_DCAPS_NO_MSI64)
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/* quirks for ATI HDMI with snoop off */
#define AZX_DCAPS_PRESET_ATI_HDMI_NS \
	(AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)

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/* quirks for Nvidia */
#define AZX_DCAPS_PRESET_NVIDIA \
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	(AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
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	 AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
	 AZX_DCAPS_SNOOP_TYPE(NVIDIA))
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#define AZX_DCAPS_PRESET_CTHDA \
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	(AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
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	 AZX_DCAPS_NO_64BIT |\
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	 AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
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/*
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 * vga_switcheroo support
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 */
#ifdef SUPPORT_VGA_SWITCHEROO
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#define use_vga_switcheroo(chip)	((chip)->use_vga_switcheroo)
#else
#define use_vga_switcheroo(chip)	0
#endif

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#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
					((pci)->device == 0x0c0c) || \
					((pci)->device == 0x0d0c) || \
					((pci)->device == 0x160c))

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#define IS_SKL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa170)
#define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70)
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#define IS_KBL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa171)
#define IS_KBL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d71)
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#define IS_KBL_H(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa2f0)
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#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
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#define IS_SKL_PLUS(pci) (IS_SKL(pci) || IS_SKL_LP(pci) || IS_BXT(pci)) || \
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			IS_KBL(pci) || IS_KBL_LP(pci) || IS_KBL_H(pci)
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static char *driver_short_names[] = {
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	[AZX_DRIVER_ICH] = "HDA Intel",
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	[AZX_DRIVER_PCH] = "HDA Intel PCH",
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	[AZX_DRIVER_SCH] = "HDA Intel MID",
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	[AZX_DRIVER_HDMI] = "HDA Intel HDMI",
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	[AZX_DRIVER_ATI] = "HDA ATI SB",
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	[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
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	[AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
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	[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
	[AZX_DRIVER_SIS] = "HDA SIS966",
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	[AZX_DRIVER_ULI] = "HDA ULI M5461",
	[AZX_DRIVER_NVIDIA] = "HDA NVidia",
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	[AZX_DRIVER_TERA] = "HDA Teradici", 
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	[AZX_DRIVER_CTX] = "HDA Creative", 
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	[AZX_DRIVER_CTHDA] = "HDA Creative",
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	[AZX_DRIVER_CMEDIA] = "HDA C-Media",
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	[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
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};

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#ifdef CONFIG_X86
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static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
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{
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	int pages;

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	if (azx_snoop(chip))
		return;
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	if (!dmab || !dmab->area || !dmab->bytes)
		return;

#ifdef CONFIG_SND_DMA_SGBUF
	if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
		struct snd_sg_buf *sgbuf = dmab->private_data;
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		if (chip->driver_type == AZX_DRIVER_CMEDIA)
			return; /* deal with only CORB/RIRB buffers */
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		if (on)
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			set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
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		else
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			set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
		return;
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	}
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#endif

	pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
	if (on)
		set_memory_wc((unsigned long)dmab->area, pages);
	else
		set_memory_wb((unsigned long)dmab->area, pages);
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}

static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
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	__mark_pages_wc(chip, buf, on);
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}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
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				   struct snd_pcm_substream *substream, bool on)
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{
	if (azx_dev->wc_marked != on) {
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		__mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
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		azx_dev->wc_marked = on;
	}
}
#else
/* NOP for other archs */
static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
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				   struct snd_pcm_substream *substream, bool on)
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{
}
#endif

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static int azx_acquire_irq(struct azx *chip, int do_disconnect);
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/*
 * initialize the PCI registers
 */
/* update bits in a PCI register byte */
static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
			    unsigned char mask, unsigned char val)
{
	unsigned char data;

	pci_read_config_byte(pci, reg, &data);
	data &= ~mask;
	data |= (val & mask);
	pci_write_config_byte(pci, reg, data);
}

static void azx_init_pci(struct azx *chip)
{
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	int snoop_type = azx_get_snoop_type(chip);

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	/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
	 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
	 * Ensuring these bits are 0 clears playback static on some HD Audio
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	 * codecs.
	 * The PCI register TCSEL is defined in the Intel manuals.
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	 */
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	if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
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		dev_dbg(chip->card->dev, "Clearing TCSEL\n");
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		update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
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	}
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	/* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
	 * we need to enable snoop.
	 */
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	if (snoop_type == AZX_SNOOP_TYPE_ATI) {
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		dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
			azx_snoop(chip));
488
		update_pci_byte(chip->pci,
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489 490
				ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
				azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
491 492 493
	}

	/* For NVIDIA HDA, enable snoop */
494
	if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
495 496
		dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
			azx_snoop(chip));
497 498 499
		update_pci_byte(chip->pci,
				NVIDIA_HDA_TRANSREG_ADDR,
				0x0f, NVIDIA_HDA_ENABLE_COHBITS);
500 501 502 503 504 505
		update_pci_byte(chip->pci,
				NVIDIA_HDA_ISTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
		update_pci_byte(chip->pci,
				NVIDIA_HDA_OSTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
506 507 508
	}

	/* Enable SCH/PCH snoop if needed */
509
	if (snoop_type == AZX_SNOOP_TYPE_SCH) {
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510
		unsigned short snoop;
T
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511
		pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
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512 513 514 515 516 517
		if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
		    (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
			snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
			if (!azx_snoop(chip))
				snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
			pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
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518 519 520
			pci_read_config_word(chip->pci,
				INTEL_SCH_HDA_DEVC, &snoop);
		}
521 522 523
		dev_dbg(chip->card->dev, "SCH snoop: %s\n",
			(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
			"Disabled" : "Enabled");
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524
        }
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}

527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542
/*
 * In BXT-P A0, HD-Audio DMA requests is later than expected,
 * and makes an audio stream sensitive to system latencies when
 * 24/32 bits are playing.
 * Adjusting threshold of DMA fifo to force the DMA request
 * sooner to improve latency tolerance at the expense of power.
 */
static void bxt_reduce_dma_latency(struct azx *chip)
{
	u32 val;

	val = azx_readl(chip, SKL_EM4L);
	val &= (0x3 << 20);
	azx_writel(chip, SKL_EM4L, val);
}

543 544
static void hda_intel_init_chip(struct azx *chip, bool full_reset)
{
545
	struct hdac_bus *bus = azx_bus(chip);
546
	struct pci_dev *pci = chip->pci;
547
	u32 val;
548 549

	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
550
		snd_hdac_set_codec_wakeup(bus, true);
551
	if (IS_SKL_PLUS(pci)) {
552 553 554 555
		pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
		val = val & ~INTEL_HDA_CGCTL_MISCBDCGE;
		pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
	}
556
	azx_init_chip(chip, full_reset);
557
	if (IS_SKL_PLUS(pci)) {
558 559 560 561
		pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
		val = val | INTEL_HDA_CGCTL_MISCBDCGE;
		pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
	}
562
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
563
		snd_hdac_set_codec_wakeup(bus, false);
564 565

	/* reduce dma latency to avoid noise */
566
	if (IS_BXT(pci))
567
		bxt_reduce_dma_latency(chip);
568 569
}

570 571 572 573
/* calculate runtime delay from LPIB */
static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
				   unsigned int pos)
{
574
	struct snd_pcm_substream *substream = azx_dev->core.substream;
575 576 577 578 579 580 581 582 583
	int stream = substream->stream;
	unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
	int delay;

	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
		delay = pos - lpib_pos;
	else
		delay = lpib_pos - pos;
	if (delay < 0) {
584
		if (delay >= azx_dev->core.delay_negative_threshold)
585 586
			delay = 0;
		else
587
			delay += azx_dev->core.bufsize;
588 589
	}

590
	if (delay >= azx_dev->core.period_bytes) {
591 592
		dev_info(chip->card->dev,
			 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
593
			 delay, azx_dev->core.period_bytes);
594 595 596 597 598 599 600 601
		delay = 0;
		chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
		chip->get_delay[stream] = NULL;
	}

	return bytes_to_frames(substream->runtime, delay);
}

602 603
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);

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604 605 606
/* called from IRQ */
static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
{
607
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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608 609 610 611 612 613
	int ok;

	ok = azx_position_ok(chip, azx_dev);
	if (ok == 1) {
		azx_dev->irq_pending = 0;
		return ok;
614
	} else if (ok == 0) {
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615 616
		/* bogus IRQ, process it later */
		azx_dev->irq_pending = 1;
617
		schedule_work(&hda->irq_pending_work);
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618 619 620 621
	}
	return 0;
}

622 623 624
/* Enable/disable i915 display power for the link */
static int azx_intel_link_power(struct azx *chip, bool enable)
{
625
	struct hdac_bus *bus = azx_bus(chip);
626

627
	return snd_hdac_display_power(bus, enable);
628 629
}

630 631 632 633 634 635 636 637 638 639 640
/*
 * Check whether the current DMA position is acceptable for updating
 * periods.  Returns non-zero if it's OK.
 *
 * Many HD-audio controllers appear pretty inaccurate about
 * the update-IRQ timing.  The IRQ is issued before actually the
 * data is processed.  So, we need to process it afterwords in a
 * workqueue.
 */
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
{
641
	struct snd_pcm_substream *substream = azx_dev->core.substream;
642
	int stream = substream->stream;
643
	u32 wallclk;
644 645
	unsigned int pos;

646 647
	wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
	if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
648 649
		return -1;	/* bogus (too early) interrupt */

650 651 652 653 654 655 656 657
	if (chip->get_position[stream])
		pos = chip->get_position[stream](chip, azx_dev);
	else { /* use the position buffer as default */
		pos = azx_get_pos_posbuf(chip, azx_dev);
		if (!pos || pos == (u32)-1) {
			dev_info(chip->card->dev,
				 "Invalid position buffer, using LPIB read method instead.\n");
			chip->get_position[stream] = azx_get_pos_lpib;
658 659 660
			if (chip->get_position[0] == azx_get_pos_lpib &&
			    chip->get_position[1] == azx_get_pos_lpib)
				azx_bus(chip)->use_posbuf = false;
661 662 663 664 665 666 667 668 669
			pos = azx_get_pos_lpib(chip, azx_dev);
			chip->get_delay[stream] = NULL;
		} else {
			chip->get_position[stream] = azx_get_pos_posbuf;
			if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
				chip->get_delay[stream] = azx_get_delay_from_lpib;
		}
	}

670
	if (pos >= azx_dev->core.bufsize)
671
		pos = 0;
672

673
	if (WARN_ONCE(!azx_dev->core.period_bytes,
674
		      "hda-intel: zero azx_dev->period_bytes"))
675
		return -1; /* this shouldn't happen! */
676 677
	if (wallclk < (azx_dev->core.period_wallclk * 5) / 4 &&
	    pos % azx_dev->core.period_bytes > azx_dev->core.period_bytes / 2)
678
		/* NG - it's below the first next period boundary */
679
		return chip->bdl_pos_adj ? 0 : -1;
680
	azx_dev->core.start_wallclk += wallclk;
681 682 683 684 685 686 687 688
	return 1; /* OK, it's fine */
}

/*
 * The work for pending PCM period updates.
 */
static void azx_irq_pending_work(struct work_struct *work)
{
689 690
	struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
	struct azx *chip = &hda->chip;
691 692 693
	struct hdac_bus *bus = azx_bus(chip);
	struct hdac_stream *s;
	int pending, ok;
694

695
	if (!hda->irq_pending_warned) {
696 697 698
		dev_info(chip->card->dev,
			 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
			 chip->card->number);
699
		hda->irq_pending_warned = 1;
700 701
	}

702 703
	for (;;) {
		pending = 0;
704
		spin_lock_irq(&bus->reg_lock);
705 706
		list_for_each_entry(s, &bus->stream_list, list) {
			struct azx_dev *azx_dev = stream_to_azx_dev(s);
707
			if (!azx_dev->irq_pending ||
708 709
			    !s->substream ||
			    !s->running)
710
				continue;
711 712
			ok = azx_position_ok(chip, azx_dev);
			if (ok > 0) {
713
				azx_dev->irq_pending = 0;
714
				spin_unlock(&bus->reg_lock);
715
				snd_pcm_period_elapsed(s->substream);
716
				spin_lock(&bus->reg_lock);
717 718
			} else if (ok < 0) {
				pending = 0;	/* too early */
719 720 721
			} else
				pending++;
		}
722
		spin_unlock_irq(&bus->reg_lock);
723 724
		if (!pending)
			return;
725
		msleep(1);
726 727 728 729 730 731
	}
}

/* clear irq_pending flags and assure no on-going workq */
static void azx_clear_irq_pending(struct azx *chip)
{
732 733
	struct hdac_bus *bus = azx_bus(chip);
	struct hdac_stream *s;
734

735
	spin_lock_irq(&bus->reg_lock);
736 737 738 739
	list_for_each_entry(s, &bus->stream_list, list) {
		struct azx_dev *azx_dev = stream_to_azx_dev(s);
		azx_dev->irq_pending = 0;
	}
740
	spin_unlock_irq(&bus->reg_lock);
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}

743 744
static int azx_acquire_irq(struct azx *chip, int do_disconnect)
{
745 746
	struct hdac_bus *bus = azx_bus(chip);

747 748
	if (request_irq(chip->pci->irq, azx_interrupt,
			chip->msi ? 0 : IRQF_SHARED,
749
			chip->card->irq_descr, chip)) {
750 751 752
		dev_err(chip->card->dev,
			"unable to grab IRQ %d, disabling device\n",
			chip->pci->irq);
753 754 755 756
		if (do_disconnect)
			snd_card_disconnect(chip->card);
		return -1;
	}
757
	bus->irq = chip->pci->irq;
758
	pci_intx(chip->pci, !chip->msi);
759 760 761
	return 0;
}

762 763 764 765 766 767 768 769
/* get the current DMA position with correction on VIA chips */
static unsigned int azx_via_get_position(struct azx *chip,
					 struct azx_dev *azx_dev)
{
	unsigned int link_pos, mini_pos, bound_pos;
	unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
	unsigned int fifo_size;

770
	link_pos = snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
771
	if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
772 773 774 775 776 777 778 779
		/* Playback, no problem using link position */
		return link_pos;
	}

	/* Capture */
	/* For new chipset,
	 * use mod to get the DMA position just like old chipset
	 */
780 781
	mod_dma_pos = le32_to_cpu(*azx_dev->core.posbuf);
	mod_dma_pos %= azx_dev->core.period_bytes;
782 783 784 785

	/* azx_dev->fifo_size can't get FIFO size of in stream.
	 * Get from base address + offset.
	 */
786 787
	fifo_size = readw(azx_bus(chip)->remap_addr +
			  VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
788 789 790 791 792 793 794 795 796 797

	if (azx_dev->insufficient) {
		/* Link position never gather than FIFO size */
		if (link_pos <= fifo_size)
			return 0;

		azx_dev->insufficient = 0;
	}

	if (link_pos <= fifo_size)
798
		mini_pos = azx_dev->core.bufsize + link_pos - fifo_size;
799 800 801 802
	else
		mini_pos = link_pos - fifo_size;

	/* Find nearest previous boudary */
803 804
	mod_mini_pos = mini_pos % azx_dev->core.period_bytes;
	mod_link_pos = link_pos % azx_dev->core.period_bytes;
805 806 807 808 809
	if (mod_link_pos >= fifo_size)
		bound_pos = link_pos - mod_link_pos;
	else if (mod_dma_pos >= mod_mini_pos)
		bound_pos = mini_pos - mod_mini_pos;
	else {
810 811
		bound_pos = mini_pos - mod_mini_pos + azx_dev->core.period_bytes;
		if (bound_pos >= azx_dev->core.bufsize)
812 813 814 815 816 817 818
			bound_pos = 0;
	}

	/* Calculate real DMA position we want */
	return bound_pos + mod_dma_pos;
}

819
#ifdef CONFIG_PM
820 821 822 823 824
static DEFINE_MUTEX(card_list_lock);
static LIST_HEAD(card_list);

static void azx_add_card_list(struct azx *chip)
{
825
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
826
	mutex_lock(&card_list_lock);
827
	list_add(&hda->list, &card_list);
828 829 830 831 832
	mutex_unlock(&card_list_lock);
}

static void azx_del_card_list(struct azx *chip)
{
833
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
834
	mutex_lock(&card_list_lock);
835
	list_del_init(&hda->list);
836 837 838 839 840 841
	mutex_unlock(&card_list_lock);
}

/* trigger power-save check at writing parameter */
static int param_set_xint(const char *val, const struct kernel_param *kp)
{
842
	struct hda_intel *hda;
843 844 845 846 847 848 849 850
	struct azx *chip;
	int prev = power_save;
	int ret = param_set_int(val, kp);

	if (ret || prev == power_save)
		return ret;

	mutex_lock(&card_list_lock);
851 852
	list_for_each_entry(hda, &card_list, list) {
		chip = &hda->chip;
853
		if (!hda->probe_continued || chip->disabled)
854
			continue;
855
		snd_hda_set_power_save(&chip->bus, power_save * 1000);
856 857 858 859 860 861 862
	}
	mutex_unlock(&card_list_lock);
	return 0;
}
#else
#define azx_add_card_list(chip) /* NOP */
#define azx_del_card_list(chip) /* NOP */
863
#endif /* CONFIG_PM */
864

865
#if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
866 867 868
/*
 * power management
 */
869
static int azx_suspend(struct device *dev)
L
Linus Torvalds 已提交
870
{
871
	struct snd_card *card = dev_get_drvdata(dev);
872 873
	struct azx *chip;
	struct hda_intel *hda;
874
	struct hdac_bus *bus;
L
Linus Torvalds 已提交
875

876 877 878 879 880
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
881
	if (chip->disabled || hda->init_failed || !chip->running)
882 883
		return 0;

884
	bus = azx_bus(chip);
T
Takashi Iwai 已提交
885
	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
886
	azx_clear_irq_pending(chip);
887
	azx_stop_chip(chip);
888
	azx_enter_link_reset(chip);
889 890 891
	if (bus->irq >= 0) {
		free_irq(bus->irq, chip);
		bus->irq = -1;
892
	}
893

894
	if (chip->msi)
895
		pci_disable_msi(chip->pci);
896 897
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
		&& hda->need_i915_power)
898
		snd_hdac_display_power(bus, false);
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899 900

	trace_azx_suspend(chip);
L
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901 902 903
	return 0;
}

904
static int azx_resume(struct device *dev)
L
Linus Torvalds 已提交
905
{
906 907
	struct pci_dev *pci = to_pci_dev(dev);
	struct snd_card *card = dev_get_drvdata(dev);
908 909
	struct azx *chip;
	struct hda_intel *hda;
910
	struct hdac_bus *bus;
911 912 913

	if (!card)
		return 0;
L
Linus Torvalds 已提交
914

915 916
	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
917
	bus = azx_bus(chip);
918
	if (chip->disabled || hda->init_failed || !chip->running)
919 920
		return 0;

921 922 923 924
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
		snd_hdac_display_power(bus, true);
		if (hda->need_i915_power)
			snd_hdac_i915_set_bclk(bus);
925
	}
926

927 928 929 930
	if (chip->msi)
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
	if (azx_acquire_irq(chip, 1) < 0)
931
		return -EIO;
932
	azx_init_pci(chip);
933

934
	hda_intel_init_chip(chip, true);
935

936 937 938 939 940
	/* power down again for link-controlled chips */
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
	    !hda->need_i915_power)
		snd_hdac_display_power(bus, false);

T
Takashi Iwai 已提交
941
	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
L
Libin Yang 已提交
942 943

	trace_azx_resume(chip);
L
Linus Torvalds 已提交
944 945
	return 0;
}
946 947
#endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */

948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972
#ifdef CONFIG_PM_SLEEP
/* put codec down to D3 at hibernation for Intel SKL+;
 * otherwise BIOS may still access the codec and screw up the driver
 */
static int azx_freeze_noirq(struct device *dev)
{
	struct pci_dev *pci = to_pci_dev(dev);

	if (IS_SKL_PLUS(pci))
		pci_set_power_state(pci, PCI_D3hot);

	return 0;
}

static int azx_thaw_noirq(struct device *dev)
{
	struct pci_dev *pci = to_pci_dev(dev);

	if (IS_SKL_PLUS(pci))
		pci_set_power_state(pci, PCI_D0);

	return 0;
}
#endif /* CONFIG_PM_SLEEP */

973
#ifdef CONFIG_PM
974 975 976
static int azx_runtime_suspend(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
977 978
	struct azx *chip;
	struct hda_intel *hda;
979

980 981 982 983 984
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
985
	if (chip->disabled || hda->init_failed)
986 987
		return 0;

988
	if (!azx_has_pm_runtime(chip))
989 990
		return 0;

991 992 993 994
	/* enable controller wake up event */
	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
		  STATESTS_INT_MASK);

995
	azx_stop_chip(chip);
996
	azx_enter_link_reset(chip);
997
	azx_clear_irq_pending(chip);
998 999
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
		&& hda->need_i915_power)
1000
		snd_hdac_display_power(azx_bus(chip), false);
1001

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1002
	trace_azx_runtime_suspend(chip);
1003 1004 1005 1006 1007 1008
	return 0;
}

static int azx_runtime_resume(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1009 1010
	struct azx *chip;
	struct hda_intel *hda;
1011
	struct hdac_bus *bus;
1012 1013
	struct hda_codec *codec;
	int status;
1014

1015 1016 1017 1018 1019
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1020
	bus = azx_bus(chip);
1021
	if (chip->disabled || hda->init_failed)
1022 1023
		return 0;

1024
	if (!azx_has_pm_runtime(chip))
1025 1026
		return 0;

1027
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1028 1029
		snd_hdac_display_power(bus, true);
		if (hda->need_i915_power)
1030
			snd_hdac_i915_set_bclk(bus);
1031
	}
1032 1033 1034 1035

	/* Read STATESTS before controller reset */
	status = azx_readw(chip, STATESTS);

1036
	azx_init_pci(chip);
1037
	hda_intel_init_chip(chip, true);
1038

1039 1040
	if (status) {
		list_for_each_codec(codec, &chip->bus)
1041
			if (status & (1 << codec->addr))
1042 1043
				schedule_delayed_work(&codec->jackpoll_work,
						      codec->jackpoll_interval);
1044 1045 1046 1047 1048 1049
	}

	/* disable controller Wake Up event*/
	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
			~STATESTS_INT_MASK);

1050 1051 1052 1053 1054
	/* power down again for link-controlled chips */
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
	    !hda->need_i915_power)
		snd_hdac_display_power(bus, false);

L
Libin Yang 已提交
1055
	trace_azx_runtime_resume(chip);
1056 1057
	return 0;
}
1058 1059 1060 1061

static int azx_runtime_idle(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1062 1063 1064 1065 1066
	struct azx *chip;
	struct hda_intel *hda;

	if (!card)
		return 0;
1067

1068 1069
	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1070
	if (chip->disabled || hda->init_failed)
1071 1072
		return 0;

1073
	if (!power_save_controller || !azx_has_pm_runtime(chip) ||
1074
	    azx_bus(chip)->codec_powered || !chip->running)
1075 1076 1077 1078 1079
		return -EBUSY;

	return 0;
}

1080 1081
static const struct dev_pm_ops azx_pm = {
	SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
1082 1083 1084 1085
#ifdef CONFIG_PM_SLEEP
	.freeze_noirq = azx_freeze_noirq,
	.thaw_noirq = azx_thaw_noirq,
#endif
1086
	SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
1087 1088
};

1089 1090 1091
#define AZX_PM_OPS	&azx_pm
#else
#define AZX_PM_OPS	NULL
1092
#endif /* CONFIG_PM */
L
Linus Torvalds 已提交
1093 1094


1095
static int azx_probe_continue(struct azx *chip);
1096

1097
#ifdef SUPPORT_VGA_SWITCHEROO
1098
static struct pci_dev *get_bound_vga(struct pci_dev *pci);
1099 1100 1101 1102 1103 1104

static void azx_vs_set_state(struct pci_dev *pci,
			     enum vga_switcheroo_state state)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
1105
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1106 1107
	bool disabled;

1108 1109
	wait_for_completion(&hda->probe_wait);
	if (hda->init_failed)
1110 1111 1112 1113 1114 1115
		return;

	disabled = (state == VGA_SWITCHEROO_OFF);
	if (chip->disabled == disabled)
		return;

1116
	if (!hda->probe_continued) {
1117 1118
		chip->disabled = disabled;
		if (!disabled) {
1119 1120
			dev_info(chip->card->dev,
				 "Start delayed initialization\n");
1121
			if (azx_probe_continue(chip) < 0) {
1122
				dev_err(chip->card->dev, "initialization error\n");
1123
				hda->init_failed = true;
1124 1125 1126
			}
		}
	} else {
1127
		dev_info(chip->card->dev, "%s via vga_switcheroo\n",
1128
			 disabled ? "Disabling" : "Enabling");
1129
		if (disabled) {
1130 1131
			pm_runtime_put_sync_suspend(card->dev);
			azx_suspend(card->dev);
1132
			/* when we get suspended by vga_switcheroo we end up in D3cold,
1133 1134 1135
			 * however we have no ACPI handle, so pci/acpi can't put us there,
			 * put ourselves there */
			pci->current_state = PCI_D3cold;
1136
			chip->disabled = true;
1137
			if (snd_hda_lock_devices(&chip->bus))
1138 1139
				dev_warn(chip->card->dev,
					 "Cannot lock devices!\n");
1140
		} else {
1141
			snd_hda_unlock_devices(&chip->bus);
1142
			pm_runtime_get_noresume(card->dev);
1143
			chip->disabled = false;
1144
			azx_resume(card->dev);
1145 1146 1147 1148 1149 1150 1151 1152
		}
	}
}

static bool azx_vs_can_switch(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
1153
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1154

1155 1156
	wait_for_completion(&hda->probe_wait);
	if (hda->init_failed)
1157
		return false;
1158
	if (chip->disabled || !hda->probe_continued)
1159
		return true;
1160
	if (snd_hda_lock_devices(&chip->bus))
1161
		return false;
1162
	snd_hda_unlock_devices(&chip->bus);
1163 1164 1165
	return true;
}

1166
static void init_vga_switcheroo(struct azx *chip)
1167
{
1168
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1169 1170
	struct pci_dev *p = get_bound_vga(chip->pci);
	if (p) {
1171
		dev_info(chip->card->dev,
1172
			 "Handle vga_switcheroo audio client\n");
1173
		hda->use_vga_switcheroo = 1;
1174 1175 1176 1177 1178 1179 1180 1181 1182
		pci_dev_put(p);
	}
}

static const struct vga_switcheroo_client_ops azx_vs_ops = {
	.set_gpu_state = azx_vs_set_state,
	.can_switch = azx_vs_can_switch,
};

1183
static int register_vga_switcheroo(struct azx *chip)
1184
{
1185
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1186 1187
	int err;

1188
	if (!hda->use_vga_switcheroo)
1189 1190 1191 1192
		return 0;
	/* FIXME: currently only handling DIS controller
	 * is there any machine with two switchable HDMI audio controllers?
	 */
1193
	err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1194
						   VGA_SWITCHEROO_DIS);
1195 1196
	if (err < 0)
		return err;
1197
	hda->vga_switcheroo_registered = 1;
1198 1199

	/* register as an optimus hdmi audio power domain */
1200
	vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1201
							 &hda->hdmi_pm_domain);
1202
	return 0;
1203 1204 1205 1206
}
#else
#define init_vga_switcheroo(chip)		/* NOP */
#define register_vga_switcheroo(chip)		0
1207
#define check_hdmi_disabled(pci)	false
1208 1209
#endif /* SUPPORT_VGA_SWITCHER */

L
Linus Torvalds 已提交
1210 1211 1212
/*
 * destructor
 */
1213
static int azx_free(struct azx *chip)
L
Linus Torvalds 已提交
1214
{
W
Wang Xingchao 已提交
1215
	struct pci_dev *pci = chip->pci;
1216
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1217
	struct hdac_bus *bus = azx_bus(chip);
T
Takashi Iwai 已提交
1218

1219
	if (azx_has_pm_runtime(chip) && chip->running)
W
Wang Xingchao 已提交
1220 1221
		pm_runtime_get_noresume(&pci->dev);

1222 1223
	azx_del_card_list(chip);

1224 1225
	hda->init_failed = 1; /* to be sure */
	complete_all(&hda->probe_wait);
1226

1227
	if (use_vga_switcheroo(hda)) {
1228 1229
		if (chip->disabled && hda->probe_continued)
			snd_hda_unlock_devices(&chip->bus);
1230
		if (hda->vga_switcheroo_registered) {
1231
			vga_switcheroo_unregister_client(chip->pci);
1232 1233
			vga_switcheroo_fini_domain_pm_ops(chip->card->dev);
		}
1234 1235
	}

1236
	if (bus->chip_init) {
1237
		azx_clear_irq_pending(chip);
1238
		azx_stop_all_streams(chip);
1239
		azx_stop_chip(chip);
L
Linus Torvalds 已提交
1240 1241
	}

1242 1243
	if (bus->irq >= 0)
		free_irq(bus->irq, (void*)chip);
1244
	if (chip->msi)
1245
		pci_disable_msi(chip->pci);
1246
	iounmap(bus->remap_addr);
L
Linus Torvalds 已提交
1247

1248
	azx_free_stream_pages(chip);
1249 1250 1251
	azx_free_streams(chip);
	snd_hdac_bus_exit(bus);

1252 1253
	if (chip->region_requested)
		pci_release_regions(chip->pci);
1254

L
Linus Torvalds 已提交
1255
	pci_disable_device(chip->pci);
1256
#ifdef CONFIG_SND_HDA_PATCH_LOADER
1257
	release_firmware(chip->fw);
1258
#endif
1259

1260
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1261
		if (hda->need_i915_power)
1262 1263
			snd_hdac_display_power(bus, false);
		snd_hdac_i915_exit(bus);
1264
	}
1265
	kfree(hda);
L
Linus Torvalds 已提交
1266 1267 1268 1269

	return 0;
}

1270 1271 1272 1273 1274 1275 1276 1277
static int azx_dev_disconnect(struct snd_device *device)
{
	struct azx *chip = device->device_data;

	chip->bus.shutdown = 1;
	return 0;
}

1278
static int azx_dev_free(struct snd_device *device)
L
Linus Torvalds 已提交
1279 1280 1281 1282
{
	return azx_free(device->device_data);
}

1283
#ifdef SUPPORT_VGA_SWITCHEROO
1284
/*
1285
 * Check of disabled HDMI controller by vga_switcheroo
1286
 */
1287
static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309
{
	struct pci_dev *p;

	/* check only discrete GPU */
	switch (pci->vendor) {
	case PCI_VENDOR_ID_ATI:
	case PCI_VENDOR_ID_AMD:
	case PCI_VENDOR_ID_NVIDIA:
		if (pci->devfn == 1) {
			p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
							pci->bus->number, 0);
			if (p) {
				if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
					return p;
				pci_dev_put(p);
			}
		}
		break;
	}
	return NULL;
}

1310
static bool check_hdmi_disabled(struct pci_dev *pci)
1311 1312 1313 1314 1315
{
	bool vga_inactive = false;
	struct pci_dev *p = get_bound_vga(pci);

	if (p) {
1316
		if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1317 1318 1319 1320 1321
			vga_inactive = true;
		pci_dev_put(p);
	}
	return vga_inactive;
}
1322
#endif /* SUPPORT_VGA_SWITCHEROO */
1323

1324 1325 1326
/*
 * white/black-listing for position_fix
 */
1327
static struct snd_pci_quirk position_fix_list[] = {
T
Takashi Iwai 已提交
1328 1329
	SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
	SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1330
	SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
T
Takashi Iwai 已提交
1331
	SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1332
	SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
D
Daniel T Chen 已提交
1333
	SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1334
	SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1335
	SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1336
	SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1337
	SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1338
	SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1339
	SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1340
	SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1341
	SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1342 1343 1344
	{}
};

1345
static int check_position_fix(struct azx *chip, int fix)
1346 1347 1348
{
	const struct snd_pci_quirk *q;

1349
	switch (fix) {
1350
	case POS_FIX_AUTO:
1351 1352
	case POS_FIX_LPIB:
	case POS_FIX_POSBUF:
1353
	case POS_FIX_VIACOMBO:
1354
	case POS_FIX_COMBO:
1355 1356 1357 1358 1359
		return fix;
	}

	q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
	if (q) {
1360 1361 1362
		dev_info(chip->card->dev,
			 "position_fix set to %d for device %04x:%04x\n",
			 q->value, q->subvendor, q->subdevice);
1363
		return q->value;
1364
	}
1365 1366

	/* Check VIA/ATI HD Audio Controller exist */
1367
	if (chip->driver_type == AZX_DRIVER_VIA) {
1368
		dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1369
		return POS_FIX_VIACOMBO;
1370 1371
	}
	if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1372
		dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1373
		return POS_FIX_LPIB;
1374
	}
1375
	return POS_FIX_AUTO;
1376 1377
}

1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401
static void assign_position_fix(struct azx *chip, int fix)
{
	static azx_get_pos_callback_t callbacks[] = {
		[POS_FIX_AUTO] = NULL,
		[POS_FIX_LPIB] = azx_get_pos_lpib,
		[POS_FIX_POSBUF] = azx_get_pos_posbuf,
		[POS_FIX_VIACOMBO] = azx_via_get_position,
		[POS_FIX_COMBO] = azx_get_pos_lpib,
	};

	chip->get_position[0] = chip->get_position[1] = callbacks[fix];

	/* combo mode uses LPIB only for playback */
	if (fix == POS_FIX_COMBO)
		chip->get_position[1] = NULL;

	if (fix == POS_FIX_POSBUF &&
	    (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
		chip->get_delay[0] = chip->get_delay[1] =
			azx_get_delay_from_lpib;
	}

}

1402 1403 1404
/*
 * black-lists for probe_mask
 */
1405
static struct snd_pci_quirk probe_mask_list[] = {
1406 1407 1408 1409 1410 1411
	/* Thinkpad often breaks the controller communication when accessing
	 * to the non-working (or non-existing) modem codec slot.
	 */
	SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1412 1413
	/* broken BIOS */
	SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1414 1415
	/* including bogus ALC268 in slot#2 that conflicts with ALC888 */
	SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1416
	/* forced codec slots */
1417
	SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1418
	SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1419 1420
	/* WinFast VP200 H (Teradici) user reported broken communication */
	SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1421 1422 1423
	{}
};

1424 1425
#define AZX_FORCE_CODEC_MASK	0x100

1426
static void check_probe_mask(struct azx *chip, int dev)
1427 1428 1429
{
	const struct snd_pci_quirk *q;

1430 1431
	chip->codec_probe_mask = probe_mask[dev];
	if (chip->codec_probe_mask == -1) {
1432 1433
		q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
		if (q) {
1434 1435 1436
			dev_info(chip->card->dev,
				 "probe_mask set to 0x%x for device %04x:%04x\n",
				 q->value, q->subvendor, q->subdevice);
1437
			chip->codec_probe_mask = q->value;
1438 1439
		}
	}
1440 1441 1442 1443

	/* check forced option */
	if (chip->codec_probe_mask != -1 &&
	    (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1444
		azx_bus(chip)->codec_mask = chip->codec_probe_mask & 0xff;
1445
		dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1446
			 (int)azx_bus(chip)->codec_mask);
1447
	}
1448 1449
}

1450
/*
T
Takashi Iwai 已提交
1451
 * white/black-list for enable_msi
1452
 */
1453
static struct snd_pci_quirk msi_black_list[] = {
1454 1455 1456 1457
	SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
T
Takashi Iwai 已提交
1458
	SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1459
	SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1460
	SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1461
	SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1462
	SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1463
	SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1464 1465 1466
	{}
};

1467
static void check_msi(struct azx *chip)
1468 1469 1470
{
	const struct snd_pci_quirk *q;

T
Takashi Iwai 已提交
1471 1472
	if (enable_msi >= 0) {
		chip->msi = !!enable_msi;
1473
		return;
T
Takashi Iwai 已提交
1474 1475 1476
	}
	chip->msi = 1;	/* enable MSI as default */
	q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1477
	if (q) {
1478 1479 1480
		dev_info(chip->card->dev,
			 "msi for device %04x:%04x set to %d\n",
			 q->subvendor, q->subdevice, q->value);
1481
		chip->msi = q->value;
1482 1483 1484 1485
		return;
	}

	/* NVidia chipsets seem to cause troubles with MSI */
1486
	if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1487
		dev_info(chip->card->dev, "Disabling MSI\n");
1488
		chip->msi = 0;
1489 1490 1491
	}
}

1492
/* check the snoop mode availability */
1493
static void azx_check_snoop_available(struct azx *chip)
1494
{
1495
	int snoop = hda_snoop;
1496

1497 1498 1499 1500 1501 1502 1503 1504
	if (snoop >= 0) {
		dev_info(chip->card->dev, "Force to %s mode by module option\n",
			 snoop ? "snoop" : "non-snoop");
		chip->snoop = snoop;
		return;
	}

	snoop = true;
1505 1506
	if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
	    chip->driver_type == AZX_DRIVER_VIA) {
1507 1508 1509
		/* force to non-snoop mode for a new VIA controller
		 * when BIOS is set
		 */
1510 1511 1512 1513
		u8 val;
		pci_read_config_byte(chip->pci, 0x42, &val);
		if (!(val & 0x80) && chip->pci->revision == 0x30)
			snoop = false;
1514 1515
	}

1516 1517 1518
	if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
		snoop = false;

1519 1520 1521
	chip->snoop = snoop;
	if (!snoop)
		dev_info(chip->card->dev, "Force to non-snoop mode\n");
1522
}
1523

1524 1525
static void azx_probe_work(struct work_struct *work)
{
1526 1527
	struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
	azx_probe_continue(&hda->chip);
1528 1529
}

1530 1531
static int default_bdl_pos_adj(struct azx *chip)
{
1532 1533 1534 1535 1536 1537 1538 1539 1540
	/* some exceptions: Atoms seem problematic with value 1 */
	if (chip->pci->vendor == PCI_VENDOR_ID_INTEL) {
		switch (chip->pci->device) {
		case 0x0f04: /* Baytrail */
		case 0x2284: /* Braswell */
			return 32;
		}
	}

1541 1542 1543 1544 1545 1546 1547 1548 1549
	switch (chip->driver_type) {
	case AZX_DRIVER_ICH:
	case AZX_DRIVER_PCH:
		return 1;
	default:
		return 32;
	}
}

L
Linus Torvalds 已提交
1550 1551 1552
/*
 * constructor
 */
1553 1554 1555
static const struct hdac_io_ops pci_hda_io_ops;
static const struct hda_controller_ops pci_hda_ops;

1556 1557 1558
static int azx_create(struct snd_card *card, struct pci_dev *pci,
		      int dev, unsigned int driver_caps,
		      struct azx **rchip)
L
Linus Torvalds 已提交
1559
{
1560
	static struct snd_device_ops ops = {
1561
		.dev_disconnect = azx_dev_disconnect,
L
Linus Torvalds 已提交
1562 1563
		.dev_free = azx_dev_free,
	};
1564
	struct hda_intel *hda;
1565 1566
	struct azx *chip;
	int err;
L
Linus Torvalds 已提交
1567 1568

	*rchip = NULL;
1569

1570 1571
	err = pci_enable_device(pci);
	if (err < 0)
L
Linus Torvalds 已提交
1572 1573
		return err;

1574 1575
	hda = kzalloc(sizeof(*hda), GFP_KERNEL);
	if (!hda) {
L
Linus Torvalds 已提交
1576 1577 1578 1579
		pci_disable_device(pci);
		return -ENOMEM;
	}

1580
	chip = &hda->chip;
1581
	mutex_init(&chip->open_mutex);
L
Linus Torvalds 已提交
1582 1583
	chip->card = card;
	chip->pci = pci;
1584
	chip->ops = &pci_hda_ops;
1585 1586
	chip->driver_caps = driver_caps;
	chip->driver_type = driver_caps & 0xff;
1587
	check_msi(chip);
1588
	chip->dev_index = dev;
1589
	chip->jackpoll_ms = jackpoll_ms;
1590
	INIT_LIST_HEAD(&chip->pcm_list);
1591 1592
	INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
	INIT_LIST_HEAD(&hda->list);
1593
	init_vga_switcheroo(chip);
1594
	init_completion(&hda->probe_wait);
L
Linus Torvalds 已提交
1595

1596
	assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1597

1598
	check_probe_mask(chip, dev);
1599

1600
	chip->single_cmd = single_cmd;
1601
	azx_check_snoop_available(chip);
1602

1603 1604 1605 1606
	if (bdl_pos_adj[dev] < 0)
		chip->bdl_pos_adj = default_bdl_pos_adj(chip);
	else
		chip->bdl_pos_adj = bdl_pos_adj[dev];
1607

1608 1609 1610 1611 1612 1613 1614
	err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
	if (err < 0) {
		kfree(hda);
		pci_disable_device(pci);
		return err;
	}

1615 1616 1617 1618 1619
	if (chip->driver_type == AZX_DRIVER_NVIDIA) {
		dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
		chip->bus.needs_damn_long_delay = 1;
	}

1620 1621
	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
	if (err < 0) {
1622
		dev_err(card->dev, "Error creating device [card]!\n");
1623 1624 1625 1626
		azx_free(chip);
		return err;
	}

1627
	/* continue probing in work context as may trigger request module */
1628
	INIT_WORK(&hda->probe_work, azx_probe_work);
1629

1630
	*rchip = chip;
1631

1632 1633 1634
	return 0;
}

1635
static int azx_first_init(struct azx *chip)
1636 1637 1638 1639
{
	int dev = chip->dev_index;
	struct pci_dev *pci = chip->pci;
	struct snd_card *card = chip->card;
1640
	struct hdac_bus *bus = azx_bus(chip);
1641
	int err;
1642
	unsigned short gcap;
1643
	unsigned int dma_bits = 64;
1644

1645 1646 1647 1648 1649 1650 1651 1652 1653 1654
#if BITS_PER_LONG != 64
	/* Fix up base address on ULI M5461 */
	if (chip->driver_type == AZX_DRIVER_ULI) {
		u16 tmp3;
		pci_read_config_word(pci, 0x40, &tmp3);
		pci_write_config_word(pci, 0x40, tmp3 | 0x10);
		pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
	}
#endif

1655
	err = pci_request_regions(pci, "ICH HD audio");
1656
	if (err < 0)
L
Linus Torvalds 已提交
1657
		return err;
1658
	chip->region_requested = 1;
L
Linus Torvalds 已提交
1659

1660 1661 1662
	bus->addr = pci_resource_start(pci, 0);
	bus->remap_addr = pci_ioremap_bar(pci, 0);
	if (bus->remap_addr == NULL) {
1663
		dev_err(card->dev, "ioremap error\n");
1664
		return -ENXIO;
L
Linus Torvalds 已提交
1665 1666
	}

1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682
	if (IS_SKL_PLUS(pci))
		snd_hdac_bus_parse_capabilities(bus);

	/*
	 * Some Intel CPUs has always running timer (ART) feature and
	 * controller may have Global time sync reporting capability, so
	 * check both of these before declaring synchronized time reporting
	 * capability SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME
	 */
	chip->gts_present = false;

#ifdef CONFIG_X86
	if (bus->ppcap && boot_cpu_has(X86_FEATURE_ART))
		chip->gts_present = true;
#endif

1683 1684 1685 1686 1687
	if (chip->msi) {
		if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
			dev_dbg(card->dev, "Disabling 64bit MSI\n");
			pci->no_64bit_msi = true;
		}
1688 1689
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
1690
	}
1691

1692 1693
	if (azx_acquire_irq(chip, 0) < 0)
		return -EBUSY;
L
Linus Torvalds 已提交
1694 1695

	pci_set_master(pci);
1696
	synchronize_irq(bus->irq);
L
Linus Torvalds 已提交
1697

1698
	gcap = azx_readw(chip, GCAP);
1699
	dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1700

1701 1702 1703 1704
	/* AMD devices support 40 or 48bit DMA, take the safe one */
	if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
		dma_bits = 40;

1705
	/* disable SB600 64bit support for safety */
1706
	if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1707
		struct pci_dev *p_smbus;
1708
		dma_bits = 40;
1709 1710 1711 1712 1713
		p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
					 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
					 NULL);
		if (p_smbus) {
			if (p_smbus->revision < 0x30)
T
Takashi Iwai 已提交
1714
				gcap &= ~AZX_GCAP_64OK;
1715 1716 1717
			pci_dev_put(p_smbus);
		}
	}
1718

1719 1720
	/* disable 64bit DMA address on some devices */
	if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1721
		dev_dbg(card->dev, "Disabling 64bit DMA\n");
T
Takashi Iwai 已提交
1722
		gcap &= ~AZX_GCAP_64OK;
1723
	}
1724

1725
	/* disable buffer size rounding to 128-byte multiples if supported */
1726 1727 1728
	if (align_buffer_size >= 0)
		chip->align_buffer_size = !!align_buffer_size;
	else {
1729
		if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1730 1731 1732 1733
			chip->align_buffer_size = 0;
		else
			chip->align_buffer_size = 1;
	}
1734

1735
	/* allow 64bit DMA address if supported by H/W */
1736 1737
	if (!(gcap & AZX_GCAP_64OK))
		dma_bits = 32;
1738 1739
	if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(dma_bits))) {
		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(dma_bits));
1740
	} else {
1741 1742
		dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
1743
	}
1744

1745 1746 1747 1748 1749 1750
	/* read number of streams from GCAP register instead of using
	 * hardcoded value
	 */
	chip->capture_streams = (gcap >> 8) & 0x0f;
	chip->playback_streams = (gcap >> 12) & 0x0f;
	if (!chip->playback_streams && !chip->capture_streams) {
1751 1752 1753 1754 1755 1756 1757 1758
		/* gcap didn't give any info, switching to old method */

		switch (chip->driver_type) {
		case AZX_DRIVER_ULI:
			chip->playback_streams = ULI_NUM_PLAYBACK;
			chip->capture_streams = ULI_NUM_CAPTURE;
			break;
		case AZX_DRIVER_ATIHDMI:
1759
		case AZX_DRIVER_ATIHDMI_NS:
1760 1761 1762
			chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
			chip->capture_streams = ATIHDMI_NUM_CAPTURE;
			break;
1763
		case AZX_DRIVER_GENERIC:
1764 1765 1766 1767 1768
		default:
			chip->playback_streams = ICH6_NUM_PLAYBACK;
			chip->capture_streams = ICH6_NUM_CAPTURE;
			break;
		}
1769
	}
1770 1771
	chip->capture_index_offset = 0;
	chip->playback_index_offset = chip->capture_streams;
1772 1773
	chip->num_streams = chip->playback_streams + chip->capture_streams;

1774 1775
	/* initialize streams */
	err = azx_init_streams(chip);
1776
	if (err < 0)
1777
		return err;
L
Linus Torvalds 已提交
1778

1779 1780 1781
	err = azx_alloc_stream_pages(chip);
	if (err < 0)
		return err;
L
Linus Torvalds 已提交
1782 1783

	/* initialize chip */
1784
	azx_init_pci(chip);
1785

1786 1787
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
		snd_hdac_i915_set_bclk(bus);
1788

1789
	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
L
Linus Torvalds 已提交
1790 1791

	/* codec detection */
1792
	if (!azx_bus(chip)->codec_mask) {
1793
		dev_err(card->dev, "no codecs found!\n");
1794
		return -ENODEV;
L
Linus Torvalds 已提交
1795 1796
	}

1797
	strcpy(card->driver, "HDA-Intel");
T
Takashi Iwai 已提交
1798 1799 1800 1801
	strlcpy(card->shortname, driver_short_names[chip->driver_type],
		sizeof(card->shortname));
	snprintf(card->longname, sizeof(card->longname),
		 "%s at 0x%lx irq %i",
1802
		 card->shortname, bus->addr, bus->irq);
1803

L
Linus Torvalds 已提交
1804 1805 1806
	return 0;
}

1807
#ifdef CONFIG_SND_HDA_PATCH_LOADER
1808 1809 1810 1811 1812 1813 1814 1815
/* callback from request_firmware_nowait() */
static void azx_firmware_cb(const struct firmware *fw, void *context)
{
	struct snd_card *card = context;
	struct azx *chip = card->private_data;
	struct pci_dev *pci = chip->pci;

	if (!fw) {
1816
		dev_err(card->dev, "Cannot load firmware, aborting\n");
1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831
		goto error;
	}

	chip->fw = fw;
	if (!chip->disabled) {
		/* continue probing */
		if (azx_probe_continue(chip))
			goto error;
	}
	return; /* OK */

 error:
	snd_card_free(card);
	pci_set_drvdata(pci, NULL);
}
1832
#endif
1833

1834 1835 1836 1837 1838
/*
 * HDA controller ops.
 */

/* PCI register access. */
1839
static void pci_azx_writel(u32 value, u32 __iomem *addr)
1840 1841 1842 1843
{
	writel(value, addr);
}

1844
static u32 pci_azx_readl(u32 __iomem *addr)
1845 1846 1847 1848
{
	return readl(addr);
}

1849
static void pci_azx_writew(u16 value, u16 __iomem *addr)
1850 1851 1852 1853
{
	writew(value, addr);
}

1854
static u16 pci_azx_readw(u16 __iomem *addr)
1855 1856 1857 1858
{
	return readw(addr);
}

1859
static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1860 1861 1862 1863
{
	writeb(value, addr);
}

1864
static u8 pci_azx_readb(u8 __iomem *addr)
1865 1866 1867 1868
{
	return readb(addr);
}

1869 1870
static int disable_msi_reset_irq(struct azx *chip)
{
1871
	struct hdac_bus *bus = azx_bus(chip);
1872 1873
	int err;

1874 1875
	free_irq(bus->irq, chip);
	bus->irq = -1;
1876 1877 1878 1879 1880 1881 1882 1883 1884
	pci_disable_msi(chip->pci);
	chip->msi = 0;
	err = azx_acquire_irq(chip, 1);
	if (err < 0)
		return err;

	return 0;
}

1885
/* DMA page allocation helpers.  */
1886
static int dma_alloc_pages(struct hdac_bus *bus,
1887 1888 1889 1890
			   int type,
			   size_t size,
			   struct snd_dma_buffer *buf)
{
1891
	struct azx *chip = bus_to_azx(bus);
1892 1893 1894
	int err;

	err = snd_dma_alloc_pages(type,
1895
				  bus->dev,
1896 1897 1898 1899 1900 1901 1902
				  size, buf);
	if (err < 0)
		return err;
	mark_pages_wc(chip, buf, true);
	return 0;
}

1903
static void dma_free_pages(struct hdac_bus *bus, struct snd_dma_buffer *buf)
1904
{
1905
	struct azx *chip = bus_to_azx(bus);
1906

1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933
	mark_pages_wc(chip, buf, false);
	snd_dma_free_pages(buf);
}

static int substream_alloc_pages(struct azx *chip,
				 struct snd_pcm_substream *substream,
				 size_t size)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	int ret;

	mark_runtime_wc(chip, azx_dev, substream, false);
	ret = snd_pcm_lib_malloc_pages(substream, size);
	if (ret < 0)
		return ret;
	mark_runtime_wc(chip, azx_dev, substream, true);
	return 0;
}

static int substream_free_pages(struct azx *chip,
				struct snd_pcm_substream *substream)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	mark_runtime_wc(chip, azx_dev, substream, false);
	return snd_pcm_lib_free_pages(substream);
}

1934 1935 1936 1937 1938 1939
static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
			     struct vm_area_struct *area)
{
#ifdef CONFIG_X86
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct azx *chip = apcm->chip;
1940
	if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1941 1942 1943 1944
		area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
#endif
}

1945
static const struct hdac_io_ops pci_hda_io_ops = {
1946 1947 1948 1949 1950 1951
	.reg_writel = pci_azx_writel,
	.reg_readl = pci_azx_readl,
	.reg_writew = pci_azx_writew,
	.reg_readw = pci_azx_readw,
	.reg_writeb = pci_azx_writeb,
	.reg_readb = pci_azx_readb,
1952 1953
	.dma_alloc_pages = dma_alloc_pages,
	.dma_free_pages = dma_free_pages,
1954 1955 1956 1957
};

static const struct hda_controller_ops pci_hda_ops = {
	.disable_msi_reset_irq = disable_msi_reset_irq,
1958 1959
	.substream_alloc_pages = substream_alloc_pages,
	.substream_free_pages = substream_free_pages,
1960
	.pcm_mmap_prepare = pcm_mmap_prepare,
D
Dylan Reid 已提交
1961
	.position_check = azx_position_check,
1962
	.link_power = azx_intel_link_power,
1963 1964
};

1965 1966
static int azx_probe(struct pci_dev *pci,
		     const struct pci_device_id *pci_id)
L
Linus Torvalds 已提交
1967
{
1968
	static int dev;
1969
	struct snd_card *card;
1970
	struct hda_intel *hda;
1971
	struct azx *chip;
1972
	bool schedule_probe;
1973
	int err;
L
Linus Torvalds 已提交
1974

1975 1976 1977 1978 1979 1980 1981
	if (dev >= SNDRV_CARDS)
		return -ENODEV;
	if (!enable[dev]) {
		dev++;
		return -ENOENT;
	}

1982 1983
	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
			   0, &card);
1984
	if (err < 0) {
1985
		dev_err(&pci->dev, "Error creating card!\n");
1986
		return err;
L
Linus Torvalds 已提交
1987 1988
	}

1989
	err = azx_create(card, pci, dev, pci_id->driver_data, &chip);
W
Wu Fengguang 已提交
1990 1991
	if (err < 0)
		goto out_free;
T
Takashi Iwai 已提交
1992
	card->private_data = chip;
1993
	hda = container_of(chip, struct hda_intel, chip);
1994 1995 1996 1997 1998

	pci_set_drvdata(pci, card);

	err = register_vga_switcheroo(chip);
	if (err < 0) {
1999
		dev_err(card->dev, "Error registering vga_switcheroo client\n");
2000 2001 2002 2003
		goto out_free;
	}

	if (check_hdmi_disabled(pci)) {
2004 2005
		dev_info(card->dev, "VGA controller is disabled\n");
		dev_info(card->dev, "Delaying initialization\n");
2006 2007 2008
		chip->disabled = true;
	}

2009
	schedule_probe = !chip->disabled;
L
Linus Torvalds 已提交
2010

2011 2012
#ifdef CONFIG_SND_HDA_PATCH_LOADER
	if (patch[dev] && *patch[dev]) {
2013 2014
		dev_info(card->dev, "Applying patch firmware '%s'\n",
			 patch[dev]);
2015 2016 2017
		err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
					      &pci->dev, GFP_KERNEL, card,
					      azx_firmware_cb);
2018 2019
		if (err < 0)
			goto out_free;
2020
		schedule_probe = false; /* continued in azx_firmware_cb() */
2021 2022 2023
	}
#endif /* CONFIG_SND_HDA_PATCH_LOADER */

2024
#ifndef CONFIG_SND_HDA_I915
2025 2026
	if (CONTROLLER_IN_GPU(pci))
		dev_err(card->dev, "Haswell/Broadwell HDMI/DP must build in CONFIG_SND_HDA_I915\n");
2027 2028
#endif

2029
	if (schedule_probe)
2030
		schedule_work(&hda->probe_work);
2031 2032

	dev++;
2033
	if (chip->disabled)
2034
		complete_all(&hda->probe_wait);
2035 2036 2037 2038 2039 2040 2041
	return 0;

out_free:
	snd_card_free(card);
	return err;
}

2042 2043 2044 2045 2046 2047
/* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
	[AZX_DRIVER_NVIDIA] = 8,
	[AZX_DRIVER_TERA] = 1,
};

2048
static int azx_probe_continue(struct azx *chip)
2049
{
2050
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
2051
	struct hdac_bus *bus = azx_bus(chip);
W
Wang Xingchao 已提交
2052
	struct pci_dev *pci = chip->pci;
2053 2054 2055
	int dev = chip->dev_index;
	int err;

2056
	hda->probe_continued = 1;
2057 2058 2059 2060 2061 2062

	/* Request display power well for the HDA controller or codec. For
	 * Haswell/Broadwell, both the display HDA controller and codec need
	 * this power. For other platforms, like Baytrail/Braswell, only the
	 * display codec needs the power and it can be released after probe.
	 */
2063
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
2064 2065
		/* HSW/BDW controllers need this power */
		if (CONTROLLER_IN_GPU(pci))
2066 2067
			hda->need_i915_power = 1;

2068
		err = snd_hdac_i915_init(bus);
2069 2070 2071 2072 2073 2074
		if (err < 0) {
			/* if the controller is bound only with HDMI/DP
			 * (for HSW and BDW), we need to abort the probe;
			 * for other chips, still continue probing as other
			 * codecs can be on the same link.
			 */
2075 2076 2077
			if (CONTROLLER_IN_GPU(pci)) {
				dev_err(chip->card->dev,
					"HSW/BDW HD-audio HDMI/DP requires binding with gfx driver\n");
2078
				goto out_free;
2079
			} else
2080 2081
				goto skip_i915;
		}
2082

2083
		err = snd_hdac_display_power(bus, true);
2084 2085 2086
		if (err < 0) {
			dev_err(chip->card->dev,
				"Cannot turn on display power on i915\n");
2087
			goto i915_power_fail;
2088
		}
2089 2090
	}

2091
 skip_i915:
2092 2093 2094 2095
	err = azx_first_init(chip);
	if (err < 0)
		goto out_free;

2096 2097 2098 2099
#ifdef CONFIG_SND_HDA_INPUT_BEEP
	chip->beep_mode = beep_mode[dev];
#endif

L
Linus Torvalds 已提交
2100
	/* create codec instances */
2101
	err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
W
Wu Fengguang 已提交
2102 2103
	if (err < 0)
		goto out_free;
2104

2105
#ifdef CONFIG_SND_HDA_PATCH_LOADER
2106
	if (chip->fw) {
2107
		err = snd_hda_load_patch(&chip->bus, chip->fw->size,
2108
					 chip->fw->data);
2109 2110
		if (err < 0)
			goto out_free;
2111
#ifndef CONFIG_PM
2112 2113
		release_firmware(chip->fw); /* no longer needed */
		chip->fw = NULL;
2114
#endif
2115 2116
	}
#endif
2117
	if ((probe_only[dev] & 1) == 0) {
2118 2119 2120 2121
		err = azx_codec_configure(chip);
		if (err < 0)
			goto out_free;
	}
L
Linus Torvalds 已提交
2122

2123
	err = snd_card_register(chip->card);
W
Wu Fengguang 已提交
2124 2125
	if (err < 0)
		goto out_free;
L
Linus Torvalds 已提交
2126

2127
	chip->running = 1;
2128
	azx_add_card_list(chip);
2129
	snd_hda_set_power_save(&chip->bus, power_save * 1000);
2130
	if (azx_has_pm_runtime(chip) || hda->use_vga_switcheroo)
2131
		pm_runtime_put_autosuspend(&pci->dev);
L
Linus Torvalds 已提交
2132

W
Wu Fengguang 已提交
2133
out_free:
2134 2135
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
		&& !hda->need_i915_power)
2136
		snd_hdac_display_power(bus, false);
2137 2138

i915_power_fail:
2139
	if (err < 0)
2140 2141
		hda->init_failed = 1;
	complete_all(&hda->probe_wait);
W
Wu Fengguang 已提交
2142
	return err;
L
Linus Torvalds 已提交
2143 2144
}

2145
static void azx_remove(struct pci_dev *pci)
L
Linus Torvalds 已提交
2146
{
2147
	struct snd_card *card = pci_get_drvdata(pci);
2148 2149 2150 2151
	struct azx *chip;
	struct hda_intel *hda;

	if (card) {
2152
		/* cancel the pending probing work */
2153 2154
		chip = card->private_data;
		hda = container_of(chip, struct hda_intel, chip);
2155
		cancel_work_sync(&hda->probe_work);
2156

2157
		snd_card_free(card);
2158
	}
L
Linus Torvalds 已提交
2159 2160
}

2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172
static void azx_shutdown(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip;

	if (!card)
		return;
	chip = card->private_data;
	if (chip && chip->running)
		azx_stop_chip(chip);
}

L
Linus Torvalds 已提交
2173
/* PCI IDs */
2174
static const struct pci_device_id azx_ids[] = {
2175
	/* CPT */
2176
	{ PCI_DEVICE(0x8086, 0x1c20),
2177
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2178
	/* PBG */
2179
	{ PCI_DEVICE(0x8086, 0x1d20),
2180
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2181
	/* Panther Point */
2182
	{ PCI_DEVICE(0x8086, 0x1e20),
2183
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2184 2185
	/* Lynx Point */
	{ PCI_DEVICE(0x8086, 0x8c20),
2186
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2187 2188 2189
	/* 9 Series */
	{ PCI_DEVICE(0x8086, 0x8ca0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2190 2191 2192 2193 2194
	/* Wellsburg */
	{ PCI_DEVICE(0x8086, 0x8d20),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
	{ PCI_DEVICE(0x8086, 0x8d21),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2195 2196 2197 2198 2199
	/* Lewisburg */
	{ PCI_DEVICE(0x8086, 0xa1f0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
	{ PCI_DEVICE(0x8086, 0xa270),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2200 2201
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c20),
2202
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2203 2204
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c21),
2205
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2206 2207 2208
	/* Wildcat Point-LP */
	{ PCI_DEVICE(0x8086, 0x9ca0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2209 2210
	/* Sunrise Point */
	{ PCI_DEVICE(0x8086, 0xa170),
2211
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2212 2213
	/* Sunrise Point-LP */
	{ PCI_DEVICE(0x8086, 0x9d70),
2214
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
V
Vinod Koul 已提交
2215 2216 2217 2218 2219 2220
	/* Kabylake */
	{ PCI_DEVICE(0x8086, 0xa171),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
	/* Kabylake-LP */
	{ PCI_DEVICE(0x8086, 0x9d71),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2221 2222 2223
	/* Kabylake-H */
	{ PCI_DEVICE(0x8086, 0xa2f0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2224 2225 2226
	/* Broxton-P(Apollolake) */
	{ PCI_DEVICE(0x8086, 0x5a98),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BROXTON },
2227 2228 2229
	/* Broxton-T */
	{ PCI_DEVICE(0x8086, 0x1a98),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BROXTON },
2230
	/* Haswell */
2231
	{ PCI_DEVICE(0x8086, 0x0a0c),
2232
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2233
	{ PCI_DEVICE(0x8086, 0x0c0c),
2234
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2235
	{ PCI_DEVICE(0x8086, 0x0d0c),
2236
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2237 2238
	/* Broadwell */
	{ PCI_DEVICE(0x8086, 0x160c),
2239
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2240 2241
	/* 5 Series/3400 */
	{ PCI_DEVICE(0x8086, 0x3b56),
2242
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2243
	/* Poulsbo */
2244
	{ PCI_DEVICE(0x8086, 0x811b),
2245
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2246
	/* Oaktrail */
2247
	{ PCI_DEVICE(0x8086, 0x080a),
2248
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2249 2250
	/* BayTrail */
	{ PCI_DEVICE(0x8086, 0x0f04),
2251
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BAYTRAIL },
2252 2253
	/* Braswell */
	{ PCI_DEVICE(0x8086, 0x2284),
2254
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BRASWELL },
2255
	/* ICH6 */
2256
	{ PCI_DEVICE(0x8086, 0x2668),
2257 2258
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH7 */
2259
	{ PCI_DEVICE(0x8086, 0x27d8),
2260 2261
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ESB2 */
2262
	{ PCI_DEVICE(0x8086, 0x269a),
2263 2264
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH8 */
2265
	{ PCI_DEVICE(0x8086, 0x284b),
2266 2267
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH9 */
2268
	{ PCI_DEVICE(0x8086, 0x293e),
2269 2270
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH9 */
2271
	{ PCI_DEVICE(0x8086, 0x293f),
2272 2273
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH10 */
2274
	{ PCI_DEVICE(0x8086, 0x3a3e),
2275 2276
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH10 */
2277
	{ PCI_DEVICE(0x8086, 0x3a6e),
2278
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2279 2280 2281 2282
	/* Generic Intel */
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2283
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2284 2285 2286 2287 2288 2289 2290 2291
	/* ATI SB 450/600/700/800/900 */
	{ PCI_DEVICE(0x1002, 0x437b),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	{ PCI_DEVICE(0x1002, 0x4383),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	/* AMD Hudson */
	{ PCI_DEVICE(0x1022, 0x780d),
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2292
	/* ATI HDMI */
2293 2294
	{ PCI_DEVICE(0x1002, 0x0002),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2295 2296
	{ PCI_DEVICE(0x1002, 0x1308),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2297 2298
	{ PCI_DEVICE(0x1002, 0x157a),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2299 2300
	{ PCI_DEVICE(0x1002, 0x15b3),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2301 2302 2303 2304 2305 2306 2307 2308
	{ PCI_DEVICE(0x1002, 0x793b),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x7919),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x960f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x970f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2309 2310
	{ PCI_DEVICE(0x1002, 0x9840),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330
	{ PCI_DEVICE(0x1002, 0xaa00),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa08),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa10),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa18),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa20),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa28),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa30),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa38),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa40),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa48),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346
	{ PCI_DEVICE(0x1002, 0xaa50),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa58),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa60),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa68),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa80),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa88),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa90),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa98),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2347
	{ PCI_DEVICE(0x1002, 0x9902),
2348
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2349
	{ PCI_DEVICE(0x1002, 0xaaa0),
2350
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2351
	{ PCI_DEVICE(0x1002, 0xaaa8),
2352
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2353
	{ PCI_DEVICE(0x1002, 0xaab0),
2354
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2355 2356
	{ PCI_DEVICE(0x1002, 0xaac0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2357 2358
	{ PCI_DEVICE(0x1002, 0xaac8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2359 2360 2361 2362
	{ PCI_DEVICE(0x1002, 0xaad8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
	{ PCI_DEVICE(0x1002, 0xaae8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2363 2364 2365 2366
	{ PCI_DEVICE(0x1002, 0xaae0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
	{ PCI_DEVICE(0x1002, 0xaaf0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2367
	/* VIA VT8251/VT8237A */
2368
	{ PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
2369 2370 2371 2372
	/* VIA GFX VT7122/VX900 */
	{ PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
	/* VIA GFX VT6122/VX11 */
	{ PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2373 2374 2375 2376 2377
	/* SIS966 */
	{ PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
	/* ULI M5461 */
	{ PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
	/* NVIDIA MCP */
2378 2379 2380
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2381
	  .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2382
	/* Teradici */
2383 2384
	{ PCI_DEVICE(0x6549, 0x1200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2385 2386
	{ PCI_DEVICE(0x6549, 0x2200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2387
	/* Creative X-Fi (CA0110-IBG) */
2388 2389 2390 2391 2392
	/* CTHDA chips */
	{ PCI_DEVICE(0x1102, 0x0010),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
	{ PCI_DEVICE(0x1102, 0x0012),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
T
Takashi Iwai 已提交
2393
#if !IS_ENABLED(CONFIG_SND_CTXFI)
2394 2395 2396 2397
	/* the following entry conflicts with snd-ctxfi driver,
	 * as ctxfi driver mutates from HD-audio to native mode with
	 * a special command sequence.
	 */
2398 2399 2400
	{ PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2401
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2402
	  AZX_DCAPS_NO_64BIT | AZX_DCAPS_POSFIX_LPIB },
2403 2404
#else
	/* this entry seems still valid -- i.e. without emu20kx chip */
2405 2406
	{ PCI_DEVICE(0x1102, 0x0009),
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2407
	  AZX_DCAPS_NO_64BIT | AZX_DCAPS_POSFIX_LPIB },
2408
#endif
2409 2410 2411
	/* CM8888 */
	{ PCI_DEVICE(0x13f6, 0x5011),
	  .driver_data = AZX_DRIVER_CMEDIA |
2412
	  AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2413 2414
	/* Vortex86MX */
	{ PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2415 2416
	/* VMware HDAudio */
	{ PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2417
	/* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2418 2419 2420
	{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2421
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2422 2423 2424
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2425
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
L
Linus Torvalds 已提交
2426 2427 2428 2429 2430
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);

/* pci_driver definition */
2431
static struct pci_driver azx_driver = {
2432
	.name = KBUILD_MODNAME,
L
Linus Torvalds 已提交
2433 2434
	.id_table = azx_ids,
	.probe = azx_probe,
2435
	.remove = azx_remove,
2436
	.shutdown = azx_shutdown,
2437 2438 2439
	.driver = {
		.pm = AZX_PM_OPS,
	},
L
Linus Torvalds 已提交
2440 2441
};

2442
module_pci_driver(azx_driver);