main.c 55.1 KB
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/*
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 * Copyright (c) 2008-2009 Atheros Communications Inc.
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 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/nl80211.h>
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#include <linux/delay.h>
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#include "ath9k.h"
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#include "btcoex.h"
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static u8 parse_mpdudensity(u8 mpdudensity)
{
	/*
	 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
	 *   0 for no restriction
	 *   1 for 1/4 us
	 *   2 for 1/2 us
	 *   3 for 1 us
	 *   4 for 2 us
	 *   5 for 4 us
	 *   6 for 8 us
	 *   7 for 16 us
	 */
	switch (mpdudensity) {
	case 0:
		return 0;
	case 1:
	case 2:
	case 3:
		/* Our lower layer calculations limit our precision to
		   1 microsecond */
		return 1;
	case 4:
		return 2;
	case 5:
		return 4;
	case 6:
		return 8;
	case 7:
		return 16;
	default:
		return 0;
	}
}

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static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
{
	bool pending = false;

	spin_lock_bh(&txq->axq_lock);

	if (txq->axq_depth || !list_empty(&txq->axq_acq))
		pending = true;
	else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
		pending = !list_empty(&txq->txq_fifo_pending);

	spin_unlock_bh(&txq->axq_lock);
	return pending;
}

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bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
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{
	unsigned long flags;
	bool ret;

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	spin_lock_irqsave(&sc->sc_pm_lock, flags);
	ret = ath9k_hw_setpower(sc->sc_ah, mode);
	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
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	return ret;
}

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void ath9k_ps_wakeup(struct ath_softc *sc)
{
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	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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	unsigned long flags;
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	enum ath9k_power_mode power_mode;
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	spin_lock_irqsave(&sc->sc_pm_lock, flags);
	if (++sc->ps_usecount != 1)
		goto unlock;

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	power_mode = sc->sc_ah->power_mode;
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	ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
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	/*
	 * While the hardware is asleep, the cycle counters contain no
	 * useful data. Better clear them now so that they don't mess up
	 * survey data results.
	 */
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	if (power_mode != ATH9K_PM_AWAKE) {
		spin_lock(&common->cc_lock);
		ath_hw_cycle_counters_update(common);
		memset(&common->cc_survey, 0, sizeof(common->cc_survey));
		spin_unlock(&common->cc_lock);
	}
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 unlock:
	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
}

void ath9k_ps_restore(struct ath_softc *sc)
{
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	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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	unsigned long flags;

	spin_lock_irqsave(&sc->sc_pm_lock, flags);
	if (--sc->ps_usecount != 0)
		goto unlock;

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	spin_lock(&common->cc_lock);
	ath_hw_cycle_counters_update(common);
	spin_unlock(&common->cc_lock);

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	if (sc->ps_idle)
		ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
	else if (sc->ps_enabled &&
		 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
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			      PS_WAIT_FOR_CAB |
			      PS_WAIT_FOR_PSPOLL_DATA |
			      PS_WAIT_FOR_TX_ACK)))
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		ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
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 unlock:
	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
}

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static void ath_start_ani(struct ath_common *common)
{
	struct ath_hw *ah = common->ah;
	unsigned long timestamp = jiffies_to_msecs(jiffies);
	struct ath_softc *sc = (struct ath_softc *) common->priv;

	if (!(sc->sc_flags & SC_OP_ANI_RUN))
		return;

	if (sc->sc_flags & SC_OP_OFFCHANNEL)
		return;

	common->ani.longcal_timer = timestamp;
	common->ani.shortcal_timer = timestamp;
	common->ani.checkani_timer = timestamp;

	mod_timer(&common->ani.timer,
		  jiffies +
			msecs_to_jiffies((u32)ah->config.ani_poll_interval));
}

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static void ath_update_survey_nf(struct ath_softc *sc, int channel)
{
	struct ath_hw *ah = sc->sc_ah;
	struct ath9k_channel *chan = &ah->channels[channel];
	struct survey_info *survey = &sc->survey[channel];

	if (chan->noisefloor) {
		survey->filled |= SURVEY_INFO_NOISE_DBM;
		survey->noise = chan->noisefloor;
	}
}

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/*
 * Updates the survey statistics and returns the busy time since last
 * update in %, if the measurement duration was long enough for the
 * result to be useful, -1 otherwise.
 */
static int ath_update_survey_stats(struct ath_softc *sc)
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{
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
	int pos = ah->curchan - &ah->channels[0];
	struct survey_info *survey = &sc->survey[pos];
	struct ath_cycle_counters *cc = &common->cc_survey;
	unsigned int div = common->clockrate * 1000;
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	int ret = 0;
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	if (!ah->curchan)
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		return -1;
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	if (ah->power_mode == ATH9K_PM_AWAKE)
		ath_hw_cycle_counters_update(common);
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	if (cc->cycles > 0) {
		survey->filled |= SURVEY_INFO_CHANNEL_TIME |
			SURVEY_INFO_CHANNEL_TIME_BUSY |
			SURVEY_INFO_CHANNEL_TIME_RX |
			SURVEY_INFO_CHANNEL_TIME_TX;
		survey->channel_time += cc->cycles / div;
		survey->channel_time_busy += cc->rx_busy / div;
		survey->channel_time_rx += cc->rx_frame / div;
		survey->channel_time_tx += cc->tx_frame / div;
	}
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	if (cc->cycles < div)
		return -1;

	if (cc->cycles > 0)
		ret = cc->rx_busy * 100 / cc->cycles;

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	memset(cc, 0, sizeof(*cc));

	ath_update_survey_nf(sc, pos);
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	return ret;
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}

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/*
 * Set/change channels.  If the channel is really being changed, it's done
 * by reseting the chip.  To accomplish this we must first cleanup any pending
 * DMA, then restart stuff.
*/
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int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
		    struct ath9k_channel *hchan)
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{
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	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);
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	struct ieee80211_conf *conf = &common->hw->conf;
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	bool fastcc = true, stopped;
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	struct ieee80211_channel *channel = hw->conf.channel;
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	struct ath9k_hw_cal_data *caldata = NULL;
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	int r;
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	if (sc->sc_flags & SC_OP_INVALID)
		return -EIO;

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	sc->hw_busy_count = 0;

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	del_timer_sync(&common->ani.timer);
	cancel_work_sync(&sc->paprd_work);
	cancel_work_sync(&sc->hw_check_work);
	cancel_delayed_work_sync(&sc->tx_complete_work);
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	cancel_delayed_work_sync(&sc->hw_pll_work);
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	ath9k_ps_wakeup(sc);

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	spin_lock_bh(&sc->sc_pcu_lock);

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	/*
	 * This is only performed if the channel settings have
	 * actually changed.
	 *
	 * To switch channels clear any pending DMA operations;
	 * wait long enough for the RX fifo to drain, reset the
	 * hardware at the new frequency, and then re-enable
	 * the relevant bits of the h/w.
	 */
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	ath9k_hw_disable_interrupts(ah);
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	stopped = ath_drain_all_txq(sc, false);
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	if (!ath_stoprecv(sc))
		stopped = false;
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	if (!ath9k_hw_check_alive(ah))
		stopped = false;

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	/* XXX: do not flush receive queue here. We don't want
	 * to flush data frames already in queue because of
	 * changing channel. */
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	if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
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		fastcc = false;

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	if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
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		caldata = &sc->caldata;
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	ath_dbg(common, ATH_DBG_CONFIG,
		"(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
		sc->sc_ah->curchan->channel,
		channel->center_freq, conf_is_ht40(conf),
		fastcc);
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	r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
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	if (r) {
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		ath_err(common,
			"Unable to reset channel (%u MHz), reset status %d\n",
			channel->center_freq, r);
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		goto ps_restore;
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	}
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	if (ath_startrecv(sc) != 0) {
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		ath_err(common, "Unable to restart recv logic\n");
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		r = -EIO;
		goto ps_restore;
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	}

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	ath9k_cmn_update_txpow(ah, sc->curtxpow,
			       sc->config.txpowlimit, &sc->curtxpow);
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	ath9k_hw_set_interrupts(ah, ah->imask);
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	if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
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		if (sc->sc_flags & SC_OP_BEACONS)
			ath_beacon_config(sc, NULL);
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		ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
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		ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
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		ath_start_ani(common);
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	}

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 ps_restore:
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	ieee80211_wake_queues(hw);

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	spin_unlock_bh(&sc->sc_pcu_lock);

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	ath9k_ps_restore(sc);
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	return r;
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}

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static void ath_paprd_activate(struct ath_softc *sc)
{
	struct ath_hw *ah = sc->sc_ah;
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	struct ath9k_hw_cal_data *caldata = ah->caldata;
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	struct ath_common *common = ath9k_hw_common(ah);
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	int chain;

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	if (!caldata || !caldata->paprd_done)
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		return;

	ath9k_ps_wakeup(sc);
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	ar9003_paprd_enable(ah, false);
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	for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
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		if (!(common->tx_chainmask & BIT(chain)))
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			continue;

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		ar9003_paprd_populate_single_table(ah, caldata, chain);
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	}

	ar9003_paprd_enable(ah, true);
	ath9k_ps_restore(sc);
}

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static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
{
	struct ieee80211_hw *hw = sc->hw;
	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
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	struct ath_tx_control txctl;
	int time_left;

	memset(&txctl, 0, sizeof(txctl));
	txctl.txq = sc->tx.txq_map[WME_AC_BE];

	memset(tx_info, 0, sizeof(*tx_info));
	tx_info->band = hw->conf.channel->band;
	tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
	tx_info->control.rates[0].idx = 0;
	tx_info->control.rates[0].count = 1;
	tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
	tx_info->control.rates[1].idx = -1;

	init_completion(&sc->paprd_complete);
	txctl.paprd = BIT(chain);
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	if (ath_tx_start(hw, skb, &txctl) != 0) {
		ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
		dev_kfree_skb_any(skb);
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		return false;
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	}
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	time_left = wait_for_completion_timeout(&sc->paprd_complete,
			msecs_to_jiffies(ATH_PAPRD_TIMEOUT));

	if (!time_left)
		ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
			"Timeout waiting for paprd training on TX chain %d\n",
			chain);

	return !!time_left;
}

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void ath_paprd_calibrate(struct work_struct *work)
{
	struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
	struct ieee80211_hw *hw = sc->hw;
	struct ath_hw *ah = sc->sc_ah;
	struct ieee80211_hdr *hdr;
	struct sk_buff *skb = NULL;
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	struct ath9k_hw_cal_data *caldata = ah->caldata;
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	struct ath_common *common = ath9k_hw_common(ah);
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	int ftype;
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	int chain_ok = 0;
	int chain;
	int len = 1800;

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	if (!caldata)
		return;

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	if (ar9003_paprd_init_table(ah) < 0)
		return;

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	skb = alloc_skb(len, GFP_KERNEL);
	if (!skb)
		return;

	skb_put(skb, len);
	memset(skb->data, 0, len);
	hdr = (struct ieee80211_hdr *)skb->data;
	ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
	hdr->frame_control = cpu_to_le16(ftype);
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	hdr->duration_id = cpu_to_le16(10);
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	memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
	memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
	memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);

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	ath9k_ps_wakeup(sc);
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	for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
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		if (!(common->tx_chainmask & BIT(chain)))
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			continue;

		chain_ok = 0;

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		ath_dbg(common, ATH_DBG_CALIBRATE,
			"Sending PAPRD frame for thermal measurement "
			"on chain %d\n", chain);
		if (!ath_paprd_send_frame(sc, skb, chain))
			goto fail_paprd;
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		ar9003_paprd_setup_gain_table(ah, chain);

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		ath_dbg(common, ATH_DBG_CALIBRATE,
			"Sending PAPRD training frame on chain %d\n", chain);
		if (!ath_paprd_send_frame(sc, skb, chain))
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			goto fail_paprd;
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		if (!ar9003_paprd_is_done(ah))
			break;

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		if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
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			break;

		chain_ok = 1;
	}
	kfree_skb(skb);

	if (chain_ok) {
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		caldata->paprd_done = true;
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		ath_paprd_activate(sc);
	}

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fail_paprd:
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	ath9k_ps_restore(sc);
}

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/*
 *  This routine performs the periodic noise floor calibration function
 *  that is used to adjust and optimize the chip performance.  This
 *  takes environmental changes (location, temperature) into account.
 *  When the task is complete, it reschedules itself depending on the
 *  appropriate interval that was calculated.
 */
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void ath_ani_calibrate(unsigned long data)
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{
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	struct ath_softc *sc = (struct ath_softc *)data;
	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);
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	bool longcal = false;
	bool shortcal = false;
	bool aniflag = false;
	unsigned int timestamp = jiffies_to_msecs(jiffies);
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	u32 cal_interval, short_cal_interval, long_cal_interval;
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	unsigned long flags;
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	if (ah->caldata && ah->caldata->nfcal_interference)
		long_cal_interval = ATH_LONG_CALINTERVAL_INT;
	else
		long_cal_interval = ATH_LONG_CALINTERVAL;
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	short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
		ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
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	/* Only calibrate if awake */
	if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
		goto set_timer;

	ath9k_ps_wakeup(sc);

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	/* Long calibration runs independently of short calibration. */
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	if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
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		longcal = true;
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		ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
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		common->ani.longcal_timer = timestamp;
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	}

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	/* Short calibration applies only while caldone is false */
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	if (!common->ani.caldone) {
		if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
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			shortcal = true;
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			ath_dbg(common, ATH_DBG_ANI,
				"shortcal @%lu\n", jiffies);
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			common->ani.shortcal_timer = timestamp;
			common->ani.resetcal_timer = timestamp;
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		}
	} else {
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		if ((timestamp - common->ani.resetcal_timer) >=
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		    ATH_RESTART_CALINTERVAL) {
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			common->ani.caldone = ath9k_hw_reset_calvalid(ah);
			if (common->ani.caldone)
				common->ani.resetcal_timer = timestamp;
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		}
	}

	/* Verify whether we must check ANI */
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	if ((timestamp - common->ani.checkani_timer) >=
	     ah->config.ani_poll_interval) {
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		aniflag = true;
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		common->ani.checkani_timer = timestamp;
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	}

	/* Skip all processing if there's nothing to do. */
	if (longcal || shortcal || aniflag) {
		/* Call ANI routine if necessary */
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		if (aniflag) {
			spin_lock_irqsave(&common->cc_lock, flags);
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			ath9k_hw_ani_monitor(ah, ah->curchan);
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			ath_update_survey_stats(sc);
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			spin_unlock_irqrestore(&common->cc_lock, flags);
		}
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		/* Perform calibration if necessary */
		if (longcal || shortcal) {
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			common->ani.caldone =
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				ath9k_hw_calibrate(ah,
						   ah->curchan,
						   common->rx_chainmask,
						   longcal);
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		}
	}

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	ath9k_ps_restore(sc);

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set_timer:
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	/*
	* Set timer interval based on previous results.
	* The interval must be the shortest necessary to satisfy ANI,
	* short calibration and long calibration.
	*/
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	cal_interval = ATH_LONG_CALINTERVAL;
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	if (sc->sc_ah->config.enable_ani)
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		cal_interval = min(cal_interval,
				   (u32)ah->config.ani_poll_interval);
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	if (!common->ani.caldone)
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		cal_interval = min(cal_interval, (u32)short_cal_interval);
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	mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
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	if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
		if (!ah->caldata->paprd_done)
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			ieee80211_queue_work(sc->hw, &sc->paprd_work);
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		else if (!ah->paprd_table_write_done)
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			ath_paprd_activate(sc);
	}
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}

static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
{
	struct ath_node *an;
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	struct ath_hw *ah = sc->sc_ah;
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	an = (struct ath_node *)sta->drv_priv;

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#ifdef CONFIG_ATH9K_DEBUGFS
	spin_lock(&sc->nodes_lock);
	list_add(&an->list, &sc->nodes);
	spin_unlock(&sc->nodes_lock);
	an->sta = sta;
#endif
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	if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
		sc->sc_flags |= SC_OP_ENABLE_APM;

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	if (sc->sc_flags & SC_OP_TXAGGR) {
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		ath_tx_node_init(sc, an);
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		an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
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				     sta->ht_cap.ampdu_factor);
		an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
	}
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}

static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
{
	struct ath_node *an = (struct ath_node *)sta->drv_priv;

589 590 591 592 593 594 595
#ifdef CONFIG_ATH9K_DEBUGFS
	spin_lock(&sc->nodes_lock);
	list_del(&an->list);
	spin_unlock(&sc->nodes_lock);
	an->sta = NULL;
#endif

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596 597 598 599
	if (sc->sc_flags & SC_OP_TXAGGR)
		ath_tx_node_cleanup(sc, an);
}

600 601 602
void ath_hw_check(struct work_struct *work)
{
	struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
603 604 605
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	unsigned long flags;
	int busy;
606 607

	ath9k_ps_wakeup(sc);
608 609
	if (ath9k_hw_check_alive(sc->sc_ah))
		goto out;
610

611 612 613
	spin_lock_irqsave(&common->cc_lock, flags);
	busy = ath_update_survey_stats(sc);
	spin_unlock_irqrestore(&common->cc_lock, flags);
614

615 616 617 618 619 620 621
	ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
		"busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
	if (busy >= 99) {
		if (++sc->hw_busy_count >= 3)
			ath_reset(sc, true);
	} else if (busy >= 0)
		sc->hw_busy_count = 0;
622 623 624 625 626

out:
	ath9k_ps_restore(sc);
}

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627
void ath9k_tasklet(unsigned long data)
S
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628 629
{
	struct ath_softc *sc = (struct ath_softc *)data;
630
	struct ath_hw *ah = sc->sc_ah;
631
	struct ath_common *common = ath9k_hw_common(ah);
632

633
	u32 status = sc->intrstatus;
634
	u32 rxmask;
S
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635

636
	if (status & ATH9K_INT_FATAL) {
637
		ath_reset(sc, true);
S
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638
		return;
639
	}
S
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640

641
	ath9k_ps_wakeup(sc);
642
	spin_lock(&sc->sc_pcu_lock);
643

644 645 646 647 648 649 650 651 652
	/*
	 * Only run the baseband hang check if beacons stop working in AP or
	 * IBSS mode, because it has a high false positive rate. For station
	 * mode it should not be necessary, since the upper layers will detect
	 * this through a beacon miss automatically and the following channel
	 * change will trigger a hardware reset anyway
	 */
	if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
	    !ath9k_hw_check_alive(ah))
653 654
		ieee80211_queue_work(sc->hw, &sc->hw_check_work);

655 656 657 658 659 660 661 662 663 664 665 666 667
	if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
		rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
			  ATH9K_INT_RXORN);
	else
		rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);

	if (status & rxmask) {
		/* Check for high priority Rx first */
		if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
		    (status & ATH9K_INT_RXHP))
			ath_rx_tasklet(sc, 0, true);

		ath_rx_tasklet(sc, 0, false);
S
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668 669
	}

670 671 672 673 674 675
	if (status & ATH9K_INT_TX) {
		if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
			ath_tx_edma_tasklet(sc);
		else
			ath_tx_tasklet(sc);
	}
676

677
	if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
678 679 680 681
		/*
		 * TSF sync does not look correct; remain awake to sync with
		 * the next Beacon.
		 */
682 683
		ath_dbg(common, ATH_DBG_PS,
			"TSFOOR - Sync with next Beacon\n");
S
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684
		sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
685 686
	}

687
	if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
688 689 690
		if (status & ATH9K_INT_GENTIMER)
			ath_gen_timer_isr(sc->sc_ah);

S
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691
	/* re-enable hardware interrupt */
692
	ath9k_hw_enable_interrupts(ah);
693

694
	spin_unlock(&sc->sc_pcu_lock);
695
	ath9k_ps_restore(sc);
S
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696 697
}

698
irqreturn_t ath_isr(int irq, void *dev)
S
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699
{
700 701 702 703 704
#define SCHED_INTR (				\
		ATH9K_INT_FATAL |		\
		ATH9K_INT_RXORN |		\
		ATH9K_INT_RXEOL |		\
		ATH9K_INT_RX |			\
705 706
		ATH9K_INT_RXLP |		\
		ATH9K_INT_RXHP |		\
707 708 709
		ATH9K_INT_TX |			\
		ATH9K_INT_BMISS |		\
		ATH9K_INT_CST |			\
710 711
		ATH9K_INT_TSFOOR |		\
		ATH9K_INT_GENTIMER)
712

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713
	struct ath_softc *sc = dev;
714
	struct ath_hw *ah = sc->sc_ah;
715
	struct ath_common *common = ath9k_hw_common(ah);
S
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716 717 718
	enum ath9k_int status;
	bool sched = false;

719 720 721 722 723 724 725
	/*
	 * The hardware is not ready/present, don't
	 * touch anything. Note this can happen early
	 * on if the IRQ is shared.
	 */
	if (sc->sc_flags & SC_OP_INVALID)
		return IRQ_NONE;
S
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726

727 728 729

	/* shared irq, not for us */

730
	if (!ath9k_hw_intrpend(ah))
731 732 733 734 735 736 737 738 739
		return IRQ_NONE;

	/*
	 * Figure out the reason(s) for the interrupt.  Note
	 * that the hal returns a pseudo-ISR that may include
	 * bits we haven't explicitly enabled so we mask the
	 * value to insure we only process bits we requested.
	 */
	ath9k_hw_getisr(ah, &status);	/* NB: clears ISR too */
740
	status &= ah->imask;	/* discard unasked-for bits */
S
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741

742 743 744 745
	/*
	 * If there are no status bits set, then this interrupt was not
	 * for me (should have been caught above).
	 */
746
	if (!status)
747
		return IRQ_NONE;
S
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748

749 750 751 752 753 754 755 756 757 758
	/* Cache the status */
	sc->intrstatus = status;

	if (status & SCHED_INTR)
		sched = true;

	/*
	 * If a FATAL or RXORN interrupt is received, we have to reset the
	 * chip immediately.
	 */
759 760
	if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
	    !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
761 762
		goto chip_reset;

763 764
	if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
	    (status & ATH9K_INT_BB_WATCHDOG)) {
765 766 767

		spin_lock(&common->cc_lock);
		ath_hw_cycle_counters_update(common);
768
		ar9003_hw_bb_watchdog_dbg_info(ah);
769 770
		spin_unlock(&common->cc_lock);

771 772 773
		goto chip_reset;
	}

774 775 776 777 778 779
	if (status & ATH9K_INT_SWBA)
		tasklet_schedule(&sc->bcon_tasklet);

	if (status & ATH9K_INT_TXURN)
		ath9k_hw_updatetxtriglevel(ah, true);

780 781 782 783 784 785 786
	if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
		if (status & ATH9K_INT_RXEOL) {
			ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
			ath9k_hw_set_interrupts(ah, ah->imask);
		}
	}

787
	if (status & ATH9K_INT_MIB) {
S
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788
		/*
789 790 791
		 * Disable interrupts until we service the MIB
		 * interrupt; otherwise it will continue to
		 * fire.
S
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792
		 */
793
		ath9k_hw_disable_interrupts(ah);
794 795 796 797 798
		/*
		 * Let the hal handle the event. We assume
		 * it will clear whatever condition caused
		 * the interrupt.
		 */
799
		spin_lock(&common->cc_lock);
800
		ath9k_hw_proc_mib_event(ah);
801
		spin_unlock(&common->cc_lock);
802
		ath9k_hw_enable_interrupts(ah);
803
	}
S
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804

805 806
	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
		if (status & ATH9K_INT_TIM_TIMER) {
807 808
			if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
				goto chip_reset;
809 810
			/* Clear RxAbort bit so that we can
			 * receive frames */
811
			ath9k_setpower(sc, ATH9K_PM_AWAKE);
812
			ath9k_hw_setrxabort(sc->sc_ah, 0);
S
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813
			sc->ps_flags |= PS_WAIT_FOR_BEACON;
S
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814
		}
815 816

chip_reset:
S
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817

818 819
	ath_debug_stat_interrupt(sc, status);

S
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820
	if (sched) {
821 822
		/* turn off every interrupt */
		ath9k_hw_disable_interrupts(ah);
S
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823 824 825 826
		tasklet_schedule(&sc->intr_tq);
	}

	return IRQ_HANDLED;
827 828

#undef SCHED_INTR
S
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829 830
}

831
static void ath9k_bss_assoc_info(struct ath_softc *sc,
832
				 struct ieee80211_hw *hw,
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833
				 struct ieee80211_vif *vif,
834
				 struct ieee80211_bss_conf *bss_conf)
835
{
836
	struct ath_hw *ah = sc->sc_ah;
837
	struct ath_common *common = ath9k_hw_common(ah);
838

839
	if (bss_conf->assoc) {
840 841 842
		ath_dbg(common, ATH_DBG_CONFIG,
			"Bss Info ASSOC %d, bssid: %pM\n",
			bss_conf->aid, common->curbssid);
843

844
		/* New association, store aid */
845
		common->curaid = bss_conf->aid;
846
		ath9k_hw_write_associd(ah);
847 848 849 850 851 852

		/*
		 * Request a re-configuration of Beacon related timers
		 * on the receipt of the first Beacon frame (i.e.,
		 * after time sync with the AP).
		 */
S
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853
		sc->ps_flags |= PS_BEACON_SYNC;
854

855
		/* Configure the beacon */
856
		ath_beacon_config(sc, vif);
857

858
		/* Reset rssi stats */
859
		sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
860
		sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
861

862
		sc->sc_flags |= SC_OP_ANI_RUN;
863
		ath_start_ani(common);
864
	} else {
865
		ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
866
		common->curaid = 0;
867
		/* Stop ANI */
868
		sc->sc_flags &= ~SC_OP_ANI_RUN;
869
		del_timer_sync(&common->ani.timer);
870
	}
871
}
872

873
void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
874
{
875
	struct ath_hw *ah = sc->sc_ah;
876
	struct ath_common *common = ath9k_hw_common(ah);
877
	struct ieee80211_channel *channel = hw->conf.channel;
878
	int r;
879

880
	ath9k_ps_wakeup(sc);
881 882
	spin_lock_bh(&sc->sc_pcu_lock);

883
	ath9k_hw_configpcipowersave(ah, 0, 0);
884

885
	if (!ah->curchan)
886
		ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
887

888
	r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
889
	if (r) {
890 891 892
		ath_err(common,
			"Unable to reset channel (%u MHz), reset status %d\n",
			channel->center_freq, r);
893 894
	}

895 896
	ath9k_cmn_update_txpow(ah, sc->curtxpow,
			       sc->config.txpowlimit, &sc->curtxpow);
897
	if (ath_startrecv(sc) != 0) {
898
		ath_err(common, "Unable to restart recv logic\n");
899
		goto out;
900 901
	}
	if (sc->sc_flags & SC_OP_BEACONS)
902
		ath_beacon_config(sc, NULL);	/* restart beacons */
903 904

	/* Re-Enable  interrupts */
905
	ath9k_hw_set_interrupts(ah, ah->imask);
906 907

	/* Enable LED */
908
	ath9k_hw_cfg_output(ah, ah->led_pin,
909
			    AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
910
	ath9k_hw_set_gpio(ah, ah->led_pin, 0);
911

912
	ieee80211_wake_queues(hw);
913 914
	ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);

915
out:
916 917
	spin_unlock_bh(&sc->sc_pcu_lock);

918
	ath9k_ps_restore(sc);
919 920
}

921
void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
922
{
923
	struct ath_hw *ah = sc->sc_ah;
924
	struct ieee80211_channel *channel = hw->conf.channel;
925
	int r;
926

927
	ath9k_ps_wakeup(sc);
928 929
	cancel_delayed_work_sync(&sc->hw_pll_work);

930 931
	spin_lock_bh(&sc->sc_pcu_lock);

932
	ieee80211_stop_queues(hw);
933

934 935 936 937 938 939 940 941
	/*
	 * Keep the LED on when the radio is disabled
	 * during idle unassociated state.
	 */
	if (!sc->ps_idle) {
		ath9k_hw_set_gpio(ah, ah->led_pin, 1);
		ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
	}
942 943

	/* Disable interrupts */
944
	ath9k_hw_disable_interrupts(ah);
945

946
	ath_drain_all_txq(sc, false);	/* clear pending tx frames */
947

948 949 950
	ath_stoprecv(sc);		/* turn off frame recv */
	ath_flushrecv(sc);		/* flush recv queue */

951
	if (!ah->curchan)
952
		ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
953

954
	r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
955
	if (r) {
956 957 958
		ath_err(ath9k_hw_common(sc->sc_ah),
			"Unable to reset channel (%u MHz), reset status %d\n",
			channel->center_freq, r);
959 960 961
	}

	ath9k_hw_phy_disable(ah);
962

963
	ath9k_hw_configpcipowersave(ah, 1, 1);
964 965

	spin_unlock_bh(&sc->sc_pcu_lock);
966
	ath9k_ps_restore(sc);
967 968
}

S
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969 970
int ath_reset(struct ath_softc *sc, bool retry_tx)
{
971
	struct ath_hw *ah = sc->sc_ah;
972
	struct ath_common *common = ath9k_hw_common(ah);
973
	struct ieee80211_hw *hw = sc->hw;
974
	int r;
S
Sujith 已提交
975

976 977
	sc->hw_busy_count = 0;

978 979 980
	/* Stop ANI */
	del_timer_sync(&common->ani.timer);

981
	ath9k_ps_wakeup(sc);
982 983
	spin_lock_bh(&sc->sc_pcu_lock);

S
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984 985
	ieee80211_stop_queues(hw);

986
	ath9k_hw_disable_interrupts(ah);
987
	ath_drain_all_txq(sc, retry_tx);
988

S
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989 990 991
	ath_stoprecv(sc);
	ath_flushrecv(sc);

992
	r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
993
	if (r)
994 995
		ath_err(common,
			"Unable to reset hardware; reset status %d\n", r);
S
Sujith 已提交
996 997

	if (ath_startrecv(sc) != 0)
998
		ath_err(common, "Unable to start recv logic\n");
S
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999 1000 1001 1002 1003 1004

	/*
	 * We may be doing a reset in response to a request
	 * that changes the channel so update any state that
	 * might change as a result.
	 */
1005 1006
	ath9k_cmn_update_txpow(ah, sc->curtxpow,
			       sc->config.txpowlimit, &sc->curtxpow);
S
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1007

1008
	if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1009
		ath_beacon_config(sc, NULL);	/* restart beacons */
S
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1010

1011
	ath9k_hw_set_interrupts(ah, ah->imask);
S
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1012 1013 1014 1015 1016

	if (retry_tx) {
		int i;
		for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
			if (ATH_TXQ_SETUP(sc, i)) {
S
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1017 1018 1019
				spin_lock_bh(&sc->tx.txq[i].axq_lock);
				ath_txq_schedule(sc, &sc->tx.txq[i]);
				spin_unlock_bh(&sc->tx.txq[i].axq_lock);
S
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1020 1021 1022 1023
			}
		}
	}

S
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1024
	ieee80211_wake_queues(hw);
1025
	spin_unlock_bh(&sc->sc_pcu_lock);
S
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1026

1027 1028
	/* Start ANI */
	ath_start_ani(common);
1029
	ath9k_ps_restore(sc);
1030

1031
	return r;
S
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1032 1033 1034 1035 1036 1037
}

/**********************/
/* mac80211 callbacks */
/**********************/

1038
static int ath9k_start(struct ieee80211_hw *hw)
1039
{
1040
	struct ath_softc *sc = hw->priv;
1041
	struct ath_hw *ah = sc->sc_ah;
1042
	struct ath_common *common = ath9k_hw_common(ah);
1043
	struct ieee80211_channel *curchan = hw->conf.channel;
S
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1044
	struct ath9k_channel *init_channel;
1045
	int r;
1046

1047 1048 1049
	ath_dbg(common, ATH_DBG_CONFIG,
		"Starting driver with initial channel: %d MHz\n",
		curchan->center_freq);
1050

1051 1052
	mutex_lock(&sc->mutex);

1053
	/* setup initial channel */
1054
	sc->chan_idx = curchan->hw_value;
1055

1056
	init_channel = ath9k_cmn_get_curchannel(hw, ah);
S
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1057 1058

	/* Reset SERDES registers */
1059
	ath9k_hw_configpcipowersave(ah, 0, 0);
S
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1060 1061 1062 1063 1064 1065 1066 1067

	/*
	 * The basic interface to setting the hardware in a good
	 * state is ``reset''.  On return the hardware is known to
	 * be powered up and with interrupts disabled.  This must
	 * be followed by initialization of the appropriate bits
	 * and then setup of the interrupt mask.
	 */
1068
	spin_lock_bh(&sc->sc_pcu_lock);
1069
	r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1070
	if (r) {
1071 1072 1073
		ath_err(common,
			"Unable to reset hardware; reset status %d (freq %u MHz)\n",
			r, curchan->center_freq);
1074
		spin_unlock_bh(&sc->sc_pcu_lock);
1075
		goto mutex_unlock;
S
Sujith 已提交
1076 1077 1078 1079 1080 1081
	}

	/*
	 * This is needed only to setup initial state
	 * but it's best done after a reset.
	 */
1082 1083
	ath9k_cmn_update_txpow(ah, sc->curtxpow,
			sc->config.txpowlimit, &sc->curtxpow);
1084

S
Sujith 已提交
1085 1086 1087 1088 1089 1090 1091 1092
	/*
	 * Setup the hardware after reset:
	 * The receive engine is set going.
	 * Frame transmit is handled entirely
	 * in the frame output path; there's nothing to do
	 * here except setup the interrupt mask.
	 */
	if (ath_startrecv(sc) != 0) {
1093
		ath_err(common, "Unable to start recv logic\n");
1094
		r = -EIO;
1095
		spin_unlock_bh(&sc->sc_pcu_lock);
1096
		goto mutex_unlock;
1097
	}
1098
	spin_unlock_bh(&sc->sc_pcu_lock);
1099

S
Sujith 已提交
1100
	/* Setup our intr mask. */
1101 1102 1103 1104 1105
	ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
		    ATH9K_INT_RXORN | ATH9K_INT_FATAL |
		    ATH9K_INT_GLOBAL;

	if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1106 1107 1108
		ah->imask |= ATH9K_INT_RXHP |
			     ATH9K_INT_RXLP |
			     ATH9K_INT_BB_WATCHDOG;
1109 1110
	else
		ah->imask |= ATH9K_INT_RX;
S
Sujith 已提交
1111

1112
	ah->imask |= ATH9K_INT_GTT;
S
Sujith 已提交
1113

1114
	if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1115
		ah->imask |= ATH9K_INT_CST;
S
Sujith 已提交
1116 1117

	sc->sc_flags &= ~SC_OP_INVALID;
1118
	sc->sc_ah->is_monitoring = false;
S
Sujith 已提交
1119 1120

	/* Disable BMISS interrupt when we're not associated */
1121 1122
	ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
	ath9k_hw_set_interrupts(ah, ah->imask);
S
Sujith 已提交
1123

1124
	ieee80211_wake_queues(hw);
S
Sujith 已提交
1125

1126
	ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1127

1128 1129
	if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
	    !ah->btcoex_hw.enabled) {
1130 1131
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_LOW_WLAN_WGHT);
1132
		ath9k_hw_btcoex_enable(ah);
1133

1134 1135
		if (common->bus_ops->bt_coex_prep)
			common->bus_ops->bt_coex_prep(common);
1136
		if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1137
			ath9k_btcoex_timer_resume(sc);
1138 1139
	}

1140 1141 1142
	if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
		common->bus_ops->extn_synch_en(common);

1143 1144 1145
mutex_unlock:
	mutex_unlock(&sc->mutex);

1146
	return r;
1147 1148
}

1149
static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1150
{
1151
	struct ath_softc *sc = hw->priv;
1152
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1153
	struct ath_tx_control txctl;
1154
	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1155

1156
	if (sc->ps_enabled) {
1157 1158 1159 1160 1161 1162 1163
		/*
		 * mac80211 does not set PM field for normal data frames, so we
		 * need to update that based on the current PS mode.
		 */
		if (ieee80211_is_data(hdr->frame_control) &&
		    !ieee80211_is_nullfunc(hdr->frame_control) &&
		    !ieee80211_has_pm(hdr->frame_control)) {
1164 1165
			ath_dbg(common, ATH_DBG_PS,
				"Add PM=1 for a TX frame while in PS mode\n");
1166 1167 1168 1169
			hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
		}
	}

1170 1171 1172 1173 1174 1175 1176
	if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
		/*
		 * We are using PS-Poll and mac80211 can request TX while in
		 * power save mode. Need to wake up hardware for the TX to be
		 * completed and if needed, also for RX of buffered frames.
		 */
		ath9k_ps_wakeup(sc);
1177 1178
		if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
			ath9k_hw_setrxabort(sc->sc_ah, 0);
1179
		if (ieee80211_is_pspoll(hdr->frame_control)) {
1180 1181
			ath_dbg(common, ATH_DBG_PS,
				"Sending PS-Poll to pick a buffered frame\n");
S
Sujith 已提交
1182
			sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1183
		} else {
1184 1185
			ath_dbg(common, ATH_DBG_PS,
				"Wake up to complete TX\n");
S
Sujith 已提交
1186
			sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1187 1188 1189 1190 1191 1192 1193 1194 1195
		}
		/*
		 * The actual restore operation will happen only after
		 * the sc_flags bit is cleared. We are just dropping
		 * the ps_usecount here.
		 */
		ath9k_ps_restore(sc);
	}

1196
	memset(&txctl, 0, sizeof(struct ath_tx_control));
1197
	txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1198

1199
	ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1200

1201
	if (ath_tx_start(hw, skb, &txctl) != 0) {
1202
		ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1203
		goto exit;
1204 1205
	}

1206
	return;
1207 1208
exit:
	dev_kfree_skb_any(skb);
1209 1210
}

1211
static void ath9k_stop(struct ieee80211_hw *hw)
1212
{
1213
	struct ath_softc *sc = hw->priv;
1214
	struct ath_hw *ah = sc->sc_ah;
1215
	struct ath_common *common = ath9k_hw_common(ah);
1216

S
Sujith 已提交
1217 1218
	mutex_lock(&sc->mutex);

1219 1220 1221
	if (led_blink)
		cancel_delayed_work_sync(&sc->ath_led_blink_work);

1222
	cancel_delayed_work_sync(&sc->tx_complete_work);
1223
	cancel_delayed_work_sync(&sc->hw_pll_work);
1224
	cancel_work_sync(&sc->paprd_work);
1225
	cancel_work_sync(&sc->hw_check_work);
1226

S
Sujith 已提交
1227
	if (sc->sc_flags & SC_OP_INVALID) {
1228
		ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
S
Sujith 已提交
1229
		mutex_unlock(&sc->mutex);
S
Sujith 已提交
1230 1231
		return;
	}
1232

1233 1234 1235
	/* Ensure HW is awake when we try to shut it down. */
	ath9k_ps_wakeup(sc);

1236
	if (ah->btcoex_hw.enabled) {
1237
		ath9k_hw_btcoex_disable(ah);
1238
		if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1239
			ath9k_btcoex_timer_pause(sc);
1240 1241
	}

1242 1243
	spin_lock_bh(&sc->sc_pcu_lock);

1244 1245 1246
	/* prevent tasklets to enable interrupts once we disable them */
	ah->imask &= ~ATH9K_INT_GLOBAL;

S
Sujith 已提交
1247 1248
	/* make sure h/w will not generate any interrupt
	 * before setting the invalid flag. */
1249
	ath9k_hw_disable_interrupts(ah);
S
Sujith 已提交
1250 1251

	if (!(sc->sc_flags & SC_OP_INVALID)) {
1252
		ath_drain_all_txq(sc, false);
S
Sujith 已提交
1253
		ath_stoprecv(sc);
1254
		ath9k_hw_phy_disable(ah);
1255
	} else
S
Sujith 已提交
1256
		sc->rx.rxlink = NULL;
S
Sujith 已提交
1257

1258 1259 1260 1261 1262
	if (sc->rx.frag) {
		dev_kfree_skb_any(sc->rx.frag);
		sc->rx.frag = NULL;
	}

S
Sujith 已提交
1263
	/* disable HAL and put h/w to sleep */
1264 1265
	ath9k_hw_disable(ah);
	ath9k_hw_configpcipowersave(ah, 1, 1);
1266 1267 1268

	spin_unlock_bh(&sc->sc_pcu_lock);

1269 1270 1271 1272 1273 1274
	/* we can now sync irq and kill any running tasklets, since we already
	 * disabled interrupts and not holding a spin lock */
	synchronize_irq(sc->irq);
	tasklet_kill(&sc->intr_tq);
	tasklet_kill(&sc->bcon_tasklet);

1275 1276
	ath9k_ps_restore(sc);

1277 1278
	sc->ps_idle = true;
	ath_radio_disable(sc, hw);
S
Sujith 已提交
1279 1280

	sc->sc_flags |= SC_OP_INVALID;
1281

1282 1283
	mutex_unlock(&sc->mutex);

1284
	ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1285 1286
}

1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300
bool ath9k_uses_beacons(int type)
{
	switch (type) {
	case NL80211_IFTYPE_AP:
	case NL80211_IFTYPE_ADHOC:
	case NL80211_IFTYPE_MESH_POINT:
		return true;
	default:
		return false;
	}
}

static void ath9k_reclaim_beacon(struct ath_softc *sc,
				 struct ieee80211_vif *vif)
1301
{
1302
	struct ath_vif *avp = (void *)vif->drv_priv;
1303

1304
	ath9k_set_beaconing_status(sc, false);
1305
	ath_beacon_return(sc, avp);
1306
	ath9k_set_beaconing_status(sc, true);
1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318
	sc->sc_flags &= ~SC_OP_BEACONS;
}

static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
{
	struct ath9k_vif_iter_data *iter_data = data;
	int i;

	if (iter_data->hw_macaddr)
		for (i = 0; i < ETH_ALEN; i++)
			iter_data->mask[i] &=
				~(iter_data->hw_macaddr[i] ^ mac[i]);
1319

1320
	switch (vif->type) {
1321 1322
	case NL80211_IFTYPE_AP:
		iter_data->naps++;
1323
		break;
1324 1325
	case NL80211_IFTYPE_STATION:
		iter_data->nstations++;
1326
		break;
1327
	case NL80211_IFTYPE_ADHOC:
1328 1329
		iter_data->nadhocs++;
		break;
1330
	case NL80211_IFTYPE_MESH_POINT:
1331 1332 1333 1334
		iter_data->nmeshes++;
		break;
	case NL80211_IFTYPE_WDS:
		iter_data->nwds++;
1335 1336
		break;
	default:
1337 1338
		iter_data->nothers++;
		break;
1339
	}
1340
}
1341

1342 1343 1344 1345 1346
/* Called with sc->mutex held. */
void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
			       struct ieee80211_vif *vif,
			       struct ath9k_vif_iter_data *iter_data)
{
1347
	struct ath_softc *sc = hw->priv;
1348 1349
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
1350

1351 1352 1353 1354 1355 1356 1357
	/*
	 * Use the hardware MAC address as reference, the hardware uses it
	 * together with the BSSID mask when matching addresses.
	 */
	memset(iter_data, 0, sizeof(*iter_data));
	iter_data->hw_macaddr = common->macaddr;
	memset(&iter_data->mask, 0xff, ETH_ALEN);
S
Sujith 已提交
1358

1359 1360 1361 1362 1363 1364 1365
	if (vif)
		ath9k_vif_iter(iter_data, vif->addr, vif);

	/* Get list of all active MAC addresses */
	ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
						   iter_data);
}
1366

1367 1368 1369 1370
/* Called with sc->mutex held. */
static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
					  struct ieee80211_vif *vif)
{
1371
	struct ath_softc *sc = hw->priv;
1372 1373 1374
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
	struct ath9k_vif_iter_data iter_data;
1375

1376
	ath9k_calculate_iter_data(hw, vif, &iter_data);
1377

1378
	ath9k_ps_wakeup(sc);
1379 1380 1381 1382 1383 1384
	/* Set BSSID mask. */
	memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
	ath_hw_setbssidmask(common);

	/* Set op-mode & TSF */
	if (iter_data.naps > 0) {
1385
		ath9k_hw_set_tsfadjust(ah, 1);
1386
		sc->sc_flags |= SC_OP_TSF_RESET;
1387 1388 1389 1390
		ah->opmode = NL80211_IFTYPE_AP;
	} else {
		ath9k_hw_set_tsfadjust(ah, 0);
		sc->sc_flags &= ~SC_OP_TSF_RESET;
S
Sujith 已提交
1391

1392 1393 1394 1395 1396 1397 1398
		if (iter_data.nwds + iter_data.nmeshes)
			ah->opmode = NL80211_IFTYPE_AP;
		else if (iter_data.nadhocs)
			ah->opmode = NL80211_IFTYPE_ADHOC;
		else
			ah->opmode = NL80211_IFTYPE_STATION;
	}
S
Sujith 已提交
1399

1400 1401 1402
	/*
	 * Enable MIB interrupts when there are hardware phy counters.
	 */
1403
	if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1404 1405
		if (ah->config.enable_ani)
			ah->imask |= ATH9K_INT_MIB;
1406
		ah->imask |= ATH9K_INT_TSFOOR;
1407 1408 1409
	} else {
		ah->imask &= ~ATH9K_INT_MIB;
		ah->imask &= ~ATH9K_INT_TSFOOR;
1410 1411
	}

1412
	ath9k_hw_set_interrupts(ah, ah->imask);
1413
	ath9k_ps_restore(sc);
1414

1415 1416
	/* Set up ANI */
	if ((iter_data.naps + iter_data.nadhocs) > 0) {
1417
		sc->sc_flags |= SC_OP_ANI_RUN;
1418
		ath_start_ani(common);
1419 1420 1421
	} else {
		sc->sc_flags &= ~SC_OP_ANI_RUN;
		del_timer_sync(&common->ani.timer);
1422
	}
1423
}
1424

1425 1426 1427 1428
/* Called with sc->mutex held, vif counts set up properly. */
static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
				   struct ieee80211_vif *vif)
{
1429
	struct ath_softc *sc = hw->priv;
1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440

	ath9k_calculate_summary_state(hw, vif);

	if (ath9k_uses_beacons(vif->type)) {
		int error;
		/* This may fail because upper levels do not have beacons
		 * properly configured yet.  That's OK, we assume it
		 * will be properly configured and then we will be notified
		 * in the info_changed method and set up beacons properly
		 * there.
		 */
1441
		ath9k_set_beaconing_status(sc, false);
1442
		error = ath_beacon_alloc(sc, vif);
1443
		if (!error)
1444
			ath_beacon_config(sc, vif);
1445
		ath9k_set_beaconing_status(sc, true);
1446
	}
1447 1448
}

1449 1450 1451

static int ath9k_add_interface(struct ieee80211_hw *hw,
			       struct ieee80211_vif *vif)
1452
{
1453
	struct ath_softc *sc = hw->priv;
1454 1455
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
1456
	struct ath_vif *avp = (void *)vif->drv_priv;
1457
	int ret = 0;
1458

1459
	mutex_lock(&sc->mutex);
1460

1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473
	switch (vif->type) {
	case NL80211_IFTYPE_STATION:
	case NL80211_IFTYPE_WDS:
	case NL80211_IFTYPE_ADHOC:
	case NL80211_IFTYPE_AP:
	case NL80211_IFTYPE_MESH_POINT:
		break;
	default:
		ath_err(common, "Interface type %d not yet supported\n",
			vif->type);
		ret = -EOPNOTSUPP;
		goto out;
	}
1474

1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490
	if (ath9k_uses_beacons(vif->type)) {
		if (sc->nbcnvifs >= ATH_BCBUF) {
			ath_err(common, "Not enough beacon buffers when adding"
				" new interface of type: %i\n",
				vif->type);
			ret = -ENOBUFS;
			goto out;
		}
	}

	if ((vif->type == NL80211_IFTYPE_ADHOC) &&
	    sc->nvifs > 0) {
		ath_err(common, "Cannot create ADHOC interface when other"
			" interfaces already exist.\n");
		ret = -EINVAL;
		goto out;
1491
	}
1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505

	ath_dbg(common, ATH_DBG_CONFIG,
		"Attach a VIF of type: %d\n", vif->type);

	/* Set the VIF opmode */
	avp->av_opmode = vif->type;
	avp->av_bslot = -1;

	sc->nvifs++;

	ath9k_do_vif_add_setup(hw, vif);
out:
	mutex_unlock(&sc->mutex);
	return ret;
1506 1507 1508 1509 1510 1511 1512
}

static int ath9k_change_interface(struct ieee80211_hw *hw,
				  struct ieee80211_vif *vif,
				  enum nl80211_iftype new_type,
				  bool p2p)
{
1513
	struct ath_softc *sc = hw->priv;
1514
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1515
	int ret = 0;
1516 1517 1518 1519

	ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
	mutex_lock(&sc->mutex);

1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530
	/* See if new interface type is valid. */
	if ((new_type == NL80211_IFTYPE_ADHOC) &&
	    (sc->nvifs > 1)) {
		ath_err(common, "When using ADHOC, it must be the only"
			" interface.\n");
		ret = -EINVAL;
		goto out;
	}

	if (ath9k_uses_beacons(new_type) &&
	    !ath9k_uses_beacons(vif->type)) {
1531 1532
		if (sc->nbcnvifs >= ATH_BCBUF) {
			ath_err(common, "No beacon slot available\n");
1533 1534
			ret = -ENOBUFS;
			goto out;
1535 1536
		}
	}
1537 1538 1539 1540 1541 1542

	/* Clean up old vif stuff */
	if (ath9k_uses_beacons(vif->type))
		ath9k_reclaim_beacon(sc, vif);

	/* Add new settings */
1543 1544 1545
	vif->type = new_type;
	vif->p2p = p2p;

1546
	ath9k_do_vif_add_setup(hw, vif);
1547
out:
1548
	mutex_unlock(&sc->mutex);
1549
	return ret;
1550 1551
}

1552
static void ath9k_remove_interface(struct ieee80211_hw *hw,
1553
				   struct ieee80211_vif *vif)
1554
{
1555
	struct ath_softc *sc = hw->priv;
1556
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1557

1558
	ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1559

1560 1561
	mutex_lock(&sc->mutex);

1562
	sc->nvifs--;
1563

1564
	/* Reclaim beacon resources */
1565
	if (ath9k_uses_beacons(vif->type))
1566
		ath9k_reclaim_beacon(sc, vif);
1567

1568
	ath9k_calculate_summary_state(hw, NULL);
1569 1570

	mutex_unlock(&sc->mutex);
1571 1572
}

1573
static void ath9k_enable_ps(struct ath_softc *sc)
1574
{
1575 1576
	struct ath_hw *ah = sc->sc_ah;

1577
	sc->ps_enabled = true;
1578 1579 1580 1581
	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
		if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
			ah->imask |= ATH9K_INT_TIM_TIMER;
			ath9k_hw_set_interrupts(ah, ah->imask);
1582
		}
1583
		ath9k_hw_setrxabort(ah, 1);
1584 1585 1586
	}
}

1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606
static void ath9k_disable_ps(struct ath_softc *sc)
{
	struct ath_hw *ah = sc->sc_ah;

	sc->ps_enabled = false;
	ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
		ath9k_hw_setrxabort(ah, 0);
		sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
				  PS_WAIT_FOR_CAB |
				  PS_WAIT_FOR_PSPOLL_DATA |
				  PS_WAIT_FOR_TX_ACK);
		if (ah->imask & ATH9K_INT_TIM_TIMER) {
			ah->imask &= ~ATH9K_INT_TIM_TIMER;
			ath9k_hw_set_interrupts(ah, ah->imask);
		}
	}

}

1607
static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1608
{
1609
	struct ath_softc *sc = hw->priv;
1610 1611
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
1612
	struct ieee80211_conf *conf = &hw->conf;
1613
	bool disable_radio = false;
1614

1615
	mutex_lock(&sc->mutex);
1616

1617 1618 1619 1620 1621 1622
	/*
	 * Leave this as the first check because we need to turn on the
	 * radio if it was disabled before prior to processing the rest
	 * of the changes. Likewise we must only disable the radio towards
	 * the end.
	 */
1623
	if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1624 1625
		sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
		if (!sc->ps_idle) {
1626
			ath_radio_enable(sc, hw);
1627 1628
			ath_dbg(common, ATH_DBG_CONFIG,
				"not-idle: enabling radio\n");
1629 1630
		} else {
			disable_radio = true;
1631 1632 1633
		}
	}

1634 1635 1636 1637 1638 1639
	/*
	 * We just prepare to enable PS. We have to wait until our AP has
	 * ACK'd our null data frame to disable RX otherwise we'll ignore
	 * those ACKs and end up retransmitting the same null data frames.
	 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
	 */
1640
	if (changed & IEEE80211_CONF_CHANGE_PS) {
1641 1642
		unsigned long flags;
		spin_lock_irqsave(&sc->sc_pm_lock, flags);
1643 1644
		if (conf->flags & IEEE80211_CONF_PS)
			ath9k_enable_ps(sc);
1645 1646
		else
			ath9k_disable_ps(sc);
1647
		spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1648 1649
	}

S
Sujith 已提交
1650 1651
	if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
		if (conf->flags & IEEE80211_CONF_MONITOR) {
1652 1653
			ath_dbg(common, ATH_DBG_CONFIG,
				"Monitor mode is enabled\n");
1654 1655
			sc->sc_ah->is_monitoring = true;
		} else {
1656 1657
			ath_dbg(common, ATH_DBG_CONFIG,
				"Monitor mode is disabled\n");
1658
			sc->sc_ah->is_monitoring = false;
S
Sujith 已提交
1659 1660 1661
		}
	}

1662
	if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1663
		struct ieee80211_channel *curchan = hw->conf.channel;
1664
		int pos = curchan->hw_value;
1665 1666 1667 1668 1669
		int old_pos = -1;
		unsigned long flags;

		if (ah->curchan)
			old_pos = ah->curchan - &ah->channels[0];
1670

1671 1672 1673 1674
		if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
			sc->sc_flags |= SC_OP_OFFCHANNEL;
		else
			sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1675

1676 1677 1678
		ath_dbg(common, ATH_DBG_CONFIG,
			"Set channel: %d MHz type: %d\n",
			curchan->center_freq, conf->channel_type);
1679

1680 1681
		ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
					  curchan, conf->channel_type);
1682

1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707
		/* update survey stats for the old channel before switching */
		spin_lock_irqsave(&common->cc_lock, flags);
		ath_update_survey_stats(sc);
		spin_unlock_irqrestore(&common->cc_lock, flags);

		/*
		 * If the operating channel changes, change the survey in-use flags
		 * along with it.
		 * Reset the survey data for the new channel, unless we're switching
		 * back to the operating channel from an off-channel operation.
		 */
		if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
		    sc->cur_survey != &sc->survey[pos]) {

			if (sc->cur_survey)
				sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;

			sc->cur_survey = &sc->survey[pos];

			memset(sc->cur_survey, 0, sizeof(struct survey_info));
			sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
		} else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
			memset(&sc->survey[pos], 0, sizeof(struct survey_info));
		}

1708
		if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1709
			ath_err(common, "Unable to set channel\n");
1710
			mutex_unlock(&sc->mutex);
1711 1712
			return -EINVAL;
		}
1713 1714 1715 1716 1717 1718 1719 1720

		/*
		 * The most recent snapshot of channel->noisefloor for the old
		 * channel is only available after the hardware reset. Copy it to
		 * the survey stats now.
		 */
		if (old_pos >= 0)
			ath_update_survey_nf(sc, old_pos);
1721
	}
1722

1723
	if (changed & IEEE80211_CONF_CHANGE_POWER) {
1724 1725
		ath_dbg(common, ATH_DBG_CONFIG,
			"Set power: %d\n", conf->power_level);
1726
		sc->config.txpowlimit = 2 * conf->power_level;
1727
		ath9k_ps_wakeup(sc);
1728 1729
		ath9k_cmn_update_txpow(ah, sc->curtxpow,
				       sc->config.txpowlimit, &sc->curtxpow);
1730
		ath9k_ps_restore(sc);
1731
	}
1732

1733
	if (disable_radio) {
1734
		ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1735
		ath_radio_disable(sc, hw);
1736 1737
	}

1738
	mutex_unlock(&sc->mutex);
1739

1740 1741 1742
	return 0;
}

1743 1744 1745 1746
#define SUPPORTED_FILTERS			\
	(FIF_PROMISC_IN_BSS |			\
	FIF_ALLMULTI |				\
	FIF_CONTROL |				\
1747
	FIF_PSPOLL |				\
1748 1749
	FIF_OTHER_BSS |				\
	FIF_BCN_PRBRESP_PROMISC |		\
1750
	FIF_PROBE_REQ |				\
1751
	FIF_FCSFAIL)
1752

1753 1754 1755 1756
/* FIXME: sc->sc_full_reset ? */
static void ath9k_configure_filter(struct ieee80211_hw *hw,
				   unsigned int changed_flags,
				   unsigned int *total_flags,
1757
				   u64 multicast)
1758
{
1759
	struct ath_softc *sc = hw->priv;
1760
	u32 rfilt;
1761

1762 1763
	changed_flags &= SUPPORTED_FILTERS;
	*total_flags &= SUPPORTED_FILTERS;
1764

S
Sujith 已提交
1765
	sc->rx.rxfilter = *total_flags;
1766
	ath9k_ps_wakeup(sc);
1767 1768
	rfilt = ath_calcrxfilter(sc);
	ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1769
	ath9k_ps_restore(sc);
1770

1771 1772
	ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
		"Set HW RX filter: 0x%x\n", rfilt);
1773
}
1774

1775 1776 1777
static int ath9k_sta_add(struct ieee80211_hw *hw,
			 struct ieee80211_vif *vif,
			 struct ieee80211_sta *sta)
1778
{
1779
	struct ath_softc *sc = hw->priv;
1780

1781 1782 1783 1784 1785 1786 1787 1788 1789
	ath_node_attach(sc, sta);

	return 0;
}

static int ath9k_sta_remove(struct ieee80211_hw *hw,
			    struct ieee80211_vif *vif,
			    struct ieee80211_sta *sta)
{
1790
	struct ath_softc *sc = hw->priv;
1791 1792 1793 1794

	ath_node_detach(sc, sta);

	return 0;
1795 1796
}

1797
static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1798
			 const struct ieee80211_tx_queue_params *params)
1799
{
1800
	struct ath_softc *sc = hw->priv;
1801
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1802
	struct ath_txq *txq;
1803
	struct ath9k_tx_queue_info qi;
1804
	int ret = 0;
1805

1806 1807
	if (queue >= WME_NUM_AC)
		return 0;
1808

1809 1810
	txq = sc->tx.txq_map[queue];

1811 1812
	mutex_lock(&sc->mutex);

1813 1814
	memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));

1815 1816 1817 1818
	qi.tqi_aifs = params->aifs;
	qi.tqi_cwmin = params->cw_min;
	qi.tqi_cwmax = params->cw_max;
	qi.tqi_burstTime = params->txop;
1819

1820 1821 1822 1823
	ath_dbg(common, ATH_DBG_CONFIG,
		"Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
		queue, txq->axq_qnum, params->aifs, params->cw_min,
		params->cw_max, params->txop);
1824

1825
	ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1826
	if (ret)
1827
		ath_err(common, "TXQ Update failed\n");
1828

1829
	if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1830
		if (queue == WME_AC_BE && !ret)
1831 1832
			ath_beaconq_config(sc);

1833 1834
	mutex_unlock(&sc->mutex);

1835 1836
	return ret;
}
1837

1838 1839
static int ath9k_set_key(struct ieee80211_hw *hw,
			 enum set_key_cmd cmd,
1840 1841
			 struct ieee80211_vif *vif,
			 struct ieee80211_sta *sta,
1842 1843
			 struct ieee80211_key_conf *key)
{
1844
	struct ath_softc *sc = hw->priv;
1845
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1846
	int ret = 0;
1847

1848
	if (ath9k_modparam_nohwcrypt)
1849 1850
		return -ENOSPC;

1851
	mutex_lock(&sc->mutex);
1852
	ath9k_ps_wakeup(sc);
1853
	ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1854

1855 1856
	switch (cmd) {
	case SET_KEY:
1857
		ret = ath_key_config(common, vif, sta, key);
1858 1859
		if (ret >= 0) {
			key->hw_key_idx = ret;
1860 1861
			/* push IV and Michael MIC generation to stack */
			key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1862
			if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1863
				key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1864 1865
			if (sc->sc_ah->sw_mgmt_crypto &&
			    key->cipher == WLAN_CIPHER_SUITE_CCMP)
1866
				key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1867
			ret = 0;
1868 1869 1870
		}
		break;
	case DISABLE_KEY:
1871
		ath_key_delete(common, key);
1872 1873 1874 1875
		break;
	default:
		ret = -EINVAL;
	}
1876

1877
	ath9k_ps_restore(sc);
1878 1879
	mutex_unlock(&sc->mutex);

1880 1881
	return ret;
}
1882

1883 1884 1885 1886 1887
static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
				   struct ieee80211_vif *vif,
				   struct ieee80211_bss_conf *bss_conf,
				   u32 changed)
{
1888
	struct ath_softc *sc = hw->priv;
1889
	struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
1890
	struct ath_hw *ah = sc->sc_ah;
1891
	struct ath_common *common = ath9k_hw_common(ah);
1892
	struct ath_vif *avp = (void *)vif->drv_priv;
1893
	int slottime;
1894
	int error;
1895

1896 1897
	mutex_lock(&sc->mutex);

1898 1899 1900 1901
	if (changed & BSS_CHANGED_BSSID) {
		/* Set BSSID */
		memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
		memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1902
		common->curaid = 0;
1903
		ath9k_hw_write_associd(ah);
1904

1905 1906
		/* Set aggregation protection mode parameters */
		sc->config.ath_aggr_prot = 0;
1907

1908 1909
		ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
			common->curbssid, common->curaid);
1910

1911 1912 1913
		/* need to reconfigure the beacon */
		sc->sc_flags &= ~SC_OP_BEACONS ;
	}
1914

1915 1916 1917
	/* Enable transmission of beacons (AP, IBSS, MESH) */
	if ((changed & BSS_CHANGED_BEACON) ||
	    ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1918
		ath9k_set_beaconing_status(sc, false);
1919
		error = ath_beacon_alloc(sc, vif);
1920 1921
		if (!error)
			ath_beacon_config(sc, vif);
1922
		ath9k_set_beaconing_status(sc, true);
1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941
	}

	if (changed & BSS_CHANGED_ERP_SLOT) {
		if (bss_conf->use_short_slot)
			slottime = 9;
		else
			slottime = 20;
		if (vif->type == NL80211_IFTYPE_AP) {
			/*
			 * Defer update, so that connected stations can adjust
			 * their settings at the same time.
			 * See beacon.c for more details
			 */
			sc->beacon.slottime = slottime;
			sc->beacon.updateslot = UPDATE;
		} else {
			ah->slottime = slottime;
			ath9k_hw_init_global_settings(ah);
		}
1942 1943
	}

1944
	/* Disable transmission of beacons */
1945 1946 1947 1948 1949 1950
	if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
	    !bss_conf->enable_beacon) {
		ath9k_set_beaconing_status(sc, false);
		avp->is_bslot_active = false;
		ath9k_set_beaconing_status(sc, true);
	}
1951

1952
	if (changed & BSS_CHANGED_BEACON_INT) {
1953
		cur_conf->beacon_interval = bss_conf->beacon_int;
1954 1955 1956 1957 1958 1959
		/*
		 * In case of AP mode, the HW TSF has to be reset
		 * when the beacon interval changes.
		 */
		if (vif->type == NL80211_IFTYPE_AP) {
			sc->sc_flags |= SC_OP_TSF_RESET;
1960
			ath9k_set_beaconing_status(sc, false);
1961
			error = ath_beacon_alloc(sc, vif);
1962 1963
			if (!error)
				ath_beacon_config(sc, vif);
1964
			ath9k_set_beaconing_status(sc, true);
1965 1966
		} else {
			ath_beacon_config(sc, vif);
1967 1968 1969
		}
	}

1970
	if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1971 1972
		ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
			bss_conf->use_short_preamble);
1973 1974 1975 1976 1977
		if (bss_conf->use_short_preamble)
			sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
		else
			sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
	}
1978

1979
	if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1980 1981
		ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
			bss_conf->use_cts_prot);
1982 1983 1984 1985 1986 1987
		if (bss_conf->use_cts_prot &&
		    hw->conf.channel->band != IEEE80211_BAND_5GHZ)
			sc->sc_flags |= SC_OP_PROTECT_ENABLE;
		else
			sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
	}
1988

1989
	if (changed & BSS_CHANGED_ASSOC) {
1990
		ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1991
			bss_conf->assoc);
1992
		ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1993
	}
1994 1995

	mutex_unlock(&sc->mutex);
1996
}
1997

1998 1999
static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
{
2000
	struct ath_softc *sc = hw->priv;
2001
	u64 tsf;
2002

2003
	mutex_lock(&sc->mutex);
2004
	ath9k_ps_wakeup(sc);
2005
	tsf = ath9k_hw_gettsf64(sc->sc_ah);
2006
	ath9k_ps_restore(sc);
2007
	mutex_unlock(&sc->mutex);
2008

2009 2010
	return tsf;
}
2011

2012 2013
static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
{
2014
	struct ath_softc *sc = hw->priv;
2015

2016
	mutex_lock(&sc->mutex);
2017
	ath9k_ps_wakeup(sc);
2018
	ath9k_hw_settsf64(sc->sc_ah, tsf);
2019
	ath9k_ps_restore(sc);
2020
	mutex_unlock(&sc->mutex);
2021 2022
}

2023 2024
static void ath9k_reset_tsf(struct ieee80211_hw *hw)
{
2025
	struct ath_softc *sc = hw->priv;
2026

2027
	mutex_lock(&sc->mutex);
2028 2029

	ath9k_ps_wakeup(sc);
2030
	ath9k_hw_reset_tsf(sc->sc_ah);
2031 2032
	ath9k_ps_restore(sc);

2033
	mutex_unlock(&sc->mutex);
2034
}
2035

2036
static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2037
			      struct ieee80211_vif *vif,
2038 2039
			      enum ieee80211_ampdu_mlme_action action,
			      struct ieee80211_sta *sta,
2040
			      u16 tid, u16 *ssn, u8 buf_size)
2041
{
2042
	struct ath_softc *sc = hw->priv;
2043
	int ret = 0;
2044

2045 2046
	local_bh_disable();

2047 2048
	switch (action) {
	case IEEE80211_AMPDU_RX_START:
2049 2050
		if (!(sc->sc_flags & SC_OP_RXAGGR))
			ret = -ENOTSUPP;
2051 2052 2053 2054
		break;
	case IEEE80211_AMPDU_RX_STOP:
		break;
	case IEEE80211_AMPDU_TX_START:
2055 2056 2057
		if (!(sc->sc_flags & SC_OP_TXAGGR))
			return -EOPNOTSUPP;

2058
		ath9k_ps_wakeup(sc);
2059 2060 2061
		ret = ath_tx_aggr_start(sc, sta, tid, ssn);
		if (!ret)
			ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2062
		ath9k_ps_restore(sc);
2063 2064
		break;
	case IEEE80211_AMPDU_TX_STOP:
2065
		ath9k_ps_wakeup(sc);
S
Sujith 已提交
2066
		ath_tx_aggr_stop(sc, sta, tid);
2067
		ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2068
		ath9k_ps_restore(sc);
2069
		break;
2070
	case IEEE80211_AMPDU_TX_OPERATIONAL:
2071
		ath9k_ps_wakeup(sc);
2072
		ath_tx_aggr_resume(sc, sta, tid);
2073
		ath9k_ps_restore(sc);
2074
		break;
2075
	default:
2076
		ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2077 2078
	}

2079 2080
	local_bh_enable();

2081
	return ret;
2082 2083
}

2084 2085 2086
static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
			     struct survey_info *survey)
{
2087
	struct ath_softc *sc = hw->priv;
2088
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2089
	struct ieee80211_supported_band *sband;
2090 2091 2092 2093 2094 2095 2096
	struct ieee80211_channel *chan;
	unsigned long flags;
	int pos;

	spin_lock_irqsave(&common->cc_lock, flags);
	if (idx == 0)
		ath_update_survey_stats(sc);
2097 2098 2099 2100 2101 2102

	sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
	if (sband && idx >= sband->n_channels) {
		idx -= sband->n_channels;
		sband = NULL;
	}
2103

2104 2105
	if (!sband)
		sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2106

2107 2108 2109
	if (!sband || idx >= sband->n_channels) {
		spin_unlock_irqrestore(&common->cc_lock, flags);
		return -ENOENT;
2110
	}
2111

2112 2113 2114 2115 2116 2117
	chan = &sband->channels[idx];
	pos = chan->hw_value;
	memcpy(survey, &sc->survey[pos], sizeof(*survey));
	survey->channel = chan;
	spin_unlock_irqrestore(&common->cc_lock, flags);

2118 2119 2120
	return 0;
}

2121 2122
static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
{
2123
	struct ath_softc *sc = hw->priv;
2124 2125 2126 2127 2128 2129 2130 2131
	struct ath_hw *ah = sc->sc_ah;

	mutex_lock(&sc->mutex);
	ah->coverage_class = coverage_class;
	ath9k_hw_init_global_settings(ah);
	mutex_unlock(&sc->mutex);
}

2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185
static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
{
#define ATH_FLUSH_TIMEOUT	60 /* ms */
	struct ath_softc *sc = hw->priv;
	struct ath_txq *txq;
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
	int i, j, npend = 0;

	mutex_lock(&sc->mutex);

	cancel_delayed_work_sync(&sc->tx_complete_work);

	for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
		if (!ATH_TXQ_SETUP(sc, i))
			continue;
		txq = &sc->tx.txq[i];

		if (!drop) {
			for (j = 0; j < ATH_FLUSH_TIMEOUT; j++) {
				if (!ath9k_has_pending_frames(sc, txq))
					break;
				usleep_range(1000, 2000);
			}
		}

		if (drop || ath9k_has_pending_frames(sc, txq)) {
			ath_dbg(common, ATH_DBG_QUEUE, "Drop frames from hw queue:%d\n",
				txq->axq_qnum);
			spin_lock_bh(&txq->axq_lock);
			txq->txq_flush_inprogress = true;
			spin_unlock_bh(&txq->axq_lock);

			ath9k_ps_wakeup(sc);
			ath9k_hw_stoptxdma(ah, txq->axq_qnum);
			npend = ath9k_hw_numtxpending(ah, txq->axq_qnum);
			ath9k_ps_restore(sc);
			if (npend)
				break;

			ath_draintxq(sc, txq, false);
			txq->txq_flush_inprogress = false;
		}
	}

	if (npend) {
		ath_reset(sc, false);
		txq->txq_flush_inprogress = false;
	}

	ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
	mutex_unlock(&sc->mutex);
}

2186
struct ieee80211_ops ath9k_ops = {
2187 2188 2189 2190
	.tx 		    = ath9k_tx,
	.start 		    = ath9k_start,
	.stop 		    = ath9k_stop,
	.add_interface 	    = ath9k_add_interface,
2191
	.change_interface   = ath9k_change_interface,
2192 2193 2194
	.remove_interface   = ath9k_remove_interface,
	.config 	    = ath9k_config,
	.configure_filter   = ath9k_configure_filter,
2195 2196
	.sta_add	    = ath9k_sta_add,
	.sta_remove	    = ath9k_sta_remove,
2197 2198 2199 2200
	.conf_tx 	    = ath9k_conf_tx,
	.bss_info_changed   = ath9k_bss_info_changed,
	.set_key            = ath9k_set_key,
	.get_tsf 	    = ath9k_get_tsf,
2201
	.set_tsf 	    = ath9k_set_tsf,
2202
	.reset_tsf 	    = ath9k_reset_tsf,
2203
	.ampdu_action       = ath9k_ampdu_action,
2204
	.get_survey	    = ath9k_get_survey,
2205
	.rfkill_poll        = ath9k_rfkill_poll_state,
2206
	.set_coverage_class = ath9k_set_coverage_class,
2207
	.flush		    = ath9k_flush,
2208
};
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