hda_intel.c 77.5 KB
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/*
 *
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 *  hda_intel.c - Implementation of primary alsa driver code base
 *                for Intel HD Audio.
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 *
 *  Copyright(c) 2004 Intel Corporation. All rights reserved.
 *
 *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
 *                     PeiSen Hou <pshou@realtek.com.tw>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License as published by the Free
 *  Software Foundation; either version 2 of the License, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 *  more details.
 *
 *  You should have received a copy of the GNU General Public License along with
 *  this program; if not, write to the Free Software Foundation, Inc., 59
 *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 *
 *  CONTACTS:
 *
 *  Matt Jared		matt.jared@intel.com
 *  Andy Kopp		andy.kopp@intel.com
 *  Dan Kogan		dan.d.kogan@intel.com
 *
 *  CHANGES:
 *
 *  2004.12.01	Major rewrite by tiwai, merged the work of pshou
 * 
 */

#include <linux/delay.h>
#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/dma-mapping.h>
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#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/pci.h>
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#include <linux/mutex.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/clocksource.h>
#include <linux/time.h>
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#include <linux/completion.h>
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#ifdef CONFIG_X86
/* for snoop control */
#include <asm/pgtable.h>
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#include <asm/set_memory.h>
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#include <asm/cpufeature.h>
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#endif
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#include <sound/core.h>
#include <sound/initval.h>
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#include <sound/hdaudio.h>
#include <sound/hda_i915.h>
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#include <linux/vgaarb.h>
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#include <linux/vga_switcheroo.h>
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#include <linux/firmware.h>
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#include "hda_codec.h"
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#include "hda_controller.h"
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#include "hda_intel.h"
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#define CREATE_TRACE_POINTS
#include "hda_intel_trace.h"

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/* position fix mode */
enum {
	POS_FIX_AUTO,
	POS_FIX_LPIB,
	POS_FIX_POSBUF,
	POS_FIX_VIACOMBO,
	POS_FIX_COMBO,
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	POS_FIX_SKL,
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};

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/* Defines for ATI HD Audio support in SB450 south bridge */
#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
#define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02

/* Defines for Nvidia HDA support */
#define NVIDIA_HDA_TRANSREG_ADDR      0x4e
#define NVIDIA_HDA_ENABLE_COHBITS     0x0f
#define NVIDIA_HDA_ISTRM_COH          0x4d
#define NVIDIA_HDA_OSTRM_COH          0x4c
#define NVIDIA_HDA_ENABLE_COHBIT      0x01

/* Defines for Intel SCH HDA snoop control */
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#define INTEL_HDA_CGCTL	 0x48
#define INTEL_HDA_CGCTL_MISCBDCGE        (0x1 << 6)
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#define INTEL_SCH_HDA_DEVC      0x78
#define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)

/* Define IN stream 0 FIFO size offset in VIA controller */
#define VIA_IN_STREAM0_FIFO_SIZE_OFFSET	0x90
/* Define VIA HD Audio Device ID*/
#define VIA_HDAC_DEVICE_ID		0x3288

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/* max number of SDs */
/* ICH, ATI and VIA have 4 playback and 4 capture */
#define ICH6_NUM_CAPTURE	4
#define ICH6_NUM_PLAYBACK	4

/* ULI has 6 playback and 5 capture */
#define ULI_NUM_CAPTURE		5
#define ULI_NUM_PLAYBACK	6

/* ATI HDMI may have up to 8 playbacks and 0 capture */
#define ATIHDMI_NUM_CAPTURE	0
#define ATIHDMI_NUM_PLAYBACK	8

/* TERA has 4 playback and 3 capture */
#define TERA_NUM_CAPTURE	3
#define TERA_NUM_PLAYBACK	4

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static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
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static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
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static char *model[SNDRV_CARDS];
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static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
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static int probe_only[SNDRV_CARDS];
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static int jackpoll_ms[SNDRV_CARDS];
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static int single_cmd = -1;
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static int enable_msi = -1;
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#ifdef CONFIG_SND_HDA_PATCH_LOADER
static char *patch[SNDRV_CARDS];
#endif
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#ifdef CONFIG_SND_HDA_INPUT_BEEP
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static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
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					CONFIG_SND_HDA_INPUT_BEEP_MODE};
#endif
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module_param_array(index, int, NULL, 0444);
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MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
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module_param_array(id, charp, NULL, 0444);
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MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
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module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
module_param_array(model, charp, NULL, 0444);
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MODULE_PARM_DESC(model, "Use the given board model.");
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module_param_array(position_fix, int, NULL, 0444);
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MODULE_PARM_DESC(position_fix, "DMA pointer read method."
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		 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO, 5 = SKL+).");
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module_param_array(bdl_pos_adj, int, NULL, 0644);
MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
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module_param_array(probe_mask, int, NULL, 0444);
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MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
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module_param_array(probe_only, int, NULL, 0444);
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MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
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module_param_array(jackpoll_ms, int, NULL, 0444);
MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
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module_param(single_cmd, bint, 0444);
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MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
		 "(for debugging only).");
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module_param(enable_msi, bint, 0444);
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MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
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#ifdef CONFIG_SND_HDA_PATCH_LOADER
module_param_array(patch, charp, NULL, 0444);
MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
#endif
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#ifdef CONFIG_SND_HDA_INPUT_BEEP
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module_param_array(beep_mode, bool, NULL, 0444);
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MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
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			    "(0=off, 1=on) (default=1).");
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#endif
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#ifdef CONFIG_PM
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static int param_set_xint(const char *val, const struct kernel_param *kp);
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static const struct kernel_param_ops param_ops_xint = {
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	.set = param_set_xint,
	.get = param_get_int,
};
#define param_check_xint param_check_int

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static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
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module_param(power_save, xint, 0644);
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MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
		 "(in second, 0 = disable).");
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static bool pm_blacklist = true;
module_param(pm_blacklist, bool, 0644);
MODULE_PARM_DESC(pm_blacklist, "Enable power-management blacklist");

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/* reset the HD-audio controller in power save mode.
 * this may give more power-saving, but will take longer time to
 * wake up.
 */
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static bool power_save_controller = 1;
module_param(power_save_controller, bool, 0644);
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MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
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#else
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#define power_save	0
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#endif /* CONFIG_PM */
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static int align_buffer_size = -1;
module_param(align_buffer_size, bint, 0644);
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MODULE_PARM_DESC(align_buffer_size,
		"Force buffer and period sizes to be multiple of 128 bytes.");

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#ifdef CONFIG_X86
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static int hda_snoop = -1;
module_param_named(snoop, hda_snoop, bint, 0444);
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MODULE_PARM_DESC(snoop, "Enable/disable snooping");
#else
#define hda_snoop		true
#endif


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MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
			 "{Intel, ICH6M},"
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			 "{Intel, ICH7},"
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			 "{Intel, ESB2},"
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			 "{Intel, ICH8},"
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			 "{Intel, ICH9},"
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			 "{Intel, ICH10},"
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			 "{Intel, PCH},"
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			 "{Intel, CPT},"
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			 "{Intel, PPT},"
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			 "{Intel, LPT},"
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			 "{Intel, LPT_LP},"
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			 "{Intel, WPT_LP},"
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			 "{Intel, SPT},"
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			 "{Intel, SPT_LP},"
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			 "{Intel, HPT},"
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			 "{Intel, PBG},"
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			 "{Intel, SCH},"
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			 "{ATI, SB450},"
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			 "{ATI, SB600},"
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			 "{ATI, RS600},"
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			 "{ATI, RS690},"
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			 "{ATI, RS780},"
			 "{ATI, R600},"
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			 "{ATI, RV630},"
			 "{ATI, RV610},"
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			 "{ATI, RV670},"
			 "{ATI, RV635},"
			 "{ATI, RV620},"
			 "{ATI, RV770},"
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			 "{VIA, VT8251},"
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			 "{VIA, VT8237A},"
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			 "{SiS, SIS966},"
			 "{ULI, M5461}}");
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MODULE_DESCRIPTION("Intel HDA driver");

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#if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
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#if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
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#define SUPPORT_VGA_SWITCHEROO
#endif
#endif


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/*
 */

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/* driver types */
enum {
	AZX_DRIVER_ICH,
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	AZX_DRIVER_PCH,
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	AZX_DRIVER_SCH,
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	AZX_DRIVER_SKL,
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	AZX_DRIVER_HDMI,
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	AZX_DRIVER_ATI,
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	AZX_DRIVER_ATIHDMI,
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	AZX_DRIVER_ATIHDMI_NS,
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	AZX_DRIVER_VIA,
	AZX_DRIVER_SIS,
	AZX_DRIVER_ULI,
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	AZX_DRIVER_NVIDIA,
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	AZX_DRIVER_TERA,
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	AZX_DRIVER_CTX,
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	AZX_DRIVER_CTHDA,
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	AZX_DRIVER_CMEDIA,
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	AZX_DRIVER_GENERIC,
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	AZX_NUM_DRIVERS, /* keep this as last entry */
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};

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#define azx_get_snoop_type(chip) \
	(((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
#define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)

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/* quirks for old Intel chipsets */
#define AZX_DCAPS_INTEL_ICH \
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	(AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
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/* quirks for Intel PCH */
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#define AZX_DCAPS_INTEL_PCH_BASE \
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	(AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
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	 AZX_DCAPS_SNOOP_TYPE(SCH))
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/* PCH up to IVB; no runtime PM; bind with i915 gfx */
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#define AZX_DCAPS_INTEL_PCH_NOPM \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT)
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/* PCH for HSW/BDW; with runtime PM */
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/* no i915 binding for this as HSW/BDW has another controller for HDMI */
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#define AZX_DCAPS_INTEL_PCH \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
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/* HSW HDMI */
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#define AZX_DCAPS_INTEL_HASWELL \
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	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
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	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
	 AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
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/* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
#define AZX_DCAPS_INTEL_BROADWELL \
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	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
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	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
	 AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
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#define AZX_DCAPS_INTEL_BAYTRAIL \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT |\
	 AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_BRASWELL \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
	 AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_SKYLAKE \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
	 AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
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	 AZX_DCAPS_I915_POWERWELL)
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#define AZX_DCAPS_INTEL_BROXTON \
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	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
	 AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
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	 AZX_DCAPS_I915_POWERWELL)

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/* quirks for ATI SB / AMD Hudson */
#define AZX_DCAPS_PRESET_ATI_SB \
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	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
	 AZX_DCAPS_SNOOP_TYPE(ATI))
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/* quirks for ATI/AMD HDMI */
#define AZX_DCAPS_PRESET_ATI_HDMI \
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	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
	 AZX_DCAPS_NO_MSI64)
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/* quirks for ATI HDMI with snoop off */
#define AZX_DCAPS_PRESET_ATI_HDMI_NS \
	(AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)

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/* quirks for Nvidia */
#define AZX_DCAPS_PRESET_NVIDIA \
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	(AZX_DCAPS_NO_MSI | AZX_DCAPS_CORBRP_SELF_CLEAR |\
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	 AZX_DCAPS_SNOOP_TYPE(NVIDIA))
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#define AZX_DCAPS_PRESET_CTHDA \
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	(AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
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	 AZX_DCAPS_NO_64BIT |\
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	 AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
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/*
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 * vga_switcheroo support
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 */
#ifdef SUPPORT_VGA_SWITCHEROO
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#define use_vga_switcheroo(chip)	((chip)->use_vga_switcheroo)
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#define needs_eld_notify_link(chip)	((chip)->need_eld_notify_link)
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#else
#define use_vga_switcheroo(chip)	0
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#define needs_eld_notify_link(chip)	false
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#endif

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#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
					((pci)->device == 0x0c0c) || \
					((pci)->device == 0x0d0c) || \
					((pci)->device == 0x160c))

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#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
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#define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
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static char *driver_short_names[] = {
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	[AZX_DRIVER_ICH] = "HDA Intel",
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	[AZX_DRIVER_PCH] = "HDA Intel PCH",
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	[AZX_DRIVER_SCH] = "HDA Intel MID",
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	[AZX_DRIVER_SKL] = "HDA Intel PCH", /* kept old name for compatibility */
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	[AZX_DRIVER_HDMI] = "HDA Intel HDMI",
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	[AZX_DRIVER_ATI] = "HDA ATI SB",
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	[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
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	[AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
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	[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
	[AZX_DRIVER_SIS] = "HDA SIS966",
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	[AZX_DRIVER_ULI] = "HDA ULI M5461",
	[AZX_DRIVER_NVIDIA] = "HDA NVidia",
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	[AZX_DRIVER_TERA] = "HDA Teradici", 
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	[AZX_DRIVER_CTX] = "HDA Creative", 
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	[AZX_DRIVER_CTHDA] = "HDA Creative",
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	[AZX_DRIVER_CMEDIA] = "HDA C-Media",
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	[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
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};

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#ifdef CONFIG_X86
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static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
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{
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	int pages;

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	if (azx_snoop(chip))
		return;
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	if (!dmab || !dmab->area || !dmab->bytes)
		return;

#ifdef CONFIG_SND_DMA_SGBUF
	if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
		struct snd_sg_buf *sgbuf = dmab->private_data;
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		if (!chip->uc_buffer)
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			return; /* deal with only CORB/RIRB buffers */
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		if (on)
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			set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
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		else
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			set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
		return;
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	}
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#endif

	pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
	if (on)
		set_memory_wc((unsigned long)dmab->area, pages);
	else
		set_memory_wb((unsigned long)dmab->area, pages);
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}

static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
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	__mark_pages_wc(chip, buf, on);
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}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
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				   struct snd_pcm_substream *substream, bool on)
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{
	if (azx_dev->wc_marked != on) {
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		__mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
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		azx_dev->wc_marked = on;
	}
}
#else
/* NOP for other archs */
static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
				 bool on)
{
}
static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
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				   struct snd_pcm_substream *substream, bool on)
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{
}
#endif

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static int azx_acquire_irq(struct azx *chip, int do_disconnect);
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static void set_default_power_save(struct azx *chip);
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/*
 * initialize the PCI registers
 */
/* update bits in a PCI register byte */
static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
			    unsigned char mask, unsigned char val)
{
	unsigned char data;

	pci_read_config_byte(pci, reg, &data);
	data &= ~mask;
	data |= (val & mask);
	pci_write_config_byte(pci, reg, data);
}

static void azx_init_pci(struct azx *chip)
{
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	int snoop_type = azx_get_snoop_type(chip);

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	/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
	 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
	 * Ensuring these bits are 0 clears playback static on some HD Audio
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	 * codecs.
	 * The PCI register TCSEL is defined in the Intel manuals.
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	 */
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	if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
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		dev_dbg(chip->card->dev, "Clearing TCSEL\n");
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		update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
488
	}
489

490 491 492
	/* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
	 * we need to enable snoop.
	 */
493
	if (snoop_type == AZX_SNOOP_TYPE_ATI) {
494 495
		dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
			azx_snoop(chip));
496
		update_pci_byte(chip->pci,
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Takashi Iwai 已提交
497 498
				ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
				azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
499 500 501
	}

	/* For NVIDIA HDA, enable snoop */
502
	if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
503 504
		dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
			azx_snoop(chip));
505 506 507
		update_pci_byte(chip->pci,
				NVIDIA_HDA_TRANSREG_ADDR,
				0x0f, NVIDIA_HDA_ENABLE_COHBITS);
508 509 510 511 512 513
		update_pci_byte(chip->pci,
				NVIDIA_HDA_ISTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
		update_pci_byte(chip->pci,
				NVIDIA_HDA_OSTRM_COH,
				0x01, NVIDIA_HDA_ENABLE_COHBIT);
514 515 516
	}

	/* Enable SCH/PCH snoop if needed */
517
	if (snoop_type == AZX_SNOOP_TYPE_SCH) {
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518
		unsigned short snoop;
T
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519
		pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
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520 521 522 523 524 525
		if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
		    (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
			snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
			if (!azx_snoop(chip))
				snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
			pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
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Takashi Iwai 已提交
526 527 528
			pci_read_config_word(chip->pci,
				INTEL_SCH_HDA_DEVC, &snoop);
		}
529 530 531
		dev_dbg(chip->card->dev, "SCH snoop: %s\n",
			(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
			"Disabled" : "Enabled");
V
Vinod G 已提交
532
        }
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533 534
}

535 536 537 538 539 540 541 542 543 544 545
/*
 * In BXT-P A0, HD-Audio DMA requests is later than expected,
 * and makes an audio stream sensitive to system latencies when
 * 24/32 bits are playing.
 * Adjusting threshold of DMA fifo to force the DMA request
 * sooner to improve latency tolerance at the expense of power.
 */
static void bxt_reduce_dma_latency(struct azx *chip)
{
	u32 val;

546
	val = azx_readl(chip, VS_EM4L);
547
	val &= (0x3 << 20);
548
	azx_writel(chip, VS_EM4L, val);
549 550
}

551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642
/*
 * ML_LCAP bits:
 *  bit 0: 6 MHz Supported
 *  bit 1: 12 MHz Supported
 *  bit 2: 24 MHz Supported
 *  bit 3: 48 MHz Supported
 *  bit 4: 96 MHz Supported
 *  bit 5: 192 MHz Supported
 */
static int intel_get_lctl_scf(struct azx *chip)
{
	struct hdac_bus *bus = azx_bus(chip);
	static int preferred_bits[] = { 2, 3, 1, 4, 5 };
	u32 val, t;
	int i;

	val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCAP);

	for (i = 0; i < ARRAY_SIZE(preferred_bits); i++) {
		t = preferred_bits[i];
		if (val & (1 << t))
			return t;
	}

	dev_warn(chip->card->dev, "set audio clock frequency to 6MHz");
	return 0;
}

static int intel_ml_lctl_set_power(struct azx *chip, int state)
{
	struct hdac_bus *bus = azx_bus(chip);
	u32 val;
	int timeout;

	/*
	 * the codecs are sharing the first link setting by default
	 * If other links are enabled for stream, they need similar fix
	 */
	val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
	val &= ~AZX_MLCTL_SPA;
	val |= state << AZX_MLCTL_SPA_SHIFT;
	writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
	/* wait for CPA */
	timeout = 50;
	while (timeout) {
		if (((readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL)) &
		    AZX_MLCTL_CPA) == (state << AZX_MLCTL_CPA_SHIFT))
			return 0;
		timeout--;
		udelay(10);
	}

	return -1;
}

static void intel_init_lctl(struct azx *chip)
{
	struct hdac_bus *bus = azx_bus(chip);
	u32 val;
	int ret;

	/* 0. check lctl register value is correct or not */
	val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
	/* if SCF is already set, let's use it */
	if ((val & ML_LCTL_SCF_MASK) != 0)
		return;

	/*
	 * Before operating on SPA, CPA must match SPA.
	 * Any deviation may result in undefined behavior.
	 */
	if (((val & AZX_MLCTL_SPA) >> AZX_MLCTL_SPA_SHIFT) !=
		((val & AZX_MLCTL_CPA) >> AZX_MLCTL_CPA_SHIFT))
		return;

	/* 1. turn link down: set SPA to 0 and wait CPA to 0 */
	ret = intel_ml_lctl_set_power(chip, 0);
	udelay(100);
	if (ret)
		goto set_spa;

	/* 2. update SCF to select a properly audio clock*/
	val &= ~ML_LCTL_SCF_MASK;
	val |= intel_get_lctl_scf(chip);
	writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);

set_spa:
	/* 4. turn link up: set SPA to 1 and wait CPA to 1 */
	intel_ml_lctl_set_power(chip, 1);
	udelay(100);
}

643 644
static void hda_intel_init_chip(struct azx *chip, bool full_reset)
{
645
	struct hdac_bus *bus = azx_bus(chip);
646
	struct pci_dev *pci = chip->pci;
647
	u32 val;
648 649

	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
650
		snd_hdac_set_codec_wakeup(bus, true);
651
	if (chip->driver_type == AZX_DRIVER_SKL) {
652 653 654 655
		pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
		val = val & ~INTEL_HDA_CGCTL_MISCBDCGE;
		pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
	}
656
	azx_init_chip(chip, full_reset);
657
	if (chip->driver_type == AZX_DRIVER_SKL) {
658 659 660 661
		pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
		val = val | INTEL_HDA_CGCTL_MISCBDCGE;
		pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
	}
662
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
663
		snd_hdac_set_codec_wakeup(bus, false);
664 665

	/* reduce dma latency to avoid noise */
666
	if (IS_BXT(pci))
667
		bxt_reduce_dma_latency(chip);
668 669 670

	if (bus->mlcap != NULL)
		intel_init_lctl(chip);
671 672
}

673 674 675 676
/* calculate runtime delay from LPIB */
static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
				   unsigned int pos)
{
677
	struct snd_pcm_substream *substream = azx_dev->core.substream;
678 679 680 681 682 683 684 685 686
	int stream = substream->stream;
	unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
	int delay;

	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
		delay = pos - lpib_pos;
	else
		delay = lpib_pos - pos;
	if (delay < 0) {
687
		if (delay >= azx_dev->core.delay_negative_threshold)
688 689
			delay = 0;
		else
690
			delay += azx_dev->core.bufsize;
691 692
	}

693
	if (delay >= azx_dev->core.period_bytes) {
694 695
		dev_info(chip->card->dev,
			 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
696
			 delay, azx_dev->core.period_bytes);
697 698 699 700 701 702 703 704
		delay = 0;
		chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
		chip->get_delay[stream] = NULL;
	}

	return bytes_to_frames(substream->runtime, delay);
}

705 706
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);

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707 708 709
/* called from IRQ */
static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
{
710
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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711 712 713 714 715 716
	int ok;

	ok = azx_position_ok(chip, azx_dev);
	if (ok == 1) {
		azx_dev->irq_pending = 0;
		return ok;
717
	} else if (ok == 0) {
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Dylan Reid 已提交
718 719
		/* bogus IRQ, process it later */
		azx_dev->irq_pending = 1;
720
		schedule_work(&hda->irq_pending_work);
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721 722 723 724
	}
	return 0;
}

725 726 727
/* Enable/disable i915 display power for the link */
static int azx_intel_link_power(struct azx *chip, bool enable)
{
728
	struct hdac_bus *bus = azx_bus(chip);
729

730
	return snd_hdac_display_power(bus, enable);
731 732
}

733 734 735 736 737 738 739 740 741 742 743
/*
 * Check whether the current DMA position is acceptable for updating
 * periods.  Returns non-zero if it's OK.
 *
 * Many HD-audio controllers appear pretty inaccurate about
 * the update-IRQ timing.  The IRQ is issued before actually the
 * data is processed.  So, we need to process it afterwords in a
 * workqueue.
 */
static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
{
744
	struct snd_pcm_substream *substream = azx_dev->core.substream;
745
	int stream = substream->stream;
746
	u32 wallclk;
747 748
	unsigned int pos;

749 750
	wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
	if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
751 752
		return -1;	/* bogus (too early) interrupt */

753 754 755 756 757 758 759 760
	if (chip->get_position[stream])
		pos = chip->get_position[stream](chip, azx_dev);
	else { /* use the position buffer as default */
		pos = azx_get_pos_posbuf(chip, azx_dev);
		if (!pos || pos == (u32)-1) {
			dev_info(chip->card->dev,
				 "Invalid position buffer, using LPIB read method instead.\n");
			chip->get_position[stream] = azx_get_pos_lpib;
761 762 763
			if (chip->get_position[0] == azx_get_pos_lpib &&
			    chip->get_position[1] == azx_get_pos_lpib)
				azx_bus(chip)->use_posbuf = false;
764 765 766 767 768 769 770 771 772
			pos = azx_get_pos_lpib(chip, azx_dev);
			chip->get_delay[stream] = NULL;
		} else {
			chip->get_position[stream] = azx_get_pos_posbuf;
			if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
				chip->get_delay[stream] = azx_get_delay_from_lpib;
		}
	}

773
	if (pos >= azx_dev->core.bufsize)
774
		pos = 0;
775

776
	if (WARN_ONCE(!azx_dev->core.period_bytes,
777
		      "hda-intel: zero azx_dev->period_bytes"))
778
		return -1; /* this shouldn't happen! */
779 780
	if (wallclk < (azx_dev->core.period_wallclk * 5) / 4 &&
	    pos % azx_dev->core.period_bytes > azx_dev->core.period_bytes / 2)
781
		/* NG - it's below the first next period boundary */
782
		return chip->bdl_pos_adj ? 0 : -1;
783
	azx_dev->core.start_wallclk += wallclk;
784 785 786 787 788 789 790 791
	return 1; /* OK, it's fine */
}

/*
 * The work for pending PCM period updates.
 */
static void azx_irq_pending_work(struct work_struct *work)
{
792 793
	struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
	struct azx *chip = &hda->chip;
794 795 796
	struct hdac_bus *bus = azx_bus(chip);
	struct hdac_stream *s;
	int pending, ok;
797

798
	if (!hda->irq_pending_warned) {
799 800 801
		dev_info(chip->card->dev,
			 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
			 chip->card->number);
802
		hda->irq_pending_warned = 1;
803 804
	}

805 806
	for (;;) {
		pending = 0;
807
		spin_lock_irq(&bus->reg_lock);
808 809
		list_for_each_entry(s, &bus->stream_list, list) {
			struct azx_dev *azx_dev = stream_to_azx_dev(s);
810
			if (!azx_dev->irq_pending ||
811 812
			    !s->substream ||
			    !s->running)
813
				continue;
814 815
			ok = azx_position_ok(chip, azx_dev);
			if (ok > 0) {
816
				azx_dev->irq_pending = 0;
817
				spin_unlock(&bus->reg_lock);
818
				snd_pcm_period_elapsed(s->substream);
819
				spin_lock(&bus->reg_lock);
820 821
			} else if (ok < 0) {
				pending = 0;	/* too early */
822 823 824
			} else
				pending++;
		}
825
		spin_unlock_irq(&bus->reg_lock);
826 827
		if (!pending)
			return;
828
		msleep(1);
829 830 831 832 833 834
	}
}

/* clear irq_pending flags and assure no on-going workq */
static void azx_clear_irq_pending(struct azx *chip)
{
835 836
	struct hdac_bus *bus = azx_bus(chip);
	struct hdac_stream *s;
837

838
	spin_lock_irq(&bus->reg_lock);
839 840 841 842
	list_for_each_entry(s, &bus->stream_list, list) {
		struct azx_dev *azx_dev = stream_to_azx_dev(s);
		azx_dev->irq_pending = 0;
	}
843
	spin_unlock_irq(&bus->reg_lock);
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Linus Torvalds 已提交
844 845
}

846 847
static int azx_acquire_irq(struct azx *chip, int do_disconnect)
{
848 849
	struct hdac_bus *bus = azx_bus(chip);

850 851
	if (request_irq(chip->pci->irq, azx_interrupt,
			chip->msi ? 0 : IRQF_SHARED,
852
			chip->card->irq_descr, chip)) {
853 854 855
		dev_err(chip->card->dev,
			"unable to grab IRQ %d, disabling device\n",
			chip->pci->irq);
856 857 858 859
		if (do_disconnect)
			snd_card_disconnect(chip->card);
		return -1;
	}
860
	bus->irq = chip->pci->irq;
861
	pci_intx(chip->pci, !chip->msi);
862 863 864
	return 0;
}

865 866 867 868 869 870 871 872
/* get the current DMA position with correction on VIA chips */
static unsigned int azx_via_get_position(struct azx *chip,
					 struct azx_dev *azx_dev)
{
	unsigned int link_pos, mini_pos, bound_pos;
	unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
	unsigned int fifo_size;

873
	link_pos = snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
874
	if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
875 876 877 878 879 880 881 882
		/* Playback, no problem using link position */
		return link_pos;
	}

	/* Capture */
	/* For new chipset,
	 * use mod to get the DMA position just like old chipset
	 */
883 884
	mod_dma_pos = le32_to_cpu(*azx_dev->core.posbuf);
	mod_dma_pos %= azx_dev->core.period_bytes;
885 886 887 888

	/* azx_dev->fifo_size can't get FIFO size of in stream.
	 * Get from base address + offset.
	 */
889 890
	fifo_size = readw(azx_bus(chip)->remap_addr +
			  VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
891 892 893 894 895 896 897 898 899 900

	if (azx_dev->insufficient) {
		/* Link position never gather than FIFO size */
		if (link_pos <= fifo_size)
			return 0;

		azx_dev->insufficient = 0;
	}

	if (link_pos <= fifo_size)
901
		mini_pos = azx_dev->core.bufsize + link_pos - fifo_size;
902 903 904 905
	else
		mini_pos = link_pos - fifo_size;

	/* Find nearest previous boudary */
906 907
	mod_mini_pos = mini_pos % azx_dev->core.period_bytes;
	mod_link_pos = link_pos % azx_dev->core.period_bytes;
908 909 910 911 912
	if (mod_link_pos >= fifo_size)
		bound_pos = link_pos - mod_link_pos;
	else if (mod_dma_pos >= mod_mini_pos)
		bound_pos = mini_pos - mod_mini_pos;
	else {
913 914
		bound_pos = mini_pos - mod_mini_pos + azx_dev->core.period_bytes;
		if (bound_pos >= azx_dev->core.bufsize)
915 916 917 918 919 920 921
			bound_pos = 0;
	}

	/* Calculate real DMA position we want */
	return bound_pos + mod_dma_pos;
}

922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946
static unsigned int azx_skl_get_dpib_pos(struct azx *chip,
					 struct azx_dev *azx_dev)
{
	return _snd_hdac_chip_readl(azx_bus(chip),
				    AZX_REG_VS_SDXDPIB_XBASE +
				    (AZX_REG_VS_SDXDPIB_XINTERVAL *
				     azx_dev->core.index));
}

/* get the current DMA position with correction on SKL+ chips */
static unsigned int azx_get_pos_skl(struct azx *chip, struct azx_dev *azx_dev)
{
	/* DPIB register gives a more accurate position for playback */
	if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
		return azx_skl_get_dpib_pos(chip, azx_dev);

	/* For capture, we need to read posbuf, but it requires a delay
	 * for the possible boundary overlap; the read of DPIB fetches the
	 * actual posbuf
	 */
	udelay(20);
	azx_skl_get_dpib_pos(chip, azx_dev);
	return azx_get_pos_posbuf(chip, azx_dev);
}

947
#ifdef CONFIG_PM
948 949 950 951 952
static DEFINE_MUTEX(card_list_lock);
static LIST_HEAD(card_list);

static void azx_add_card_list(struct azx *chip)
{
953
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
954
	mutex_lock(&card_list_lock);
955
	list_add(&hda->list, &card_list);
956 957 958 959 960
	mutex_unlock(&card_list_lock);
}

static void azx_del_card_list(struct azx *chip)
{
961
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
962
	mutex_lock(&card_list_lock);
963
	list_del_init(&hda->list);
964 965 966 967 968 969
	mutex_unlock(&card_list_lock);
}

/* trigger power-save check at writing parameter */
static int param_set_xint(const char *val, const struct kernel_param *kp)
{
970
	struct hda_intel *hda;
971 972 973 974 975 976 977 978
	struct azx *chip;
	int prev = power_save;
	int ret = param_set_int(val, kp);

	if (ret || prev == power_save)
		return ret;

	mutex_lock(&card_list_lock);
979 980
	list_for_each_entry(hda, &card_list, list) {
		chip = &hda->chip;
981
		if (!hda->probe_continued || chip->disabled)
982
			continue;
983
		snd_hda_set_power_save(&chip->bus, power_save * 1000);
984 985 986 987 988 989 990
	}
	mutex_unlock(&card_list_lock);
	return 0;
}
#else
#define azx_add_card_list(chip) /* NOP */
#define azx_del_card_list(chip) /* NOP */
991
#endif /* CONFIG_PM */
992

993
#ifdef CONFIG_PM_SLEEP
994 995 996
/*
 * power management
 */
997
static int azx_suspend(struct device *dev)
L
Linus Torvalds 已提交
998
{
999
	struct snd_card *card = dev_get_drvdata(dev);
1000 1001
	struct azx *chip;
	struct hda_intel *hda;
1002
	struct hdac_bus *bus;
L
Linus Torvalds 已提交
1003

1004 1005 1006 1007 1008
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1009
	if (chip->disabled || hda->init_failed || !chip->running)
1010 1011
		return 0;

1012
	bus = azx_bus(chip);
T
Takashi Iwai 已提交
1013
	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1014
	azx_clear_irq_pending(chip);
1015
	azx_stop_chip(chip);
1016
	azx_enter_link_reset(chip);
1017 1018 1019
	if (bus->irq >= 0) {
		free_irq(bus->irq, chip);
		bus->irq = -1;
1020
	}
1021

1022
	if (chip->msi)
1023
		pci_disable_msi(chip->pci);
1024
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1025
		&& hda->need_i915_power)
1026
		snd_hdac_display_power(bus, false);
L
Libin Yang 已提交
1027 1028

	trace_azx_suspend(chip);
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Linus Torvalds 已提交
1029 1030 1031
	return 0;
}

1032
static int azx_resume(struct device *dev)
L
Linus Torvalds 已提交
1033
{
1034 1035
	struct pci_dev *pci = to_pci_dev(dev);
	struct snd_card *card = dev_get_drvdata(dev);
1036 1037
	struct azx *chip;
	struct hda_intel *hda;
1038
	struct hdac_bus *bus;
1039 1040 1041

	if (!card)
		return 0;
L
Linus Torvalds 已提交
1042

1043 1044
	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1045
	bus = azx_bus(chip);
1046
	if (chip->disabled || hda->init_failed || !chip->running)
1047 1048
		return 0;

1049 1050 1051 1052
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
		snd_hdac_display_power(bus, true);
		if (hda->need_i915_power)
			snd_hdac_i915_set_bclk(bus);
1053
	}
1054

1055 1056 1057 1058
	if (chip->msi)
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
	if (azx_acquire_irq(chip, 1) < 0)
1059
		return -EIO;
1060
	azx_init_pci(chip);
1061

1062
	hda_intel_init_chip(chip, true);
1063

1064 1065 1066 1067 1068
	/* power down again for link-controlled chips */
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
	    !hda->need_i915_power)
		snd_hdac_display_power(bus, false);

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Takashi Iwai 已提交
1069
	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
L
Libin Yang 已提交
1070 1071

	trace_azx_resume(chip);
L
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1072 1073
	return 0;
}
1074

1075 1076 1077 1078 1079
/* put codec down to D3 at hibernation for Intel SKL+;
 * otherwise BIOS may still access the codec and screw up the driver
 */
static int azx_freeze_noirq(struct device *dev)
{
1080 1081
	struct snd_card *card = dev_get_drvdata(dev);
	struct azx *chip = card->private_data;
1082 1083
	struct pci_dev *pci = to_pci_dev(dev);

1084
	if (chip->driver_type == AZX_DRIVER_SKL)
1085 1086 1087 1088 1089 1090 1091
		pci_set_power_state(pci, PCI_D3hot);

	return 0;
}

static int azx_thaw_noirq(struct device *dev)
{
1092 1093
	struct snd_card *card = dev_get_drvdata(dev);
	struct azx *chip = card->private_data;
1094 1095
	struct pci_dev *pci = to_pci_dev(dev);

1096
	if (chip->driver_type == AZX_DRIVER_SKL)
1097 1098 1099 1100 1101 1102
		pci_set_power_state(pci, PCI_D0);

	return 0;
}
#endif /* CONFIG_PM_SLEEP */

1103
#ifdef CONFIG_PM
1104 1105 1106
static int azx_runtime_suspend(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1107 1108
	struct azx *chip;
	struct hda_intel *hda;
1109

1110 1111 1112 1113 1114
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1115
	if (chip->disabled || hda->init_failed)
1116 1117
		return 0;

1118
	if (!azx_has_pm_runtime(chip))
1119 1120
		return 0;

1121 1122 1123 1124
	/* enable controller wake up event */
	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
		  STATESTS_INT_MASK);

1125
	azx_stop_chip(chip);
1126
	azx_enter_link_reset(chip);
1127
	azx_clear_irq_pending(chip);
1128
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1129
		&& hda->need_i915_power)
1130
		snd_hdac_display_power(azx_bus(chip), false);
1131

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Libin Yang 已提交
1132
	trace_azx_runtime_suspend(chip);
1133 1134 1135 1136 1137 1138
	return 0;
}

static int azx_runtime_resume(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1139 1140
	struct azx *chip;
	struct hda_intel *hda;
1141
	struct hdac_bus *bus;
1142 1143
	struct hda_codec *codec;
	int status;
1144

1145 1146 1147 1148 1149
	if (!card)
		return 0;

	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1150
	bus = azx_bus(chip);
1151
	if (chip->disabled || hda->init_failed)
1152 1153
		return 0;

1154
	if (!azx_has_pm_runtime(chip))
1155 1156
		return 0;

1157
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1158 1159
		snd_hdac_display_power(bus, true);
		if (hda->need_i915_power)
1160
			snd_hdac_i915_set_bclk(bus);
1161
	}
1162 1163 1164 1165

	/* Read STATESTS before controller reset */
	status = azx_readw(chip, STATESTS);

1166
	azx_init_pci(chip);
1167
	hda_intel_init_chip(chip, true);
1168

1169 1170
	if (status) {
		list_for_each_codec(codec, &chip->bus)
1171
			if (status & (1 << codec->addr))
1172 1173
				schedule_delayed_work(&codec->jackpoll_work,
						      codec->jackpoll_interval);
1174 1175 1176 1177 1178 1179
	}

	/* disable controller Wake Up event*/
	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
			~STATESTS_INT_MASK);

1180 1181 1182 1183 1184
	/* power down again for link-controlled chips */
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
	    !hda->need_i915_power)
		snd_hdac_display_power(bus, false);

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Libin Yang 已提交
1185
	trace_azx_runtime_resume(chip);
1186 1187
	return 0;
}
1188 1189 1190 1191

static int azx_runtime_idle(struct device *dev)
{
	struct snd_card *card = dev_get_drvdata(dev);
1192 1193 1194 1195 1196
	struct azx *chip;
	struct hda_intel *hda;

	if (!card)
		return 0;
1197

1198 1199
	chip = card->private_data;
	hda = container_of(chip, struct hda_intel, chip);
1200
	if (chip->disabled || hda->init_failed)
1201 1202
		return 0;

1203
	if (!power_save_controller || !azx_has_pm_runtime(chip) ||
1204
	    azx_bus(chip)->codec_powered || !chip->running)
1205 1206
		return -EBUSY;

1207 1208 1209 1210
	/* ELD notification gets broken when HD-audio bus is off */
	if (needs_eld_notify_link(hda))
		return -EBUSY;

1211 1212 1213
	return 0;
}

1214 1215
static const struct dev_pm_ops azx_pm = {
	SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
1216 1217 1218 1219
#ifdef CONFIG_PM_SLEEP
	.freeze_noirq = azx_freeze_noirq,
	.thaw_noirq = azx_thaw_noirq,
#endif
1220
	SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
1221 1222
};

1223 1224 1225
#define AZX_PM_OPS	&azx_pm
#else
#define AZX_PM_OPS	NULL
1226
#endif /* CONFIG_PM */
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Linus Torvalds 已提交
1227 1228


1229
static int azx_probe_continue(struct azx *chip);
1230

1231
#ifdef SUPPORT_VGA_SWITCHEROO
1232
static struct pci_dev *get_bound_vga(struct pci_dev *pci);
1233 1234 1235 1236 1237 1238

static void azx_vs_set_state(struct pci_dev *pci,
			     enum vga_switcheroo_state state)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
1239
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1240
	struct hda_codec *codec;
1241 1242
	bool disabled;

1243 1244
	wait_for_completion(&hda->probe_wait);
	if (hda->init_failed)
1245 1246 1247 1248 1249 1250
		return;

	disabled = (state == VGA_SWITCHEROO_OFF);
	if (chip->disabled == disabled)
		return;

1251
	if (!hda->probe_continued) {
1252 1253
		chip->disabled = disabled;
		if (!disabled) {
1254 1255
			dev_info(chip->card->dev,
				 "Start delayed initialization\n");
1256
			if (azx_probe_continue(chip) < 0) {
1257
				dev_err(chip->card->dev, "initialization error\n");
1258
				hda->init_failed = true;
1259 1260 1261
			}
		}
	} else {
1262
		dev_info(chip->card->dev, "%s via vga_switcheroo\n",
1263
			 disabled ? "Disabling" : "Enabling");
1264
		if (disabled) {
1265 1266 1267 1268 1269 1270
			list_for_each_codec(codec, &chip->bus) {
				pm_runtime_suspend(hda_codec_dev(codec));
				pm_runtime_disable(hda_codec_dev(codec));
			}
			pm_runtime_suspend(card->dev);
			pm_runtime_disable(card->dev);
1271
			/* when we get suspended by vga_switcheroo we end up in D3cold,
1272 1273 1274
			 * however we have no ACPI handle, so pci/acpi can't put us there,
			 * put ourselves there */
			pci->current_state = PCI_D3cold;
1275
			chip->disabled = true;
1276
			if (snd_hda_lock_devices(&chip->bus))
1277 1278
				dev_warn(chip->card->dev,
					 "Cannot lock devices!\n");
1279
		} else {
1280
			snd_hda_unlock_devices(&chip->bus);
1281
			chip->disabled = false;
1282 1283 1284 1285 1286
			pm_runtime_enable(card->dev);
			list_for_each_codec(codec, &chip->bus) {
				pm_runtime_enable(hda_codec_dev(codec));
				pm_runtime_resume(hda_codec_dev(codec));
			}
1287 1288 1289 1290 1291 1292 1293 1294
		}
	}
}

static bool azx_vs_can_switch(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
1295
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1296

1297 1298
	wait_for_completion(&hda->probe_wait);
	if (hda->init_failed)
1299
		return false;
1300
	if (chip->disabled || !hda->probe_continued)
1301
		return true;
1302
	if (snd_hda_lock_devices(&chip->bus))
1303
		return false;
1304
	snd_hda_unlock_devices(&chip->bus);
1305 1306 1307
	return true;
}

1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337
/*
 * The discrete GPU cannot power down unless the HDA controller runtime
 * suspends, so activate runtime PM on codecs even if power_save == 0.
 */
static void setup_vga_switcheroo_runtime_pm(struct azx *chip)
{
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
	struct hda_codec *codec;

	if (hda->use_vga_switcheroo && !hda->need_eld_notify_link) {
		list_for_each_codec(codec, &chip->bus)
			codec->auto_runtime_pm = 1;
		/* reset the power save setup */
		if (chip->running)
			set_default_power_save(chip);
	}
}

static void azx_vs_gpu_bound(struct pci_dev *pci,
			     enum vga_switcheroo_client_id client_id)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip = card->private_data;
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);

	if (client_id == VGA_SWITCHEROO_DIS)
		hda->need_eld_notify_link = 0;
	setup_vga_switcheroo_runtime_pm(chip);
}

1338
static void init_vga_switcheroo(struct azx *chip)
1339
{
1340
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1341 1342
	struct pci_dev *p = get_bound_vga(chip->pci);
	if (p) {
1343
		dev_info(chip->card->dev,
1344
			 "Handle vga_switcheroo audio client\n");
1345
		hda->use_vga_switcheroo = 1;
1346
		hda->need_eld_notify_link = 1; /* cleared in gpu_bound op */
1347
		chip->driver_caps |= AZX_DCAPS_PM_RUNTIME;
1348 1349 1350 1351 1352 1353 1354
		pci_dev_put(p);
	}
}

static const struct vga_switcheroo_client_ops azx_vs_ops = {
	.set_gpu_state = azx_vs_set_state,
	.can_switch = azx_vs_can_switch,
1355
	.gpu_bound = azx_vs_gpu_bound,
1356 1357
};

1358
static int register_vga_switcheroo(struct azx *chip)
1359
{
1360
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1361
	struct pci_dev *p;
1362 1363
	int err;

1364
	if (!hda->use_vga_switcheroo)
1365
		return 0;
1366 1367 1368 1369 1370

	p = get_bound_vga(chip->pci);
	err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops, p);
	pci_dev_put(p);

1371 1372
	if (err < 0)
		return err;
1373
	hda->vga_switcheroo_registered = 1;
1374

1375
	return 0;
1376 1377 1378 1379
}
#else
#define init_vga_switcheroo(chip)		/* NOP */
#define register_vga_switcheroo(chip)		0
1380
#define check_hdmi_disabled(pci)	false
1381
#define setup_vga_switcheroo_runtime_pm(chip)	/* NOP */
1382 1383
#endif /* SUPPORT_VGA_SWITCHER */

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Linus Torvalds 已提交
1384 1385 1386
/*
 * destructor
 */
1387
static int azx_free(struct azx *chip)
L
Linus Torvalds 已提交
1388
{
W
Wang Xingchao 已提交
1389
	struct pci_dev *pci = chip->pci;
1390
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1391
	struct hdac_bus *bus = azx_bus(chip);
T
Takashi Iwai 已提交
1392

1393
	if (azx_has_pm_runtime(chip) && chip->running)
W
Wang Xingchao 已提交
1394
		pm_runtime_get_noresume(&pci->dev);
1395
	chip->running = 0;
W
Wang Xingchao 已提交
1396

1397 1398
	azx_del_card_list(chip);

1399 1400
	hda->init_failed = 1; /* to be sure */
	complete_all(&hda->probe_wait);
1401

1402
	if (use_vga_switcheroo(hda)) {
1403 1404
		if (chip->disabled && hda->probe_continued)
			snd_hda_unlock_devices(&chip->bus);
1405
		if (hda->vga_switcheroo_registered)
1406
			vga_switcheroo_unregister_client(chip->pci);
1407 1408
	}

1409
	if (bus->chip_init) {
1410
		azx_clear_irq_pending(chip);
1411
		azx_stop_all_streams(chip);
1412
		azx_stop_chip(chip);
L
Linus Torvalds 已提交
1413 1414
	}

1415 1416
	if (bus->irq >= 0)
		free_irq(bus->irq, (void*)chip);
1417
	if (chip->msi)
1418
		pci_disable_msi(chip->pci);
1419
	iounmap(bus->remap_addr);
L
Linus Torvalds 已提交
1420

1421
	azx_free_stream_pages(chip);
1422 1423 1424
	azx_free_streams(chip);
	snd_hdac_bus_exit(bus);

1425 1426
	if (chip->region_requested)
		pci_release_regions(chip->pci);
1427

L
Linus Torvalds 已提交
1428
	pci_disable_device(chip->pci);
1429
#ifdef CONFIG_SND_HDA_PATCH_LOADER
1430
	release_firmware(chip->fw);
1431
#endif
1432

1433
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1434
		if (hda->need_i915_power)
1435
			snd_hdac_display_power(bus, false);
1436
	}
1437
	if (chip->driver_caps & AZX_DCAPS_I915_COMPONENT)
1438
		snd_hdac_i915_exit(bus);
1439
	kfree(hda);
L
Linus Torvalds 已提交
1440 1441 1442 1443

	return 0;
}

1444 1445 1446 1447 1448 1449 1450 1451
static int azx_dev_disconnect(struct snd_device *device)
{
	struct azx *chip = device->device_data;

	chip->bus.shutdown = 1;
	return 0;
}

1452
static int azx_dev_free(struct snd_device *device)
L
Linus Torvalds 已提交
1453 1454 1455 1456
{
	return azx_free(device->device_data);
}

1457
#ifdef SUPPORT_VGA_SWITCHEROO
1458
/*
1459
 * Check of disabled HDMI controller by vga_switcheroo
1460
 */
1461
static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473
{
	struct pci_dev *p;

	/* check only discrete GPU */
	switch (pci->vendor) {
	case PCI_VENDOR_ID_ATI:
	case PCI_VENDOR_ID_AMD:
	case PCI_VENDOR_ID_NVIDIA:
		if (pci->devfn == 1) {
			p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
							pci->bus->number, 0);
			if (p) {
1474
				if ((p->class >> 16) == PCI_BASE_CLASS_DISPLAY)
1475 1476 1477 1478 1479 1480 1481 1482 1483
					return p;
				pci_dev_put(p);
			}
		}
		break;
	}
	return NULL;
}

1484
static bool check_hdmi_disabled(struct pci_dev *pci)
1485 1486 1487 1488 1489
{
	bool vga_inactive = false;
	struct pci_dev *p = get_bound_vga(pci);

	if (p) {
1490
		if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1491 1492 1493 1494 1495
			vga_inactive = true;
		pci_dev_put(p);
	}
	return vga_inactive;
}
1496
#endif /* SUPPORT_VGA_SWITCHEROO */
1497

1498 1499 1500
/*
 * white/black-listing for position_fix
 */
1501
static struct snd_pci_quirk position_fix_list[] = {
T
Takashi Iwai 已提交
1502 1503
	SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
	SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1504
	SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
T
Takashi Iwai 已提交
1505
	SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1506
	SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
D
Daniel T Chen 已提交
1507
	SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1508
	SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1509
	SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1510
	SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1511
	SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1512
	SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1513
	SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1514
	SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1515
	SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1516 1517 1518
	{}
};

1519
static int check_position_fix(struct azx *chip, int fix)
1520 1521 1522
{
	const struct snd_pci_quirk *q;

1523
	switch (fix) {
1524
	case POS_FIX_AUTO:
1525 1526
	case POS_FIX_LPIB:
	case POS_FIX_POSBUF:
1527
	case POS_FIX_VIACOMBO:
1528
	case POS_FIX_COMBO:
1529
	case POS_FIX_SKL:
1530 1531 1532 1533 1534
		return fix;
	}

	q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
	if (q) {
1535 1536 1537
		dev_info(chip->card->dev,
			 "position_fix set to %d for device %04x:%04x\n",
			 q->value, q->subvendor, q->subdevice);
1538
		return q->value;
1539
	}
1540 1541

	/* Check VIA/ATI HD Audio Controller exist */
1542
	if (chip->driver_type == AZX_DRIVER_VIA) {
1543
		dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1544
		return POS_FIX_VIACOMBO;
1545 1546
	}
	if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1547
		dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1548
		return POS_FIX_LPIB;
1549
	}
1550
	if (chip->driver_type == AZX_DRIVER_SKL) {
1551 1552 1553
		dev_dbg(chip->card->dev, "Using SKL position fix\n");
		return POS_FIX_SKL;
	}
1554
	return POS_FIX_AUTO;
1555 1556
}

1557 1558 1559 1560 1561 1562 1563 1564
static void assign_position_fix(struct azx *chip, int fix)
{
	static azx_get_pos_callback_t callbacks[] = {
		[POS_FIX_AUTO] = NULL,
		[POS_FIX_LPIB] = azx_get_pos_lpib,
		[POS_FIX_POSBUF] = azx_get_pos_posbuf,
		[POS_FIX_VIACOMBO] = azx_via_get_position,
		[POS_FIX_COMBO] = azx_get_pos_lpib,
1565
		[POS_FIX_SKL] = azx_get_pos_skl,
1566 1567 1568 1569 1570 1571 1572 1573
	};

	chip->get_position[0] = chip->get_position[1] = callbacks[fix];

	/* combo mode uses LPIB only for playback */
	if (fix == POS_FIX_COMBO)
		chip->get_position[1] = NULL;

1574
	if ((fix == POS_FIX_POSBUF || fix == POS_FIX_SKL) &&
1575 1576 1577 1578 1579 1580 1581
	    (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
		chip->get_delay[0] = chip->get_delay[1] =
			azx_get_delay_from_lpib;
	}

}

1582 1583 1584
/*
 * black-lists for probe_mask
 */
1585
static struct snd_pci_quirk probe_mask_list[] = {
1586 1587 1588 1589 1590 1591
	/* Thinkpad often breaks the controller communication when accessing
	 * to the non-working (or non-existing) modem codec slot.
	 */
	SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
	SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1592 1593
	/* broken BIOS */
	SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1594 1595
	/* including bogus ALC268 in slot#2 that conflicts with ALC888 */
	SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1596
	/* forced codec slots */
1597
	SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1598
	SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1599 1600
	/* WinFast VP200 H (Teradici) user reported broken communication */
	SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1601 1602 1603
	{}
};

1604 1605
#define AZX_FORCE_CODEC_MASK	0x100

1606
static void check_probe_mask(struct azx *chip, int dev)
1607 1608 1609
{
	const struct snd_pci_quirk *q;

1610 1611
	chip->codec_probe_mask = probe_mask[dev];
	if (chip->codec_probe_mask == -1) {
1612 1613
		q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
		if (q) {
1614 1615 1616
			dev_info(chip->card->dev,
				 "probe_mask set to 0x%x for device %04x:%04x\n",
				 q->value, q->subvendor, q->subdevice);
1617
			chip->codec_probe_mask = q->value;
1618 1619
		}
	}
1620 1621 1622 1623

	/* check forced option */
	if (chip->codec_probe_mask != -1 &&
	    (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1624
		azx_bus(chip)->codec_mask = chip->codec_probe_mask & 0xff;
1625
		dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1626
			 (int)azx_bus(chip)->codec_mask);
1627
	}
1628 1629
}

1630
/*
T
Takashi Iwai 已提交
1631
 * white/black-list for enable_msi
1632
 */
1633
static struct snd_pci_quirk msi_black_list[] = {
1634 1635 1636 1637
	SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
	SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
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Takashi Iwai 已提交
1638
	SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1639
	SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1640
	SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1641
	SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1642
	SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1643
	SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1644 1645 1646
	{}
};

1647
static void check_msi(struct azx *chip)
1648 1649 1650
{
	const struct snd_pci_quirk *q;

T
Takashi Iwai 已提交
1651 1652
	if (enable_msi >= 0) {
		chip->msi = !!enable_msi;
1653
		return;
T
Takashi Iwai 已提交
1654 1655 1656
	}
	chip->msi = 1;	/* enable MSI as default */
	q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1657
	if (q) {
1658 1659 1660
		dev_info(chip->card->dev,
			 "msi for device %04x:%04x set to %d\n",
			 q->subvendor, q->subdevice, q->value);
1661
		chip->msi = q->value;
1662 1663 1664 1665
		return;
	}

	/* NVidia chipsets seem to cause troubles with MSI */
1666
	if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1667
		dev_info(chip->card->dev, "Disabling MSI\n");
1668
		chip->msi = 0;
1669 1670 1671
	}
}

1672
/* check the snoop mode availability */
1673
static void azx_check_snoop_available(struct azx *chip)
1674
{
1675
	int snoop = hda_snoop;
1676

1677 1678 1679 1680
	if (snoop >= 0) {
		dev_info(chip->card->dev, "Force to %s mode by module option\n",
			 snoop ? "snoop" : "non-snoop");
		chip->snoop = snoop;
1681
		chip->uc_buffer = !snoop;
1682 1683 1684 1685
		return;
	}

	snoop = true;
1686 1687
	if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
	    chip->driver_type == AZX_DRIVER_VIA) {
1688 1689 1690
		/* force to non-snoop mode for a new VIA controller
		 * when BIOS is set
		 */
1691 1692
		u8 val;
		pci_read_config_byte(chip->pci, 0x42, &val);
1693 1694
		if (!(val & 0x80) && (chip->pci->revision == 0x30 ||
				      chip->pci->revision == 0x20))
1695
			snoop = false;
1696 1697
	}

1698 1699 1700
	if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
		snoop = false;

1701
	chip->snoop = snoop;
1702
	if (!snoop) {
1703
		dev_info(chip->card->dev, "Force to non-snoop mode\n");
1704 1705 1706 1707
		/* C-Media requires non-cached pages only for CORB/RIRB */
		if (chip->driver_type != AZX_DRIVER_CMEDIA)
			chip->uc_buffer = true;
	}
1708
}
1709

1710 1711
static void azx_probe_work(struct work_struct *work)
{
1712 1713
	struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
	azx_probe_continue(&hda->chip);
1714 1715
}

1716 1717
static int default_bdl_pos_adj(struct azx *chip)
{
1718 1719 1720 1721 1722 1723 1724 1725 1726
	/* some exceptions: Atoms seem problematic with value 1 */
	if (chip->pci->vendor == PCI_VENDOR_ID_INTEL) {
		switch (chip->pci->device) {
		case 0x0f04: /* Baytrail */
		case 0x2284: /* Braswell */
			return 32;
		}
	}

1727 1728 1729 1730 1731 1732 1733 1734 1735
	switch (chip->driver_type) {
	case AZX_DRIVER_ICH:
	case AZX_DRIVER_PCH:
		return 1;
	default:
		return 32;
	}
}

L
Linus Torvalds 已提交
1736 1737 1738
/*
 * constructor
 */
1739 1740 1741
static const struct hdac_io_ops pci_hda_io_ops;
static const struct hda_controller_ops pci_hda_ops;

1742 1743 1744
static int azx_create(struct snd_card *card, struct pci_dev *pci,
		      int dev, unsigned int driver_caps,
		      struct azx **rchip)
L
Linus Torvalds 已提交
1745
{
1746
	static struct snd_device_ops ops = {
1747
		.dev_disconnect = azx_dev_disconnect,
L
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1748 1749
		.dev_free = azx_dev_free,
	};
1750
	struct hda_intel *hda;
1751 1752
	struct azx *chip;
	int err;
L
Linus Torvalds 已提交
1753 1754

	*rchip = NULL;
1755

1756 1757
	err = pci_enable_device(pci);
	if (err < 0)
L
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1758 1759
		return err;

1760 1761
	hda = kzalloc(sizeof(*hda), GFP_KERNEL);
	if (!hda) {
L
Linus Torvalds 已提交
1762 1763 1764 1765
		pci_disable_device(pci);
		return -ENOMEM;
	}

1766
	chip = &hda->chip;
1767
	mutex_init(&chip->open_mutex);
L
Linus Torvalds 已提交
1768 1769
	chip->card = card;
	chip->pci = pci;
1770
	chip->ops = &pci_hda_ops;
1771 1772
	chip->driver_caps = driver_caps;
	chip->driver_type = driver_caps & 0xff;
1773
	check_msi(chip);
1774
	chip->dev_index = dev;
1775
	chip->jackpoll_ms = jackpoll_ms;
1776
	INIT_LIST_HEAD(&chip->pcm_list);
1777 1778
	INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
	INIT_LIST_HEAD(&hda->list);
1779
	init_vga_switcheroo(chip);
1780
	init_completion(&hda->probe_wait);
L
Linus Torvalds 已提交
1781

1782
	assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1783

1784
	check_probe_mask(chip, dev);
1785

1786 1787 1788 1789 1790
	if (single_cmd < 0) /* allow fallback to single_cmd at errors */
		chip->fallback_to_single_cmd = 1;
	else /* explicitly set to single_cmd or not */
		chip->single_cmd = single_cmd;

1791
	azx_check_snoop_available(chip);
1792

1793 1794 1795 1796
	if (bdl_pos_adj[dev] < 0)
		chip->bdl_pos_adj = default_bdl_pos_adj(chip);
	else
		chip->bdl_pos_adj = bdl_pos_adj[dev];
1797

1798 1799 1800 1801
	/* Workaround for a communication error on CFL (bko#199007) */
	if (IS_CFL(pci))
		chip->polling_mode = 1;

1802 1803 1804 1805 1806 1807 1808
	err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
	if (err < 0) {
		kfree(hda);
		pci_disable_device(pci);
		return err;
	}

1809 1810 1811 1812 1813
	if (chip->driver_type == AZX_DRIVER_NVIDIA) {
		dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
		chip->bus.needs_damn_long_delay = 1;
	}

1814 1815
	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
	if (err < 0) {
1816
		dev_err(card->dev, "Error creating device [card]!\n");
1817 1818 1819 1820
		azx_free(chip);
		return err;
	}

1821
	/* continue probing in work context as may trigger request module */
1822
	INIT_WORK(&hda->probe_work, azx_probe_work);
1823

1824
	*rchip = chip;
1825

1826 1827 1828
	return 0;
}

1829
static int azx_first_init(struct azx *chip)
1830 1831 1832 1833
{
	int dev = chip->dev_index;
	struct pci_dev *pci = chip->pci;
	struct snd_card *card = chip->card;
1834
	struct hdac_bus *bus = azx_bus(chip);
1835
	int err;
1836
	unsigned short gcap;
1837
	unsigned int dma_bits = 64;
1838

1839 1840 1841 1842 1843 1844 1845 1846 1847 1848
#if BITS_PER_LONG != 64
	/* Fix up base address on ULI M5461 */
	if (chip->driver_type == AZX_DRIVER_ULI) {
		u16 tmp3;
		pci_read_config_word(pci, 0x40, &tmp3);
		pci_write_config_word(pci, 0x40, tmp3 | 0x10);
		pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
	}
#endif

1849
	err = pci_request_regions(pci, "ICH HD audio");
1850
	if (err < 0)
L
Linus Torvalds 已提交
1851
		return err;
1852
	chip->region_requested = 1;
L
Linus Torvalds 已提交
1853

1854 1855 1856
	bus->addr = pci_resource_start(pci, 0);
	bus->remap_addr = pci_ioremap_bar(pci, 0);
	if (bus->remap_addr == NULL) {
1857
		dev_err(card->dev, "ioremap error\n");
1858
		return -ENXIO;
L
Linus Torvalds 已提交
1859 1860
	}

1861
	if (chip->driver_type == AZX_DRIVER_SKL)
1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876
		snd_hdac_bus_parse_capabilities(bus);

	/*
	 * Some Intel CPUs has always running timer (ART) feature and
	 * controller may have Global time sync reporting capability, so
	 * check both of these before declaring synchronized time reporting
	 * capability SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME
	 */
	chip->gts_present = false;

#ifdef CONFIG_X86
	if (bus->ppcap && boot_cpu_has(X86_FEATURE_ART))
		chip->gts_present = true;
#endif

1877 1878 1879 1880 1881
	if (chip->msi) {
		if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
			dev_dbg(card->dev, "Disabling 64bit MSI\n");
			pci->no_64bit_msi = true;
		}
1882 1883
		if (pci_enable_msi(pci) < 0)
			chip->msi = 0;
1884
	}
1885

1886 1887
	if (azx_acquire_irq(chip, 0) < 0)
		return -EBUSY;
L
Linus Torvalds 已提交
1888 1889

	pci_set_master(pci);
1890
	synchronize_irq(bus->irq);
L
Linus Torvalds 已提交
1891

1892
	gcap = azx_readw(chip, GCAP);
1893
	dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1894

1895 1896 1897 1898
	/* AMD devices support 40 or 48bit DMA, take the safe one */
	if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
		dma_bits = 40;

1899
	/* disable SB600 64bit support for safety */
1900
	if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1901
		struct pci_dev *p_smbus;
1902
		dma_bits = 40;
1903 1904 1905 1906 1907
		p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
					 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
					 NULL);
		if (p_smbus) {
			if (p_smbus->revision < 0x30)
T
Takashi Iwai 已提交
1908
				gcap &= ~AZX_GCAP_64OK;
1909 1910 1911
			pci_dev_put(p_smbus);
		}
	}
1912

1913 1914 1915 1916
	/* NVidia hardware normally only supports up to 40 bits of DMA */
	if (chip->pci->vendor == PCI_VENDOR_ID_NVIDIA)
		dma_bits = 40;

1917 1918
	/* disable 64bit DMA address on some devices */
	if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1919
		dev_dbg(card->dev, "Disabling 64bit DMA\n");
T
Takashi Iwai 已提交
1920
		gcap &= ~AZX_GCAP_64OK;
1921
	}
1922

1923
	/* disable buffer size rounding to 128-byte multiples if supported */
1924 1925 1926
	if (align_buffer_size >= 0)
		chip->align_buffer_size = !!align_buffer_size;
	else {
1927
		if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1928 1929 1930 1931
			chip->align_buffer_size = 0;
		else
			chip->align_buffer_size = 1;
	}
1932

1933
	/* allow 64bit DMA address if supported by H/W */
1934 1935
	if (!(gcap & AZX_GCAP_64OK))
		dma_bits = 32;
1936 1937
	if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(dma_bits))) {
		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(dma_bits));
1938
	} else {
1939 1940
		dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
1941
	}
1942

1943 1944 1945 1946 1947 1948
	/* read number of streams from GCAP register instead of using
	 * hardcoded value
	 */
	chip->capture_streams = (gcap >> 8) & 0x0f;
	chip->playback_streams = (gcap >> 12) & 0x0f;
	if (!chip->playback_streams && !chip->capture_streams) {
1949 1950 1951 1952 1953 1954 1955 1956
		/* gcap didn't give any info, switching to old method */

		switch (chip->driver_type) {
		case AZX_DRIVER_ULI:
			chip->playback_streams = ULI_NUM_PLAYBACK;
			chip->capture_streams = ULI_NUM_CAPTURE;
			break;
		case AZX_DRIVER_ATIHDMI:
1957
		case AZX_DRIVER_ATIHDMI_NS:
1958 1959 1960
			chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
			chip->capture_streams = ATIHDMI_NUM_CAPTURE;
			break;
1961
		case AZX_DRIVER_GENERIC:
1962 1963 1964 1965 1966
		default:
			chip->playback_streams = ICH6_NUM_PLAYBACK;
			chip->capture_streams = ICH6_NUM_CAPTURE;
			break;
		}
1967
	}
1968 1969
	chip->capture_index_offset = 0;
	chip->playback_index_offset = chip->capture_streams;
1970 1971
	chip->num_streams = chip->playback_streams + chip->capture_streams;

1972 1973 1974 1975 1976 1977 1978 1979
	/* sanity check for the SDxCTL.STRM field overflow */
	if (chip->num_streams > 15 &&
	    (chip->driver_caps & AZX_DCAPS_SEPARATE_STREAM_TAG) == 0) {
		dev_warn(chip->card->dev, "number of I/O streams is %d, "
			 "forcing separate stream tags", chip->num_streams);
		chip->driver_caps |= AZX_DCAPS_SEPARATE_STREAM_TAG;
	}

1980 1981
	/* initialize streams */
	err = azx_init_streams(chip);
1982
	if (err < 0)
1983
		return err;
L
Linus Torvalds 已提交
1984

1985 1986 1987
	err = azx_alloc_stream_pages(chip);
	if (err < 0)
		return err;
L
Linus Torvalds 已提交
1988 1989

	/* initialize chip */
1990
	azx_init_pci(chip);
1991

1992 1993
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
		snd_hdac_i915_set_bclk(bus);
1994

1995
	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
L
Linus Torvalds 已提交
1996 1997

	/* codec detection */
1998
	if (!azx_bus(chip)->codec_mask) {
1999
		dev_err(card->dev, "no codecs found!\n");
2000
		return -ENODEV;
L
Linus Torvalds 已提交
2001 2002
	}

2003
	strcpy(card->driver, "HDA-Intel");
T
Takashi Iwai 已提交
2004 2005 2006 2007
	strlcpy(card->shortname, driver_short_names[chip->driver_type],
		sizeof(card->shortname));
	snprintf(card->longname, sizeof(card->longname),
		 "%s at 0x%lx irq %i",
2008
		 card->shortname, bus->addr, bus->irq);
2009

L
Linus Torvalds 已提交
2010 2011 2012
	return 0;
}

2013
#ifdef CONFIG_SND_HDA_PATCH_LOADER
2014 2015 2016 2017 2018 2019 2020 2021
/* callback from request_firmware_nowait() */
static void azx_firmware_cb(const struct firmware *fw, void *context)
{
	struct snd_card *card = context;
	struct azx *chip = card->private_data;
	struct pci_dev *pci = chip->pci;

	if (!fw) {
2022
		dev_err(card->dev, "Cannot load firmware, aborting\n");
2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037
		goto error;
	}

	chip->fw = fw;
	if (!chip->disabled) {
		/* continue probing */
		if (azx_probe_continue(chip))
			goto error;
	}
	return; /* OK */

 error:
	snd_card_free(card);
	pci_set_drvdata(pci, NULL);
}
2038
#endif
2039

2040 2041 2042 2043 2044
/*
 * HDA controller ops.
 */

/* PCI register access. */
2045
static void pci_azx_writel(u32 value, u32 __iomem *addr)
2046 2047 2048 2049
{
	writel(value, addr);
}

2050
static u32 pci_azx_readl(u32 __iomem *addr)
2051 2052 2053 2054
{
	return readl(addr);
}

2055
static void pci_azx_writew(u16 value, u16 __iomem *addr)
2056 2057 2058 2059
{
	writew(value, addr);
}

2060
static u16 pci_azx_readw(u16 __iomem *addr)
2061 2062 2063 2064
{
	return readw(addr);
}

2065
static void pci_azx_writeb(u8 value, u8 __iomem *addr)
2066 2067 2068 2069
{
	writeb(value, addr);
}

2070
static u8 pci_azx_readb(u8 __iomem *addr)
2071 2072 2073 2074
{
	return readb(addr);
}

2075 2076
static int disable_msi_reset_irq(struct azx *chip)
{
2077
	struct hdac_bus *bus = azx_bus(chip);
2078 2079
	int err;

2080 2081
	free_irq(bus->irq, chip);
	bus->irq = -1;
2082 2083 2084 2085 2086 2087 2088 2089 2090
	pci_disable_msi(chip->pci);
	chip->msi = 0;
	err = azx_acquire_irq(chip, 1);
	if (err < 0)
		return err;

	return 0;
}

2091
/* DMA page allocation helpers.  */
2092
static int dma_alloc_pages(struct hdac_bus *bus,
2093 2094 2095 2096
			   int type,
			   size_t size,
			   struct snd_dma_buffer *buf)
{
2097
	struct azx *chip = bus_to_azx(bus);
2098 2099 2100
	int err;

	err = snd_dma_alloc_pages(type,
2101
				  bus->dev,
2102 2103 2104 2105 2106 2107 2108
				  size, buf);
	if (err < 0)
		return err;
	mark_pages_wc(chip, buf, true);
	return 0;
}

2109
static void dma_free_pages(struct hdac_bus *bus, struct snd_dma_buffer *buf)
2110
{
2111
	struct azx *chip = bus_to_azx(bus);
2112

2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139
	mark_pages_wc(chip, buf, false);
	snd_dma_free_pages(buf);
}

static int substream_alloc_pages(struct azx *chip,
				 struct snd_pcm_substream *substream,
				 size_t size)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	int ret;

	mark_runtime_wc(chip, azx_dev, substream, false);
	ret = snd_pcm_lib_malloc_pages(substream, size);
	if (ret < 0)
		return ret;
	mark_runtime_wc(chip, azx_dev, substream, true);
	return 0;
}

static int substream_free_pages(struct azx *chip,
				struct snd_pcm_substream *substream)
{
	struct azx_dev *azx_dev = get_azx_dev(substream);
	mark_runtime_wc(chip, azx_dev, substream, false);
	return snd_pcm_lib_free_pages(substream);
}

2140 2141 2142 2143 2144 2145
static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
			     struct vm_area_struct *area)
{
#ifdef CONFIG_X86
	struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
	struct azx *chip = apcm->chip;
2146
	if (chip->uc_buffer)
2147 2148 2149 2150
		area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
#endif
}

2151
static const struct hdac_io_ops pci_hda_io_ops = {
2152 2153 2154 2155 2156 2157
	.reg_writel = pci_azx_writel,
	.reg_readl = pci_azx_readl,
	.reg_writew = pci_azx_writew,
	.reg_readw = pci_azx_readw,
	.reg_writeb = pci_azx_writeb,
	.reg_readb = pci_azx_readb,
2158 2159
	.dma_alloc_pages = dma_alloc_pages,
	.dma_free_pages = dma_free_pages,
2160 2161 2162 2163
};

static const struct hda_controller_ops pci_hda_ops = {
	.disable_msi_reset_irq = disable_msi_reset_irq,
2164 2165
	.substream_alloc_pages = substream_alloc_pages,
	.substream_free_pages = substream_free_pages,
2166
	.pcm_mmap_prepare = pcm_mmap_prepare,
D
Dylan Reid 已提交
2167
	.position_check = azx_position_check,
2168
	.link_power = azx_intel_link_power,
2169 2170
};

2171 2172
static int azx_probe(struct pci_dev *pci,
		     const struct pci_device_id *pci_id)
L
Linus Torvalds 已提交
2173
{
2174
	static int dev;
2175
	struct snd_card *card;
2176
	struct hda_intel *hda;
2177
	struct azx *chip;
2178
	bool schedule_probe;
2179
	int err;
L
Linus Torvalds 已提交
2180

2181 2182 2183 2184 2185 2186 2187
	if (dev >= SNDRV_CARDS)
		return -ENODEV;
	if (!enable[dev]) {
		dev++;
		return -ENOENT;
	}

2188 2189
	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
			   0, &card);
2190
	if (err < 0) {
2191
		dev_err(&pci->dev, "Error creating card!\n");
2192
		return err;
L
Linus Torvalds 已提交
2193 2194
	}

2195
	err = azx_create(card, pci, dev, pci_id->driver_data, &chip);
W
Wu Fengguang 已提交
2196 2197
	if (err < 0)
		goto out_free;
T
Takashi Iwai 已提交
2198
	card->private_data = chip;
2199
	hda = container_of(chip, struct hda_intel, chip);
2200 2201 2202 2203 2204

	pci_set_drvdata(pci, card);

	err = register_vga_switcheroo(chip);
	if (err < 0) {
2205
		dev_err(card->dev, "Error registering vga_switcheroo client\n");
2206 2207 2208 2209
		goto out_free;
	}

	if (check_hdmi_disabled(pci)) {
2210 2211
		dev_info(card->dev, "VGA controller is disabled\n");
		dev_info(card->dev, "Delaying initialization\n");
2212 2213 2214
		chip->disabled = true;
	}

2215
	schedule_probe = !chip->disabled;
L
Linus Torvalds 已提交
2216

2217 2218
#ifdef CONFIG_SND_HDA_PATCH_LOADER
	if (patch[dev] && *patch[dev]) {
2219 2220
		dev_info(card->dev, "Applying patch firmware '%s'\n",
			 patch[dev]);
2221 2222 2223
		err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
					      &pci->dev, GFP_KERNEL, card,
					      azx_firmware_cb);
2224 2225
		if (err < 0)
			goto out_free;
2226
		schedule_probe = false; /* continued in azx_firmware_cb() */
2227 2228 2229
	}
#endif /* CONFIG_SND_HDA_PATCH_LOADER */

2230
#ifndef CONFIG_SND_HDA_I915
2231 2232
	if (CONTROLLER_IN_GPU(pci))
		dev_err(card->dev, "Haswell/Broadwell HDMI/DP must build in CONFIG_SND_HDA_I915\n");
2233 2234
#endif

2235
	if (schedule_probe)
2236
		schedule_work(&hda->probe_work);
2237 2238

	dev++;
2239
	if (chip->disabled)
2240
		complete_all(&hda->probe_wait);
2241 2242 2243 2244 2245 2246 2247
	return 0;

out_free:
	snd_card_free(card);
	return err;
}

2248 2249 2250 2251 2252 2253 2254 2255 2256
#ifdef CONFIG_PM
/* On some boards setting power_save to a non 0 value leads to clicking /
 * popping sounds when ever we enter/leave powersaving mode. Ideally we would
 * figure out how to avoid these sounds, but that is not always feasible.
 * So we keep a list of devices where we disable powersaving as its known
 * to causes problems on these devices.
 */
static struct snd_pci_quirk power_save_blacklist[] = {
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2257
	SND_PCI_QUIRK(0x1849, 0xc892, "Asrock B85M-ITX", 0),
2258
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2259 2260
	SND_PCI_QUIRK(0x1849, 0x0397, "Asrock N68C-S UCC", 0),
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2261 2262
	SND_PCI_QUIRK(0x1849, 0x7662, "Asrock H81M-HDS", 0),
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2263
	SND_PCI_QUIRK(0x1043, 0x8733, "Asus Prime X370-Pro", 0),
2264 2265
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1581607 */
	SND_PCI_QUIRK(0x1558, 0x3501, "Clevo W35xSS_370SS", 0),
2266
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2267 2268
	SND_PCI_QUIRK(0x1028, 0x0497, "Dell Precision T3600", 0),
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2269 2270
	/* Note the P55A-UD3 and Z87-D3HP share the subsys id for the HDA dev */
	SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte P55A-UD3 / Z87-D3HP", 0),
2271 2272
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
	SND_PCI_QUIRK(0x8086, 0x2040, "Intel DZ77BH-55K", 0),
2273 2274
	/* https://bugzilla.kernel.org/show_bug.cgi?id=199607 */
	SND_PCI_QUIRK(0x8086, 0x2057, "Intel NUC5i7RYB", 0),
2275 2276
	/* https://bugs.launchpad.net/bugs/1821663 */
	SND_PCI_QUIRK(0x8086, 0x2064, "Intel SDP 8086:2064", 0),
2277 2278
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1520902 */
	SND_PCI_QUIRK(0x8086, 0x2068, "Intel NUC7i3BNB", 0),
2279 2280
	/* https://bugzilla.kernel.org/show_bug.cgi?id=198611 */
	SND_PCI_QUIRK(0x17aa, 0x2227, "Lenovo X1 Carbon 3rd Gen", 0),
2281 2282 2283 2284
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1689623 */
	SND_PCI_QUIRK(0x17aa, 0x367b, "Lenovo IdeaCentre B550", 0),
	/* https://bugzilla.redhat.com/show_bug.cgi?id=1572975 */
	SND_PCI_QUIRK(0x17aa, 0x36a7, "Lenovo C50 All in one", 0),
2285 2286
	/* https://bugs.launchpad.net/bugs/1821663 */
	SND_PCI_QUIRK(0x1631, 0xe017, "Packard Bell NEC IMEDIA 5204", 0),
2287 2288 2289 2290
	{}
};
#endif /* CONFIG_PM */

2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309
static void set_default_power_save(struct azx *chip)
{
	int val = power_save;

#ifdef CONFIG_PM
	if (pm_blacklist) {
		const struct snd_pci_quirk *q;

		q = snd_pci_quirk_lookup(chip->pci, power_save_blacklist);
		if (q && val) {
			dev_info(chip->card->dev, "device %04x:%04x is on the power_save blacklist, forcing power_save to 0\n",
				 q->subvendor, q->subdevice);
			val = 0;
		}
	}
#endif /* CONFIG_PM */
	snd_hda_set_power_save(&chip->bus, val * 1000);
}

2310 2311 2312 2313 2314 2315
/* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
	[AZX_DRIVER_NVIDIA] = 8,
	[AZX_DRIVER_TERA] = 1,
};

2316
static int azx_probe_continue(struct azx *chip)
2317
{
2318
	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
2319
	struct hdac_bus *bus = azx_bus(chip);
W
Wang Xingchao 已提交
2320
	struct pci_dev *pci = chip->pci;
2321 2322 2323
	int dev = chip->dev_index;
	int err;

2324
	to_hda_bus(bus)->bus_probing = 1;
2325
	hda->probe_continued = 1;
2326

2327
	/* bind with i915 if needed */
2328
	if (chip->driver_caps & AZX_DCAPS_I915_COMPONENT) {
2329
		err = snd_hdac_i915_init(bus);
2330 2331 2332 2333 2334 2335
		if (err < 0) {
			/* if the controller is bound only with HDMI/DP
			 * (for HSW and BDW), we need to abort the probe;
			 * for other chips, still continue probing as other
			 * codecs can be on the same link.
			 */
2336 2337 2338
			if (CONTROLLER_IN_GPU(pci)) {
				dev_err(chip->card->dev,
					"HSW/BDW HD-audio HDMI/DP requires binding with gfx driver\n");
2339
				goto out_free;
2340 2341
			} else {
				/* don't bother any longer */
2342 2343
				chip->driver_caps &=
					~(AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL);
2344
			}
2345
		}
2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356
	}

	/* Request display power well for the HDA controller or codec. For
	 * Haswell/Broadwell, both the display HDA controller and codec need
	 * this power. For other platforms, like Baytrail/Braswell, only the
	 * display codec needs the power and it can be released after probe.
	 */
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
		/* HSW/BDW controllers need this power */
		if (CONTROLLER_IN_GPU(pci))
			hda->need_i915_power = 1;
2357

2358
		err = snd_hdac_display_power(bus, true);
2359 2360 2361
		if (err < 0) {
			dev_err(chip->card->dev,
				"Cannot turn on display power on i915\n");
2362
			goto i915_power_fail;
2363
		}
2364 2365
	}

2366 2367 2368 2369
	err = azx_first_init(chip);
	if (err < 0)
		goto out_free;

2370 2371 2372 2373
#ifdef CONFIG_SND_HDA_INPUT_BEEP
	chip->beep_mode = beep_mode[dev];
#endif

L
Linus Torvalds 已提交
2374
	/* create codec instances */
2375
	err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
W
Wu Fengguang 已提交
2376 2377
	if (err < 0)
		goto out_free;
2378

2379
#ifdef CONFIG_SND_HDA_PATCH_LOADER
2380
	if (chip->fw) {
2381
		err = snd_hda_load_patch(&chip->bus, chip->fw->size,
2382
					 chip->fw->data);
2383 2384
		if (err < 0)
			goto out_free;
2385
#ifndef CONFIG_PM
2386 2387
		release_firmware(chip->fw); /* no longer needed */
		chip->fw = NULL;
2388
#endif
2389 2390
	}
#endif
2391
	if ((probe_only[dev] & 1) == 0) {
2392 2393 2394 2395
		err = azx_codec_configure(chip);
		if (err < 0)
			goto out_free;
	}
L
Linus Torvalds 已提交
2396

2397
	err = snd_card_register(chip->card);
W
Wu Fengguang 已提交
2398 2399
	if (err < 0)
		goto out_free;
L
Linus Torvalds 已提交
2400

2401 2402
	setup_vga_switcheroo_runtime_pm(chip);

2403
	chip->running = 1;
2404
	azx_add_card_list(chip);
2405

2406
	set_default_power_save(chip);
2407 2408

	if (azx_has_pm_runtime(chip))
2409
		pm_runtime_put_autosuspend(&pci->dev);
L
Linus Torvalds 已提交
2410

W
Wu Fengguang 已提交
2411
out_free:
2412
	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
2413
		&& !hda->need_i915_power)
2414
		snd_hdac_display_power(bus, false);
2415 2416

i915_power_fail:
2417
	if (err < 0)
2418 2419
		hda->init_failed = 1;
	complete_all(&hda->probe_wait);
2420
	to_hda_bus(bus)->bus_probing = 0;
W
Wu Fengguang 已提交
2421
	return err;
L
Linus Torvalds 已提交
2422 2423
}

2424
static void azx_remove(struct pci_dev *pci)
L
Linus Torvalds 已提交
2425
{
2426
	struct snd_card *card = pci_get_drvdata(pci);
2427 2428 2429 2430
	struct azx *chip;
	struct hda_intel *hda;

	if (card) {
2431
		/* cancel the pending probing work */
2432 2433
		chip = card->private_data;
		hda = container_of(chip, struct hda_intel, chip);
2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445
		/* FIXME: below is an ugly workaround.
		 * Both device_release_driver() and driver_probe_device()
		 * take *both* the device's and its parent's lock before
		 * calling the remove() and probe() callbacks.  The codec
		 * probe takes the locks of both the codec itself and its
		 * parent, i.e. the PCI controller dev.  Meanwhile, when
		 * the PCI controller is unbound, it takes its lock, too
		 * ==> ouch, a deadlock!
		 * As a workaround, we unlock temporarily here the controller
		 * device during cancel_work_sync() call.
		 */
		device_unlock(&pci->dev);
2446
		cancel_work_sync(&hda->probe_work);
2447
		device_lock(&pci->dev);
2448

2449
		snd_card_free(card);
2450
	}
L
Linus Torvalds 已提交
2451 2452
}

2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464
static void azx_shutdown(struct pci_dev *pci)
{
	struct snd_card *card = pci_get_drvdata(pci);
	struct azx *chip;

	if (!card)
		return;
	chip = card->private_data;
	if (chip && chip->running)
		azx_stop_chip(chip);
}

L
Linus Torvalds 已提交
2465
/* PCI IDs */
2466
static const struct pci_device_id azx_ids[] = {
2467
	/* CPT */
2468
	{ PCI_DEVICE(0x8086, 0x1c20),
2469
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2470
	/* PBG */
2471
	{ PCI_DEVICE(0x8086, 0x1d20),
2472
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2473
	/* Panther Point */
2474
	{ PCI_DEVICE(0x8086, 0x1e20),
2475
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2476 2477
	/* Lynx Point */
	{ PCI_DEVICE(0x8086, 0x8c20),
2478
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2479 2480 2481
	/* 9 Series */
	{ PCI_DEVICE(0x8086, 0x8ca0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2482 2483 2484 2485 2486
	/* Wellsburg */
	{ PCI_DEVICE(0x8086, 0x8d20),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
	{ PCI_DEVICE(0x8086, 0x8d21),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2487 2488
	/* Lewisburg */
	{ PCI_DEVICE(0x8086, 0xa1f0),
2489
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2490
	{ PCI_DEVICE(0x8086, 0xa270),
2491
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2492 2493
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c20),
2494
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2495 2496
	/* Lynx Point-LP */
	{ PCI_DEVICE(0x8086, 0x9c21),
2497
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2498 2499 2500
	/* Wildcat Point-LP */
	{ PCI_DEVICE(0x8086, 0x9ca0),
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2501 2502
	/* Sunrise Point */
	{ PCI_DEVICE(0x8086, 0xa170),
2503
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
2504 2505
	/* Sunrise Point-LP */
	{ PCI_DEVICE(0x8086, 0x9d70),
2506
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
V
Vinod Koul 已提交
2507 2508
	/* Kabylake */
	{ PCI_DEVICE(0x8086, 0xa171),
2509
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
V
Vinod Koul 已提交
2510 2511
	/* Kabylake-LP */
	{ PCI_DEVICE(0x8086, 0x9d71),
2512
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
2513 2514
	/* Kabylake-H */
	{ PCI_DEVICE(0x8086, 0xa2f0),
2515
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE },
M
Megha Dey 已提交
2516 2517
	/* Coffelake */
	{ PCI_DEVICE(0x8086, 0xa348),
2518
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2519 2520 2521
	/* Cannonlake */
	{ PCI_DEVICE(0x8086, 0x9dc8),
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
G
Guneshwor Singh 已提交
2522 2523 2524
	/* Icelake */
	{ PCI_DEVICE(0x8086, 0x34c8),
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2525 2526
	/* Broxton-P(Apollolake) */
	{ PCI_DEVICE(0x8086, 0x5a98),
2527
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_BROXTON },
2528 2529
	/* Broxton-T */
	{ PCI_DEVICE(0x8086, 0x1a98),
2530
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_BROXTON },
V
Vinod Koul 已提交
2531 2532
	/* Gemini-Lake */
	{ PCI_DEVICE(0x8086, 0x3198),
2533
	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_BROXTON },
2534
	/* Haswell */
2535
	{ PCI_DEVICE(0x8086, 0x0a0c),
2536
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2537
	{ PCI_DEVICE(0x8086, 0x0c0c),
2538
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2539
	{ PCI_DEVICE(0x8086, 0x0d0c),
2540
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2541 2542
	/* Broadwell */
	{ PCI_DEVICE(0x8086, 0x160c),
2543
	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2544 2545
	/* 5 Series/3400 */
	{ PCI_DEVICE(0x8086, 0x3b56),
2546
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2547
	/* Poulsbo */
2548
	{ PCI_DEVICE(0x8086, 0x811b),
2549
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2550
	/* Oaktrail */
2551
	{ PCI_DEVICE(0x8086, 0x080a),
2552
	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2553 2554
	/* BayTrail */
	{ PCI_DEVICE(0x8086, 0x0f04),
2555
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BAYTRAIL },
2556 2557
	/* Braswell */
	{ PCI_DEVICE(0x8086, 0x2284),
2558
	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BRASWELL },
2559
	/* ICH6 */
2560
	{ PCI_DEVICE(0x8086, 0x2668),
2561 2562
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH7 */
2563
	{ PCI_DEVICE(0x8086, 0x27d8),
2564 2565
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ESB2 */
2566
	{ PCI_DEVICE(0x8086, 0x269a),
2567 2568
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH8 */
2569
	{ PCI_DEVICE(0x8086, 0x284b),
2570 2571
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH9 */
2572
	{ PCI_DEVICE(0x8086, 0x293e),
2573 2574
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH9 */
2575
	{ PCI_DEVICE(0x8086, 0x293f),
2576 2577
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH10 */
2578
	{ PCI_DEVICE(0x8086, 0x3a3e),
2579 2580
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
	/* ICH10 */
2581
	{ PCI_DEVICE(0x8086, 0x3a6e),
2582
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2583 2584 2585 2586
	/* Generic Intel */
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2587
	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2588 2589 2590 2591 2592 2593 2594 2595
	/* ATI SB 450/600/700/800/900 */
	{ PCI_DEVICE(0x1002, 0x437b),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	{ PCI_DEVICE(0x1002, 0x4383),
	  .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
	/* AMD Hudson */
	{ PCI_DEVICE(0x1022, 0x780d),
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2596 2597 2598 2599
	/* AMD Stoney */
	{ PCI_DEVICE(0x1022, 0x157a),
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB |
			 AZX_DCAPS_PM_RUNTIME },
V
Vijendar Mukunda 已提交
2600 2601
	/* AMD Raven */
	{ PCI_DEVICE(0x1022, 0x15e3),
2602 2603
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB |
			 AZX_DCAPS_PM_RUNTIME },
2604
	/* ATI HDMI */
2605 2606
	{ PCI_DEVICE(0x1002, 0x0002),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2607 2608
	{ PCI_DEVICE(0x1002, 0x1308),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2609 2610
	{ PCI_DEVICE(0x1002, 0x157a),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2611 2612
	{ PCI_DEVICE(0x1002, 0x15b3),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2613 2614 2615 2616 2617 2618 2619 2620
	{ PCI_DEVICE(0x1002, 0x793b),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x7919),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x960f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0x970f),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2621 2622
	{ PCI_DEVICE(0x1002, 0x9840),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642
	{ PCI_DEVICE(0x1002, 0xaa00),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa08),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa10),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa18),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa20),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa28),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa30),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa38),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa40),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa48),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658
	{ PCI_DEVICE(0x1002, 0xaa50),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa58),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa60),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa68),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa80),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa88),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa90),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
	{ PCI_DEVICE(0x1002, 0xaa98),
	  .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2659
	{ PCI_DEVICE(0x1002, 0x9902),
2660
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2661
	{ PCI_DEVICE(0x1002, 0xaaa0),
2662
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2663
	{ PCI_DEVICE(0x1002, 0xaaa8),
2664
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2665
	{ PCI_DEVICE(0x1002, 0xaab0),
2666
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2667 2668
	{ PCI_DEVICE(0x1002, 0xaac0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2669 2670
	{ PCI_DEVICE(0x1002, 0xaac8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2671 2672 2673 2674
	{ PCI_DEVICE(0x1002, 0xaad8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
	{ PCI_DEVICE(0x1002, 0xaae8),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2675 2676 2677 2678
	{ PCI_DEVICE(0x1002, 0xaae0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
	{ PCI_DEVICE(0x1002, 0xaaf0),
	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2679
	/* VIA VT8251/VT8237A */
2680
	{ PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
2681 2682 2683 2684
	/* VIA GFX VT7122/VX900 */
	{ PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
	/* VIA GFX VT6122/VX11 */
	{ PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2685 2686 2687 2688 2689
	/* SIS966 */
	{ PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
	/* ULI M5461 */
	{ PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
	/* NVIDIA MCP */
2690 2691 2692
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2693
	  .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2694
	/* Teradici */
2695 2696
	{ PCI_DEVICE(0x6549, 0x1200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2697 2698
	{ PCI_DEVICE(0x6549, 0x2200),
	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2699
	/* Creative X-Fi (CA0110-IBG) */
2700 2701 2702 2703 2704
	/* CTHDA chips */
	{ PCI_DEVICE(0x1102, 0x0010),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
	{ PCI_DEVICE(0x1102, 0x0012),
	  .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
T
Takashi Iwai 已提交
2705
#if !IS_ENABLED(CONFIG_SND_CTXFI)
2706 2707 2708 2709
	/* the following entry conflicts with snd-ctxfi driver,
	 * as ctxfi driver mutates from HD-audio to native mode with
	 * a special command sequence.
	 */
2710 2711 2712
	{ PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2713
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2714
	  AZX_DCAPS_NO_64BIT | AZX_DCAPS_POSFIX_LPIB },
2715 2716
#else
	/* this entry seems still valid -- i.e. without emu20kx chip */
2717 2718
	{ PCI_DEVICE(0x1102, 0x0009),
	  .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2719
	  AZX_DCAPS_NO_64BIT | AZX_DCAPS_POSFIX_LPIB },
2720
#endif
2721 2722 2723
	/* CM8888 */
	{ PCI_DEVICE(0x13f6, 0x5011),
	  .driver_data = AZX_DRIVER_CMEDIA |
2724
	  AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2725 2726
	/* Vortex86MX */
	{ PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2727 2728
	/* VMware HDAudio */
	{ PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2729
	/* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2730 2731 2732
	{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2733
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2734 2735 2736
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
	  .class_mask = 0xffffff,
2737
	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
L
Linus Torvalds 已提交
2738 2739 2740 2741 2742
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);

/* pci_driver definition */
2743
static struct pci_driver azx_driver = {
2744
	.name = KBUILD_MODNAME,
L
Linus Torvalds 已提交
2745 2746
	.id_table = azx_ids,
	.probe = azx_probe,
2747
	.remove = azx_remove,
2748
	.shutdown = azx_shutdown,
2749 2750 2751
	.driver = {
		.pm = AZX_PM_OPS,
	},
L
Linus Torvalds 已提交
2752 2753
};

2754
module_pci_driver(azx_driver);