- 24 2月, 2010 1 次提交
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由 Michal Simek 提交于
I create wrong asm code but none test shows that this part of code is wrong. I am not convinces that were good idea to create asm optimized macros for caches. The reason is that there is not optimization with previous code that's why make sense to add old code and do some benchmarking which functions are faster. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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- 14 12月, 2009 2 次提交
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由 Michal Simek 提交于
Microblaze version 7.20.d is the first MB version which can be run on MMU linux. Please do not used previous version because they contain HW bug. Based on WB support was necessary to redesign whole cache design. Microblaze versions from 7.20.a don't need to disable IRQ and cache before working with them that's why there are special structures for it. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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由 Michal Simek 提交于
We used cache_line as cache_line_lenght. For this reason we did cache flushing 4 times longer than was necessary. Signed-off-by: NMichal Simek <monstr@monstr.eu>
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- 23 4月, 2009 1 次提交
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由 Michal Simek 提交于
It is not necessary to check cpuinfo.use_dcache because this checking is done in function which call that functions Signed-off-by: NMichal Simek <monstr@monstr.eu>
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- 27 3月, 2009 1 次提交
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由 Michal Simek 提交于
Reviewed-by: NIngo Molnar <mingo@elte.hu> Acked-by: NStephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: NJohn Linn <john.linn@xilinx.com> Acked-by: NJohn Williams <john.williams@petalogix.com> Signed-off-by: NMichal Simek <monstr@monstr.eu>
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