OcCpuLib.h 6.6 KB
Newer Older
V
vit9696 已提交
1 2 3 4 5 6 7 8 9 10 11 12 13 14
/** @file
  Copyright (C) 2016 - 2017, The HermitCrabs Lab. All rights reserved.

  All rights reserved.

  This program and the accompanying materials
  are licensed and made available under the terms and conditions of the BSD License
  which accompanies this distribution.  The full text of the license may be found at
  http://opensource.org/licenses/bsd-license.php

  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/

V
vit9696 已提交
15 16
#ifndef OC_CPU_LIB_H
#define OC_CPU_LIB_H
V
vit9696 已提交
17

18
#include <IndustryStandard/CpuId.h>
19
#include <IndustryStandard/AppleIntelCpuInfo.h>
20

V
vit9696 已提交
21 22
/**
  Assumed CPU frequency when it cannot be detected.
23
  Can be overridden by e.g. emulator.
V
vit9696 已提交
24
**/
25
#ifndef OC_FALLBACK_CPU_FREQUENCY
V
vit9696 已提交
26
#define OC_FALLBACK_CPU_FREQUENCY 1000000000
27
#endif
V
vit9696 已提交
28

V
vit9696 已提交
29
typedef struct {
V
vit9696 已提交
30 31 32
  //
  // Note, Vendor and BrandString are reordered for proper alignment.
  //
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
  UINT32                      Vendor[4];
  CHAR8                       BrandString[48];

  CPUID_VERSION_INFO_EAX      CpuidVerEax;
  CPUID_VERSION_INFO_EBX      CpuidVerEbx;
  CPUID_VERSION_INFO_ECX      CpuidVerEcx;
  CPUID_VERSION_INFO_EDX      CpuidVerEdx;

  CPUID_EXTENDED_CPU_SIG_ECX  CpuidExtSigEcx;
  CPUID_EXTENDED_CPU_SIG_EDX  CpuidExtSigEdx;

  UINT32                      MicrocodeRevision;
  BOOLEAN                     Hypervisor;   ///< indicate whether we are under virtualization

  UINT8                       Type;
  UINT8                       Family;
  UINT8                       Model;
  UINT8                       ExtModel;
  UINT8                       ExtFamily;
  UINT8                       Stepping;
  UINT64                      Features;
  UINT64                      ExtFeatures;
  UINT32                      Signature;
  UINT8                       Brand;
  UINT16                      AppleProcessorType;
  BOOLEAN                     CstConfigLock;

  UINT32                      MaxId;
  UINT32                      MaxExtId;

  UINT8                       MaxDiv;
  UINT8                       CurBusRatio;  ///< Current Multiplier
  UINT8                       MinBusRatio;  ///< Min Bus Ratio
  UINT8                       MaxBusRatio;  ///< Max Bus Ratio

  UINT8                       TurboBusRatio1;
  UINT8                       TurboBusRatio2;
  UINT8                       TurboBusRatio3;
  UINT8                       TurboBusRatio4;

  UINT16                      PackageCount;
  UINT16                      CoreCount;
  UINT16                      ThreadCount;
76

77 78 79
  //
  // External clock for SMBIOS Type4 table.
  //
80
  UINT16                      ExternalClock;
81

82 83
  //
  // Platform-dependent frequency for the Always Running Timer (ART), normally
84
  // 24Mhz. The firmware may choose to override this. Some CPUs like Xeon Scalable
85 86 87 88
  // use a different frequency. CPUs report the frequency through CPUID.15H.ECX.
  // If unreported, the frequency is looked up based on the model and family.
  //
  // Nominal Core Crystal Clock Frequency for known processor families:
89 90 91
  //   Intel Xeon Scalable with CPUID signature 0x0655: 25 Mhz     (server segment)
  //   6th and 7th generation Intel Core & Xeon W:      24 Mhz     (client segment)
  //   Nex Generation Intel Atom with CPUID 0x065C:     19.2 Mhz   (atom segment)
92
  //
93
  UINT64                      ARTFrequency;
94 95 96 97 98 99 100 101 102

  //
  // The CPU frequency derived from either CPUFrequencyFromTSC (legacy) or
  // CPUFrequencyFromART (preferred for Skylake and presumably newer processors
  // that have an Always Running Timer).
  //
  // CPUFrequencyFromTSC should approximate equal CPUFrequencyFromART. If not,
  // there is likely a bug or miscalculation.
  //
103
  UINT64                      CPUFrequency;
104 105 106 107

  //
  // The CPU frequency as reported by the Time Stamp Counter (TSC).
  //
108
  UINT64                      CPUFrequencyFromTSC;
109 110 111

  //
  // The CPU frequency derived from the Always Running Timer (ART) frequency:
M
M. R. Miller 已提交
112
  //   TSC Freq = (ART Freq * CPUID.15H:EBX[31:0]) / CPUID.15H:EAX[31:0]
113 114 115
  //
  // 0 if ART is not present.
  //
116
  UINT64                      CPUFrequencyFromART;
117

118 119 120
  //
  // TSC adjustment value read from MSR_IA32_TSC_ADJUST if present.
  //
121
  UINT64                      TscAdjust;
122 123 124 125 126

  //
  // The CPU frequency derived from the CPUID VMWare Timing leaf.
  // 0 if VMWare Timing leaf is not present.
  //
127
  UINT64                      CPUFrequencyFromVMT;
128

129 130 131 132
  //
  // The Front Side Bus (FSB) frequency calculated from dividing the CPU
  // frequency by the Max Ratio.
  //
133
  UINT64                      FSBFrequency;
134
} OC_CPU_INFO;
V
vit9696 已提交
135

136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151
typedef enum {
  OcCpuGenerationUnknown,
  OcCpuGenerationPenryn,
  OcCpuGenerationNehalem,
  OcCpuGenerationWestmere,
  OcCpuGenerationSandyBridge,
  OcCpuGenerationIvyBridge,
  OcCpuGenerationHaswell,
  OcCpuGenerationBroadwell,
  OcCpuGenerationSkylake,
  OcCpuGenerationKabyLake,
  OcCpuGenerationCoffeeLake,
  OcCpuGenerationCannonLake,
  OcCpuGenerationMaxGeneration
} OC_CPU_GENERATION;

152 153
/**
  Scan the processor and fill the cpu info structure with results.
V
vit9696 已提交
154

155
  @param[in] Cpu  A pointer to the cpu info structure to fill with results.
V
vit9696 已提交
156
**/
157
VOID
V
vit9696 已提交
158
OcCpuScanProcessor (
159
  IN OUT OC_CPU_INFO  *Cpu
V
vit9696 已提交
160 161
  );

162 163 164 165 166 167 168 169 170 171 172
/**
  Disable flex ratio if it has invalid value.
  Commonly fixes early reboot on APTIO IV (Ivy/Haswell).

  @param[in] Cpu  A pointer to the cpu info.
**/
VOID
OcCpuCorrectFlexRatio (
  IN OC_CPU_INFO  *Cpu
  );

173 174 175 176
/**
  Synchronise TSC on all cores (needed on server chipsets and some laptops).
  This does not fully replace VoodooTscSync or TSCAdjustReset due to
  the need to sync on S3 as well and may also work far less reliably
177
  due to the limitation of UEFI firmware not permitting MSR update runs in
178 179 180 181 182 183 184 185 186 187 188 189 190 191
  parallel with BSP and AP cores. However, it lets debug kernels work
  most of the time till the time TSC kexts start.

  @param[in]  Cpu       A pointer to the cpu info.
  @param[in]  Timeout   Amount of time to wait for CPU core rendezvous.

  @retval EFI_SUCCESS on success.
**/
EFI_STATUS
OcCpuCorrectTscSync (
  IN OC_CPU_INFO  *Cpu,
  IN UINTN        Timeout
  );

192 193 194 195 196 197 198
/**
  Converts CPUID Family and Model extracted from EAX
  CPUID (1) call to AppleFamily value. This implements
  cpuid_set_cpufamily functionality as it is in XNU.

  @param[in] VersionEax  CPUID (1) EAX value.

199
  @retval Apple Family (e.g. CPUFAMILY_UNKNOWN)
200 201 202
**/
UINT32
OcCpuModelToAppleFamily (
203
  IN CPUID_VERSION_INFO_EAX  VersionEax
204 205
  );

206
/**
207
  Obtain CPU's generation.
208

209 210 211 212
  @retval CPU's generation (e.g. OcCpuGenerationUnknown).
 */
OC_CPU_GENERATION
OcCpuGetGeneration (
213 214 215
  VOID
  );

216 217 218
/**
  Obtain CPU's invariant TSC frequency.

V
vit9696 已提交
219
  @retval CPU's TSC frequency or OC_FALLBACK_CPU_FREQUENCY.
220 221 222 223 224 225
**/
UINT64
OcGetTSCFrequency (
  VOID
  );

V
vit9696 已提交
226
#endif // OC_CPU_LIB_H_